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| author | Michael Meissner <meissner@linux.vnet.ibm.com> | 2013-06-12 22:41:38 +0000 |
|---|---|---|
| committer | Michael Meissner <meissner@gcc.gnu.org> | 2013-06-12 22:41:38 +0000 |
| commit | 4b02c96265fb52f9f1b19a6fcb350693b52f4135 (patch) | |
| tree | ea345c131c43e5b0cfcc0c98ab871b17860e7e27 /gcc/ada/gcc-interface/utils.c | |
| parent | 73a23b06358ad97298f638c98c5857aa5cf0427c (diff) | |
| download | gcc-4b02c96265fb52f9f1b19a6fcb350693b52f4135.zip gcc-4b02c96265fb52f9f1b19a6fcb350693b52f4135.tar.gz gcc-4b02c96265fb52f9f1b19a6fcb350693b52f4135.tar.bz2 | |
rs6000.c (emit_load_locked): Add support for power8 byte, half-word, and quad-word atomic instructions.
[gcc]
2013-06-12 Michael Meissner <meissner@linux.vnet.ibm.com>
Pat Haugen <pthaugen@us.ibm.com>
Peter Bergner <bergner@vnet.ibm.com>
* config/rs6000/rs6000.c (emit_load_locked): Add support for
power8 byte, half-word, and quad-word atomic instructions.
(emit_store_conditional): Likewise.
(rs6000_expand_atomic_compare_and_swap): Likewise.
(rs6000_expand_atomic_op): Likewise.
* config/rs6000/sync.md (larx): Add new modes for power8.
(stcx): Likewise.
(AINT): New mode iterator to include TImode as well as normal
integer modes on power8.
(fetchop_pred): Use int_reg_operand instead of gpc_reg_operand so
that VSX registers are not considered. Use AINT mode iterator
instead of INT1 to allow inclusion of quad word atomic operations
on power8.
(load_locked<mode>): Likewise.
(store_conditional<mode>): Likewise.
(atomic_compare_and_swap<mode>): Likewise.
(atomic_exchange<mode>): Likewise.
(atomic_nand<mode>): Likewise.
(atomic_fetch_<fetchop_name><mode>): Likewise.
(atomic_nand_fetch<mode>): Likewise.
(mem_thread_fence): Use gen_loadsync_<mode> instead of enumerating
each type.
(ATOMIC): On power8, add QImode, HImode modes.
(load_locked<QHI:mode>_si): Varients of load_locked for QI/HI
modes that promote to SImode.
(load_lockedti): Convert TImode arguments to PTImode, so that we
get a guaranteed even/odd register pair.
(load_lockedpti): Likewise.
(store_conditionalti): Likewise.
(store_conditionalpti): Likewise.
* config/rs6000/rs6000.md (QHI): New mode iterator for power8
atomic load/store instructions.
(HSI): Likewise.
[gcc/testsuite]
2013-06-12 Michael Meissner <meissner@linux.vnet.ibm.com>
Pat Haugen <pthaugen@us.ibm.com>
Peter Bergner <bergner@vnet.ibm.com>
* gcc.target/powerpc/atomic-p7.c: New file, add tests for atomic
load/store instructions on power7, power8.
* gcc.target/powerpc/atomic-p8.c: Likewise.
Co-Authored-By: Pat Haugen <pthaugen@us.ibm.com>
Co-Authored-By: Peter Bergner <bergner@vnet.ibm.com>
From-SVN: r200044
Diffstat (limited to 'gcc/ada/gcc-interface/utils.c')
0 files changed, 0 insertions, 0 deletions