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authorUros Bizjak <ubizjak@gmail.com>2023-05-18 20:45:37 +0200
committerUros Bizjak <ubizjak@gmail.com>2023-05-18 20:47:00 +0200
commitfe7b9c2e21e15db44af95aeca279971e05d7a089 (patch)
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parenta726d007f197d13ec80b9d625bf8bab97c96384c (diff)
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i386: Add infrastructure for QImode partial vector mult and shift operations
QImode partial vector multiplications and shifts can be implemented using their HImode counterparts. Add infrastructure to handle V8QImode and V4QImode vectors by extending (interleaving) their input operands to V8HImode, performing V8HImode operation and truncating output back to the original QImode vector. The patch implements V8QImode and V4QImode multiplication for SSE2 targets, using generic permutation to truncate output operand, but still taking advantage of VPMOVWB down convert instruction, when available. The patch also removes setting of REG_EQAUL note to the last insn of ix86_expand_vecop_qihi expander. This is what generic code does automatically when named pattern is expanded. gcc/ChangeLog: * config/i386/i386-expand.cc (ix86_expand_vecop_qihi_partial): New. (ix86_expand_vecop_qihi): Add op2vec bool variable. Do not set REG_EQUAL note. * config/i386/i386-protos.h (ix86_expand_vecop_qihi_partial): Add prototype. * config/i386/i386.cc (ix86_multiplication_cost): Handle V4QImode and V8QImode. * config/i386/mmx.md (mulv8qi3): New expander. (mulv4qi3): Ditto. * config/i386/sse.md (mulv8qi3): Remove. gcc/testsuite/ChangeLog: * gcc.target/i386/avx512vl-pr95488-1.c: Adjust expected scan-assembler-times frequency and strings.. * gcc.target/i386/vect-mulv4qi.c: New test. * gcc.target/i386/vect-mulv8qi.c: New test.
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