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authorxuli <xuli1@eswincomputing.com>2024-01-22 06:41:49 +0000
committerxuli <xuli1@eswincomputing.com>2024-01-22 06:45:55 +0000
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RISC-V: Bugfix for resolve_overloaded_builtin[PR113420]
v2: Avoid internal ICE for the case below. vint8mf8_t test_vle8_v_i8mf8_m(vbool64_t vm, const int32_t *rs1, size_t vl) { return __riscv_vle8(vm, rs1, vl); } v1: Change the hash value of overloaded intrinsic from considering all parameter types to: 1. Encoding vector data type 2. In order to distinguish vle8_v_i8mf8_m(vbool64_t vm, const int8_t *rs1, size_t vl) and vle8_v_u8mf8_m(vbool64_t vm, const uint8_t *rs1, size_t vl), encode the pointer type 3. In order to distinguish vfadd_vv_f32mf2_rm(vfloat32mf2_t vs2, vfloat32mf2_t vs1, size_t vl) and vfadd_vv_f32mf2(vfloat32mf2_t vs2, vfloat32mf2_t vs1, size_t vl), encode the number of parameters. The same goes for the vxrm intrinsics. PR target/113420 gcc/ChangeLog: * config/riscv/riscv-vector-builtins.cc (has_vxrm_or_frm_p):remove. (registered_function::overloaded_hash):refactor. (resolve_overloaded_builtin):avoid internal ICE. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/base/pr113420-1.c: New test. * gcc.target/riscv/rvv/base/pr113420-2.c: New test.
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