RISC-V: Add testcases for unsigned scalar .SAT_ADD IMM form 2

This patch would like to add test cases for the unsigned scalar
.SAT_ADD IMM form 2.  Aka:

Form 2:
  #define DEF_SAT_U_ADD_IMM_FMT_2(T)      \
  T __attribute__((noinline))             \
  sat_u_add_imm_##T##_fmt_1 (T x)         \
  {                                       \
    return (T)(x + 9) < x ? -1 : (x + 9); \
  }

DEF_SAT_U_ADD_IMM_FMT_2(uint64_t)

The below test is passed for this patch.
* The rv64gcv regression test.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/sat_arith.h: Add helper test macro.
	* gcc.target/riscv/sat_u_add_imm-5.c: New test.
	* gcc.target/riscv/sat_u_add_imm-6.c: New test.
	* gcc.target/riscv/sat_u_add_imm-7.c: New test.
	* gcc.target/riscv/sat_u_add_imm-8.c: New test.
	* gcc.target/riscv/sat_u_add_imm-run-5.c: New test.
	* gcc.target/riscv/sat_u_add_imm-run-6.c: New test.
	* gcc.target/riscv/sat_u_add_imm-run-7.c: New test.
	* gcc.target/riscv/sat_u_add_imm-run-8.c: New test.

Signed-off-by: Pan Li <pan2.li@intel.com>

0 files changed, 0 insertions, 0 deletions