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| author | Ulrich Weigand <uweigand@de.ibm.com> | 2006-06-06 17:01:27 +0000 |
|---|---|---|
| committer | Ulrich Weigand <uweigand@gcc.gnu.org> | 2006-06-06 17:01:27 +0000 |
| commit | 8cf0db2bcd9ed44aebb664815717294b4c9affc5 (patch) | |
| tree | da37bb730304b618f9e7594aa00a76fcc99fbba5 /gcc/ChangeLog | |
| parent | 696dad4b6bbaf23576e59546d1bd3e93dd0e96c4 (diff) | |
| download | gcc-8cf0db2bcd9ed44aebb664815717294b4c9affc5.zip gcc-8cf0db2bcd9ed44aebb664815717294b4c9affc5.tar.gz gcc-8cf0db2bcd9ed44aebb664815717294b4c9affc5.tar.bz2 | |
re PR target/27842 (Miscompile of Altivec vec_abs (float) inside loop)
PR target/27842
* config/rs6000/altivec.md (UNSPEC_VSLW): Remove.
("altivec_vspltisw_v4sf", "altivec_vslw_v4sf"): Remove.
("mulv4sf3", "absv4sf3", "negv4sf3"): Adapt users to use
V4SImode temporaries and operations instead.
PR target/27842
* gcc.dg/vmx/pr27842.c: New test.
From-SVN: r114438
Diffstat (limited to 'gcc/ChangeLog')
| -rw-r--r-- | gcc/ChangeLog | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 204498c..1f69780 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2006-06-06 Ulrich Weigand <uweigand@de.ibm.com> + + PR target/27842 + * config/rs6000/altivec.md (UNSPEC_VSLW): Remove. + ("altivec_vspltisw_v4sf", "altivec_vslw_v4sf"): Remove. + ("mulv4sf3", "absv4sf3", "negv4sf3"): Adapt users to use + V4SImode temporaries and operations instead. + 2006-06-06 Joseph S. Myers <joseph@codesourcery.com> * config/mips/t-linux64 (tp-bit.c): Append to tp-bit.c, not |