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authorXionghu Luo <luoxhu@linux.ibm.com>2020-05-10 21:06:20 -0500
committerXionghu Luo <luoxhu@linux.ibm.com>2020-05-10 21:12:46 -0500
commit0447929f11e6a3e1b076841712b90a8b6bc7d33a (patch)
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Add handling of MULT_EXPR/PLUS_EXPR for wrapping overflow in affine combination(PR83403)
Use determine_value_range to get value range info for fold convert expressions with internal operation PLUS_EXPR/MINUS_EXPR/MULT_EXPR when not overflow on wrapping overflow inner type. i.e.: (long unsigned int)((unsigned int)n * 10 + 1) => (long unsigned int)n * (long unsigned int)10 + (long unsigned int)1 With this patch for affine combination, load/store motion could detect more address refs independency and promote some memory expressions to registers within loop. PS: Replace the previous "(T1)(X + CST) as (T1)X - (T1)(-CST))" to "(T1)(X + CST) as (T1)X + (T1)(CST))" for wrapping overflow. Bootstrap and regression tested pass on Power8-LE. gcc/ChangeLog 2020-05-11 Xiong Hu Luo <luoxhu@linux.ibm.com> PR tree-optimization/83403 * tree-affine.c (expr_to_aff_combination): Replace SSA_NAME with determine_value_range, Add fold conversion of MULT_EXPR, fix the previous PLUS_EXPR. gcc/testsuite/ChangeLog 2020-05-11 Xiong Hu Luo <luoxhu@linux.ibm.com> PR tree-optimization/83403 * gcc.dg/tree-ssa/pr83403-1.c: New test. * gcc.dg/tree-ssa/pr83403-2.c: New test. * gcc.dg/tree-ssa/pr83403.h: New header.
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+2020-05-11 Xiong Hu Luo <luoxhu@linux.ibm.com>
+
+ PR tree-optimization/83403
+ * tree-affine.c (expr_to_aff_combination): Replace SSA_NAME with
+ determine_value_range, Add fold conversion of MULT_EXPR, fix the
+ previous PLUS_EXPR.
+
2020-05-10 Gerald Pfeifer <gerald@pfeifer.com>
* config/i386/i386-c.c (ix86_target_macros): Define _ILP32 and