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| author | GCC Administrator <gccadmin@gcc.gnu.org> | 2022-04-09 00:16:56 +0000 |
|---|---|---|
| committer | GCC Administrator <gccadmin@gcc.gnu.org> | 2022-04-09 00:16:56 +0000 |
| commit | 405eda0d34b69fb6ee12ba6ed0f69c2c2411d8ee (patch) | |
| tree | 08ccb71a9b0eb64dd762f46e022d47e6a45f213a /gcc/ChangeLog | |
| parent | 7b4495d3c4040d8f56c05dd254d76269d4471623 (diff) | |
| download | gcc-405eda0d34b69fb6ee12ba6ed0f69c2c2411d8ee.zip gcc-405eda0d34b69fb6ee12ba6ed0f69c2c2411d8ee.tar.gz gcc-405eda0d34b69fb6ee12ba6ed0f69c2c2411d8ee.tar.bz2 | |
Daily bump.
Diffstat (limited to 'gcc/ChangeLog')
| -rw-r--r-- | gcc/ChangeLog | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 2a7e43d..cfdd355 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,41 @@ +2022-04-08 Andre Vieira <andre.simoesdiasvieira@arm.com> + + PR target/105157 + * config.gcc: Shift ext_mask by TARGET_CPU_NBITS. + * config/aarch64/aarch64.h (TARGET_CPU_NBITS): New macro. + (TARGET_CPU_MASK): Likewise. + (TARGET_CPU_DEFAULT): Use TARGET_CPU_NBITS. + * config/aarch64/aarch64.cc (aarch64_get_tune_cpu): Use TARGET_CPU_MASK. + (aarch64_get_arch): Likewise. + (aarch64_override_options): Use TARGET_CPU_NBITS. + +2022-04-08 Richard Biener <rguenther@suse.de> + + PR tree-optimization/105198 + * tree-predcom.cc (find_looparound_phi): Check whether + the found memory location of the entry value is clobbered + inbetween the value we want to use and loop entry. + +2022-04-08 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/105189 + * fold-const.cc (make_range_step): Fix up handling of + (unsigned) x +[low, -] ranges for signed x if low fits into + typeof (x). + +2022-04-08 Richard Biener <rguenther@suse.de> + + PR tree-optimization/105175 + * tree-vect-stmts.cc (vectorizable_operation): Suppress + -Wvector-operation-performance if using emulated vectors. + * tree-vect-generic.cc (expand_vector_piecewise): Do not diagnose + -Wvector-operation-performance when suppressed. + (expand_vector_parallel): Likewise. + (expand_vector_comparison): Likewise. + (expand_vector_condition): Likewise. + (lower_vec_perm): Likewise. + (expand_vector_conversion): Likewise. + 2022-04-07 Tamar Christina <tamar.christina@arm.com> PR target/104409 |