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authorRobin Dapp <rdapp@ventanamicro.com>2025-02-21 17:08:16 +0100
committerRobin Dapp <rdapp@ventanamicro.com>2025-02-24 16:04:13 +0100
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RISC-V: Include pattern stmts for dynamic LMUL computation [PR114516].
When scanning for program points, i.e. vector statements, we're missing pattern statements. In PR114516 this becomes obvious as we choose LMUL=8 assuming there are only three statements but the divmod pattern adds another three. Those push us beyond four registers so we need to switch to LMUL=4. This patch adds pattern statements to the program points which helps calculate a better register pressure estimate. PR target/114516 gcc/ChangeLog: * config/riscv/riscv-vector-costs.cc (compute_estimated_lmul): Add pattern statements to program points. gcc/testsuite/ChangeLog: * gcc.dg/vect/costmodel/riscv/rvv/pr114516.c: New test.
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