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| author | Jakub Jelinek <jakub@redhat.com> | 2020-01-01 01:20:39 +0100 |
|---|---|---|
| committer | Jakub Jelinek <jakub@gcc.gnu.org> | 2020-01-01 01:20:39 +0100 |
| commit | 2efa10d528bb20bff299a899b1f226b6174b50da (patch) | |
| tree | a7f908cf8e704324b930e7585e10d53058793740 /gcc/ChangeLog-2019 | |
| parent | b3b13bf18692701d54d6754ba7e9f155906c8d17 (diff) | |
| download | gcc-2efa10d528bb20bff299a899b1f226b6174b50da.zip gcc-2efa10d528bb20bff299a899b1f226b6174b50da.tar.gz gcc-2efa10d528bb20bff299a899b1f226b6174b50da.tar.bz2 | |
re PR tree-optimization/93098 (ICE with negative shifter)
PR tree-optimization/93098
* match.pd (popcount): For shift amounts, use integer_onep
or wi::to_widest () == cst instead of tree_to_uhwi () == cst
tests. Make sure that precision is power of two larger than or equal
to 16. Ensure shift is never negative. Use HOST_WIDE_INT_UC macro
instead of ULL suffixed constants. Formatting fixes.
* gcc.c-torture/compile/pr93098.c: New test.
From-SVN: r279809
Diffstat (limited to 'gcc/ChangeLog-2019')
| -rw-r--r-- | gcc/ChangeLog-2019 | 37052 |
1 files changed, 37052 insertions, 0 deletions
diff --git a/gcc/ChangeLog-2019 b/gcc/ChangeLog-2019 new file mode 100644 index 0000000..9f5782f --- /dev/null +++ b/gcc/ChangeLog-2019 @@ -0,0 +1,37052 @@ +2020-12-31 Richard Sandiford <richard.sandiford@arm.com> + + * tree-vect-stmts.c (vectorizable_condition): Only nullify cond_expr + if we've created a new condition. Don't nullify it if we've decided + to keep it and then invert the result. + +2020-12-31 Richard Sandiford <richard.sandiford@arm.com> + + * tree-vect-loop-manip.c (create_lcssa_for_virtual_phi): Return + the incoming virtual operand definition. + (vect_do_peeling): When vectorizing an epilogue loop, handle the + case in which the main loop has a virtual phi and the epilogue + and scalar loops don't. Restore an earlier comment about the + update_ssa call. + +2019-12-30 Olivier Hainque <hainque@adacore.com> + + * config/vxworks/stdint.h: New file. Include _yvals.h + then stdint-gcc.h. + * config/t-vxworks: Arrange to install the stdint.h wrapper. + * config.gcc (*-*-vxworks*): Add stdint-gcc.h to $extra_headers + so it gets copied. Set use_gcc_stdint to request _not_ crafting + stdint.h through the common Makefile rules. + +2019-12-30 Olivier Hainque <hainque@adacore.com> + + * config/vxworks/_yvals.h: New file. + * config/vxworks/_yvals-wrapper.h: New file. + * gcc/config/vxworks/math.h: Use it to wrap the VxWorks + math.h header. + * gcc/config/vxworks/complex.h: Likewise. + * gcc/config/vxworks/setjmp.h: Likewise. + * gcc/config/vxworks/inttypes.h: Likewise. + * config.gcc (*-*-vxworks*): Add system header wrappers + to extra_headers. + (powerpc-*-vxworks*): Reuse the common extra_headers. + +2019-12-30 Olivier Hainque <hainque@adacore.com> + + * config/vxworks/_vxworks-versions.h: New file. + * config.gcc (*-*-vxworks*): Add it to extra_headers. + +2019-12-30 Olivier Hainque <hainque@adacore.com> + + * config/t-vxworks: Rework the vxworks.o compilation + rules to use $(COMPILE). + +2019-12-30 Joel Brobecker <brobecker@adacore.com> + + * config.gcc <*-*-vxworks*>: Add vxworks-c.o to c_target_objs + and cxx_target_objs. Set target_has_targetcm to "yes". Add + vxworks-predef.h to extra_headers. + * config/t-vxworks (vxworks-c.o): New target. + * config/vxworks-c.c: New file. + * config/vxworks/vxworks-predef.h: New file. + +2019-12-30 Alexandre Oliva <oliva@adacore.com> + Olivier Hainque <hainque@adacore.com> + + * config/vx-common.h (WCHAR_TYPE_SIZE): 32 on VxWorks 7. + (WCHAR_TYPE): Pick accordingly. + (WINT_TYPE_SIZE): Define in terms of WCHAR_TYPE_SIZE. + (WINT_TYPE): Define in terms of WCHAR_TYPE. + +2019-12-30 Olivier Hainque <hainque@adacore.com> + + * config/vx-common.h: Minor reorganization and add + sectioning comments. + +2019-12-30 Doug Rupp <rupp@adacore.com> + + * config/rs6000/vxworks.h (STARTFILE_PREFIX_SPEC): Define. + +2019-12-30 Olivier Hainque <hainque@adacore.com> + Jerome Lambourg <labourg@adacore.com> + + * config/t-vxworks: Arrange to alter/restore glimits.h + before/after stmp-int-hdrs, so it uses a different macro + name to protect itself against recursive inclusions. + +2019-12-30 Peter Bergner <bergner@linux.ibm.com> + + PR target/92923 + * config/rs6000/rs6000-builtin.def (VAND, VANDC, VNOR, VOR, VXOR): + Delete. + (EQV_V16QI_UNS, EQV_V8HI_UNS, EQV_V4SI_UNS, EQV_V2DI_UNS, EQV_V1TI_UNS, + NAND_V16QI_UNS, NAND_V8HI_UNS, NAND_V4SI_UNS, NAND_V2DI_UNS, + NAND_V1TI_UNS, ORC_V16QI_UNS, ORC_V8HI_UNS, ORC_V4SI_UNS, ORC_V2DI_UNS, + ORC_V1TI_UNS, VAND_V16QI_UNS, VAND_V16QI, VAND_V8HI_UNS, VAND_V8HI, + VAND_V4SI_UNS, VAND_V4SI, VAND_V2DI_UNS, VAND_V2DI, VAND_V4SF, + VAND_V2DF, VANDC_V16QI_UNS, VANDC_V16QI, VANDC_V8HI_UNS, VANDC_V8HI, + VANDC_V4SI_UNS, VANDC_V4SI, VANDC_V2DI_UNS, VANDC_V2DI, VANDC_V4SF, + VANDC_V2DF, VNOR_V16QI_UNS, VNOR_V16QI, VNOR_V8HI_UNS, VNOR_V8HI, + VNOR_V4SI_UNS, VNOR_V4SI, VNOR_V2DI_UNS, VNOR_V2DI, VNOR_V4SF, + VNOR_V2DF, VOR_V16QI_UNS, VOR_V16QI, VOR_V8HI_UNS, VOR_V8HI, + VOR_V4SI_UNS, VOR_V4SI, VOR_V2DI_UNS, VOR_V2DI, VOR_V4SF, VOR_V2DF, + VXOR_V16QI_UNS, VXOR_V16QI, VXOR_V8HI_UNS, VXOR_V8HI, + VXOR_V4SI_UNS, VXOR_V4SI, VXOR_V2DI_UNS, VXOR_V2DI, VXOR_V4SF, + VXOR_V2DF): Add definitions. + * config/rs6000/rs6000-call.c (altivec_overloaded_builtins) + <ALTIVEC_BUILTIN_VAND, ALTIVEC_BUILTIN_VANDC, ALTIVEC_BUILTIN_VNOR, + ALTIVEC_BUILTIN_VOR, ALTIVEC_BUILTIN_VXOR>: Remove. + <ALTIVEC_BUILTIN_VAND_V4SF, ALTIVEC_BUILTIN_VAND_V2DF, + ALTIVEC_BUILTIN_VAND_V2DI, ALTIVEC_BUILTIN_VAND_V2DI_UNS, + ALTIVEC_BUILTIN_VAND_V4SI_UNS, ALTIVEC_BUILTIN_VAND_V4SI, + ALTIVEC_BUILTIN_VAND_V8HI_UNS, ALTIVEC_BUILTIN_VAND_V8HI, + ALTIVEC_BUILTIN_VAND_V16QI, ALTIVEC_BUILTIN_VAND_V16QI_UNS, + ALTIVEC_BUILTIN_VANDC_V4SF, ALTIVEC_BUILTIN_VANDC_V2DF, + ALTIVEC_BUILTIN_VANDC_V2DI, ALTIVEC_BUILTIN_VANDC_V2DI_UNS, + ALTIVEC_BUILTIN_VANDC_V4SI_UNS, ALTIVEC_BUILTIN_VANDC_V4SI, + ALTIVEC_BUILTIN_VANDC_V8HI_UNS, ALTIVEC_BUILTIN_VANDC_V8HI, + ALTIVEC_BUILTIN_VANDC_V16QI, ALTIVEC_BUILTIN_VANDC_V16QI_UNS, + ALTIVEC_BUILTIN_VNOR_V4SF, ALTIVEC_BUILTIN_VNOR_V2DF, + ALTIVEC_BUILTIN_VNOR_V2DI, ALTIVEC_BUILTIN_VNOR_V2DI_UNS, + ALTIVEC_BUILTIN_VNOR_V4SI, ALTIVEC_BUILTIN_VNOR_V4SI_UNS, + ALTIVEC_BUILTIN_VNOR_V8HI, ALTIVEC_BUILTIN_VNOR_V8HI_UNS, + ALTIVEC_BUILTIN_VNOR_V16QI, ALTIVEC_BUILTIN_VNOR_V16QI_UNS, + ALTIVEC_BUILTIN_VOR_V4SF, ALTIVEC_BUILTIN_VOR_V2DF, + ALTIVEC_BUILTIN_VOR_V2DI, ALTIVEC_BUILTIN_VOR_V2DI_UNS, + ALTIVEC_BUILTIN_VOR_V4SI_UNS, ALTIVEC_BUILTIN_VOR_V4SI, + ALTIVEC_BUILTIN_VOR_V8HI_UNS, ALTIVEC_BUILTIN_VOR_V8HI, + ALTIVEC_BUILTIN_VOR_V16QI, ALTIVEC_BUILTIN_VOR_V16QI_UNS, + ALTIVEC_BUILTIN_VXOR_V4SF, ALTIVEC_BUILTIN_VXOR_V2DF, + ALTIVEC_BUILTIN_VXOR_V2DI, ALTIVEC_BUILTIN_VXOR_V2DI_UNS, + ALTIVEC_BUILTIN_VXOR_V4SI_UNS, ALTIVEC_BUILTIN_VXOR_V4SI, + ALTIVEC_BUILTIN_VXOR_V8HI, ALTIVEC_BUILTIN_VXOR_V8HI_UNS, + ALTIVEC_BUILTIN_VXOR_V16QI, ALTIVEC_BUILTIN_VXOR_V16QI_UNS>: Add + definitions. + <P8V_BUILTIN_EQV_V16QI, P8V_BUILTIN_EQV_V8HI, P8V_BUILTIN_EQV_V4SI, + P8V_BUILTIN_EQV_V2DI, P8V_BUILTIN_NAND_V16QI, P8V_BUILTIN_NAND_V8HI, + P8V_BUILTIN_NAND_V4SI, P8V_BUILTIN_NAND_V2DI, P8V_BUILTIN_ORC_V16QI, + P8V_BUILTIN_ORC_V8HI, P8V_BUILTIN_ORC_V4SI, + P8V_BUILTIN_ORC_V2DI>: Change unsigned usages to use the new *_UNS + definition names. + (rs6000_gimple_fold_builtin) <ALTIVEC_BUILTIN_VAND_V16QI_UNS, + ALTIVEC_BUILTIN_VAND_V16QI, ALTIVEC_BUILTIN_VAND_V8HI_UNS, + ALTIVEC_BUILTIN_VAND_V8HI, ALTIVEC_BUILTIN_VAND_V4SI_UNS, + ALTIVEC_BUILTIN_VAND_V4SI, ALTIVEC_BUILTIN_VAND_V2DI_UNS, + ALTIVEC_BUILTIN_VAND_V2DI, ALTIVEC_BUILTIN_VAND_V4SF, + ALTIVEC_BUILTIN_VAND_V2DF, ALTIVEC_BUILTIN_VANDC_V16QI_UNS, + ALTIVEC_BUILTIN_VANDC_V16QI, ALTIVEC_BUILTIN_VANDC_V8HI_UNS, + ALTIVEC_BUILTIN_VANDC_V8HI, ALTIVEC_BUILTIN_VANDC_V4SI_UNS, + ALTIVEC_BUILTIN_VANDC_V4SI, ALTIVEC_BUILTIN_VANDC_V2DI_UNS, + ALTIVEC_BUILTIN_VANDC_V2DI, ALTIVEC_BUILTIN_VANDC_V4SF, + ALTIVEC_BUILTIN_VANDC_V2DF, P8V_BUILTIN_NAND_V16QI_UNS, + P8V_BUILTIN_NAND_V8HI_UNS, P8V_BUILTIN_NAND_V4SI_UNS, + P8V_BUILTIN_NAND_V2DI_UNS, P8V_BUILTIN_NAND_V2DI, + ALTIVEC_BUILTIN_VOR_V16QI_UNS, ALTIVEC_BUILTIN_VOR_V16QI, + ALTIVEC_BUILTIN_VOR_V8HI_UNS, ALTIVEC_BUILTIN_VOR_V8HI, + ALTIVEC_BUILTIN_VOR_V4SI_UNS, ALTIVEC_BUILTIN_VOR_V4SI, + ALTIVEC_BUILTIN_VOR_V2DI_UNS, ALTIVEC_BUILTIN_VOR_V2DI, + ALTIVEC_BUILTIN_VOR_V4SF, ALTIVEC_BUILTIN_VOR_V2DF, + P8V_BUILTIN_ORC_V16QI_UNS, P8V_BUILTIN_ORC_V8HI_UNS, + P8V_BUILTIN_ORC_V4SI_UNS, P8V_BUILTIN_ORC_V2DI_UNS, + P8V_BUILTIN_ORC_V2DI, ALTIVEC_BUILTIN_VXOR_V16QI_UNS, + ALTIVEC_BUILTIN_VXOR_V16QI, ALTIVEC_BUILTIN_VXOR_V8HI_UNS, + ALTIVEC_BUILTIN_VXOR_V8HI, ALTIVEC_BUILTIN_VXOR_V4SI_UNS, + ALTIVEC_BUILTIN_VXOR_V4SI, ALTIVEC_BUILTIN_VXOR_V2DI_UNS, + ALTIVEC_BUILTIN_VXOR_V2DI, ALTIVEC_BUILTIN_VXOR_V4SF, + ALTIVEC_BUILTIN_VXOR_V2DF, ALTIVEC_BUILTIN_VNOR_V16QI_UNS, + ALTIVEC_BUILTIN_VNOR_V16QI, ALTIVEC_BUILTIN_VNOR_V8HI_UNS, + ALTIVEC_BUILTIN_VNOR_V8HI, ALTIVEC_BUILTIN_VNOR_V4SI_UNS, + ALTIVEC_BUILTIN_VNOR_V4SI, ALTIVEC_BUILTIN_VNOR_V2DI_UNS, + ALTIVEC_BUILTIN_VNOR_V2DI, ALTIVEC_BUILTIN_VNOR_V4SF, + ALTIVEC_BUILTIN_VNOR_V2DF>: Use new definition names. + (builtin_function_type) <ALTIVEC_BUILTIN_VAND_V16QI_UNS, + ALTIVEC_BUILTIN_VAND_V8HI_UNS, ALTIVEC_BUILTIN_VAND_V4SI_UNS, + ALTIVEC_BUILTIN_VAND_V2DI_UNS, ALTIVEC_BUILTIN_VANDC_V16QI_UNS, + ALTIVEC_BUILTIN_VANDC_V8HI_UNS, ALTIVEC_BUILTIN_VANDC_V4SI_UNS, + ALTIVEC_BUILTIN_VANDC_V2DI_UNS, ALTIVEC_BUILTIN_VNOR_V16QI_UNS, + ALTIVEC_BUILTIN_VNOR_V8HI_UNS, ALTIVEC_BUILTIN_VNOR_V4SI_UNS, + ALTIVEC_BUILTIN_VNOR_V2DI_UNS, ALTIVEC_BUILTIN_VOR_V16QI_UNS, + ALTIVEC_BUILTIN_VOR_V8HI_UNS, ALTIVEC_BUILTIN_VOR_V4SI_UNS, + ALTIVEC_BUILTIN_VOR_V2DI_UNS, ALTIVEC_BUILTIN_VXOR_V16QI_UNS, + ALTIVEC_BUILTIN_VXOR_V8HI_UNS, ALTIVEC_BUILTIN_VXOR_V4SI_UNS, + ALTIVEC_BUILTIN_VXOR_V2DI_UNS, P8V_BUILTIN_EQV_V16QI_UNS, + P8V_BUILTIN_EQV_V8HI_UNS, P8V_BUILTIN_EQV_V4SI_UNS, + P8V_BUILTIN_EQV_V2DI_UNS, P8V_BUILTIN_EQV_V1TI_UNS, + P8V_BUILTIN_NAND_V16QI_UNS, P8V_BUILTIN_NAND_V8HI_UNS, + P8V_BUILTIN_NAND_V4SI_UNS, P8V_BUILTIN_NAND_V2DI_UNS, + P8V_BUILTIN_NAND_V1TI_UNS, P8V_BUILTIN_ORC_V16QI_UNS, + P8V_BUILTIN_ORC_V8HI_UNS, P8V_BUILTIN_ORC_V4SI_UNS, + P8V_BUILTIN_ORC_V2DI_UNS, P8V_BUILTIN_ORC_V1TI_UNS>: Handle unsigned + builtins. + +2019-12-29 Jakub Jelinek <jakub@redhat.com> + + PR target/93078 + * config/i386/i386-builtins.c (ix86_builtin_vectorized_function): + Remove CASE_CFN_RINT handling. + * config/i386/i386-builtin.def (IX86_BUILTIN_RINTPD, + IX86_BUILTIN_RINTPS, IX86_BUILTIN_RINTPD256, IX86_BUILTIN_RINTPS256): + Remove. + * config/i386/sse.md (nearbyint<mode>2, rint<mode>2): New expanders + with VF iterator. + +2019-12-29 Richard Sandiford <richard.sandiford@arm.com> + + * tree-vect-stmts.c (vect_get_strided_load_store_ops): Copy + DR_STEP before gimplifying it. + +2019-12-29 Richard Sandiford <richard.sandiford@arm.com> + + * tree-vect-stmts.c (vectorizable_condition): For extract-last + reductions, check that the target supports the required comparison + operation. + +2019-12-27 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/iterators.md (V_INT_CONTAINER): Fix VNx2SF entry. + +2019-12-27 Richard Sandiford <richard.sandiford@arm.com> + + * tree-vect-loop.c (vectorizable_reduction): Check whether the + target supports the required VEC_COND_EXPR operation before + allowing the fallback handling of masked fold-left reductions. + +2019-12-24 Jiufu Guo <guojiufu@linux.ibm.com> + + * config/rs6000/rs6000.c (rs6000_option_override_internal): Enable + -fweb and -frename-registers with -funroll-loops + +2019-12-22 Gerald Pfeifer <gerald@pfeifer.com> + + * doc/invoke.texi (-flto): Use "compile time" as a noun. + +2019-12-21 Martin Jambor <mjambor@suse.cz> + + PR ipa/93015 + * ipa-cp.c (ipcp_store_vr_results): Check that info exists + +2019-12-20 Michael Meissner <meissner@linux.ibm.com> + + * config/rs6000/predicates.md (cint34_operand): Use + SIGNED_INTEGER_34BIT_P macro. + * config/rs6000/rs6000.c (num_insns_constant_gpr): Use the + SIGNED_INTEGER_16BIT_P and SIGNED_INTEGER_34BIT_P macros. + (address_to_insn_form): Use the SIGNED_INTEGER_16BIT_P and + SIGNED_INTEGER_34BIT_P macros. + * config/rs6000/rs6000.h (SIGNED_INTEGER_NBIT_P): New macro. + (SIGNED_INTEGER_16BIT_P): Rename SIGNED_16BIT_OFFSET_P to be + SIGNED_INTEGER_34BIT_P. + (SIGNED_INTEGER_34BIT_P): Rename SIGNED_34BIT_OFFSET_P to be + SIGNED_INTEGER_34BIT_P. + +2019-12-20 Stam Markianos-Wright <stam.markianos-wright@arm.com> + + * doc/sourcebuild.texi + (arm_v8_2a_bf16_neon_ok): Document new target supports option. + (arm_v8_2a_i8mm_ok): Likewise. + +2019-12-20 Jakub Jelinek <jakub@redhat.com> + + PR target/92841 + * config/i386/i386.md (*stack_protect_set_3): For pic_32bit_operand + always use lea{q}, no matter what value which_alternative has. + + PR target/93002 + * config/i386/i386.md (dec reg; cmp $-1, reg; jne lab): New + define_peephole2. + +2019-12-19 Julian Brown <julian@codesourcery.com> + + * gimplify.c (gimplify_omp_var_data): Add GOVD_MAP_HAS_ATTACHMENTS. + (insert_struct_comp_map): Support derived-type member mappings + for arrays with descriptors which use GOMP_MAP_TO_PSET. Support + GOMP_MAP_ATTACH_DETACH. + (gimplify_scan_omp_clauses): Tidy up OACC_ENTER_DATA/OACC_EXIT_DATA + mappings. Handle attach/detach clauses and component references. + (gimplify_adjust_omp_clauses_1): Skip adjustments for explicit + attach/detach clauses. + (gimplify_omp_target_update): Handle struct mappings and finalize for + detach operations. + * omp-low.c (lower_omp_target): Support GOMP_MAP_ATTACH, + GOMP_MAP_DETACH, GOMP_MAP_FORCE_DETACH. + * tree-pretty-print.c (dump_omp_clause): Likewise, plus + GOMP_MAP_ATTACH_DETACH. + +2019-12-19 Julian Brown <julian@codesourcery.com> + + * gimplify.c (insert_struct_comp_map, extract_base_bit_offset): New. + (gimplify_scan_omp_clauses): Outline duplicated code into calls to + above two functions. + +2019-12-19 Vladimir Makarov <vmakarov@redhat.com> + + PR target/92905 + * lra-constraints.c (process_alt_operands): Check offmemok when + processing preferred_reload_class. + +2019-12-19 Andrew Stubbs <ams@codesourcery.com> + + * config/gcn/gcn-valu.md + (<convop><VEC_ALL1REG_INT_ALT:mode><VEC_ALL1REG_INT_MODE:mode>2<exec>): + Change input predcate to gcn_alu_operand. + (extend<VEC_ALL1REG_INT_ALT:mode><VEC_ALL1REG_INT_MODE:mode>2<exec>): + Likewise. + (truncv64di<mode>2): Likewise. + (truncv64di<mode>2_exec): Likewise. + (<convop><mode>v64di2): Likewise. + (<convop><mode>v64di2_exec): Likewise. + +2019-12-19 Andrew Stubbs <ams@codesourcery.com> + + * config/gcn/gcn-valu.md (*plus_carry_dpp_shr_<mode>): Rename to ... + (*plus_carry_dpp_shr_v64si): ... this, and replace all + VEC_1REG_INT_MODE with V64SI. + +2019-12-19 David Malcolm <dmalcolm@redhat.com> + + * hash-map-tests.c (selftest::test_map_of_int_to_strings): New + selftest. + (selftest::hash_map_tests_c_tests): Call it. + +2019-12-19 David Malcolm <dmalcolm@redhat.com> + + * gimple-predict.h (gimple_predict_predictor): Make "gs" param + const. + (gimple_predict_outcome): Likewise. + * gimple-pretty-print.c (do_niy): Likewise. + (dump_unary_rhs): Likewise. + (dump_binary_rhs): Likewise. + (dump_ternary_rhs): Likewise. + (dump_gimple_assign): Likewise. + (dump_gimple_return): Likewise. + (dump_gimple_call_args): Likewise. + (pp_points_to_solution): Make "pt" param const. + (dump_gimple_call): Make "gs" param const. + (dump_gimple_switch): Likewise. + (dump_gimple_cond): Likewise. + (dump_gimple_label): Likewise. + (dump_gimple_goto): Likewise. + (dump_gimple_bind): Likewise. + (dump_gimple_try): Likewise. + (dump_gimple_catch): Likewise. + (dump_gimple_eh_filter): Likewise. + (dump_gimple_eh_must_not_throw): Likewise. + (dump_gimple_eh_else): Likewise. + (dump_gimple_resx): Likewise. + (dump_gimple_eh_dispatch): Likewise. + (dump_gimple_debug): Likewise. + (dump_gimple_omp_for): Likewise. + (dump_gimple_omp_continue): Likewise. + (dump_gimple_omp_single): Likewise. + (dump_gimple_omp_taskgroup): Likewise. + (dump_gimple_omp_target): Likewise. + (dump_gimple_omp_teams): Likewise. + (dump_gimple_omp_sections): Likewise. + (dump_gimple_omp_block): Likewise. + (dump_gimple_omp_critical): Likewise. + (dump_gimple_omp_ordered): Likewise. + (dump_gimple_omp_scan): Likewise. + (dump_gimple_omp_return): Likewise. + (dump_gimple_transaction): Likewise. + (dump_gimple_asm): Likewise. + (dump_gimple_phi): Make "phi" param const. + (dump_gimple_omp_parallel): Make "gs" param const. + (dump_gimple_omp_task): Likewise. + (dump_gimple_omp_atomic_load): Likewise. + (dump_gimple_omp_atomic_store): Likewise. + (dump_gimple_mem_ops): Likewise. + (pp_gimple_stmt_1): Likewise. Add "const" to the various as_a <> + casts throughout. + * gimple-pretty-print.h (gimple_stmt_1): Make gimple * param const. + * gimple.h (is_a_helper <const gdebug *>::test): New. + (is_a_helper <const ggoto *>::test): New. + (is_a_helper <const glabel *>::test): New. + (is_a_helper <const geh_else *>::test): New. + (is_a_helper <const geh_mnt *>::test): New. + (is_a_helper <const gswitch *>::test): New. + (is_a_helper <const gtry *>::test): New. + (is_a_helper <const greturn *>::test): New. + (gimple_call_tail_p): Make param const. + (gimple_call_return_slot_opt_p): Likewise. + (gimple_call_va_arg_pack_p): Likewise. + (gimple_call_use_set): Add const overload. + (gimple_call_clobber_set): Likewise. + (gimple_has_lhs): Make param const. + (gimple_bind_body): Likewise. + (gimple_catch_handler): Likewise. + (gimple_eh_filter_failure): Likewise. + (gimple_eh_must_not_throw_fndecl): Likewise. + (gimple_eh_else_n_body): Likewise. + (gimple_eh_else_e_body): Likewise. + (gimple_try_eval): Likewise. + (gimple_try_cleanup): Likewise. + (gimple_phi_arg): Add const overload. + (gimple_phi_arg_def): Make param const. + (gimple_phi_arg_edge): Likewise. + (gimple_phi_arg_location): Likewise. + (gimple_phi_arg_has_location): Likewise. + (gimple_debug_bind_get_var): Likewise. + (gimple_debug_bind_get_value): Likewise. + (gimple_debug_source_bind_get_var): Likewise. + (gimple_debug_source_bind_get_value): Likewise. + (gimple_omp_body): Likewise. + (gimple_omp_for_collapse): Likewise. + (gimple_omp_for_pre_body): Likewise. + (gimple_transaction_body): Likewise. + * tree-eh.c (lookup_stmt_eh_lp_fn): Make param "t" const. + (lookup_stmt_eh_lp): Likewise. + * tree-eh.h (lookup_stmt_eh_lp_fn): Make param const. + (lookup_stmt_eh_lp): Likewise. + * tree-ssa-alias.h (pt_solution_empty_p): Make param const. + * tree-ssa-structalias.c (pt_solution_empty_p): Likewise. + +2019-12-19 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/aarch64.c (aarch64_simd_valid_immediate): When + handling partial SVE vectors, use the container mode rather than + the element mode if the constant isn't a single-element duplicate. + * config/aarch64/aarch64-sve.md (@aarch64_sve_reinterpret<mode>): + Check targetm.can_change_mode_class instead of BYTES_BIG_ENDIAN. + +2019-12-19 Andrew Stubbs <ams@codesourcery.com> + + * config/gcn/gcn-valu.md (addv64si3<exec_clobber>): Rename to ... + (add<mode>3<exec_clobber>): ... this, and use VEC_ALL1REG_INT_MODE. + (addv64si3_dup<exec_clobber>): Rename to ... + (add<mode>3_dup<exec_clobber>): ... this, and use VEC_ALL1REG_INT_MODE. + (subv64si3<exec_clobber>): Rename to ... + (sub<mode>3<exec_clobber>): ... this, and use VEC_ALL1REG_INT_MODE. + +2019-12-19 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/aarch64.c (aarch64_can_change_mode_class): + Don't allow changes between partial SVE modes and other kinds + of mode. Don't allow changes between two partial SVE modes + if they have different container or element sizes. + +2019-12-19 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/aarch64.c (aarch64_function_value_1): New function, + split out from... + (aarch64_function_value): ...here. Handle partial SVE modes by + pretending that they have the associated/traditional integer mode, + then wrap the result in the real mode. + (aarch64_layout_arg): Take an orig_mode argument and pass it to + aarch64_function_arg_alignment. Handle partial SVE modes analogously + to aarch64_function_value. + (aarch64_function_arg): Update call accordingly. + (aarch64_function_arg_advance): Likewise. + +2019-12-19 Jan Hubicka <hubicka@ucw.cz> + Xi Ruoyao <xry111@mengyan1223.wang> + + * cgraph.c (cgraph_node_cannot_be_local_p_1): Prevent targets of + symver attributes to be localized. + * ipa-visibility.c (cgraph_externally_visible_p, + varpool_node::externally_visible_p): Likewise. + * symtab.c (symtab_node::verify_base): Check visibility of symbol + versions. + +2019-12-19 Jan Hubicka <hubicka@ucw.cz> + Luo Xiong Hu <luoxhu@linux.ibm.com + + * ipa-fnsummary.h (ipa_size_summary): Remove copy consturctor. + (ipa_size_summary_t): Add duplicate method; move to heap. + * ipa-fnsumary.c (ipa_fn_summary_alloc): Fix allocation. + +2019-12-19 Feng Xue <fxue@os.amperecomputing.com> + + PR ipa/92794 + * ipa-cp.c (self_recursive_agg_pass_through_p): New function. + (intersect_with_plats): Use error_mark_node as place holder + when aggregate jump function is simple pass-through for + self-recursive call. + (intersect_with_agg_replacements): Likewise. + (intersect_aggregates_with_edge): Likewise. + (find_aggregate_values_for_callers_subset): Likewise. + +2019-12-18 David Malcolm <dmalcolm@redhat.com> + + * common.opt (fdiagnostics-show-cwe): Add. + * diagnostic-core.h (class diagnostic_metadata): New forward decl. + (warning_at): Add overload taking a const diagnostic_metadata &. + (emit_diagnostic_valist): Add overload taking a + const diagnostic_metadata *. + * diagnostic-format-json.cc: Include "diagnostic-metadata.h". + (json_from_metadata): New function. + (json_end_diagnostic): Call it to add "metadata" child for + diagnostics with metadata. + (diagnostic_output_format_init): Clear context->show_cwe. + * diagnostic-metadata.h: New file. + * diagnostic.c: Include "diagnostic-metadata.h". + (diagnostic_impl): Add const diagnostic_metadata * param. + (diagnostic_n_impl): Likewise. + (diagnostic_initialize): Initialize context->show_cwe. + (diagnostic_set_info_translated): Initialize diagnostic->metadata. + (get_cwe_url): New function. + (print_any_cwe): New function. + (diagnostic_report_diagnostic): Call print_any_cwe if the + diagnostic has non-NULL metadata. + (emit_diagnostic): Pass NULL as the metadata in the call to + diagnostic_impl. + (emit_diagnostic_valist): Likewise. + (emit_diagnostic_valist): New overload taking a + const diagnostic_metadata *. + (inform): Pass NULL as the metadata in the call to + diagnostic_impl. + (inform_n): Likewise for diagnostic_n_impl. + (warning): Likewise. + (warning_at): Likewise. Add overload that takes a + const diagnostic_metadata &. + (warning_n): Pass NULL as the metadata in the call to + diagnostic_n_impl. + (pedwarn): Likewise for diagnostic_impl. + (permerror): Likewise. + (error): Likewise. + (error_n): Likewise. + (error_at): Likewise. + (sorry): Likewise. + (sorry_at): Likewise. + (fatal_error): Likewise. + (internal_error): Likewise. + (internal_error_no_backtrace): Likewise. + * diagnostic.h (diagnostic_info::metadata): New field. + (diagnostic_context::show_cwe): New field. + * doc/invoke.texi (-fno-diagnostics-show-cwe): New option. + * opts.c (common_handle_option): Handle OPT_fdiagnostics_show_cwe. + * toplev.c (general_init): Initialize global_dc->show_cwe. + +2019-12-19 Julian Brown <julian@codesourcery.com> + Maciej W. Rozycki <macro@codesourcery.com> + Tobias Burnus <tobias@codesourcery.com> + Thomas Schwinge <thomas@codesourcery.com> + + * omp-low.c (lower_omp_target): Support GOMP_MAP_NO_ALLOC. + * tree-pretty-print.c (dump_omp_clause): Likewise. + +2019-12-18 Eric Botcazou <ebotcazou@adacore.com> + + * ira.c (ira): Use simple LRA algorithm when not optimizing. + +2019-12-18 Thomas Schwinge <thomas@codesourcery.com> + + * gimplify.c (gimplify_omp_target_update): Elaborate 'exit data' + 'finalize' handling. + +2019-12-18 Tobias Burnus <tobias@codesourcery.com> + + PR middle-end/86416 + * Makefile.in (CFLAGS-lto-streamer-in.o): Pass target_noncanonical on. + * lto-streamer-in.c (lto_input_mode_table): Improve unsupported-mode + diagnostic. + +2019-12-18 Wilco Dijkstra <wdijkstr@arm.com> + + * config/aarch64/aarch64-cores.def: + ("cortex-a76ae"): Use neoversen1 tuning. + ("cortex-a77"): Likewise. + ("cortex-a65"): Use cortexa53 scheduler. + ("cortex-a65ae"): Likewise. + ("neoverse-e1"): Use cortexa73 tuning. + +2019-12-18 Martin Jambor <mjambor@suse.cz> + + PR ipa/92971 + * ipa-cp.c (cgraph_edge_brings_all_agg_vals_for_node): Fix + definition of values, release memory on exit. + +2019-12-17 Jan Hubicka <hubicka@ucw.cz> + Martin Jambor <mjambor@suse.cz> + + * ipa-param-manipulation.h (get_original_index): Declare. + * ipa-param-manipulation.c (ipa_param_adjustments::get_original_index): + New member function. + * ipa-prop.c (ipcp_get_parm_bits): New function. + * ipa-prop.h (ipcp_get_parm_bits): Declare. + * tree-ssa-ccp.c: Include cgraph.h, alloc-pool.h, symbol-summary.h, + ipa-utils.h and ipa-prop.h + (get_default_value): Use ipcp_get_parm_bits. + +2019-12-18 Jakub Jelinek <jakub@redhat.com> + + PR lto/92972 + * lto-wrapper.c (merge_and_complain): Use just "-fno-pie" instead of + big ? "-fno-pie" : "-fno-pie". Formatting fixes. Fix comment typo. + +2019-12-17 Martin Sebor <msebor@redhat.com> + + PR c++/61339 + * doc/invoke.texi (-Wmismatched-tags, -Wredundant-tags): Document + new C++ options. + +2019-12-17 Michael Meissner <meissner@linux.ibm.com> + + * config/rs6000/rs6000.c (num_insns_constant_gpr): Return 1 if the + constant can be loaded with PLI if -mcpu=future. + * config/rs6000/rs6000.md (add<mode>3): Add alternative to + generate PADDI for 34-bit constants if -mcpu=future. + (movdi_internal64): Add alternative to use PLI to load up 34-bit + constants if -mcpu=future. + (movsi_internal1): Add alternative to use PLI to load up 32-bit + constants if -mcpu=future. + * config/rs6000/predicates.md (add_operand): Allow eI constants. + +2019-12-17 Jakub Jelinek <jakub@redhat.com> + + PR target/92841 + * config/i386/i386.md (@stack_protect_set_1_<mode>, + @stack_protect_test_1_<mode>): Use output_asm_insn. + (*stack_protect_set_2_<mode>, *stack_protect_set_3): New define_insns + and corresponding define_peephole2s. + +2019-12-17 Jan Hubicka <hubicka@ucw.cz> + + * symtab.c (symtab_node::get_partitioning_class): Aliases of external + symbols are external. + +2019-12-17 Christophe Lyon <christophe.lyon@linaro.org> + + * config/arm/arm-protos.h (thumb1_gen_const_int): Add new prototype. + * config/arm/arm.c (arm_option_check_internal): Remove restriction + on MOVT for -mpure-code. + (thumb1_gen_const_int): New function. + (thumb1_legitimate_address_p): Support -mpure-code. + (thumb1_rtx_costs): Likewise. + (thumb1_size_rtx_costs): Likewise. + (arm_thumb1_mi_thunk): Likewise. + * config/arm/arm.h (CASE_VECTOR_PC_RELATIVE): Likewise. + * config/arm/thumb1.md (thumb1_movsi_symbol_ref): New. + (*thumb1_movhf): Support -mpure-code. + * doc/invoke.texi (-mpure-code): Remove restriction on MOVT. + +2019-12-17 Andrew Stubbs <ams@codesourcery.com> + + * tree-vect-loop.c (vect_create_epilog_for_reduction): Mention pr92772 + in the comments. + +2019-12-17 Andrew Stubbs <ams@codesourcery.com> + + * config/gcn/gcn-valu.md (extract_last_<mode>): New expander. + (fold_extract_last_<mode>): New expander. + +2019-12-17 Andrew Stubbs <ams@codesourcery.com> + + * config/gcn/gcn.h (CLZ_DEFINED_VALUE_AT_ZERO): Define. + (CTZ_DEFINED_VALUE_AT_ZERO): Define. + * config/gcn/gcn.md (s_mnemonic): Add clz and ctz. + (expander): Likewise. + (countzeros): New code iterator. + (<expander>si2): New insn pattern. + (<expander>di2): New insn pattern. + +2019-12-17 Jakub Jelinek <jakub@redhat.com> + + PR target/92962 + * common/config/i386/i386-common.c (processor_alias_table): Formatting + fixes. + * doc/invoke.texi (bdver3, bdver4, znver1): Add missing closing paren. + (znver2): Likewise. Add RDPID and WBNOINVD, remove spurious comma + before CLWB. + +2019-12-17 Hongyu Wang <hongyu.wang@intel.com> + + PR target/92651 + * config/i386/i386.h (TARGET_EXPAND_ABS): New macro. + * config/i386/x86-tune.def (X86_TUNE_EXPAND_ABS): New. + * config/i386/i386.md (abs<SWI48x>2): New define_expand. + +2019-12-17 H.J. Lu <hjl.tools@gmail.com> + + PR target/92807 + * config/i386/i386.c (ix86_lea_outperforms): Check !TARGET_BONNELL. + (ix86_avoid_lea_for_addr): When not optimizing for Bonnell, use add + for a = a + b and a = b + a. + +2019-12-16 Martin Sebor <msebor@redhat.com> + + PR middle-end/92952 + * builtins.c (compute_objsize): Adjust offset by the array low bound. + +2019-12-16 David Malcolm <dmalcolm@redhat.com> + + * pretty-print.c (pp_write_text_as_html_like_dot_to_stream): New + function. + * pretty-print.h (pp_write_text_as_html_like_dot_to_stream): New decl. + +2019-12-16 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/rs6000.md (movsi_to_cr_one): Use CR0_REGNO instead of + hardcoding the (old, expired) register number. + (*mtcrfsi): Ditto. + +2019-12-16 Jozef Lawrynowicz <jozef.l@mittosystems.com> + + * config.gcc: s/msp430*-*-*/msp430-*-*. + Handle msp430-*-elfbare. + * config/msp430/msp430-devices.c (TARGET_SUBDIR): Define. + (_MSPMKSTR): Define. + (__MSPMKSTR): Define. + (rest_of_devices_path): Use TARGET_SUBDIR value in string. + * config/msp430/msp430.c (msp430_option_override): Error if + -fuse-cxa-atexit is used when it has been disabled at configure time. + * config/msp430/t-msp430: Define TARGET_SUBDIR when building + msp430-devices.o. + * doc/install.texi: Document msp430-*-elf and msp430-*-elfbare. + * doc/invoke.texi: Update documentation about which path devices.csv is + searched for. + +2019-12-16 Andreas Krebbel <krebbel@linux.ibm.com> + + PR target/92950 + * config/s390/vector.md ("mov<mode>" for V_8): Replace lh, lhy, + and lhrl with llc. + +2019-12-14 Martin Sebor <msebor@redhat.com> + + * doc/extend.texi (attribute access): Correct typos. + +2019-12-14 Jakub Jelinek <jakub@redhat.com> + + PR ipa/92357 + * ipa-fnsummary.c (ipa_fn_summary_write): Use + lto_symtab_encoder_iterator with lsei_start_function_in_partition and + lsei_next_function_in_partition instead of walking all cgraph nodes + in encoder. + + PR tree-optimization/92930 + * ipa-pure-const.c (special_builtin_state): Don't handle + BUILT_IN_APPLY. Formatting fixes. + (check_call): Formatting fixes. + +2019-12-14 Iain Sandoe <iain@sandoe.co.uk> + + * config/darwin.h (DARWIN_EXTRA_SPECS): Add new + bundle spec. (DARWIN_BUNDLE1_SPEC): New. + (STARTFILE_SPEC): Use darwin bundle spec. + * config/rs6000/darwin.h (DARWIN_BUNDLE1_SPEC): New. + (DARWIN_DYLIB1_SPEC): Delete duplicate. + +2019-12-13 Martin Sebor <msebor@redhat.com> + + PR middle-end/91582 + PR middle-end/92868 + * builtins.c (addr_decl_size): New function. + (gimple_call_alloc_size): Add arguments. + (compute_objsize): Add an argument. Set *PDECL even for allocated + objects. + Correct checking for negative wide_int. + Correct handling of negative outer offsets into unknown regions + or with unknown inner offsets. + Extend offsets to at most sizetype precision. + Only handle constant subobject sizes. + * builtins.h (gimple_call_alloc_size): Add arguments. + * tree.c (component_ref_size): Always return sizetype. + * tree-ssa-strlen.c (strinfo::alloc): New member. + (get_addr_stridx): Add argument. + (get_stridx): Use ptrdiff_t. Add argument. + (new_strinfo): Set new member. + (get_string_length): Handle alloca and VLA. + (dump_strlen_info): Dump more state. + (maybe_invalidate): Print more info. Decrease indentation. + (unshare_strinfo): Set new member. + (valid_builtin_call): Handle alloca and VLA. + (maybe_warn_overflow): Check and set no-warning bit. Improve + handling of offsets. Print allocated objects. + (handle_builtin_strlen): Handle strinfo records with null lengths. + (handle_builtin_strcpy): Add argument. Call maybe_warn_overflow. + (is_strlen_related_p): Handle dynamically allocated objects. + (get_range): Add argument. + (handle_builtin_malloc): Rename... + (handle_alloc): ...to this and handle all allocation functions. + (handle_builtin_memset): Call maybe_warn_overflow. + (count_nonzero_bytes): Handle more MEM_REF forms. + (strlen_check_and_optimize_call): Call handle_alloc_call. Pass + arguments to more callees. + (handle_integral_assign): Add argument. Create strinfo entries + for MEM_REF assignments. + (check_and_optimize_stmt): Handle more MEM_REF forms. + +2019-12-13 Iain Sandoe <iain@sandoe.co.uk> + + * config/rs6000/darwin.h (DARWIN_DYLIB1_SPEC): New. + +2019-12-13 Jan Hubicka <hubicka@ucw.cz> + + * lto-streamer-in.c (input_function): Add node parameter. + (lto_read_body_or_constructor): Use it. + +2019-12-13 Roman Zhuykov <zhroma@ispras.ru> + + PR rtl-optimization/92591 + * modulo-sched.c (ps_add_node_check_conflicts): Improve checking + for history > 0 case. + +2019-12-13 Roman Zhuykov <zhroma@ispras.ru> + + * modulo-sched.c (sms_schedule): Use param_sms_max_ii_factor + value instead of macro. Adjust comment. + (sms_schedule_by_order): Use parameter value without macro. + * params.opt: Add ranges for modulo scheduler parameters, + set param_sms_max_ii_factor = 2 by default. + +2019-12-13 Roman Zhuykov <zhroma@ispras.ru> + + PR rtl-optimization/90001 + * ddg.c (create_ddg): Init max_dist array for each node. + (free_ddg): Free max_dist array. + (create_ddg_edge): Use bool field instead of aux union. + (set_recurrence_length): Use prepared max_dist information instead + of calling longest_simple_path. + (create_scc): Remove graph argument, fill node's aux.count with + SCC id, and move set_recurrence_length call to... + (create_ddg_all_sccs): ...here, after filling all max_dist arrays + using Floyd–Warshall-like algorithm. + (update_dist_to_successors): Remove the whole function. + (longest_simple_path): Likewise. + * ddg.h (struct ddg_node): Add max_dist pointer. + (struct ddg_edge): Use bool field instead of unused aux union. + +2019-12-13 Andrew Stubbs <ams@codesourcery.com> + + * config/gcn/gcn-valu.md (mulv64si3<exec>): Rename to ... + (mul<mode>3<exec>): ... this, and implement sub-dword patterns. + (mulv64si3_dup<exec>): Rename to ... + (mul<mode>3_dup<exec>): ... this, and implement sub-dword patterns. + +2019-12-13 Jan Hubicka <hubicka@ucw.cz> + + * ipa-utils.c (ipa_merge_profiles): Improve dumping; merge common + targets. + +2019-12-13 Andrew Stubbs <ams@codesourcery.com> + + * config/gcn/gcn-valu.md (sdwa): New mode attribute. + (VCVT_FROM_MODE): Rename to ... + (VCVT_MODE): ... this. + (VCVT_TO_MODE): Delete mode iterator. + (VCVT_FMODE): New mode iterator. + (VCVT_IMODE): Likewise. + (<cvt_name><VCVT_FROM_MODE:mode><VCVT_TO_MODE:mode>2<exec>): Change ... + (<cvt_name><VCVT_MODE:mode><VCVT_FMODE:mode>2<exec>): ... to this. + (<cvt_name><VCVT_FMODE:mode><VCVT_IMODE:mode>2<exec>): New. + (zero_convert): New code iterator. + (convop): New code attribute. + (<convop><VEC_ALL1REG_INT_ALT:mode><VEC_ALL1REG_INT_MODE:mode>2<exec>) + : New. + (extend<VEC_ALL1REG_INT_ALT:mode><VEC_ALL1REG_INT_MODE:mode>2<exec>) + : New. + (vec_truncatev64div64si): Rename to ... + (truncv64di<mode>2): ... this and implement sub-dword patterns. + (vec_truncatev64div64si_exec): Rename to ... + (truncv64di<mode>2_exec): ... this and implement sub-dword patterns. + (<convop><mode>v64di2): New insn_and_split. + (<convop><mode>v64di2_exec): Likewise. + (mask_gather_load<mode>): Update truncate names. + (mask_scatter_store<mode>): Likewise. + * config/gcn/gcn.c (gcn_expand_scaled_offsets): Update truncate names. + +2019-12-13 Dennis Zhang <dennis.zhang@arm.com> + + * config/aarch64/aarch64-arches.def (armv8.6-a): New. + * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define + __ARM_FEATURE_MATMUL_INT8, __ARM_FEATURE_BF16_VECTOR_ARITHMETIC and + __ARM_FEATURE_BF16_SCALAR_ARITHMETIC when enabled. + * config/aarch64/aarch64-option-extensions.def (i8mm, bf16): New. + (fp): Disabling fp also disables i8mm and bf16. + (simd): Disabling simd also disables i8mm. + * config/aarch64/aarch64.h (AARCH64_FL_V8_6): New macro. + (AARCH64_FL_I8MM, AARCH64_FL_BF16, AARCH64_FL_FOR_ARCH8_6): Likewise. + (AARCH64_ISA_V8_6, AARCH64_ISA_I8MM, AARCH64_ISA_BF16): Likewise. + (TARGET_I8MM, TARGET_BF16_FP, TARGET_BF16_SIMD): Likewise. + * doc/invoke.texi (armv8.6-a, i8mm, bf16): Document new options + and add a new table to list permissible values for ARCH. + +2019-12-13 Jakub Jelinek <jakub@redhat.com> + + PR target/92908 + * simplify-rtx.c (simplify_relational_operation): Punt for vector + cmp_mode and scalar mode, if simplify_relational_operation returned + const_true_rtx. + (simplify_const_relational_operation): Change VOID_mode in function + comment to VOIDmode. + +2019-12-13 Kewen Lin <linkw@gcc.gnu.org> + + * config/rs6000/rs6000.c (adjust_vectorization_cost): New function. + (rs6000_add_stmt_cost): Call adjust_vectorization_cost and update + stmt_cost. + +2019-12-12 Jakub Jelinek <jakub@redhat.com> + + PR target/92904 + * config/i386/i386.c (ix86_gimplify_va_arg): If need_intregs and + not need_temp, decrease alignment of the read because the GPR save + area only guarantees 8-byte alignment. + +2019-12-12 Georg-Johann Lay <avr@gjlay.de> + + Add support for some more AVR devices from avrxmega3 family. + + * config/avr/avr-mcus.def (attiny1604, attiny1606, attiny1607) + (attiny402, attiny404, attiny406) + (attiny804, attiny806, attiny807) + (attiny202, attiny204): Add AVR_MCU lines to support them. + * doc/avr-mmcu.texi: Regenerate. + +2019-12-12 Jan Hubicka <hubicka@ucw.cz> + + * ipa-prop.c (read_ipcp_transformation_info): Fix undefined ordering + of execution of function call parameters. + +2019-12-12 Vineet Gupta <vgupta@synopsys.com> + + * config/arc/arc-modes.def (CC_FPUE): New Mode CC_FPUE which + helps codegen generate exceptions even for quiet NaN. + * config/arc/arc.c (arc_init_reg_tables): Handle New CC_FPUE mode. + (get_arc_condition_code): Likewise. + (arc_select_cc_mode): LT, LE, GT, GE to use the New CC_FPUE mode. + * config/arc/arc.h (REVERSE_CONDITION): Handle New CC_FPUE mode. + * config/arc/predicates.md (proper_comparison_operator): Likewise. + * config/arc/fpu.md (cmpsf_fpu_trap): New Pattern for CC_FPUE. + (cmpdf_fpu_trap): Likewise. + +2019-12-12 Claudiu Zissulescu <claziss@synopsys.com> + + * config/arc/arc.md (iterator SDF): Check TARGET_FP_DP_BASE. + (cstoredi4): Use TARGET_HARD_FLOAT. + +2019-12-11 Jakub Jelinek <jakub@redhat.com> + + * opts.c (default_options_table): Move -ftree-loop-distribute-patterns + entry from -O3 or later section to -O2 or later section. + * doc/invoke.texi (-ftree-loop-distribute-patterns): Mention the + option is enabled by default at -O2+ rather than just at -O3. + + PR target/92723 + * tree-vect-patterns.c (vect_recog_rotate_pattern): If dt is not + vect_internal_def, use oprnd1 as is, without trying to cast it. + Formatting fix. + +2019-12-11 Martin Sebor <msebor@redhat.com> + + * builtins.c (compute_objsize): Add an argument and set it to offset + into destination. + * builtins.h (compute_objsize): Add an argument. + * tree-object-size.c (addr_object_size): Add an argument and set it + to offset into destination. + (compute_builtin_object_size): Same. + * tree-object-size.h (compute_builtin_object_size): Add an argument. + * tree-ssa-strlen.c (get_addr_stridx): Add an argument and set it + to offset into destination. + (maybe_warn_overflow): New function. + (handle_store): Call maybe_warn_overflow to issue warnings. + +2019-12-11 Jozef Lawrynowicz <jozef.l@mittosystems.com> + + * config/msp430/msp430.h (STARTFILE_SPEC) [!fexceptions]: Use + crtbegin_no_eh.o if building for the C language. + [fno-exceptions]: Use crtbegin_no_eh.o if building for any language + except C. + (ENDFILE_SPEC) [!fexceptions]: Use crtend_no_eh.o if building for + the C language. + [fno-exceptions]: Use crtend_no_eh.o if building for any language + except C. + * config/msp430/t-msp430: Add -fno-exceptions multilib. + * doc/install.texi: Document --disable-no-exceptions multilib configure + option. + * doc/sourcebuild.texi: Document exceptions_enabled effective target. + +2019-12-11 David Malcolm <dmalcolm@redhat.com> + + * pretty-print.c (pretty_printer::pretty_printer): New copy-ctor. + (pretty_printer::clone): New vfunc implementation. + * pretty-print.h (format_postprocessor::clone): New pure vfunc + decl. + (pretty_printer::pretty_printer): New copy-ctor decl. + (pretty_printer::clone): New vfunc decl. + +2019-12-11 David Malcolm <dmalcolm@redhat.com> + + * function-tests.c (selftest::make_fndecl): Make non-static. + * selftest.h (selftest::make_fndecl): New decl. + +2019-12-11 Lewis Hyatt <lhyatt@gmail.com> + + PR 91853 + * pretty-print.c (pp_quoted_string): Avoid hex-escaping valid + multibyte input. Fix off-by-one-bug printing the last byte before a + hex-escaped output. + (pp_character): Don't apply line wrapping in the middle of multibyte + characters. + (test_utf8): New test. + (pretty_print_c_tests): Call the new test. + +2019-12-11 Richard Earnshaw <rearnsha@arm.com> + + * config/arm/arm-cpus.in (ALL_SIMD_EXTERNAL): New fgroup. + (ALL_SIMD): Use it. + (ALL_FPU_EXTERNAL): New fgroup. + (ALL_FP): Use it. + (cortex-a55, cortex-a75, cortex-a76, cortex-a76ae): Remove redundant + +simd from architecture specification. + (cortex-a77, neoverse-n1, cortex-a75.cortex-a55): Likewise. + * config/arm/arm.c (isa_all_fpubits, fpu_bitlist): Rename to ... + (isa_all_fpubits_internal, fpu_bitlist_internal): ... these. + (isa_all_fpbits): New bitmap. + (arm_option_override): Initialize it. + (arm_configure_build_target): If the target isa does not have any + FP enabled, do not warn about mismatches in FP-related feature bits. + +2019-12-11 Stam Markianos-Wright <stam.markianos-wright@arm.com> + + * real.c (struct arm_bfloat_half_format, + encode_arm_bfloat_half, decode_arm_bfloat_half): New. + * real.h (arm_bfloat_half_format): New. + +2019-12-11 Hongtao Liu <hongtao.liu@intel.com> + + PR target/92865 + * config/i386/i386-expand.c (ix86_valid_mask_cmp_mode): Enable + integer mask cmov when available even with TARGET_XOP. + +2019-12-10 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/92891 + * builtins.c (gimple_call_alloc_size): Convert size to sizetype + before returning it. + +2019-12-10 Vladimir Makarov <vmakarov@redhat.com> + + PR rtl-optimization/92796 + * lra-int.h (lra_risky_transformations_p): Rename to + check_and_force_assignment_correctness_p. + * lra-assigns.c: Ditto. + (lra_assign): Reset check_and_force_assignment_correctness_p. + * lra-constraints.c (lra_risky_transformations_p): Rename to + check_and_force_assignment_correctness_p. + (lra_constraints): Set up check_and_force_assignment_correctness_p + only for the 1st sub-pass. + * lra-eliminations.c (process_insn_for_elimination): Set up + check_and_force_assignment_correctness_p if the insn chnaged its + code. + +2019-12-10 Jakub Jelinek <jakub@redhat.com> + + PR rtl-optimization/92882 + * regstat.c (regstat_bb_compute_calls_crossed): Don't check + INSN_UID against DF_INSN_SIZE or use DF_INSN_INFO_GET unless + NONDEBUG_INSN_P. + + PR ipa/92883 + * ipa-cp.c (propagate_vr_across_jump_function): Pass jvr rather + than *jfunc->m_vr to intersect. Formatting fix. + + PR middle-end/92825 + * cfgexpand.c (add_stack_protection_conflicts): Change return type + from void to bool, return true if at least one stack_vars[i].decl + is addressable. + (record_or_union_type_has_array_p, stack_protect_decl_p): Remove. + (expand_used_vars): Don't call stack_protect_decl_p, instead for + -fstack-protector-strong set gen_stack_protect_signal to true + if add_stack_protection_conflicts returned true. Formatting fixes. + * doc/invoke.texi (-fstack-protector-strong): Clarify that optimized + out variables or variables not living on the stack don't count. + (-fstack-protector): Likewise. Clarify it affects >= 8 byte arrays + rather than > 8 byte. + + * ipa-param-manipulation.c + (ipa_param_body_adjustments::register_replacement): Fix comment typo + - accross -> across. + * ipa-sra.c (propagate_used_across_scc_edge, ipa_sra_analysis): + Likewise. + (param_splitting_across_edge): Fix typo in dump message - accross + -> across. + +2019-12-10 Jan Hubicka <hubicka@ucw.cz> + + * cgraph.c (cgraph_node::verify_node): Verify tp_first_run. + * cgraph.h (cgrpah_node): Turn tp_first_run back to int. + * cgraphunit.c (tp_first_run_node_cmp): Do not watch for overflows. + (expand_all_functions): First expand ordered section and then + unordered. + * profile.c (compute_value_histograms): Error on out of range + tp_first_runs. + +2019-12-10 Jan Hubicka <hubicka@ucw.cz> + + * predict.c (compute_function_frequency): Check for presence of IPA + profile. + +2019-12-10 Jan Hubicka <hubicka@ucw.cz> + + * varasm.c (default_function_section): Fix confused tests for + tp_first_run reordering. + +2019-12-10 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/aarch64.c (aarch64_hard_regno_mode_ok): Don't + allow SVE modes in GPRs. + +2019-12-10 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/iterators.md (vccore): New iterator. + * config/aarch64/aarch64-sve.md (vec_series<mode>): Use it instead + of vwcore. + (*vec_series<mode>_plus): Likewise. + +2019-12-10 Frederik Harwath <frederik@codesourcery.com> + + * omp-low.c (scan_omp_for): Use clause location in warning. + +2019-12-10 Richard Sandiford <richard.sandiford@arm.com> + + * dwarf2out.c (loc_descriptor): Punt for MODE_VECTOR_BOOL. + (add_const_value_attribute): Likewise. + +2019-12-10 Richard Sandiford <richard.sandiford@arm.com> + + * tree-vect-loop.c (vect_create_epilog_for_reduction): When + handling direct_slp_reduc, allow the PHI arguments to have + a different type from the vector elements. + +2019-12-10 Richard Sandiford <richard.sandiford@arm.com> + + * tree-vect-stmts.c (vectorizable_condition): Record the loop + masks required for extract-last reductions. + +2019-12-10 Richard Sandiford <richard.sandiford@arm.com> + + * tree-vect-stmts.c (vect_finish_replace_stmt): Always use the + original scalar statement rather than a pattern statement. + (vectorizable_condition): Likewise, in the handling of extract-last + reductions. + +2019-12-10 Richard Sandiford <richard.sandiford@arm.com> + + * tree-vect-loop.c (vectorizable_reduction): Don't use + EXTRACT_LAST_REDUCTION for chained reductions. + +2019-12-10 Richard Sandiford <richard.sandiford@arm.com> + + * ipa-utils.h (get_odr_name_for_type): Check for a TYPE_DECL. + * ipa-devirt.c (warn_types_mismatch): Don't call xstrdup for the + second demangled name. + +2019-12-10 Jakub Jelinek <jakub@redhat.com> + + * config/i386/i386.c (IX86_LEA_PRIORITY): Fix comment typos. + +2019-12-10 Martin Liska <mliska@suse.cz> + + PR tree-optimization/92862 + * predict.c (predict_paths_leading_to_edge): Fix typo from e to e2. + * tree-ssa-loop-niter.c (loop_only_exit_p): Return false + instead of true; + +2019-12-09 David Malcolm <dmalcolm@redhat.com> + + * gcc-rich-location.c + (maybe_range_label_for_tree_type_mismatch::get_text): Replace + label_text ctor call with label_text::borrow. + * gcc-rich-location.h (text_range_label::get_text): Replace + label_text ctor called with false with label_text::borrow. + +2019-12-09 David Malcolm <dmalcolm@redhat.com> + + * diagnostic-show-locus.c (diagnostic_show_locus): Remove initial + newline. + (selftest::test_diagnostic_show_locus_unknown_location): Remove + initial newline from expected outputs. + (selftest::test_one_liner_simple_caret): Likewise. + (selftest::test_one_liner_caret_and_range): Likewise. + (selftest::test_one_liner_multiple_carets_and_ranges): Likewise. + (selftest::test_one_liner_fixit_insert_before): Likewise. + (selftest::test_one_liner_fixit_insert_after): Likewise. + (selftest::test_one_liner_fixit_remove): Likewise. + (selftest::test_one_liner_fixit_replace): Likewise. + (selftest::test_one_liner_fixit_replace_non_equal_range): + Likewise. + (selftest::test_one_liner_fixit_replace_equal_secondary_range): + Likewise. + (selftest::test_one_liner_fixit_validation_adhoc_locations): + Likewise. + (selftest::test_one_liner_many_fixits_1): Likewise. + (selftest::test_one_liner_many_fixits_2): Likewise. + (selftest::test_one_liner_labels): Likewise. + (selftest::test_one_liner_simple_caret_utf8): Likewise. + (selftest::test_one_liner_caret_and_range_utf8): Likewise. + (selftest::test_one_liner_multiple_carets_and_ranges_utf8): + Likewise. + (selftest::test_one_liner_fixit_insert_before_utf8): Likewise. + (selftest::test_one_liner_fixit_insert_after_utf8): Likewise. + (selftest::test_one_liner_fixit_remove_utf8): Likewise. + (selftest::test_one_liner_fixit_replace_utf8): Likewise. + (selftest::test_one_liner_fixit_replace_non_equal_range_utf8): + Likewise. + (selftest::test_one_liner_fixit_replace_equal_secondary_range_utf8): + Likewise. + (selftest::test_one_liner_fixit_validation_adhoc_locations_utf8): + Likewise. + (selftest::test_one_liner_many_fixits_1_utf8): Likewise. + (selftest::test_one_liner_many_fixits_2_utf8): Likewise. + (selftest::test_one_liner_labels_utf8): Likewise. + (selftest::test_add_location_if_nearby): Likewise. + (selftest::test_diagnostic_show_locus_fixit_lines): Likewise. + (selftest::test_overlapped_fixit_printing): Likewise. + (selftest::test_overlapped_fixit_printing_utf8): Likewise. + (selftest::test_overlapped_fixit_printing_2): Likewise. + (selftest::test_fixit_insert_containing_newline): Likewise. + (selftest::test_fixit_insert_containing_newline_2): Likewise. + (selftest::test_fixit_replace_containing_newline): Likewise. + (selftest::test_fixit_deletion_affecting_newline): Likewise. + (selftest::test_line_numbers_multiline_range): Likewise. + * diagnostic.c (default_diagnostic_finalizer): Add pp_newline call + before call to diagnostic_show_locus. + (diagnostic_append_note): Likewise. + +2019-12-09 Martin Sebor <msebor@redhat.com> + + PR middle-end/92761 + PR middle-end/92762 + * hash-map-tests.c (test_map_of_type_with_ctor_and_dtor): Tighten + up tests. + * hash-table.h (hash_table::expand): Use placement new to copy + construct objects in uninitialized storage. + (hash_table::empty_slow): Avoid invoking copy assignment on + uninitialized objects. + +2019-12-09 Lewis Hyatt <lhyatt@gmail.com> + + PR preprocessor/49973 + * input.c (location_compute_display_column): New function to help with + multibyte awareness in diagnostics. + (test_cpp_utf8): New self-test. + (input_c_tests): Call the new test. + * input.h (location_compute_display_column): Declare. + * diagnostic-show-locus.c: Pervasive changes to add multibyte awareness + to all classes and functions. + (enum column_unit): New enum. + (class exploc_with_display_col): New class. + (class layout_point): Convert m_column member to array m_columns[2]. + (layout_range::contains_point): Add col_unit argument. + (test_layout_range_for_single_point): Pass new argument. + (test_layout_range_for_single_line): Likewise. + (test_layout_range_for_multiple_lines): Likewise. + (line_bounds::convert_to_display_cols): New function. + (layout::get_state_at_point): Add col_unit argument. + (make_range): Use empty filename rather than dummy filename. + (get_line_width_without_trailing_whitespace): Rename to... + (get_line_bytes_without_trailing_whitespace): ...this. + (test_get_line_width_without_trailing_whitespace): Rename to... + (test_get_line_bytes_without_trailing_whitespace): ...this. + (class layout): m_exploc changed to exploc_with_display_col from + plain expanded_location. + (layout::get_linenum_width): New accessor member function. + (layout::get_x_offset_display): Likewise. + (layout::calculate_linenum_width): New subroutine for the constuctor. + (layout::calculate_x_offset_display): Likewise. + (layout::layout): Use the new subroutines. Add multibyte awareness. + (layout::print_source_line): Add multibyte awareness. + (layout::print_line): Likewise. + (layout::print_annotation_line): Likewise. + (line_label::line_label): Likewise. + (layout::print_any_labels): Likewise. + (layout::annotation_line_showed_range_p): Likewise. + (get_printed_columns): Likewise. + (class line_label): Rename m_length to m_display_width. + (get_affected_columns): Rename to... + (get_affected_range): ...this; add col_unit argument and multibyte + awareness. + (class correction): Add m_affected_bytes and m_display_cols + members. Rename m_len to m_byte_length for clarity. Add multibyte + awareness throughout. + (correction::insertion_p): Add multibyte awareness. + (correction::compute_display_cols): New function. + (correction::ensure_terminated): Use new member name m_byte_length. + (line_corrections::add_hint): Add multibyte awareness. + (layout::print_trailing_fixits): Likewise. + (layout::get_x_bound_for_row): Likewise. + (test_one_liner_simple_caret_utf8): New self-test analogous to the one + with _utf8 suffix removed, testing multibyte awareness. + (test_one_liner_caret_and_range_utf8): Likewise. + (test_one_liner_multiple_carets_and_ranges_utf8): Likewise. + (test_one_liner_fixit_insert_before_utf8): Likewise. + (test_one_liner_fixit_insert_after_utf8): Likewise. + (test_one_liner_fixit_remove_utf8): Likewise. + (test_one_liner_fixit_replace_utf8): Likewise. + (test_one_liner_fixit_replace_non_equal_range_utf8): Likewise. + (test_one_liner_fixit_replace_equal_secondary_range_utf8): Likewise. + (test_one_liner_fixit_validation_adhoc_locations_utf8): Likewise. + (test_one_liner_many_fixits_1_utf8): Likewise. + (test_one_liner_many_fixits_2_utf8): Likewise. + (test_one_liner_labels_utf8): Likewise. + (test_diagnostic_show_locus_one_liner_utf8): Likewise. + (test_overlapped_fixit_printing_utf8): Likewise. + (test_overlapped_fixit_printing): Adapt for changes to + get_affected_columns, get_printed_columns and class corrections. + (test_overlapped_fixit_printing_2): Likewise. + (test_linenum_sep): New constant. + (test_left_margin): Likewise. + (test_offset_impl): Helper function for new test. + (test_layout_x_offset_display_utf8): New test. + (diagnostic_show_locus_c_tests): Call new tests. + +2019-12-09 Eric Botcazou <ebotcazou@adacore.com> + + * tree.c (build_array_type_1): Add SET_CANONICAL parameter and compute + TYPE_CANONICAL from the element type only if it is true. Remove a few + obsolete lines and adjust recursive call. + (fld_process_array_type): Adjust call to build_array_type_1. + (build_array_type): Likewise. + (build_nonshared_array_type): Likewise. + +2019-12-09 Andrew Stubbs <ams@codesourcery.com> + + * config/gcn/gcn-valu.md (gather<mode>_insn_1offset<exec>): Change + %s to %o in asm output. + (gather<mode>_insn_2offsets<exec>): Likewise. + +2019-12-09 Richard Earnshaw <rearnsha@arm.com> + + * config/arm/t-multilib: Use arm->thumb multilib reuse rules + on a-profile. + +2019-12-09 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/rs6000.md (unnamed mfcr define_insn): Name this + set<mode>_cc. + (unnamed define_insn_and_split): Delete. + (unnamed define_insn): Delete. + (unnamed define_insn): Delete. + (unnamed define_split): Delete. + +2019-12-09 Matthew Malcomson <matthew.malcomson@arm.com> + + * regstat.c (regstat_bb_compute_calls_crossed): Add a cast to + avoid a warning. + +2019-12-09 Matthew Malcomson <matthew.malcomson@arm.com> + + PR middle-end/92410 + * bb-reorder.c (pass_reorder_blocks::execute): Recompute + dataflow luids once basic blocks have been reordered. + * haifa-sched.c (reemit_notes): Create df insn record for each + new note. + * regstat.c (regstat_bb_compute_calls_crossed): Assert every + insn has an insn record before trying to use it. + +2019-12-09 Hongtao Liu <hongtao.liu@intel.com> + + * common/config/i386/i386-common.c + (OPTION_MASK_ISA_AVX5124FMAPS_SET): Rename to + OPTION_MASK_ISA2_AVX5124FMAPS_SET. + (OPTION_MASK_ISA_AVX5124VNNIW_SET, OPTION_MASK_ISA_AVX512BF16_SET, + OPTION_MASK_ISA_AVX512VP2INTERSECT_SET, + OPTION_MASK_ISA_PCONFIG_SET, OPTION_MASK_ISA_WBNOINVD_SET, + OPTION_MASK_ISA_SGX_SET, OPTION_MASK_ISA_CX16_SET, + OPTION_MASK_ISA_MOVBE_SET, OPTION_MASK_ISA_PTWRITE_SET, + OPTION_MASK_ISA_MWAITX_SET, OPTION_MASK_ISA_CLZERO_SET, + OPTION_MASK_ISA_RDPID_SET, OPTION_MASK_ISA_VAES_SET, + OPTION_MASK_ISA_MOVDIR64B_SET, OPTION_MASK_ISA_WAITPKG_SET, + OPTION_MASK_ISA_CLDEMOTE_SET, OPTION_MASK_ISA_ENQCMD_SET, + OPTION_MASK_ISA_AVX5124FMAPS_UNSET, + OPTION_MASK_ISA_AVX5124VNNIW_UNSET, + OPTION_MASK_ISA_AVX512BF16_UNSET, + OPTION_MASK_ISA_AVX512VP2INTERSECT_UNSET, + OPTION_MASK_ISA_PCONFIG_UNSET, OPTION_MASK_ISA_WBNOINVD_UNSET, + OPTION_MASK_ISA_SGX_UNSET, OPTION_MASK_ISA_CX16_UNSET, + OPTION_MASK_ISA_MOVBE_UNSET, OPTION_MASK_ISA_PTWRITE_UNSET, + OPTION_MASK_ISA_MWAITX_UNSET, OPTION_MASK_ISA_CLZERO_UNSET, + OPTION_MASK_ISA_RDPID_UNSET, OPTION_MASK_ISA_VAES_UNSET, + OPTION_MASK_ISA_MOVDIR64B_UNSET, OPTION_MASK_ISA_WAITPKG_UNSET, + OPTION_MASK_ISA_CLDEMOTE_UNSET, OPTION_MASK_ISA_ENQCMD_UNSET, + OPTION_MASK_ISA_AVX5124FMAPS, OPTION_MASK_ISA_AVX5124VNNIW, + OPTION_MASK_ISA_AVX512BF16, OPTION_MASK_ISA_AVX512VP2INTERSECT, + OPTION_MASK_ISA_PCONFIG, OPTION_MASK_ISA_WBNOINVD, + OPTION_MASK_ISA_SGX, OPTION_MASK_ISA_CX16, OPTION_MASK_ISA_MOVBE, + OPTION_MASK_ISA_PTWRITE, OPTION_MASK_ISA_MWAITX, + OPTION_MASK_ISA_CLZERO, OPTION_MASK_ISA_RDPID, + OPTION_MASK_ISA_VAES, OPTION_MASK_ISA_MOVDIR64B, + OPTION_MASK_ISA_WAITPKG, OPTION_MASK_ISA_CLDEMOTE, + OPTION_MASK_ISA_ENQCMD): Ditto. + * config/i386/i386-builtin.def + (OPTION_MASK_ISA_AVX5124FMAPS, OPTION_MASK_ISA_AVX5124VNNIW, + OPTION_MASK_ISA_AVX512BF16, OPTION_MASK_ISA_AVX512VP2INTERSECT, + OPTION_MASK_ISA_WBNOINVD, OPTION_MASK_ISA_PTWRITE, + OPTION_MASK_ISA_RDPID, OPTION_MASK_ISA_VAES, + OPTION_MASK_ISA_MOVDIR64B, OPTION_MASK_ISA_ENQCMD): Ditto. + * config/i386/i386-builtins.c (OPTION_MASK_ISA_MWAITX, + OPTION_MASK_ISA_CLZERO, OPTION_MASK_ISA_WAITPKG, + OPTION_MASK_ISA_CLDEMOTE, OPTION_MASK_ISA_WBNOINVD): Ditto. + * config/i386/i386-c.c + (OPTION_MASK_ISA_AVX5124FMAPS, OPTION_MASK_ISA_AVX5124VNNIW, + OPTION_MASK_ISA_AVX512BF16, OPTION_MASK_ISA_AVX512VP2INTERSECT, + OPTION_MASK_ISA_PCONFIG, OPTION_MASK_ISA_WBNOINVD, + OPTION_MASK_ISA_SGX, OPTION_MASK_ISA_CX16, OPTION_MASK_ISA_MOVBE, + OPTION_MASK_ISA_PTWRITE, OPTION_MASK_ISA_MWAITX, + OPTION_MASK_ISA_CLZERO, OPTION_MASK_ISA_RDPID, + OPTION_MASK_ISA_VAES, OPTION_MASK_ISA_MOVDIR64B, + OPTION_MASK_ISA_WAITPKG, OPTION_MASK_ISA_CLDEMOTE, + OPTION_MASK_ISA_ENQCMD): Ditto. + * config/i386/i386-option.c: Ditto + * config/i386/i386.opt: Ditto.. + * config/i386/i386.h: (TARGET_ISA_AVX5124FMAPS, + TARGET_ISA_AVX5124VNNIW, TARGET_ISA_AVX512BF16, + TARGET_ISA_AVX512VP2INTERSECT, TARGET_ISA_PCONFIG, + TARGET_ISA_WBNOINVD, TARGET_ISA_SGX, TARGET_ISA_CX16, + TARGET_ISA_MOVBE, TARGET_ISA_PTWRITE, TARGET_ISA_MWAITX, + TARGET_ISA_CLZERO, TARGET_ISA_RDPID, TARGET_ISA_VAES, + TARGET_ISA_MOVDIR64B, TARGET_ISA_WAITPKG, TARGET_ISA_CLDEMOTE) + TARGET_ISA_ENQCMD): Ditto. + +2019-12-09 Sudakshina Das <sudi.das@arm.com> + Richard Sandiford <richard.sandiford@arm.com> + + * tree-vect-stmt.c (vectorizable_shift): Condition ndts for + vect_model_simple_cost call on scalar_shift_arg. + +2019-12-09 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/92834 + * match.pd (A - ((A - B) & -(C cmp D)) -> (C cmp D) ? B : A, + A + ((B - A) & -(C cmp D)) -> (C cmp D) ? B : A): New simplifications. + +2019-12-09 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org> + + PR tree-optimization/89007 + * tree-vect-patterns.c (vect_recog_average_pattern): If there is no + target support available, generate code to distribute rshift over plus + and add a carry. + +2019-12-09 Martin Liska <mliska@suse.cz> + + PR ipa/92737 + * cgraph.c (symbol_table_test::symbol_table_test): Fix + coding style. + * cgraph.h (symtab_node::symtab_node): New constructor. + (cgraph_node::cgraph_node): Likewise. + (varpool_node::varpool_node): Likewise. + (symbol_table::allocate_cgraph_symbol): Use newly + created constructor. + (symbol_table::allocate_cgraph_symbol): Remove. + * cgraphunit.c (symtab_terminator): Likewise. + * varpool.c (varpool_node::create_empty): Use newly + created constructor. + +2019-12-09 Hongtao Liu <hongtao.liu@intel.com> + + PR target/92686 + * config/i386/sse.md + (*<avx512>_cmp<mode>3<mask_scalar_merge_name><round_saeonly_name>, + *<avx512>_cmp<mode>3<mask_scalar_merge_name>, + *<avx512>_ucmp<mode>3<mask_scalar_merge_name>, + *<avx512>_ucmp<mode>3<mask_scalar_merge_name>): New. + * config/i386/i386.c (ix86_print_operand): New operand substitution. + * config/i386/i386-expand.c (ix86_valid_mask_cmp_mode): + New function. + (ix86_expand_sse_cmp): Relax condition for integer mask from + 512-bit vector to all 128/256/512-bit vector. Delete code gen + for avx512f compare patterns since we have generic pattern now. + (ix86_expand_sse_movcc): Adjust condition and codegen for + maskcmp. + (ix86_expand_int_sse_cmp): Don't canonicalize the comparison + when corresponding vector compare is available. + +2019-12-08 Sandra Loosemore <sandra@codesourcery.com> + + Revert: + 2019-12-05 Sandra Loosemore <sandra@codesourcery.com> + + * config/nios2/linux.h (LINK_EH_SPEC): Define. + +2019-12-07 Jan Hubicka <hubicka@ucw.cz> + + * cgraph.c (cgraph_node::dump): Make tp_first_run 64bit. + * cgraph.h (cgrpah_node): Likewise. + (tp_first_run_node_cmp): Deeclare. + * cgraphunit.c (node_cmp): Rename to ... + (tp_first_run_node_cmp): ... this; export; watch for 64bit overflows; + clear tp_first_run for no_reorder and !flag_profile_reorder_functions. + (expand_all_functions): Collect tp_first_run and normal functions to + two vectors so the other functions remain sorted. Do not check for + flag_profile_reorder_functions it is function local flag. + * profile.c (compute_value_histograms): Update tp_first_run printing. + +2019-12-07 Jan Hubicka <hubicka@ucw.cz> + + * opts.c (common_handle_option): Do not clear ipa_reference for + -fprofile-use. + +2019-12-07 Jan Hubicka <hubicka@ucw.cz> + + * ipa-split.c (split_function): Preserve 0 tp_first_run. + +2019-12-07 Jan Hubicka <hubicka@ucw.cz> + + * ipa-inline-analysis.c (do_estimate_edge_time): Silence overactive + sanity check. + +2019-12-07 Jan Hubicka <hubicka@ucw.cz> + + PR tree-optimization/92860 + * common.opt (fprofile-reorder-functions, ftoplevel-reorder): Add + Optimization flag. + +2019-12-07 Marek Polacek <polacek@redhat.com> + + PR c++/91678 - wrong error with decltype and location wrapper. + * fold-const.c (maybe_lvalue_p): Handle VIEW_CONVERT_EXPR. + +2019-12-07 Eric Botcazou <ebotcazou@adacore.com> + + PR middle-end/90840 + * expr.c (expand_assignment): In the case of a CONCAT on the LHS, make + sure to pass a valid inner mode in calls to simplify_gen_subreg. + +2019-12-07 Tobias Burnus <tobias@codesourcery.com> + David Malcolm <dmalcolm@redhat.com> + Jakub Jelinek <jakub@redhat.com> + + PR c/87488 + * pretty-print.c (pp_begin_url, pp_end_url, test_urls): Use BEL + instead of ST sequence to terminate OSC 8 strings. + +2019-12-06 Andreas Krebbel <krebbel@linux.ibm.com> + Vladimir Makarov <vmakarov@redhat.com> + + PR rtl-optimization/92176 + * lra.c (simplify_subreg_regno): Don't permit unconditional + changing mode for LRA too. + +2019-12-06 Richard Sandiford <richard.sandiford@arm.com> + + * target.h (TCTX_ALLOCATION, TCTX_DEALLOCATION, TCTX_EXCEPTIONS) + (TCTX_CAPTURE_BY_COPY): New type_context_kinds. + * config/aarch64/aarch64-sve-builtins.cc (verify_type_context): + Handle them. + +2019-12-06 Andrew Stubbs <ams@codesourcery.com> + + * config/gcn/gcn-valu.md (gather<mode>_insn_1offset<exec>): Use %o + in the asm output. + +2019-12-06 Andrew Stubbs <ams@codesourcery.com> + + * config/gcn/gcn-valu.md (VEC_1REG_MODE): Remove V64QI and V64HI. + (VEC_1REG_ALT): Likewise. + (VEC_ALL1REG_MODE): New mode iterator. + (VEC_1REG_INT_MODE): Remove V64QI and V64HI. + (VEC_1REG_INT_ALT): Likewise. + (VEC_ALL1REG_INT_MODE): New mode interator. + (VEC_ALL1REG_INT_ALT): Likewise. + (VEC_REG_MODE): Remove V64QI and V64HI. + (VEC_ALLREG_MODE): New mode interator. + (vec_merge): Change to VEC_ALLREG_MODE. + (vec_merge_with_clobber): Likewise. + (vec_merge_with_vcc): Likewise. + (mov<mode>): Likewise. + (mov<mode>_unspec): Likewise. + (*mov<mode>): Change to VEC_ALL1REG_MODE. + (mov<mode>_exec): Likewise. + (*mov<mode>_exec_match): Likewise. + (mov<mode>_sgprbase): Likewise. + (reload_in<mode>): Change to VEC_ALLREG_MODE. + (reload_out<mode>): Likewise. + (scalar address splits): Likewise. + (*vec_set<mode>): Change to VEC_ALL1REG_MODE. + (vec_set<mode>): Change to VEC_ALLREG_MODE. + (*vec_set<mode>_1): Change to VEC_ALL1REG_MODE. + (vec_duplicate<mode><exec>): Likewise. + (vec_extract<mode><scalar_mode>): Likewise. + (vec_init<mode><scalar_mode>): Change to VEC_ALLREG_MODE. + (gather_load<mode>): Likewise. + (gather<mode>_exec): Likewise. + (gather<mode>_expr<exec>): Likewise. + (gather<mode>_insn_1offset<exec>): Likewise. + (gather<mode>_insn_1offset_ds<exec>): Likewise. + (gather<mode>_insn_2offsets<exec>): Likewise. + (ds_bpermute<mode>): Change to VEC_ALL1REG_MODE. + (VEC_INT_MODE): Remove V64QI and V64HI. + (vcond_mask_<mode>di): Change to VEC_ALLREG_MODE. + (vcond<VEC_1REG_MODE:mode><VEC_1REG_ALT:mode>): Change to + VEC_ALL1REG_MODE. + (vcond<VEC_1REG_MODE:mode><VEC_1REG_ALT:mode>_exec): Likewise. + (vcondu<VEC_1REG_MODE:mode><VEC_1REG_INT_ALT:mode>): Likewise. + (vcondu<VEC_1REG_MODE:mode><VEC_1REG_INT_ALT:mode>_exec): Likewise. + (maskload<mode>di): Change to VEC_ALL1REG_MODE. + (maskstore<mode>di): Likewise. + (mask_gather_load<mode>): Likewise. + (mov_from_lane63_<mode>): Likewise. + * config/gcn/gcn.c (gcn_vector_mode_supported_p): Renable V64QImode + and V64HImode vectorization. + (gcn_related_vector_mode): New function. + (TARGET_VECTORIZE_RELATED_MODE): New define. + +2019-12-06 Tobias Burnus <tobias@codesourcery.com> + Kwok Cheung Yeung <kcy@codesourcery.com> + + * omp-low.c (lower_omp_target): For optional arguments, deref once + more to obtain the type. + +2019-12-06 Richard Biener <rguenther@suse.de> + + * match.pd (nop_convert): Remove empty match. Use nop_convert? + everywhere. + +2019-12-06 Richard Sandiford <richard.sandiford@arm.com> + + * tree-data-ref.c (prune_runtime_alias_test_list): Exit early + for empty vectors. Avoid using ordered_remove and instead + shuffle the vector as we go. + +2019-12-06 Richard Biener <rguenther@suse.de> + + * genmatch.c (enum tree_code): Remove CONVERT{0,1,2} and + VIEW_CONVERT{0,1,2}. + (expr::opt_grp): Add and initialize. + (lower_opt_convert): Rename to ... + (lower_opt): ... and work on opt_grp, simply switching operations + from being optional to being present or not. + (has_opt_convert): Rename to ... + (has_opt): ... and adjust. + (parser::parse_operation): Return the optional opt_grp, + remove special-casing of conditional operations and more generally + parse [digit]'?'. + (parser::parse_expr): Stick on the parsed opt_grp and perform + rough verification. + (parser::parse_for): Remove now unnecessary code. + (main): Likewise. + * doc/match-and-simplify.texi: Mention ? now works on all + unary operations and also match predicates. + +2019-12-06 Jan Hubicka <hubicka@ucw.cz> + + * cgraphclones.c (cgraph_node::create_clone): Only localize toplevel + functions, not inline clones. + +2019-12-06 Jan Hubicka <hubicka@ucw.cz> + + * cfgexpand.c (expand_debug_expr): Do not ICE on SAD_EXPR. + +2019-12-06 Richard Biener <rguenther@suse.de> + + * genmatch.c (c_expr::gen_transform): Emit newlines from line + number changes rather than after every semicolon. + +2019-12-06 Richard Biener <rguenther@suse.de> + + PR tree-optimization/92819 + * match.pd (VEC_PERM_EXPR -> BIT_INSERT_EXPR): Handle inserts + into the last lane. For two-element vectors try inserting + into the last lane when inserting into the first fails. + +2019-12-06 Jakub Jelinek <jakub@redhat.com> + + * common.opt (fprofile-partial-training): Terminate description with + full stop. + +2019-12-05 Martin Sebor <msebor@redhat.com> + + PR middle-end/92622 + * tree-vrp.c (vrp_prop::check_array_ref): Avoid using a variable + left uninitialized by get_addr_base_and_unit_offset on failure. + +2019-12-05 Jan Hubicka <hubicka@ucw.cz> + + * ipa-prop.c (ipa_set_jf_unknown): Do not clear bits and m_vr. + (detect_type_change_from_memory_writes): Remoe parameter JFUNC. + (detect_type_change): Likewise. + (detect_type_change_ssa): Likewise. + (ipa_analyze_virtual_call_uses): Update. + +2019-12-05 Sandra Loosemore <sandra@codesourcery.com> + + * config/nios2/linux.h (LINK_EH_SPEC): Define. + +2019-12-05 Jan Hubicka <hubicka@ucw.cz> + + * ipa-inline-transform.c (inline_call): Fix maintenatnce of comdat_local + +2019-12-05 Jan Hubicka <hubicka@ucw.cz> + + * cgraphclones.c (localize_profile): New function. + (cgraph_node::create_clone): Use it for partial profiles. + * common.opt (fprofile-partial-training): New flag. + * doc/invoke.texi (-fprofile-partial-training): Document. + * ipa-cp.c (update_profiling_info): For partial profiles do not + set function profile to zero. + * profile.c (compute_branch_probabilities): With partial profile + watch if edge count is zero and turn all probabilities to guessed. + (compute_branch_probabilities): For partial profiles do not apply + profile when entry count is zero. + * tree-profile.c (tree_profiling): Only do value_profile_transformations + when profile is read. + +2019-12-05 Sudakshina Das <sudi.das@arm.com> + + * tree-vect-loop.c (vect_model_reduction_cost): Remove reduction_type + check from if condition. + +2019-12-05 Tobias Burnus <tobias@codesourcery.com> + + * omp-low.c (lower_omp_target): For use_device_ptr/use_derice_addr + and Fortran's optional arguments, unconditionally add the is-present + condition before the libgomp call. + +2019-12-05 Richard Sandiford <richard.sandiford@arm.com> + + PR middle-end/92768 + * tree-core.h (OEP_BITWISE): New flag. + * fold-const.c (operand_compare::operand_equal_p): Handle it. + * tree-vector-builder.h (tree_vector_builder::equal_p): Pass it. + +2019-12-05 Richard Biener <rguenther@suse.de> + + PR middle-end/92818 + * tree-ssa-forwprop.c (simplify_vector_constructor): Improve + heuristics on what don't care element to choose. + * match.pd (VEC_PERM_EXPR -> BIT_INSERT_EXPR): Fix typo. + +2019-12-05 Martin Liska <mliska@suse.cz> + + PR gcov-profile/92817 + * coverage.c (build_gcov_exit_decl): Remove superfluous + void_type_node. + +2019-12-05 Jozef Lawrynowicz <jozef.l@mittosystems.com> + + * config/msp430/msp430.md (cbranch<mode>4): Use + msp430_general_dst_nonv_operand instead of nonimmediate_operand for + dest operand of CMP instruction. + (cbranchpsi4_real): Likewise. + (cbranchqi4_real): Likewise. + (cbranchhi4_real): Likewise. + (cbranchpsi4_reversed): Likewise. + (cbranchqi4_reversed): Likewise. + (cbranchhi4_reversed): Likewise. + +2019-12-05 Richard Biener <rguenther@suse.de> + + PR tree-optimization/92803 + * tree-ssa-forwprop.c (simplify_vector_constructor): Fix + invariant vector construction. + +2019-12-05 Martin Liska <mliska@suse.cz> + + PR gcov-profile/91971 + * coverage.c (coverage_init): Mangle full path + only when -fprofile-dir is used. + +2019-12-05 Jakub Jelinek <jakub@redhat.com> + + PR target/92791 + * config/i386/i386.md (movstrict<mode>): Move test for + TARGET_PARTIAL_REG_STALL and not optimizing for size from + expander's condition to the body - FAIL; in that case. + +2019-12-03 Martin Sebor <msebor@redhat.com> + + PR middle-end/91582 + * builtins.c (gimple_call_alloc_size): New function. + (compute_objsize): Add argument. Call gimple_call_alloc_size. + Handle variable offsets and indices. + * builtins.h (gimple_call_alloc_size): Declare. + (compute_objsize): Add argument. + * gimple-ssa-warn-restrict.c: Remove assertions. + * tree-ssa-strlen.c (handle_store): Handle calls to allocated objects. + +2019-12-04 Julian Brown <julian@codesourcery.com> + + * config/gcn/gcn.h (FIXED_REGISTERS): Make s6/s7 fixed registers. + +2019-12-04 Peter Bergner <bergner@linux.ibm.com> + + PR bootstrap/92661 + * config/rs6000/rs6000-c.c (struct altivec_builtin_types): Move to + rs6000.h. + (altivec_overloaded_builtins): Move to rs6000-call.c. + * config/rs6000/rs6000.h (struct altivec_builtin_types): Moved from + rs6000-c.c. + * config/rs6000/rs6000-call.c (rs6000_builtin_info): Make static. + (altivec_overloaded_builtins): Moved from rs6000-c.c. + (rs6000_common_init_builtins): Do no define builtins that overload + builtins that have been disabled. + +2019-12-04 Wilco Dijkstra <wdijkstr@arm.com> + + * config/arm/arm.c (arm_option_override_internal): + Use max_cond_insns from CPU tuning unless -mrestrict-it is used. + +2019-12-04 Wilco Dijkstra <wdijkstr@arm.com> + + * config/aarch64/aarch64.c + (thunderxt88_tunings): Use AARCH64_FUSE_ALU_BRANCH. + (thunderx_tunings): Likewise. + (tsv110_tunings): Use AARCH64_FUSE_ALU_BRANCH and AARCH64_FUSE_ALU_CBZ. + (thunderx2t99_tunings): Likewise. + (aarch_macro_fusion_pair_p): Add support for AARCH64_FUSE_CMP_BRANCH. + * config/aarch64/aarch64-fusion-pairs.def: Add ALU_CBZ fusion. + +2019-12-04 Richard Biener <rguenther@suse.de> + + * tree-ssa-sccvn.c (vn_reference_lookup_3): Properly guard + empty CTOR and memset partial-def registering. Take advantage + of fancy offset analysis in memset handling. + +2019-12-04 Richard Sandiford <richard.sandiford@arm.com> + + * fold-const.c (native_encode_vector_part): Handle + VECTOR_BOOLEAN_TYPE_Ps that have subbyte precision. + (native_decode_vector_tree): Delete, moving the bulk of the code to... + (native_interpret_vector_part): ...this new function. Use a pointer + and length instead of a vec<> and start index. + (native_interpret_vector): Use native_interpret_vector_part. + (fold_view_convert_vector_encoding): Likewise. + +2019-12-04 Richard Biener <rguenther@suse.de> + + * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Handle + non-constant defs in the most trivial way. + (vn_reference_lookup_3): Also push down SSA partial defs. + +2019-12-04 Martin Liska <mliska@suse.cz> + + * tree-switch-conversion.c (switch_decision_tree::try_switch_expansion): + Initialize count of newly created BB. + +2019-12-04 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/92734 + * match.pd ((A +- B) - A -> +- B, (A +- B) -+ B -> A, + A - (A +- B) -> -+ B, A +- (B -+ A) -> +- B): Handle nop_convert. + +2019-12-04 Kewen Lin <linkw@gcc.gnu.org> + + PR target/92760 + * config/rs6000/rs6000.c (rs6000_preferred_simd_mode): Use + VECTOR_MEM_NONE_P instead of VECTOR_UNIT_NONE_P. + +2019-12-03 Jan Hubicka <hubicka@ucw.cz> + + * ipa-fnsummary.c: Include tree-into-ssa.h. + (compute_fn_summary): Call update_ssa. + +2019-12-03 Jan Hubicka <hubicka@ucw.cz> + + * cgraph.c (cgraph_node::verify_node): Check that calls_comdat_local + is set only for symbol in comdat group. + * symtab.c (symtab_node::dissolve_same_comdat_group_1): Clear it. + +2019-12-03 Jan Hubicka <hubicka@ucw.cz> + + * cgraph.c: Include tree-into-ssa.h + (cgraph_node::get_body): Call update_ssa. + * cgraphunit.c (cgraph_node::expand): Likewise. + * lto-streamer-in.c (input_function): Do not call update_ssa. + +2019-12-03 Richard Sandiford <richard.sandiford@arm.com> + + * gimplify.c (gimplify_compound_lval): Don't gimplify and install + an array element size if array_element_size is already an invariant. + Similarly don't gimplify and install a field offset if + component_ref_field_offset is already an invariant. + +2019-12-03 Richard Sandiford <richard.sandiford@arm.com> + + * cfgexpand.c (discover_nonconstant_array_refs_r): If an access + with POLY_INT_CST size is made to a fixed-size object, force the + object to live in memory. + +2019-12-03 Andrew Stubbs <ams@codesourcery.com> + + * config/gcn/gcn-valu.md: Change "vcondu" patterns to use VEC_1REG_MODE + for the data mode. + +2019-12-03 Richard Biener <rguenther@suse.de> + + PR tree-optimization/92758 + * tree-ssa-forwprop.c (simplify_vector_constructor): Restore + operation on uniform vectors. + +2019-12-03 Richard Biener <rguenther@suse.de> + + PR tree-optimization/92645 + * gimple-fold.c (gimple_fold_builtin_memory_op): Fold memcpy + from or to a properly aligned register variable. + +2019-12-03 Matthias Klose <doko@ubuntu.com> + + * Makefile.in (SOURCES): Add doc/lto-dump.1. + (install-man): Add $(LTO_DUMP_INSTALL_NAME)$(man1ext). + ($(LTO_DUMP_INSTALL_NAME)$(man1ext): New. + +2019-12-03 Richard Biener <rguenther@suse.de> + + PR tree-optimization/92751 + * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Fail + when a clobber ends up in the partial-def vector. + (vn_reference_lookup_3): Let clobbers be handled by the + assignment from CTOR handling. + +2019-12-03 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/92734 + * match.pd ((CST1 - A) +- CST2 -> CST3 - A, + CST1 - (CST2 - A) -> CST3 + A): Handle nop casts around + inner subtraction. + +2019-12-03 Uroš Bizjak <ubizjak@gmail.com> + Jakub Jelinek <jakub@redhat.com> + + PR target/92744 + * config/i386/i386.md (peephole2 for *swap<mode>): Use + general_reg_operand predicates instead of register_operand. + +2019-12-03 Richard Biener <rguenther@suse.de> + + PR tree-optimization/92645 + * tree-ssa.c (execute_update_addresses_taken): Avoid representing + a full def of a vector via a BIT_INSERT_EXPR. + +2019-12-02 Bill Schmidt <wschmidt@linux.ibm.com> + + * config/rs6000/rs6000-call.c (rs6000_invalid_builtin): Make + static. + * config/rs6000/rs6000-internal.h (rs6000_invalid_builtin): Remove + decl. + +2019-12-02 Richard Sandiford <richard.sandiford@arm.com> + + PR middle-end/92741 + * fold-const.c (fold_convertible_p): Check vector types more + thoroughly. + +2019-12-02 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/aarch64.c (aarch64_report_sve_required): New function. + (aarch64_expand_mov_immediate): Use it when attempting to measure + the length of an SVE vector. + (aarch64_mov_operand_p): Only allow SVE CNT immediates when + SVE is enabled. + +2019-12-02 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/aarch64-sve-builtins.h + (gimple_folder::force_vector): Declare. + * config/aarch64/aarch64-sve-builtins.cc + (gimple_folder::force_vector): New function. + * config/aarch64/aarch64-sve-builtins-base.cc + (svcmp_impl::fold): Likewise. + (svdup_impl::fold): Handle svdup_z too. + +2019-12-02 Martin Liska <mliska@suse.cz> + + * ipa-devirt.c (warn_types_mismatch): Use get_odr_name_for_type + function. + (debug_tree_odr_name): New. + * ipa-utils.h (get_odr_name_for_type): New. + +2019-12-02 Richard Biener <rguenther@suse.de> + + PR tree-optimization/92742 + * tree-vect-loop.c (vect_fixup_reduc_chain): Do not + touch the def-type but verify it is consistent with the + original stmts. + +2019-12-02 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/92712 + * match.pd ((A * B) +- A -> (B +- 1) * A, + A +- (A * B) -> (1 +- B) * A): Allow optimizing signed integers + even when we don't know anything about range of A, but do know + something about range of B and the simplification won't introduce + new UB. + +2019-12-02 Feng Xue <fxue@os.amperecomputing.com> + + PR ipa/92133 + * doc/invoke.texi (ipa-cp-max-recursive-depth): Document new option. + (ipa-cp-min-recursive-probability): Likewise. + * params.opt (ipa-cp-max-recursive-depth): New. + (ipa-cp-min-recursive-probability): Likewise. + * ipa-cp.c (ipcp_lattice<valtype>::add_value): Add two new parameters + val_p and unlimited. + (self_recursively_generated_p): New function. + (get_val_across_arith_op): Likewise. + (propagate_vals_across_arith_jfunc): Add constant propagation for + self-recursive function. + (incorporate_penalties): Do not penalize pure self-recursive function. + (good_cloning_opportunity_p): Dump node_is_self_scc flag. + (propagate_constants_topo): Set node_is_self_scc flag for cgraph node. + (get_info_about_necessary_edges): Relax hotness check for edge to + self-recursive function. + * ipa-prop.h (ipa_node_params): Add new field node_is_self_scc. + +2019-12-01 Sandra Loosemore <sandra@codesourcery.com> + + PR target/92499 + + * config/nios2/nios2.c (nios2_in_small_data_p): Do not consider + objects of flexible types to be small if they have internal linkage + or are declared extern. + * config/nios2/nios2.h (ASM_OUTPUT_ALIGNED_LOCAL): Replace with... + (ASM_OUTPUT_ALIGNED_DECL_LOCAL): ...this. Use targetm.in_small_data_p + instead of the size of the object initializer. + * tree.c (flexible_array_type_p): Move from C front end, and + generalize to handle fields in non-C structures. + * tree.h (flexible_array_type_p): Declare. + +2019-11-30 Jan Hubicka <hubicka@ucw.cz> + + * profile-count.h (profile_count::operator<): Use IPA value for + comparsion. + (profile_count::operator>): Likewise. + (profile_count::operator<=): Likewise. + (profile_count::operator>=): Likewise. + * predict.c (maybe_hot_count_p): Do not convert to gcov_type. + +2019-11-30 Jan Hubicka <hubicka@ucw.cz> + + * ipa-inline.c (compute_max_insns): Return int64_t. + (inline_small_functions): Simplify. + +2019-11-30 Jan Hubicka <hubicka@ucw.cz> + + * tree-cfg.c (execute_fixup_cfg): Update also max_bb_count when + scaling happen. + +2019-11-30 Jan Hubicka <hubicka@ucw.cz> + + * cgraph.h (symtab_node): Add symver flag. + * cgraphunit.c (process_symver_attribute): New. + (process_common_attributes): Use process_symver_attribute. + * lto-cgraph.c (lto_output_node): Stream symver. + (lto_output_varpool_node): Stream symver. + (input_overwrite_node): Stream symver. + (input_varpool_node): Stream symver. + * output.h (do_assemble_symver): Decalre. + * symtab.c (symtab_node::dump_base): Dump symver. + (symtab_node::verify_base): Verify symver. + (symtab_node::resolve_alias): Handle symver. + * varasm.c (do_assemble_symver): New function. + * varpool.c (varpool_node::assemble_aliases): Use it. + * doc/extend.texi: (symver attribute): Document. + * config/elfos.h (ASM_OUTPUT_SYMVER_DIRECTIVE): New. + +2019-11-30 Richard Sandiford <richard.sandiford@arm.com> + + * target.h (type_context_kind): New enum. + (verify_type_context): Declare. + * target.def (verify_type_context): New target hook. + * doc/tm.texi.in (TARGET_VERIFY_TYPE_CONTEXT): Likewise. + * doc/tm.texi: Regenerate. + * tree.c (verify_type_context): New function. + * config/aarch64/aarch64-protos.h (aarch64_sve::verify_type_context): + Declare. + * config/aarch64/aarch64-sve-builtins.cc (verify_type_context): + New function. + * config/aarch64/aarch64.c (aarch64_verify_type_context): Likewise. + (TARGET_VERIFY_TYPE_CONTEXT): Define. + +2019-11-30 Jan Hubicka <hubicka@ucw.cz> + + * cgraph.c (cgraph_node::dump): Dump unit_id and merged_extern_inline. + * cgraph.h (cgraph_node): Add unit_id and + merged_extern_inline. + (symbol_table): Add max_unit. + (symbol_table::symbol_table): Initialize it. + * cgraphclones.c (duplicate_thunk_for_node): Copy unit_id. + merged_comdat, merged_extern_inline. + (cgraph_node::create_clone): Likewise. + (cgraph_node::create_version_clone): Likewise. + * ipa-fnsummary.c (dump_ipa_call_summary): Dump info about cross module + calls. + * ipa-fnsummary.h (cross_module_call_p): New inline function. + * ipa-inline-analyssi.c (simple_edge_hints): Use it. + * ipa-inline.c (inline_small_functions): Likewise. + * lto-symtab.c (lto_cgraph_replace_node): Record merged_extern_inline; + copy merged_comdat and merged_extern_inline. + * lto-cgraph.c (lto_output_node): Stream out merged_comdat, + merged_extern_inline and unit_id. + (input_overwrite_node): Stream in these. + (input_cgraph_1): Set unit_base. + * lto-streamer.h (lto_file_decl_data): Add unit_base. + * symtab.c (symtab_node::make_decl_local): Record former_comdat. + +2019-11-30 Maciej W. Rozycki <macro@wdc.com> + + * gcc.c (process_command): Only warn about an ineffective `-x' + option if any input files have actually been supplied. + +2019-11-30 Maciej W. Rozycki <macro@wdc.com> + + * doc/install.texi (Options specification): Remove the list of + target library subdirectories supporting + `--enable-version-specific-runtime-libs'. Document defaults for + the option. + +2019-11-29 Vladimir Makarov <vmakarov@redhat.com> + + PR rtl-optimization/92283 + * lra.c (lra): Update reg notes after inheritance sub-pass and + before constraint sub-pass. + +2019-11-29 Richard Biener <rguenther@suse.de> + + PR tree-optimization/91003 + * tree-vect-slp.c (vect_mask_constant_operand_p): Pass in the + operand number, avoid handling the non-condition operands of + COND_EXPRs as comparisons. + (vect_get_constant_vectors): Pass down the operand number. + (vect_get_slp_defs): Likewise. + +2019-11-29 Frederik Harwath <frederik@codesourcery.com> + + * gimple-match-head.c (maybe_resimplify_conditional_op): Use + generic_expr_could_trap_p to check if the condition of COND_EXPR or + VEC_COND_EXPR can trap. + +2019-11-29 Richard Sandiford <richard.sandiford@arm.com> + + PR tree-optimization/92677 + * tree-vect-loop.c (vect_dissolve_slp_only_groups): Set the gap + to zero when dissolving a group of strided accesses. + +2019-11-29 Richard Sandiford <richard.sandiford@arm.com> + + PR tree-optimization/92596 + * tree-vect-stmts.c (vectorizable_call): Punt on hybrid mask/nonmask + operations. + (vectorizable_operation): Likewise, instead of relying on + vect_get_mask_type_for_stmt to do this. + (vect_get_vector_types_for_stmt): Always return a vector type + immediately, rather than deferring the choice for boolean results. + Use a vector mask type instead of a normal vector if + vect_use_mask_type_p. + (vect_get_mask_type_for_stmt): Delete. + * tree-vect-loop.c (vect_determine_vf_for_stmt_1): Remove + mask_producers argument and special boolean_type_node handling. + (vect_determine_vf_for_stmt): Remove mask_producers argument and + update calls to vect_determine_vf_for_stmt_1. Remove doubled call. + (vect_determine_vectorization_factor): Update call accordingly. + * tree-vect-slp.c (vect_build_slp_tree_1): Remove special + boolean_type_node handling. + (vect_slp_analyze_node_operations_1): Likewise. + +2019-11-29 Richard Sandiford <richard.sandiford@arm.com> + + * tree-vectorizer.h (stmt_vec_info::mask_precision): New field. + (vect_use_mask_type_p): New function. + * tree-vect-patterns.c (vect_init_pattern_stmt): Copy the + mask precision to the pattern statement. + (append_pattern_def_seq): Add a scalar_type_for_mask parameter + and use it to initialize the new stmt's mask precision. + (search_type_for_mask_1): Delete. + (search_type_for_mask): Replace with... + (integer_type_for_mask): ...this new function. Use the information + cached in the stmt_vec_info. + (vect_recog_bool_pattern): Update accordingly. + (build_mask_conversion): Pass the scalar type associated with the + mask type to append_pattern_def_seq. + (vect_recog_mask_conversion_pattern): Likewise. Call + integer_type_for_mask instead of search_type_for_mask. + (vect_convert_mask_for_vectype): Call integer_type_for_mask instead + of search_type_for_mask. + (possible_vector_mask_operation_p): New function. + (vect_determine_mask_precision): Likewise. + (vect_determine_stmt_precisions): Call it. + +2019-11-29 Richard Sandiford <richard.sandiford@arm.com> + + * tree-vectorizer.h (get_mask_type_for_scalar_type): Replace + the slp_tree parameter with a group size parameter. + (vect_get_mask_type_for_stmt): Likewise. + * tree-vect-stmts.c (get_mask_type_for_scalar_type): Likewise. + (vect_get_mask_type_for_stmt): Likewise. + * tree-vect-slp.c (vect_slp_analyze_node_operations_1): Update + call accordingly. + +2019-11-29 Richard Sandiford <richard.sandiford@arm.com> + + * tree-vect-stmts.c (vectorizable_operation): Punt early + on codes that are handled elsewhere. + +2019-11-29 Richard Sandiford <richard.sandiford@arm.com> + + * doc/sourcebuild.texi (vect_bool_cmp): Document. + * tree-vect-patterns.c (search_type_for_mask_1): If neither + operand to a boolean comparison is a natural vector mask, + handle both operands like normal integers instead. + +2019-11-29 Richard Biener <rguenther@suse.de> + + * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Bail + out early for too large objects. + +2019-11-29 Martin Jambor <mjambor@suse.cz> + + PR ipa/92476 + * ipa-cp.c (set_single_call_flag): Set node_calling_single_call in + the summary only if the summary exists. + (find_more_scalar_values_for_callers_subset): Check node_dead in + the summary only if the summary exists. + (ipcp_store_bits_results): Ignore nodes without lattices. + (ipcp_store_vr_results): Likewise. + * cgraphclones.c: Include ipa-fnsummary.h and ipa-prop.h and the + header files required by them. + (cgraph_node::expand_all_artificial_thunks): Analyze expanded thunks. + +2019-11-29 Richard Sandiford <richard.sandiford@arm.com> + + PR tree-optimization/92710 + * tree-vect-stmts.c (vectorizable_simd_clone_call): Reject + vector mask arguments. + +2019-11-29 Jan Hubicka <hubicka@ucw.cz> + + * profile-count.c (profile_count::to_cgraph_frequency, + profile_count::to_sreal_scale): Check for compaibility of counts. + * profile-count.h (compatible_p): Make public; add checking for + global0 versus global types. + * cgraph.c (cgraph_node::verify_node): Verify count compatibility. + +2019-11-29 Richard Biener <rguenther@suse.de> + + PR tree-optimization/92715 + * tree-ssa-forwprop.c (simplify_vector_constructor): Bail + out for uniform vectors and source vectors with less elements + than the destination. + +2019-11-29 Martin Liska <mliska@suse.cz> + + PR lto/91574 + * ipa-devirt.c (types_same_for_odr): Check for existence + of TYPE_NAMEs first. + +2019-11-29 Richard Biener <rguenther@suse.de> + + PR tree-optimization/92704 + * tree-if-conv.c (combine_blocks): Deal with virtual PHIs + in loops performing only loads. + +2019-11-29 Julian Brown <julian@codesourcery.com> + + * builtin-types.def (BT_DFLOAT32_PTR, BT_DFLOAT64_PTR, + BT_DFLOAT128_PTR) Remove. + * tree-core.h (TI_DFLOAT32_PTR_TYPE, TI_DFLOAT64_PTR_TYPE, + TI_DFLOAT128_PTR_TYPE): Remove. + * tree.c (build_common_type_nodes): Remove dfloat32_ptr_type_node, + dfloat64_ptr_type_node and dfloat128_ptr_type_node initialisation. + * tree.h (dfloat32_ptr_type_node, dfloat64_ptr_type_node, + dfloat128_ptr_type_node): Remove macros. + +2019-11-28 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/rs6000.md (*movsi_internal1): Fix formatting. Improve + formatting. + (*movdi_internal64): Ditto. + +2019-11-28 Segher Boessenkool <segher@kernel.crashing.org> + + PR target/92602 + * config/rs6000/rs6000.md (bswap<mode>2_load for HSI): Change the + indexed_or_indirect_operand to be memory_operand. + (bswap<mode>2_store for HSI): Ditto. + (bswapdi2_load): Ditto. + (bswapdi2_store): Ditto. + +2019-11-28 Martin Liska <mliska@suse.cz> + + PR debug/46558 + * dbgcnt.c (dbg_cnt_list_all_counters): Mark table + headers for translation. + +2019-11-28 Martin Liska <mliska@suse.cz> + + PR lto/92609 + * ipa-devirt.c (warn_types_mismatch): Use TYPE_MAIN_VARIANT + consistently. + +2019-11-28 Jan Hubicka <hubicka@ucw.cz> + + * ipa-inline.c (want_early_inline_function_p): Remove leftover optimize + checks. + +2019-11-28 Jan Hubicka <hubicka@ucw.cz> + + * profile-count.c (profile_count::combine_with_ipa_count): Return + uninitialized count if called on ininitialized count. + +2019-11-28 Jan Hubicka <hubicka@ucw.cz> + + * ipa-inline-transform.c (inline_transform): Scale profile before + redirecting. + +2019-11-28 Jan Hubicka <hubicka@ucw.cz> + + * profile-count.h (profile_count::max): Work on profiles of different + type. + (profile_count::apply_scale): Be sure that ret is not local or global0 + type if num is global. + +2019-11-28 Jan Hubicka <hubicka@ucw.cz> + + * profile-count.h (profile_count::max): Work on profiles of different + type. + (profile_count::apply_scale): Be sure that ret is not local or global0 + type if num is global. + +2019-11-28 Martin Jambor <mjambor@suse.cz> + + PR ipa/92697 + * cgraph.c (cgraph_node_cannot_be_local_p_1): Return true for + ifunc_resolvers. + * symtab.c (symtab_node::dump_base): Dump ifunc_resolver flag. + Removed trailig whitespace. + +2019-11-28 Jan Hubicka <hubicka@ucw.cz> + + * profile-count.h (profile_count::combine_with_ipa_count_within): + Declare. + * profile-count.c (profile_count::combine_with_ipa_count_within): + New. + * cgraphclones.c (cgraph_edge::clone, cgraph_node::create_clone): Use + it. + +2019-11-28 Jan Hubicka <hubicka@ucw.cz> + + * ipa-utils.c (ipa_merge_profiles): Be sure that all type transtions + of counters are done same way. + +2019-11-28 Jan Hubicka <hubicka@ucw.cz> + + * ipa-cp.c (update_profiling_info): Fix scaling. + +2019-11-28 Richard Biener <rguenther@suse.de> + + PR tree-optimization/92645 + * tree-inline.c (remap_gimple_stmt): When the return value + is not wanted, elide GIMPLE_RETURN. + +2019-11-28 Richard Biener <rguenther@suse.de> + + PR tree-optimization/92645 + * tree-ssa-forwprop.c (get_bit_field_ref_def): Also handle + conversions inside a mode class. Remove restriction on + preserving the element size. + (simplify_vector_constructor): Deal with the above and for + identity permutes also try using VEC_UNPACK_[FLOAT_]LO_EXPR + and VEC_PACK_TRUNC_EXPR. + +2019-11-28 Georg-Johann Lay <avr@gjlay.de> + + Must use push insn to pass varargs arguments of DFmode because + otherwise the middle-end generates wrong code. + + PR target/92055 + * config/avr/avr.md (MPUSH) [DF, DC]: Add modes to mode iterator. + +2019-11-28 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/92691 + * tree-ssa-strlen.c (handle_store): Clarify return value meaning + in function comment. + (strlen_check_and_optimize_call): Likewise. For handle_printf_call + calls, return !handle_printf_call rather than always returning true. + (check_and_optimize_stmt): Describe return value meaning in function + comment. Formatting fix. + +2019-11-28 Jan Hubicka <hubicka@ucw.cz> + + * profile-count.c (profile_count::to_sreal_scale): Handle correctly + combination of globa0 and global counters.. + +2019-11-28 Kewen Lin <linkw@gcc.gnu.org> + + PR target/92566 + * config/rs6000/rs6000.c (rs6000_preferred_simd_mode): Check + by VECTOR_UNIT_NONE_P instead. + +2019-11-28 Hongtao Liu <hongtao.liu@inte.com> + + * config/i386/sse.md (avx512f_maskcmp<mode>3): + Refine VF to VF_AVX512VL. + +2019-11-27 Michael Meissner <meissner@linux.ibm.com> + + * config/rs6000/rs6000.md (movsi_internal): Reformat. + (movdi_internal64): Reformat. + +2019-11-27 Peter Bergner <bergner@linux.ibm.com> + + PR bootstrap/92661 + * config/rs6000/rs6000-call.c: (def_builtin): Do not define the + builtin if we don't have an actual type. + (builtin_function_type): If the builtin function uses a DFP type + and decimal float has been disabled, then return NULL_TREE. + +2019-11-27 Jakub Jelinek <jakub@redhat.com> + + PR rtl-optimization/92510 + * combine.c (gen_lowpart_for_combine): Only transform lowpart subreg + of comparison into a comparison with different mode if both imode and + omode are scalar integral modes. + +2019-11-27 Vladimir Makarov <vmakarov@redhat.com> + + PR rtl-optimization/90007 + * recog.c (constrain_operands): Permit hard registers too for + memory when LRA is used. + +2019-11-27 Bernd Schmidt <bernds_cb1@t-online.de> + + * config/m68k/m68k.c (m68k_output_compare_fp): Restore differences + between Coldfire and regular m68k. + * config/m68k/m68k.md (cmp1_cf_constraints): Disallow constants. + +2019-11-27 Richard Biener <rguenther@suse.de> + + * target.def (TARGET_VECTORIZE_BUILTIN_CONVERSION): Remove. + * targhooks.c (default_builtin_vectorized_conversion): Likewise. + * targhooks.h (default_builtin_vectorized_conversion): Likewise. + * optabs-tree.c (supportable_convert_operation): Do not call + targetm.vectorize.builtin_conversion. Remove unused decl parameter. + * optabs-tree.h (supportable_convert_operation): Adjust. + * doc/tm.texi.in (TARGET_VECTORIZE_BUILTIN_CONVERSION): Remove. + * doc/tm.texi: Regenerate. + * tree-ssa-forwprop.c (simplify_vector_constructor): Adjust. + * tree-vect-generic.c (expand_vector_conversion): Likewise. + * tree-vect-stmts.c (vect_gen_widened_results_half): Remove + unused decl parameter and adjust. + (vect_create_vectorized_promotion_stmts): Likewise. + (vectorizable_conversion): Adjust. + +2019-11-27 Richard Biener <rguenther@suse.de> + + PR tree-optimization/92690 + * tree-ssa-forwprop.c (simplify_vector_constructor): Avoid + converting elements not originally converted. + +2019-11-27 Tobias Burnus <tobias@codesourcery.com> + + PR middle-end/92463 + * builtins.c (do_mpfr_ckconv, do_mpc_ckconv, do_mpfr_remquo, + do_mpfr_lgamma_r, do_mpc_arg2): Use MPFR_RNDx instead of GMP_RNDx, + mpfr_rnd_t instead of mp_rnd_t. + * fold-const-call.c (do_mpfr_ckconv, do_mpfr_arg1, do_mpfr_sincos, + do_mpfr_arg2, do_mpfr_arg3, do_mpc_arg1, do_mpc_arg2): Likewise. + * gimple-ssa-sprintf.c (format_floating_max, format_floating): + Use mpfr_exp_t instead of mp_exp_t. + * real.c (real_from_string, dconst_e_ptr, dconst_sqrt2_ptr): Use + MPFR_RNDx instead of GMP_RNDx. + * realmpfr.c (real_from_mpfr, mpfr_from_real): Use mpfr_rnd_t and + mpfr_exp_t instead mp_rnd_t and mp_exp_t, respectively. + * realmpfr.h (real_from_mpfr, mpfr_from_real): Use mpfr_rnd_t instead + of mp_rnd_t and remove MPFR_RNDx poisoning. + * ubsan.c (ubsan_instrument_float_cast): MPFR_RNDx instead of GMP_RNDx. + +2019-11-27 Kewen Lin <linkw@gcc.gnu.org> + + PR tree-optimization/91790 + * tree-vect-stmts.c (vectorizable_load): Use the adjusted + DR for vect_setup_realignment when first_stmt_info is different + from first_stmt_info_for_drptr. + +2019-11-27 Richard Biener <rguenther@suse.de> + + PR tree-optimization/92645 + * tree-ssa-forwprop.c (simplify_vector_constructor): Handle + CTORs with just a subset of the original vectors. + +2019-11-27 Richard Biener <rguenther@suse.de> + + PR middle-end/92674 + * tree-inline.c (expand_call_inline): Delay purging EH/abnormal + edges and instead record blocks in bitmap. + (gimple_expand_calls_inline): Adjust. + (fold_marked_statements): Delay EH cleanup until all folding is + done. + (optimize_inline_calls): Do EH/abnormal cleanup for calls after + inlining finished. + +2019-11-27 Bernd Schmidt <bernds_cb1@t-online.de> + + * auto-inc-dec.c (merge_in_block): Allow autoinc in jumps unless + LRA is enabled. + * combine.c (can_combine_p): Disallow autoinc in jumps unless LRA is + disabled. + +2019-11-27 Jakub Jelinek <jakub@redhat.com> + + PR debug/92664 + * dwarf2out.c (lookup_filename): Use "<stdin>" instead of "". + +2019-11-26 Martin Sebor <msebor@redhat.com> + + PR tree-optimization/92683 + * gimple-fold.c (gimple_fold_builtin_string_compare): Restore a test + inadvertently removed in a previous change. Rename local variable + for clarity. + +2019-11-26 Richard Biener <rguenther@suse.de> + + PR middle-end/92669 + * cfganal.c (pre_and_rev_post_order_compute_fn): Deal with + NULL pre_order. + +2019-11-26 Robin Dapp <rdapp@linux.ibm.com> + + * config/s390/linux.h: Add undef for MUSL_DYNAMIC_LINKERxx. + +2019-11-26 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/92644 + * tree-ssa-phiopt.c (minmax_replacement): Add INTEGRAL_TYPE_P check + next to INTEGER_CST checks. + +2019-11-26 Richard Biener <rguenther@suse.de> + + PR tree-optimization/92645 + * tree-vect-slp.c (vect_build_slp_tree_2): For unary ops + do not build the operation from scalars if the operand is. + +2019-11-25 Tobias Burnus <tobias@codesourcery.com> + + * config/gcn/mkoffload.c (COMMENT_PREFIX, struct id_map, + func_ids, funcs_tail, var_ids, vars_tail) Remove unused + definitions. + +2019-11-25 Martin Liska <mliska@suse.cz> + + * ipa-icf.c (sem_item_optimizer::dump_cong_classes): Clean + up used dump message. + +2019-11-25 Martin Liska <mliska@suse.cz> + + PR bootstrap/92653 + * ipa-fnsummary.c (ipa_fn_summary::account_size_time): Comment out + too strict checking assert. + +2019-11-25 Joseph Myers <joseph@codesourcery.com> + + PR c/91985 + * builtin-types.def (BT_DFLOAT32, BT_DFLOAT64, BT_DFLOAT128) + (BT_DFLOAT32_PTR, BT_DFLOAT64_PTR, BT_DFLOAT128_PTR): Define to + error_mark_node if corresponding global tree node is NULL. + * tree.c (build_common_tree_nodes): Do not initialize + dfloat32_type_node, dfloat64_type_node or dfloat128_type_node if + decimal floating-point not supported. + +2019-11-25 Joseph Myers <joseph@codesourcery.com> + + * attribs.c (decl_attributes): Do not ignore C++11 attributes on + types. + +2019-11-25 Bernd Schmidt <bernds_cb1@t-online.de> + + * config/m68k/m68k.c (output_move_himode, output_move_qimode): + Replace code for non-CONST_INT constants with gcc_unreachable. + * config/m68k/m68k.md (cbranchdi): Don't generate individual + compare and test. + (CMPMODE): New mode_iterator. + (cbranchsi4, cbranchqi4, cbranchhi4): Replace expanders with + cbranch<mode>4. + (cstoresi4, cstoreqi4, cstorehi4): Replace expanders with + cstore<mode>4. + (cmp<mode>_68881): Remove 'F' constraint from first comparison + operand. + (bit test insns patterns): Use nonimmediate_operand, not + register_operand, for source operands that allow memory in + their constraints. + (divmodsi4, udivmodsi4, divmodhi4 and related unnamed patterns): + Use register_operand, not nonimmediate_operand, for the + destinations. + (DBCC): New mode_iterator. + (dbcc peepholes): Use it to reduce duplication. + (trap): Use const_true_rtx, not const1_rtx. + * config/m68k/predicates.md (m68k_comparison_operand): Renamed + from m68k_subword_comparison_operand and changed to handle + SImode. + + PR target/91851 + * config/m68k/m68k-protos.h (output-dbcc_and_branch): Adjust + declaration. + (m68k_init_cc): New declaration. + (m68k_output_compare_di, m68k_output_compare_si) + (m68k_output_compare_hi, m68k_output_compare_qi) + (m68k_output_compare_fp, m68k_output_btst, m68k_output_bftst) + (m68k_find_flags_value, m68k_output_scc, m68k_output_scc_float) + (m68k_output_branch_integer, m68k_output_branch_integer_rev. + m68k_output_branch_float, m68k_output_branch_float_rev): + Likewise. + (valid_dbcc_comparison_p_2, flags_in_68881) + (output_btst): Remove declaration. + * config/m68k/m68k.c (INCLDUE_STRING): Define. + (TARGET_ASM_FINAL_POSTSCAN_INSN): Define. + (valid_dbcc_comparison_p_2, flags_in_68881): Delete functions. + (flags_compare_op0, flags_compare_op1, flags_operand1, + flags_operand2, flags_valid): New static variables. + (m68k_find_flags_value, m68k_init_cc): New functions. + (handle_flags_for_move, m68k_asm_final_postscan_insn, + remember_compare_flags): New static functions. + (output_dbcc_and_branch): New argument CODE. Use it, and add + PLUS and MINUS to the possible codes. All callers changed. + (m68k_output_btst): Renamed from output_btst. Remove OPERANDS + and INSN arguments, add CODE arg. Return the comparison code + to use. All callers changed. Use CODE instead of + next_insn_tests_no_inequality, and replace cc_status management + with changing the return code. + (m68k_rtx_costs): Instead of testing for COMPARE, test for + RTX_COMPARE or RTX_COMM_COMPARE. + (output_move_simode, output_move_qimode): Call + handle_flags_for_move. + (notice_update_cc): Delete function. + (m68k_output_bftst, m68k_output_compare_di, m68k_output_compare_si, + m68k_output_compare_hi, m68k_output_compare_qi, + m68k_output_compare_fp, m68k_output_branch_integer, + m68k_output_branch_integer_rev, m68k_output_scc, + m68k_output_branch_float, m68k_output_branch_float_rev, + m68k_output_scc_float): New functions. + (output_andsi3, output_iorsi3, output_xorsi3): Call CC_STATUS_INIT + once at the start, and set flags_valid and flags_operand1 if the + flags are usable. + * config/m68k/m68k.h (CC_IN_68881, NOTICE_UPDATE_CC, + CC_OVERFLOW_UNUSABLE, CC_NO_CARRY, OUTPUT_JUMP): Remove + definitions. + (CC_STATUS_INIT): Define. + * config/m68k/m68k.md (flags_valid): New define_attr. + (tstdi, tstsi_internal_68020_cf, tstsi_internal, tsthi_internal, + tstqi_internal, tst<mode>_68881, tst<mode>_cf, cmpdi_internal, + cmpdi, unnamed cmpsi/cmphi/cmpqi patterns, cmpsi_cf, + cmp<mode>_68881, cmp<mode>_cf, unnamed btst patterns, + tst_bftst_reg, tst_bftst_reg, unnamed scc patterns, scc, + sls, sordered_1, sunordered_1, suneq_1, sunge_1, sungt_1, + sunle_1, sunlt_1, sltgt_1, fsogt_1, fsoge_1, fsolt_1, fsole_1, + bge0_di, blt0_di, beq, bne, bgt, bgtu, blt, bltu, bge, bgeu, + ble, bleu, bordered, bunordered, buneq, bunge, bungt, bunle, + bunlt, bltgt, beq_rev, bne_rev, bgt_rev, bgtu_rev, + blt_rev, bltu_rev, bge_rev, bgeu_rev, ble_rev, bleu_rev, + bordered_rev, bunordered_rev, buneq_rev, bunge_rv, bungt_rev, + bunle_rev, bunlt_rev, bltgt_rev, ctrapdi4, ctrapsi4, ctraphi4, + ctrapqi4, conditional_trap): Delete patterns. + (cbranchdi4_insn): New pattern. + (cbranchdi4): Don't generate cc0 patterns. When testing LT or GE, + test high part only. When testing EQ or NE, generate beq0_di + and bne0_di patterns directly. + (cstoredi4): When testing LT or GE, test high part only. + (both sets of cbranch<mode>4, cstore<mode>4): Don't generate cc0 + patterns. + (scc0_constraints, cmp1_constraints, cmp2_constraints, + scc0_cf_constraints, cmp1_cf_constraints, cmp2_cf_constraints, + cmp2_cf_predicate): New define_mode_attrs. + (cbranch<mode>4_insn, cbranch<mode>4_insn_rev, + cbranch<mode>4_insn_cf, cbranch<mode>4_insn_cf_rev, + cstore<mode>4_insn, cstore<mode>4_insn_cf for integer modes) + New patterns. + (cbranch<mode>4_insn_68881, cbranch<mode>4_insn_rev_68881): + (cbranch<mode>4_insn_cf, cbranch<mode>4_insn_rev_cf, + cstore<mode>4_insn_68881, cstore<mode>4_insn_cf for FP): + New patterns. + (cbranchsi4_btst_mem_insn, cbranchsi4_btst_reg_insn, + cbranchsi4_btst_mem_insn_1, cbranchsi4_btst_reg_insn_1): + Likewise. + (BTST): New define_mode_iterator. + (btst_predicate, btst_constraint, btst_range): New + define_mode_attrs. + (cbranch_bftst<mode>_insn, cstore_bftst<mode>_insn): New + patterns. + (movsi_m68k_movsi_m68k2, movsi_cf, unnamed movstrict patterns, + unnamed movhi and movqi patterns, unnamed movsf, movdf and movxf + patterns): Set attr "flags_valid". + (truncsiqi2, trunchiqi2, truncsihi2): Remove manual CC_STATUS + management. Set attr "flags_valid". + (extendsidi2, extendplussidi, unnamed float_extendsfdf pattern, + extendsfdf2_cf, fix_truncdfsi2, fix_truncdfhi2, fix_truncdfqi2, + addi_sexthishl32, adddi_dilshr32, adddi_dilshr32_cf, + addi_dishl32, subdi_sexthishl32, subdi_dishl32, subdi3): Remove + manual CC_STATUS management. + (addsi3_internal, addhi3, addqi3, subsi3, subhi3, subqi3, + unnamed strict_lowpart subhi and subqi patterns): Set attr + "flags_valid". + (unnamed strict_lowpart addhi3 and addqi3 patterns): Likewise. + Remove code to operate on address regs and assert the case + does not occur. + (unnamed mulsidi patterns, divmodhi4, udivmodhi4): Remove + manual CC_STATUS_INIT. + (andsi3_internal, andhi3, andqi3, iorsi3_internal, iorhi3, iorqi3, + xorsi3_internal, xorhi3, xorqi3, negsi2_internal, + negsi2_5200, neghi2, negqi2, one_cmplsi2_internal, one_cmplhi2, + one_cmplqi2, unnamed strict_lowpart patterns + for andhi, andqi, iorhi, iorqi, xorhi, xorqi, neghi, negqi, + one_cmplhi and one_cmplqi): Set attr "flags_valid". + (iorsi_zext_ashl16, iorsi_zext): Remove manual CC_STATUS_INIT. + (ashldi_sexthi, ashlsi_16, ashlsi_17_24): Remove manual + CC_STATUS_INIT. + (ashlsi3, ashlhi3, ashlqi3, ashrsi3, ashrhi3, ashrqi3, lshrsi3, + lshrhi3, shrqi3, rotlsi3, rotlhi3, rotlhi3_lowpart, rotlqi3, + rotlqi3_lowpart, rotrsi3, rotrhi3, rotrhi_lowpart, rotrqi3, + unnamed strict_low_part patterns for HI and + QI versions): Set attr "flags_valid". + (bsetmemqi, bsetmemqi_ext, bsetdreg, bchgdreg, bclrdreg, + bclrmemqi, extzv_8_16_reg, extzv_bfextu_mem, insv_bfchg_mem, + insv_bfclr_mem, insv_bfset_mem, extv_bfextu_reg, + insv_bfclr_reg, insv_bfset_reg, dbne_hi, dbne_si, dbge_hi, + dbge_si, extendsfxf2, extenddfxf2, ): Remove manual cc_status management. + (various unnamed peepholes): Adjust compare/branch sequences + for new cbranch patterns. + (dbcc peepholes): Likewise, and output the comparison here + as well. + * config/m68k/predicates.md (valid_dbcc_comparison_p): Delete. + (fp_src_operand): Allow constant zero. + (address_reg_operand): New predicate. + + * rtl.h (inequality_comparisons_p): Remove declaration. + * recog.h (next_insn_tests_no_inequality): Likewise. + * rtlanal.c (inequality_comparisons_p): Delete function. + * recog.c (next_insn_tests_no_inequality): Likewise. + +2019-11-25 Richard Biener <rguenther@suse.de> + + * tree-vect-slp.c (vect_detect_hybrid_slp_stmts): Add assertion. + (vect_detect_hybrid_slp): Swap lane and instance iteration, + properly re-building the visited hash-map for each lane. + +2019-11-25 Tobias Burnus <tobias@codesourcery.com> + + * config/gcn/gcn.c (gcn_expand_scalar_to_vector_address, + gcn_md_reorg): Remove unused variables. + (gcn_emutls_var_init): Add missing (but unreachable) return + to silence warning. + (gcn_hsa_declare_function_name): Add gcc_unreachable to ensure + target != TARGET_GCN3 or TARGET_GCN3 will fail instead of use + an uninitialized variable. + +2019-11-25 Martin Jambor <mjambor@suse.cz> + + PR ipa/92109 + * cgraph.h (cgraph_node::remove_from_clone_tree): Declare. + * cgraphclones.c (cgraph_node::remove_from_clone_tree): New method. + (cgraph_materialize_clone): Move removel from clone tree to the + the new method and use it instead. + * ipa.c (symbol_table::remove_unreachable_nodes): When removing + bodies of clones, also remove it from the clone tree. + +2019-11-25 Martin Jambor <mjambor@suse.cz> + + PR ipa/91956 + * ipa-sra.c (process_isra_node_results): Put the new node to the + same comdat group as the original node. + +2019-11-25 Georg-Johann Lay <avr@gjlay.de> + + Build double32 / long-double32 multilibs if needed. + + PR target/92055 + * config/avr/t-avr: + (HAVE_DOUBLE_MULTILIB, HAVE_LONG_DOUBLE_MULTILIB): Remove vars. + (HAVE_DOUBLE32, HAVE_LONG_DOUBLE32, WITH_LONG_DOUBLE) + (HAVE_DOUBLE64, HAVE_LONG_DOUBLE64, WITH_DOUBLE): Set from + tm_defines and pass to genmultilib.awk. + * config/avr/genmultilib.awk: Use these variables to add double32 + and / or long-double32 multilib(s) as needed. + * config/avr/driver-avr.c (avr_double_lib): Adjust comment. + +2019-11-25 Richard Biener <rguenther@suse.de> + + * cfgloop.h (get_loop_exit_edges): Add extra parameter denoting + loop body, defaulted to NULL. + (single_likely_exit): Add exit vector argument + * tree-ssa-loop-niter.h (loop_only_exit_p): Add loop body argument. + (number_of_iterations_exit): Likewise. + (number_of_iterations_exit_assumptions): Likewise. + * cfgloop.c (get_loop_exit_edges): Use passed in loop body + if not NULL. + * cfgloopanal.c (single_likely_exit): Use passed in exit vector. + * tree-ssa-loop-ivcanon.c (canonicalize_loop_induction_variables): + Compute exit vector around call to single_likely_exit. + * tree-ssa-loop-ivopts.c (tree_ssa_iv_optimize_loop): Pass down + loop body to loop_only_exit_p. + * tree-ssa-loop-niter.c (loop_only_exit_p): Get loop body from + caller. + (number_of_iterations_exit_assumptions): Get loop body from caller + if not NULL. + (number_of_iterations_exit): Pass through new loop body arg. + (infer_loop_bounds_from_undefined): Get loop body from caller. + (estimate_numbers_of_iterations): Compute loop body once. + +2019-11-25 Richard Biener <rguenther@suse.de> + + * cfganal.c (pre_and_rev_post_order_compute_fn): Use an + auto_bb_flag instead of an sbitmap for visited handling. + +2019-11-25 Kewen Lin <linkw@gcc.gnu.org> + + * config/rs6000/vector.md (vector_fp_comparison_simple): New code + iterator. + (vector_fp_comparison_complex): Likewise. + (vector_<code><mode> for VEC_F and vector_fp_comparison_simple): New + define_and_split. + (vector_<code><mode> for VEC_F and vector_fp_comparison_complex): + Likewise. + (vector_lt<mode> for VEC_F): Refactor with + vector_fp_comparison_simple. + (vector_le<mode> for VEC_F): Likewise. + (vector_unge<mode> for VEC_F): Likewise. + (vector_unle<mode> for VEC_F): Likewise. + (vector_ne<mode> for VEC_F): Likewise. + (vector_ungt<mode> for VEC_F): Likewise. + (vector_unlt<mode> for VEC_F): Likewise. + (vector_ltgt<mode> for VEC_F): Refactor with + vector_fp_comparison_complex. + (vector_ordered<mode> for VEC_F): Likewise. + (vector_uneq<mode> for VEC_F): Likewise. + (vector_unordered<mode> for VEC_F): Likewise. + +2019-11-24 Bernd Schmidt <bernds_cb1@t-online.de> + + * config/i386/i386.c (ix86_rtx_costs): Handle care of a PLUS in a + COMPARE, representing an overflow detection. + + * combine.c (combine_instructions): Record costs for jumps. + + * combine.c (can_combine_p): Allow autoinc in jumps. + +2019-11-23 Jan Hubicka <hubicka@ucw.cz> + + * cif-code.def (MAX_INLINE_INSNS_SINGLE_O2_LIMIT): Remove. + * doc/invoke.texi (max-inline-insns-single-O2, + inline-heuristics-hint-percent-O2, inline-min-speedup-O2, + early-inlining-insns-O2): Remove documentation. + * ipa-fnsummary.c (analyze_function_body, + compute_fn_summary): Use opt_for_fn when accessing parameters. + * ipa-inline.c (caller_growth_limits, can_inline_edge_p, + inline_insns_auto, can_inline_edge_by_limits_p, + want_early_inline_function_p, big_speedup_p, + want_inline_small_function_p, want_inline_self_recursive_call_p, + recursive_inlining, compute_max_insns, inline_small_functions): + Likewise. + * opts.c (default_options): Add -O3 defaults for + OPT__param_early_inlining_insns_, + OPT__param_inline_heuristics_hint_percent_, + OPT__param_inline_min_speedup_, OPT__param_max_inline_insns_single_. + * params.opt (-param=early-inlining-insns-O2=, + -param=inline-heuristics-hint-percent-O2=, + -param=inline-min-speedup-O2=, -param=max-inline-insns-single-O2= + -param=early-inlining-insns=, -param=inline-heuristics-hint-percent=, + -param=inline-min-speedup=, -param=inline-unit-growth=, + -param=large-function-growth=, -param=large-stack-frame=, + -param=large-stack-frame-growth=, -param=large-unit-insns=, + -param=max-inline-insns-recursive=, + -param=max-inline-insns-recursive-auto=, + -param=max-inline-insns-single=, + -param=max-inline-insns-size=, -param=max-inline-insns-small=, + -param=max-inline-recursive-depth=, + -param=max-inline-recursive-depth-auto=, + -param=min-inline-recursive-probability=, + -param=partial-inlining-entry-probability=, + -param=uninlined-function-insns=, -param=uninlined-function-time=, + -param=uninlined-thunk-insns=, -param=uninlined-thunk-time=): Add + Optimization. + +2019-11-23 Jakub Jelinek <jakub@redhat.com> + + * ipa-fnsummary.c: Fix comment typos. + * ipa-ref.h: Likewise. + * ipa-predicate.h: Likewise. + * ipa-split.c: Likewise. + * ipa-inline-analysis.c: Likewise. + * ipa-predicate.c: Likewise. + * ipa-devirt.c: Likewise. + * ipa-icf.h: Likewise. + * profile-count.c: Likewise. + * ipa-icf.c: Likewise. + (sem_function::equals_wpa): Fix typos in dump messages. + * ipa-icf-gimple.h: Fix comment typos. + * ipa-inline-transform.c: Likewise. + * ipa-polymorphic-call.c: Likewise. + * ipa-fnsummary.h: Likewise. + * ipa-inline.c: Likewise. + (dump_inline_stats): Fix typo in debug dump message. + * profile-count.h: Fix comment typos. + + PR target/92615 + * config/i386/i386.c (ix86_md_asm_adjust): If dest_mode is + GET_MODE (dest), is not QImode, using ZERO_EXTEND and dest is not + register_operand, force x into register before storing it into dest. + Formatting fix. + + PR middle-end/83859 + * doc/extend.texi (attribute access): Fix a typo. + + PR rtl-optimization/92610 + * cse.c (rest_of_handle_cse2): Call cleanup_cfg (0) also if + cse_cfg_altered is set, even when tem is 0. + (rest_of_handle_cse_after_global_opts): Likewise. + +2019-11-22 Jakub Jelinek <jakub@redhat.com> + + PR c++/92458 + * tree-hash-traits.h (tree_decl_hash, tree_ssa_name_hash, + tree_hash): Move to ... + * tree.h (tree_decl_hash, tree_ssa_name_hash, tree_hash): ... here. + (struct decl_tree_cache_traits, struct type_tree_cache_traits): New + types. + (decl_tree_cache_map, tree_tree_cache_map): New typedefs. + + PR tree-optimization/92618 + * tree-ssa-reassoc.c (v_info): Change from auto_vec to a struct + containing the auto_vec and a tree. + (undistribute_bitref_for_vector): Handle the case when element type + of vec is not the same as type of the BIT_FIELD_REF. Formatting + fixes. + +2019-11-22 Martin Sebor <msebor@redhat.com> + + PR middle-end/83859 + * attribs.h (struct attr_access): New. + * attribs.c (decl_attributes): Add an informational note. + * builtins.c (check_access): Make extern. Consistently set no-warning + after issuing a warning. Handle calls through function pointers. Set + no-warning. + * builtins.h (check_access): Declare. + * calls.c (rdwr_access_hash): New type. + (rdwr_map): Same. + (init_attr_rdwr_indices): New function. + (maybe_warn_rdwr_sizes): Same. + (initialize_argument_information): Call init_attr_rdwr_indices. + Call maybe_warn_rdwr_sizes. + (get_size_range): Avoid null argument. + * doc/extend.texi (attribute access): Document new attribute. + +2019-11-22 Andrew Stubbs <ams@codesourcery.com> + + * config/gcn/gcn.c (OMP_LDS_SIZE): Define. + (ACC_LDS_SIZE): Define. + (OTHER_LDS_SIZE): Define. + (LDS_SIZE): Redefine using above. + (gcn_expand_prologue): Initialize m0 with LDS_SIZE-1. + +2019-11-22 Martin Sebor <msebor@redhat.com> + + PR middle-end/88226 + * builtins.c (check_nul_terminated_array): New function. + (fold_builtin_0): Remove declaration. + (fold_builtin_1): Same. + (fold_builtin_2): Same. + (fold_builtin_3): Same. + (fold_builtin_strpbrk): Add argument. + (fold_builtin_strspn): Same. + (fold_builtin_strcspn): Same. + (expand_builtin_strcat): Call it. Remove unused argument. + (expand_builtin_stpncpy): Same. + (expand_builtin_strncat): Same. + (expand_builtin_strncpy): Same. Adjust indentation. + (expand_builtin_strcmp): Same. + (expand_builtin_strncmp): Same. + (expand_builtin_fork_or_exec): Same. + (expand_builtin): Handle more built-ins. + (fold_builtin_2): Add argument. + (fold_builtin_n): Make static. Add argument. + (fold_call_expr): Pass new argument to fold_builtin_n and fold_builtin_2. + (fold_builtin_call_array): Pass new argument to fold_builtin_n. + (fold_builtin_strpbrk): Add argument. Call check_nul_terminated_array. + (fold_call_stmt): Pass new argument to fold_builtin_n. + * builtins.h: Correct a comment. + * gimple-fold.c (gimple_fold_builtin_strchr): Call + check_nul_terminated_array. + * tree-ssa-strlen.c (handle_builtin_strlen): Call + check_nul_terminated_array. + (handle_builtin_strchr): Same. + (handle_builtin_string_cmp): Same. + +2019-11-22 Martin Sebor <msebor@redhat.com> + + PR tree-optimization/92501 + * gimple-fold.c ((gimple_fold_builtin_string_compare): Let strncmp + handle unterminated arrays. Rename local variables for clarity. + +2019-11-22 Andrew Stubbs <ams@codesourcery.com> + + * config/gcn/gcn.c (gcn_hsa_declare_function_name): Calculate + granulated_sgprs according to architecture. + +2019-11-22 Jan Hubicka <jh@suse.cz> + + * ggc-page.c (ggc_collect): Call memory_block_pool::trim. + * memory-block.cc (memory_block_pool::clear_free_list): Rename to ... + (memory_block_pool::reduce_free_list): ... this one. + (memory_block_pool::trim): New static function. + * memory-block.h (memory_block_pool::freelist_size): New constant + (memory_block_pool::clear_free_list): Rename to ... + (memory_block_pool::reduce_free_list): ... this one. + (memory_block_pool::trim): Declare. + +2019-11-22 Richard Sandiford <richard.sandiford@arm.com> + + * tree-vect-stmts.c (vect_model_simple_cost): Take an optional + vect_cost_for_stmt. + (vectorizable_condition): Calculate the cost of EXTRACT_LAST_REDUCTION + here rather than... + * tree-vect-loop.c (vect_model_reduction_cost): ...here. + +2019-11-22 Claudiu Zissulescu <claziss@synopsys.com> + + * config/arc/arc.md (bic_f): Use cc_set_register predicate. + (bic_cmp0_noout): New pattern. + (bic_cmp0): Likewise. + (neg_scc_insn): Remove pattern. + (not_scc_insn): Likewise. + +2019-11-21 Harald van Dijk <harald@gigawatt.nl> + + * doc/invoke.texi (-fcommon): Remove claim about ISO C. + +2019-11-21 Joseph Myers <joseph@codesourcery.com> + + * gimplify.c (expand_FALLTHROUGH_r, expand_FALLTHROUGH): Use + pedwarn instead of warning_at for fallthrough not preceding a case + or default label. + +2019-11-22 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org> + + PR tree-optimization/92608 + * tree-ssa-loop-unswitch.c (find_loop_guard): Use safe_dyn_cast instead + of dyn_cast. + +2019-11-21 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/predicates.md (extra_insn_branch_comparison_operator): + New predicate. + * config/rs6000/rs6000-protos.h (rs6000_emit_fp_cror): New declaration. + * config/rs6000/rs6000.c (rs6000_generate_compare): Don't do anything + special for FP comparisons that need a cror instruction eventually. + (rs6000_emit_fp_cror): New function. + (rs6000_emit_sCOND): Expand all floating point comparisons to one + instruction, for normal FP modes, with HONOR_NANS. + (rs6000_emit_cbranch): Reformat. + * config/rs6000/rs6000.md (fp_rev): New iterator. + (fp_two): New iterator. + *<code><mode>_cc for fp_rev and GPR: New define_insn_and_split. + *<code><mode>_cc for fp_two and GPR: New define_insn_and_split. + *cbranch_2insn: New define_insn_and_split. + +2019-11-21 Richard Sandiford <richard.sandiford@arm.com> + + PR tree-optimization/92526 + * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Reject + versioning for alignment if the accesses do not have a consistent + mask, rather than asserting that the masks are consistent. + +2019-11-21 Richard Sandiford <richard.sandiford@arm.com> + + PR tree-optimization/92595 + * tree-vect-stmts.c (get_group_load_store_type): Add a VECTOR_MODE_P + check. + (vectorizable_store, vectorizable_load): Likewise. + +2019-11-21 Jan Hubicka <jh@suse.cz> + + * ipa-inline.c (update_callee_keys): Add parameter UPDATE_SINCE. + (resolve_noninline_speculation, inline_small_functions): Avoid + redundant updates. + +2019-11-21 Richard Biener <rguenther@suse.de> + + * lra.c (lra_insn_recog_data_pool): New. + (free_insn_recog_data): Adjust. + (finish_insn_recog_data): Release lra_insn_recog_data_pool. + (lra_set_insn_recog_data): Allocate from lra_insn_recog_data_pool. + +2019-11-21 Richard Biener <rguenther@suse.de> + + PR tree-optimization/92596 + * tree-vect-slp.c (vect_build_slp_tree): Fix pasto. + +2019-11-21 Jan Hubicka <jh@suse.cz> + + * ipa-fnsummary.c (evaluate_conditions_for_known_args): Be + ready for some vectors to not be allocated. + (evaluate_properties_for_edge): Document better; make + known_vals and known_aggs caller allocated; avoid determining + values of parameters which are not used. + (ipa_merge_fn_summary_after_inlining): Pre allocate known_vals and + known_aggs. + * ipa-inline-analysis.c (do_estimate_edge_time): Likewise. + (do_estimate_edge_size): Likewise. + (do_estimate_edge_hints): Likewise. + * ipa-cp.c (ipa_get_indirect_edge_target_1): Do not early exit when + values are not known. + (ipa_release_agg_values): Add option to not release vector itself. + * ipa-prop.h (ipa_release_agg_values): Add parameter RELEASE_VECTOR. + +2019-11-21 Richard Biener <rguenther@suse.de> + + * cfgloop.h (loop_iterator::~loop_iterator): Remove. + (loop_iterator::to_visit): Use an auto_vec with internal storage. + (loop_iterator::loop_iterator): Adjust. + * cfganal.c (compute_dominance_frontiers_1): Fold into... + (compute_dominance_frontiers): ... this. Hoist invariant + get_immediate_dominator call. + (compute_idf): Use a work-set instead of a work-list for more + optimal iteration order and duplicate avoidance. + * tree-into-ssa.c (mark_phi_for_rewrite): Avoid re-allocating + the vector all the time, instead pre-allocate the vector only + once. + (delete_update_ssa): Simplify. + * vec.h (va_heap::release): Disable -Wfree-nonheap-object around it. + +2019-11-21 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/91355 + * tree-ssa-sink.c (select_best_block): Use >= rather than > + for early_bb scaled count with best_bb count comparison. + + * ipa-fnsummary.h (enum ipa_hints_vals): Fix comment typo, + preffer -> prefer. + * ipa-inline.c (edge_badness): Likewise. + * lto-streamer.h (class lto_location_cache): Likewise. + * tree-ssa-sink.c (select_best_block): Likewise. Fix comment typos, + gratutious -> gratuitous. + +2019-11-21 Richard Biener <rguenther@suse.de> + + Revert + 2019-09-17 Richard Biener <rguenther@suse.de> + + PR tree-optimization/91790 + * tree-vect-stmts.c (vectorizable_load): For BB vectorization + use the correct DR for setting up realignment. + +2019-11-21 Richard Biener <rguenther@suse.de> + + * tree-ssa-structalias.c (equiv_class_hasher): Change to nofree. + (equiv_class_obstack): New. + (equiv_class_lookup_or_add): Allocate from equiv_class_obstack. + (perform_var_substitution): Initialize equiv_class_obstack. + (free_var_substitution_info): Free equiv_class_obstack. + +2019-11-20 Jan Hubicka <jh@suse.cz> + + * ipa-inline.c (want_early_inline_function_p): Do not estimate + edge growth when callee function is very large. + * ipa-inline.h (estimate_min_edge_growth): New. + +2019-11-20 Jan Hubicka <jh@suse.cz> + + * ipa-fnsummary.c (ipa_fn_summary::account_size_time): Allow + negative time in calls summary; correct roundoff errors + leading to negative times. + (ipa_merge_fn_summary_after_inlining): Update calls size time table + if present. + (ipa_update_overall_fn_summary): Add RESET parameter. + * ipa-fnsummary.h (ipa_update_overall_fn_summary): Update prototype. + * ipa-inline-transform.c (inline_call): Enable incremental updates. + +2019-11-20 Richard Sandiford <richard.sandiford@arm.com> + + * tree-vect-slp.c (vect_schedule_slp_instance): Restore stmt + def types for two-operation SLP. + +2019-11-20 Richard Sandiford <richard.sandiford@arm.com> + + PR testsuite/92366 + * doc/sourcebuild.texi (vect_char_add): Document. + +2019-11-20 Alexandre Oliva <oliva@adacore.com> + + * function.h (CALLEE_FROM_CGRAPH_P): Remove. + * function.c (record_final_call): Record even calls that might + have been in the cgraph. + * toplev.c (dump_final_node_vcg): Skip iteration over cgraph + callees. + +2019-11-20 Janne Blomqvist <jb@gcc.gnu.org> + + * configure.ac: Use https for gcc.gnu.org + * configure: Regenerated. + * doc/install.texi: Use https for gcc.gnu.org. + * doc/sourcebuild.texi: Likewise. + +2019-11-20 Julian Brown <julian@codesourcery.com> + + * config/gcn/gcn.c (gcn_asm_output_symbol_ref): Handle null cfun. + +2019-11-20 Jan Hubicka <jh@suse.cz> + + * ipa-fnsummary.c (ipa_fn_summary::account_size_time): Add CALL + parameter and update call_size_time_table. + (ipa_fn_summary::max_size_time_table_size): New constant. + (estimate_calls_size_and_time_1): Break out from ... + (estimate_calls_size_and_time): ... here; implement summary production. + (summarize_calls_size_and_time): New function. + (ipa_call_context::estimate_size_and_time): Bypass + estimate_calls_size_and_time for leaf functions. + (ipa_update_overall_fn_summary): Likewise. + * ipa-fnsummary.h (call_size_time_table): New. + (ipa_fn_summary::account_size_time): Update prototype. + +2019-11-20 Joseph Myers <joseph@codesourcery.com> + + * doc/invoke.texi (-Wc11-c2x-compat): Document. + +2019-11-20 Wilco Dijkstra <wdijkstr@arm.com> + + PR85678 + * common.opt (fcommon): Change init to 1. + * doc/invoke.texi (-fcommon): Update documentation. + +2019-11-20 Jan Hubicka <jh@suse.cz> + + * fibonacci_heap.h (fibonacci_heap<K,V>::consolidate): Turn auto_vec + to ordinary array. + +2019-11-20 Jan Hubicka <jh@suse.cz> + + * fibonacci_heap.h (fibonacci_heap<K,V>::fibonacci_heap): + Add allocator parameter. + (fibonacci_heap<K,V>::~fibonacci_heap): Optimize destruction. + (fibonacci_heap<K,V>::m_allocator): New. + (fibonacci_heap<K,V>::m_own_allocator): New. + (fibonacci_heap<K,V>::insert): Use allocator. + (fibonacci_heap<K,V>::extract_min): Likewise. + (fibonacci_heap<K,V>::union_with): Assert that both heaps share + allocator. + (fibonacci_heap<K,V>::consolidate): Allocate constant sized vector + on stack. + * fibonacci_heap.c: Include alloc-pool + (test_empty_heap): Initialize allocator. + (test_union): Likewise. + * bb-reorder.c: Include alloc-pool.h. + * tracer.c: Inlclude alloc-pool.h. + +2019-11-20 Jan Hubicka <jh@suse.cz> + + * lto-streamer-out.c (DFS::sccstack): Turn into auto-vec. + Preallocate for 32 entries. + (DFS::worklist): Likewise. + (DFS::DFS): Do not initialize sccstack and worklist. + (DFS::~DFS): Do not release sccstack. + +2019-11-20 Segher Boessenkool <segher@kernel.crashing.org> + + PR target/92573 + * config/rs6000/dfp.md (dfptstsfi_<code>_<mode> for DFP_TEST and DDTD): + Handle UNORDERED if !HONOR_NANS. + +2019-11-20 Jan Hubicka <jh@suse.cz> + + * ipa-inline.c (wrapper_heuristics_may_apply): Break out from ... + (edge_badness): ... here. + (inline_small_functions): Use monotonicity of badness calculation + to avoid redundant updates. + +2019-11-20 Richard Biener <rguenther@suse.de> + + * tree-vect-slp.c (vect_analyze_slp_instance): Dump + constructors we are actually analyzing. + (vect_slp_check_for_constructors): Do not vectorize uniform + constuctors, do not dump here. + +2019-11-20 Richard Biener <rguenther@suse.de> + + PR tree-optimization/92537 + * tree-vect-slp.c (vect_analyze_slp_instance): Move CTOR + vectorization validity check... + (vect_slp_analyze_operations): ... here. + +2019-11-20 Claudiu Zissulescu <claziss@synopsys.com> + + * config/arc/arc-protos.h (make_pass_arc_ifcvt): Declare. + (make_pass_arc_predicate_delay_insns): Likewise. + * config/arc/arc.c (class pass_arc_ifcvt): Reformat text, add gate + method, remove clone. + (class pass_arc_predicate_delay_insns): Likewise. + (arc_init): Remove registering of ARC specific passes. + * config/arc/t-arc (PASSES_EXTRA): Add arc-passes.def. + * config/arc/arc-passes.def: New file. + +2019-11-20 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/90840 + * expmed.c (store_bit_field_1): Handle the case where op0 is not a MEM + and has a mode that doesn't have corresponding integral type. + + PR target/90867 + * config/i386/i386-options.c (ix86_valid_target_attribute_tree): Don't + clear opts->x_ix86_isa_flags{,2} here... + (ix86_valid_target_attribute_inner_p): ... but here when seeing + arch=. Also clear opts->x_ix86_isa_flags{,2}_explicit. + + PR c/90898 + * tree-ssa-ccp.c (insert_clobber_before_stack_restore): Remove + assertion. + (insert_clobbers_for_var): Fix a typo in function comment. + +2019-11-20 Jiangning Liu <jiangning.liu@amperecomputing.com> + Jakub Jelinek <jakub@redhat.com> + + PR middle-end/91195 + * tree-ssa-phiopt.c (cond_store_replacement): Move lhs unsharing + earlier. Set TREE_NO_WARNING on the rhs1 of the artificially added + load. + +2019-11-20 Georg-Johann Lay <avr@gjlay.de> + + Make 0-series device specs work with older versions of avr-gcc. + + PR target/92545 + * config/avr/specs.h (LINK_SPEC) <%(link_pm_base_address)>: Remove. + * config/avr/gen-avr-mmcu-specs.c (print_mcu) + <*link_pm_base_address>: Don't write spec. + <*link_arch>: Add --defsym=__RODATA_PM_OFFSET__= as needed. + +2019-11-20 Richard Biener <rguenther@suse.de> + + PR c/92088 + * builtins.c (compute_objsize): Deal with VLAs. + +2019-11-19 Pat Haugen <pthaugen@us.ibm.com> + + * config/rs6000/rs6000.c (move_to_end_of_ready): New, factored out + from common code. + (power6_sched_reorder2): Factored out from rs6000_sched_reorder2, + call new function. + (power9_sched_reorder2): Call new function. + (rs6000_sched_reorder2): Likewise. + +2019-11-18 Jan Hubicka <jh@suse.cz> + + * ipa-fnsummary.c (estimate_edge_size_and_time): Drop parameter PROB. + (estimate_calls_size_and_time): Update. + +2019-11-18 Jan Hubicka <jh@suse.cz> + + * ipa-inline.c (inlining_speedup): New function. + (edge_badness): Use it. + +2019-11-19 Zoran Jovanovic <zoran.jovanovic@mips.com> + Dragan Mladjenovic <dmladjenovic@wavecomp.com> + + * config/mips/mips-msa.md (msa_<msabr>_<msafmt_f>, msa_<msabr>_v_<msafmt_f>): + Mark as not having "likely" version. + * config/mips/mips.md (insn_count): The simd_div instruction with + TARGET_CHECK_ZERO_DIV consists of 3 instructions. + (can_delay): Exclude simd_branch. + (defile_delay *): Add simd_branch instructions. + They have one regular delay slot. + +2019-11-19 Richard Sandiford <richard.sandiford@arm.com> + + Revert: + 2019-11-18 Richard Sandiford <richard.sandiford@arm.com> + + * cse.c (cse_insn): Delete no-op register moves too. + * simplify-rtx.c (comparison_to_mask): Handle unsigned comparisons. + Take a second comparison to control the value for NE. + (mask_to_comparison): Handle unsigned comparisons. + (simplify_logical_relational_operation): Likewise. Update call + to comparison_to_mask. Handle AND if !HONOR_NANs. + (simplify_binary_operation_1): Call the above for AND too. + +2019-11-19 Martin Liska <mliska@suse.cz> + + * toplev.c (general_init): Move the call... + (toplev::main): ... here as we need init_options_struct + being called. + +2019-11-19 Wilco Dijkstra <wdijkstr@arm.com> + + PR target/79262 + * config/aarch64/aarch64.c (generic_vector_cost): Adjust + vec_to_scalar_cost. + +2019-11-19 Wilco Dijkstra <wdijkstr@arm.com> + + * config/arm/arm-cpus.in (armv7): Set tune to Cortex-A53. + (armv7-a): Likewise. + (armv7ve): Likewise. + +2019-11-19 Richard Biener <rguenther@suse.de> + + PR tree-optimization/92581 + * tree-vect-loop.c (vect_create_epilog_for_reduction): For + condition reduction chains gather all conditions involved + for computing the index reduction vector. + +2019-11-19 Dennis Zhang <dennis.zhang@arm.com> + + * config/aarch64/aarch64-builtins.c (enum aarch64_builtins): Add + AARCH64_MEMTAG_BUILTIN_START, AARCH64_MEMTAG_BUILTIN_IRG, + AARCH64_MEMTAG_BUILTIN_GMI, AARCH64_MEMTAG_BUILTIN_SUBP, + AARCH64_MEMTAG_BUILTIN_INC_TAG, AARCH64_MEMTAG_BUILTIN_SET_TAG, + AARCH64_MEMTAG_BUILTIN_GET_TAG, and AARCH64_MEMTAG_BUILTIN_END. + (aarch64_init_memtag_builtins): New. + (AARCH64_INIT_MEMTAG_BUILTINS_DECL): New macro. + (aarch64_general_init_builtins): Call aarch64_init_memtag_builtins. + (aarch64_expand_builtin_memtag): New. + (aarch64_general_expand_builtin): Call aarch64_expand_builtin_memtag. + (AARCH64_BUILTIN_SUBCODE): New macro. + (aarch64_resolve_overloaded_memtag): New. + (aarch64_resolve_overloaded_builtin_general): New. Call + aarch64_resolve_overloaded_memtag to handle overloaded MTE builtins. + * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define + __ARM_FEATURE_MEMORY_TAGGING when enabled. + (aarch64_resolve_overloaded_builtin): Call + aarch64_resolve_overloaded_builtin_general. + * config/aarch64/aarch64-protos.h + (aarch64_resolve_overloaded_builtin_general): New declaration. + * config/aarch64/aarch64.h (AARCH64_ISA_MEMTAG): New macro. + (TARGET_MEMTAG): Likewise. + * config/aarch64/aarch64.md (UNSPEC_GEN_TAG): New unspec. + (UNSPEC_GEN_TAG_RND, and UNSPEC_TAG_SPACE): Likewise. + (irg, gmi, subp, addg, ldg, stg): New instructions. + * config/aarch64/arm_acle.h (__arm_mte_create_random_tag): New macro. + (__arm_mte_exclude_tag, __arm_mte_ptrdiff): Likewise. + (__arm_mte_increment_tag, __arm_mte_set_tag): Likewise. + (__arm_mte_get_tag): Likewise. + * config/aarch64/predicates.md (aarch64_memtag_tag_offset): New. + (aarch64_granule16_uimm6, aarch64_granule16_simm9): New. + * config/arm/types.md (memtag): New. + * doc/invoke.texi (-memtag): Update description. + +2019-11-19 Richard Henderson <richard.henderson@linaro.org> + + * config/arm/arm-c.c (arm_cpu_builtins): Use def_or_undef_macro + to define __GCC_ASM_FLAG_OUTPUTS__. + * config/arm/arm.c (thumb1_md_asm_adjust): New function. + (arm_option_params_internal): Swap out targetm.md_asm_adjust + depending on TARGET_THUMB1. + * doc/extend.texi (FlagOutputOperands): Document thumb1 restriction. + +2019-11-19 Jakub Jelinek <jakub@redhat.com> + + PR target/92549 + * config/i386/i386.md (peephole2 for *swap<mode>): New peephole2. + + PR middle-end/91450 + * internal-fn.c (expand_mul_overflow): For s1 * s2 -> ur, if one + operand is negative and one non-negative, compare the non-negative + one against 0 rather than comparing s1 & s2 against 0. Otherwise, + don't compare (s1 & s2) == 0, but compare separately both s1 == 0 + and s2 == 0, unless one of them is known to be negative. Remove + tem2 variable, use tem where tem2 has been used before. + +2019-11-19 Eric Botcazou <ebotcazou@adacore.com> + + * doc/invoke.texi (-gno-internal-reset-location-views): Fix typo. + +2019-11-19 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/92557 + * omp-low.c (omp_clause_aligned_alignment): Punt if TYPE_MODE is not + vmode rather than asserting it always is. + +2019-11-19 Richard Biener <rguenther@suse.de> + + PR tree-optimization/92554 + * tree-vect-loop.c (vect_create_epilog_for_reduction): Look + for the actual condition stmt and deal with sign-changes. + +2019-11-19 Richard Biener <rguenther@suse.de> + + PR tree-optimization/92555 + * tree-vect-loop.c (vect_update_vf_for_slp): Also scan PHIs + for non-SLP stmts. + +2019-11-19 Martin Liska <mliska@suse.cz> + + PR bootstrap/92540 + * config/riscv/riscv.c (riscv_address_insns): Initialize + addr in order to remove boostrap -Wmaybe-uninitialized + error. + +2019-11-18 Martin Sebor <msebor@redhat.com> + + PR tree-optimization/92493 + * gimple-ssa-sprintf.c (get_origin_and_offset): Remove spurious + assignment. + +2019-11-18 Giuliano Belinassi <giuliano.belinassi@usp.br> + + * cfgloop.c (get_loop_body_in_custom_order): New. + * cfgloop.h (get_loop_body_in_custom_order): New prototype. + * tree-loop-distribution.c (class loop_distribution): New. + (bb_top_order_cmp): Remove. + (bb_top_order_cmp_r): New. + (create_rdg_vertices): Move into class loop_distribution. + (stmts_from_loop): Same as above. + (update_for_merge): Same as above. + (partition_merge_into): Same as above. + (get_data_dependence): Same as above. + (data_dep_in_cycle_p): Same as above. + (update_type_for_merge): Same as above. + (build_rdg_partition_for-vertex): Same as above. + (classify_builtin_ldst): Same as above. + (classify_partition): Same as above. + (share_memory_accesses): Same as above. + (rdg_build_partitions): Same as above. + (pg_add_dependence_edges): Same as above. + (build_partition_graph): Same as above. + (merge_dep_scc_partitions): Same as above. + (break_alias_scc_partitions): Same as above. + (finalize_partitions): Same as above. + (distribute_loop): Same as above. + (bb_top_order_init): New method + (bb_top_order_destroy): New method. + (get_bb_top_order_index_size): New method. + (get_bb_top_order_index_index): New method. + (get_bb_top_order_index_index): New method. + (loop_distribution::execute): New method. + (pass_loop_distribution::execute): Instantiate loop_distribution. + +2019-11-18 Jan Hubicka <jh@suse.cz> + + PR ipa/92508 + * ipa-inline.c (inline_small_functions): Add new edges after reseting + caches. + * ipa-inline-analysis.c (do_estimate_edge_time): Fix sanity check. + +2019-11-18 Richard Sandiford <richard.sandiford@arm.com> + + * doc/sourcebuild.texi (vect_check_ptrs): Document. + * optabs.def (check_raw_ptrs_optab, check_war_ptrs_optab): New optabs. + * doc/md.texi: Document them. + * internal-fn.def (IFN_CHECK_RAW_PTRS, IFN_CHECK_WAR_PTRS): New + internal functions. + * internal-fn.h (internal_check_ptrs_fn_supported_p): Declare. + * internal-fn.c (check_ptrs_direct): New macro. + (expand_check_ptrs_optab_fn): Likewise. + (direct_check_ptrs_optab_supported_p): Likewise. + (internal_check_ptrs_fn_supported_p): New fuction. + * tree-data-ref.c: Include internal-fn.h. + (create_ifn_alias_checks): New function. + (create_intersect_range_checks): Use it. + * config/aarch64/iterators.md (SVE2_WHILE_PTR): New int iterator. + (optab, cmp_op): Handle it. + (raw_war, unspec): New int attributes. + * config/aarch64/aarch64.md (UNSPEC_WHILERW, UNSPEC_WHILE_WR): New + constants. + * config/aarch64/predicates.md (aarch64_bytes_per_sve_vector_operand): + New predicate. + * config/aarch64/aarch64-sve2.md (check_<raw_war>_ptrs<mode>): New + expander. + (@aarch64_sve2_while<cmp_op><GPI:mode><PRED_ALL:mode>_ptest): New + pattern. + +2019-11-18 Richard Sandiford <richard.sandiford@arm.com> + + * tree.c (build_vector_from_ctor): Directly return a zero vector for + empty constructors. + +2019-11-18 Richard Sandiford <richard.sandiford@arm.com> + + * cse.c (cse_insn): Delete no-op register moves too. + * simplify-rtx.c (comparison_to_mask): Handle unsigned comparisons. + Take a second comparison to control the value for NE. + (mask_to_comparison): Handle unsigned comparisons. + (simplify_logical_relational_operation): Likewise. Update call + to comparison_to_mask. Handle AND if !HONOR_NANs. + (simplify_binary_operation_1): Call the above for AND too. + +2019-11-18 Richard Sandiford <richard.sandiford@arm.com> + + * fold-const.c (native_encode_vector): Turn into a wrapper function, + splitting the main code out into... + (native_encode_vector_part): ...this new function. + (native_decode_vector_tree): New function. + (fold_view_convert_vector_encoding): Likewise. + (fold_view_convert_expr): Use it for converting VECTOR_CSTs + to VECTOR_TYPEs. + +2019-11-18 Richard Sandiford <richard.sandiford@arm.com> + + * tree-data-ref.c (create_intersect_range_checks_index): If the + alias pair describes simple WAW and WAR dependencies, just check + whether the first B access overlaps later A accesses. + (create_waw_or_war_checks): New function that performs the same + optimization on addresses. + (create_intersect_range_checks): Call it. + +2019-11-18 Richard Sandiford <richard.sandiford@arm.com> + + * lra-constraints.c (valid_address_p): Take the operand and a + constraint as argument. If the operand is a MEM and the constraint + is a memory constraint, check whether the eliminated form of the + MEM already satisfies the constraint. + (process_address_1): Update calls accordingly. + +2019-11-18 Tom Tromey <tromey@adacore.com> + + * doc/tm.texi: Rebuild. + * doc/tm.texi.in (Misc): Don't document MODIFY_JNI_METHOD_CALL. + * config/i386/cygming.h (MODIFY_JNI_METHOD_CALL): Don't define. + +2019-11-18 Richard Biener <rguenther@suse.de> + + PR tree-optimization/92516 + * tree-vect-slp.c (vect_analyze_slp_instance): Add bst_map + argument, hoist bst_map creation/destruction to ... + (vect_analyze_slp): ... here, forming a true graph with + SLP instances being the entries. + (vect_detect_hybrid_slp_stmts): Remove wrapper. + (vect_detect_hybrid_slp): Use one visited set for all + graph entries. + (vect_slp_analyze_node_operations): Simplify visited/lvisited + to hash-sets of slp_tree. + (vect_slp_analyze_operations): Likewise. + (vect_bb_slp_scalar_cost): Remove wrapper. + (vect_bb_vectorization_profitable_p): Use one visited set for + all graph entries. + (vect_schedule_slp_instance): Elide bst_map use. + (vect_schedule_slp): Likewise. + +2019-11-18 Richard Biener <rguenther@suse.de> + + * tree-vect-slp.c (vect_analyze_slp_instance): When a CTOR + was vectorized with just external refs fail. + +2019-11-18 Martin Liska <mliska@suse.cz> + + PR ipa/92525 + * ipa-icf.c (sem_function::init): Unset m_checker + at the end of the function. + +2019-11-18 Richard Biener <rguenther@suse.de> + + PR tree-optimization/92558 + * tree-vect-loop.c (vect_create_epilog_for_reduction): When + reducting the width of a reduction vector def update new_phis. + +2019-11-18 Szabolcs Nagy <szabolcs.nagy@arm.com> + + * configure.ac (gcc_cv_target_ldbl128): Set for powerpc*-*-linux-musl* + and s390*-*-linux-musl* targets. + * configure: Regenerate. + +2019-11-18 Szabolcs Nagy <szabolcs.nagy@arm.com> + + * config/s390/linux.h (MUSL_DYNAMIC_LINKER32): Define. + (MUSL_DYNAMIC_LINKER64): Define. + +2019-11-18 Martin Liska <mliska@suse.cz> + + * dbgcnt.c (dbg_cnt_set_limit_by_name): Provide error + message for an unknown counter. + (dbg_cnt_process_single_pair): Support 0 as minimum value. + (dbg_cnt_process_opt): Remove unreachable code. + +2019-11-18 Martin Liska <mliska@suse.cz> + + PR ipa/92529 + * ipa-icf-gimple.c (func_checker::compare_gimple_assign): + Compare LHS types of NOP_EXPR. + +2019-11-18 Matthew Malcomson <matthew.malcomson@arm.com> + + * run-rtl-passes.c (run_rtl_passes): Accept and handle empty + "initial_pass_name" argument -- by running "*clean_state" pass. + Also free the "initial_pass_name" when done. + +2019-11-18 Richard Biener <rguenther@suse.de> + + PR rtl-optimization/92462 + * alias.c (find_base_term): Restrict the look through ANDs. + (find_base_value): Likewise. + +2019-11-18 Georg-Johann Lay <avr@gjlay.de> + + Add support for AVR devices from the 0-series. + + PR target/92545 + * config/avr/avr-arch.h (avr_mcu_t) <flash_pm_offset>: New field. + * config/avr/avr-devices.c (avr_mcu_types): Adjust initializers. + * config/avr/avr-mcus.def (AVR_MCU): Add respective field. + * config/avr/specs.h (LINK_SPEC) <%(link_pm_base_address)>: Add. + * config/avr/gen-avr-mmcu-specs.c (print_mcu) + <*cpp, *cpp_mcu, *cpp_avrlibc, *link_pm_base_address>: Emit code + for spec definitions. + * doc/avr-mmcu.texi: Regenerate. + +2019-11-18 Hongtao Liu <hongtao.liu@intel.com> + + PR target/92448 + * config/i386/i386-expand.c (ix86_expand_set_or_cpymem): + Replace TARGET_AVX128_OPTIMAL with TARGET_AVX256_SPLIT_REGS. + * config/i386/i386-option.c (ix86_vec_cost): Ditto. + (ix86_reassociation_width): Ditto. + * config/i386/i386-options.c (ix86_option_override_internal): + Replace TARGET_AVX128_OPTIAML with + ix86_tune_features[X86_TUNE_AVX128_OPTIMAL] + * config/i386/i386.h (TARGET_AVX256_SPLIT_REGS): New macro. + (TARGET_AVX128_OPTIMAL): Deleted. + * config/i386/x86-tune.def (X86_TUNE_AVX256_SPLIT_REGS): New + DEF_TUNE. + +2019-11-16 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/rs6000.md (cceq_ior_compare): Rename to... + (@cceq_ior_compare_<mode> for GPR): ... this. Allow GPR instead of + just SI. + (cceq_rev_compare): Rename to... + (@cceq_rev_compare_<mode> for GPR): ... this. Allow GPR instead of + just SI. + (define_split for <bd>tf_<mode>): Add SImode first argument to + gen_cceq_ior_compare. + +2019-11-16 Segher Boessenkool <segher@kernel.crashing.org> + + * common/config/powerpcspe: Delete. + +2019-11-16 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/aarch64-sve.md (aarch64_wrffr): Wrap the FFRT + output in UNSPEC_WRFFR. + +2019-11-16 Richard Sandiford <richard.sandiford@arm.com> + + * tree-data-ref.c (create_intersect_range_checks_index): Rewrite + the index tests to have the form (unsigned T) (B - A + bias) <= limit. + +2019-11-16 Richard Sandiford <richard.sandiford@arm.com> + + * tree-data-ref.c (create_intersect_range_checks_index) + (create_intersect_range_checks): Print dump messages. + +2019-11-16 Richard Sandiford <richard.sandiford@arm.com> + + * tree-data-ref.c (dump_alias_pair): New function. + (prune_runtime_alias_test_list): Use it to dump each merged alias pair. + +2019-11-16 Richard Sandiford <richard.sandiford@arm.com> + + * tree-data-ref.h (DR_ALIAS_MIXED_STEPS): New flag. + * tree-data-ref.c (prune_runtime_alias_test_list): Set it when + merging data references with different steps. + (create_intersect_range_checks_index): Take a + dr_with_seg_len_pair_t instead of two dr_with_seg_lens. + Bail out if DR_ALIAS_MIXED_STEPS is set. + (create_intersect_range_checks): Take a dr_with_seg_len_pair_t + instead of two dr_with_seg_lens. Update call to + create_intersect_range_checks_index. + (create_runtime_alias_checks): Update call accordingly. + +2019-11-16 Richard Sandiford <richard.sandiford@arm.com> + + * tree-data-ref.h (DR_ALIAS_RAW, DR_ALIAS_WAR, DR_ALIAS_WAW) + (DR_ALIAS_ARBITRARY, DR_ALIAS_SWAPPED, DR_ALIAS_UNSWAPPED): New flags. + (dr_with_seg_len_pair_t::sequencing): New enum. + (dr_with_seg_len_pair_t::flags): New member variable. + (dr_with_seg_len_pair_t::dr_with_seg_len_pair_t): Take a sequencing + parameter and initialize the flags member variable. + * tree-loop-distribution.c (compute_alias_check_pairs): Update + call accordingly. + * tree-vect-data-refs.c (vect_prune_runtime_alias_test_list): Likewise. + Ensure the two data references in an alias pair are in statement + order, if there is a defined order. + * tree-data-ref.c (prune_runtime_alias_test_list): Use + DR_ALIAS_SWAPPED and DR_ALIAS_UNSWAPPED to record whether we've + swapped the references in a dr_with_seg_len_pair_t. OR together + the flags when merging two dr_with_seg_len_pair_ts. After merging, + try to restore the original dr_with_seg_len order, updating the + flags if that fails. + +2019-11-16 Richard Sandiford <richard.sandiford@arm.com> + + * tree-data-ref.c (prune_runtime_alias_test_list): Delay + swapping the dr_as based on init values until we've decided + whether to merge them. + +2019-11-16 Richard Sandiford <richard.sandiford@arm.com> + + * tree-data-ref.c (prune_runtime_alias_test_list): Sort the + two accesses in each dr_with_seg_len_pair_t before trying to + combine separate dr_with_seg_len_pair_ts. + * tree-loop-distribution.c (compute_alias_check_pairs): Don't do + that here. + * tree-vect-data-refs.c (vect_prune_runtime_alias_test_list): Likewise. + +2019-11-16 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/aarch64-sve.md + (scatter_store<SVE_FULL_SD:mode><v_int_equiv>): Extend to... + (scatter_store<SVE_24:mode><v_int_container>): ...this. + (mask_scatter_store<SVE_FULL_S:mode><v_int_equiv>): Extend to... + (mask_scatter_store<SVE_4:mode><v_int_equiv>): ...this. + (mask_scatter_store<SVE_FULL_D:mode><v_int_equiv>): Extend to... + (mask_scatter_store<SVE_2:mode><v_int_equiv>): ...this. + (*mask_scatter_store<mode><v_int_container>_<su>xtw_unpacked): New + pattern. + (*mask_scatter_store<SVE_FULL_D:mode><v_int_equiv>_sxtw): Extend to... + (*mask_scatter_store<SVE_2:mode><v_int_equiv>_sxtw): ...this. + (*mask_scatter_store<SVE_FULL_D:mode><v_int_equiv>_uxtw): Extend to... + (*mask_scatter_store<SVE_2:mode><v_int_equiv>_uxtw): ...this. + +2019-11-16 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/iterators.md (SVE_2BHSI, SVE_2HSDI, SVE_4BHI) + (SVE_4HSI): New mode iterators. + (ANY_EXTEND2): New code iterator. + * config/aarch64/aarch64-sve.md + (@aarch64_gather_load_<ANY_EXTEND:optab><VNx4_WIDE:mode><VNx4_NARROW:mode>): + Extend to... + (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>): + ...this, handling extension to partial modes as well as full modes. + Describe the extension as a predicated rather than unpredicated + extension. + (@aarch64_gather_load_<ANY_EXTEND:optab><VNx2_WIDE:mode><VNx2_NARROW:mode>): + Likewise extend to... + (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>): + ...this, making the same adjustments. + (*aarch64_gather_load_<ANY_EXTEND:optab><VNx2_WIDE:mode><VNx2_NARROW:mode>_sxtw): + Likewise extend to... + (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>_sxtw) + ...this, making the same adjustments. + (*aarch64_gather_load_<ANY_EXTEND:optab><VNx2_WIDE:mode><VNx2_NARROW:mode>_uxtw): + Likewise extend to... + (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>_uxtw) + ...this, making the same adjustments. + (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): + New pattern. + (*aarch64_ldff1_gather<mode>_sxtw): Canonicalize to a constant + extension predicate. + (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode><VNx4_NARROW:mode>) + (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode><VNx2_NARROW:mode>) + (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode><VNx2_NARROW:mode>_uxtw): + Describe the extension as a predicated rather than unpredicated + extension. + (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode><VNx2_NARROW:mode>_sxtw): + Likewise. Canonicalize to a constant extension predicate. + * config/aarch64/aarch64-sve-builtins-base.cc + (svld1_gather_extend_impl::expand): Add an extra predicate for + the extension. + (svldff1_gather_extend_impl::expand): Likewise. + +2019-11-16 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/iterators.md (SVE_24, SVE_2, SVE_4): New mode + iterators. + * config/aarch64/aarch64-sve.md + (gather_load<SVE_FULL_SD:mode><v_int_equiv>): Extend to... + (gather_load<SVE_24:mode><v_int_container>): ...this. + (mask_gather_load<SVE_FULL_S:mode><v_int_equiv>): Extend to... + (mask_gather_load<SVE_4:mode><v_int_container>): ...this. + (mask_gather_load<SVE_FULL_D:mode><v_int_equiv>): Extend to... + (mask_gather_load<SVE_2:mode><v_int_container>): ...this. + (*mask_gather_load<SVE_2:mode><v_int_container>_<su>xtw_unpacked): + New pattern. + (*mask_gather_load<SVE_FULL_D:mode><v_int_equiv>_sxtw): Extend to... + (*mask_gather_load<SVE_2:mode><v_int_equiv>_sxtw): ...this. + Allow the nominal extension predicate to be different from the + load predicate. + (*mask_gather_load<SVE_FULL_D:mode><v_int_equiv>_uxtw): Extend to... + (*mask_gather_load<SVE_2:mode><v_int_equiv>_uxtw): ...this. + +2019-11-16 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/aarch64-sve.md + (trunc<SVE_HSDI:mode><SVE_PARTIAL_I:mode>2): New pattern. + * config/aarch64/aarch64.c (aarch64_integer_truncation_p): New + function. + (aarch64_sve_adjust_stmt_cost): Call it. + +2019-11-16 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/aarch64-sve.md + (@aarch64_load_<ANY_EXTEND:optab><VNx8_WIDE:mode><VNx8_NARROW:mode>): + (@aarch64_load_<ANY_EXTEND:optab><VNx4_WIDE:mode><VNx4_NARROW:mode>) + (@aarch64_load_<ANY_EXTEND:optab><VNx2_WIDE:mode><VNx2_NARROW:mode>): + Combine into... + (@aarch64_load_<ANY_EXTEND:optab><SVE_HSDI:mode><SVE_PARTIAL_I:mode>): + ...this new pattern, handling extension to partial modes as well + as full modes. Describe the extension as a predicated rather than + unpredicated extension. + (@aarch64_ld<fn>f1_<ANY_EXTEND:optab><VNx8_WIDE:mode><VNx8_NARROW:mode>) + (@aarch64_ld<fn>f1_<ANY_EXTEND:optab><VNx4_WIDE:mode><VNx4_NARROW:mode>) + (@aarch64_ld<fn>f1_<ANY_EXTEND:optab><VNx2_WIDE:mode><VNx2_NARROW:mode>): + Combine into... + (@aarch64_ld<fn>f1_<ANY_EXTEND:optab><SVE_HSDI:mode><SVE_PARTIAL_I:mode>): + ...this new pattern, handling extension to partial modes as well + as full modes. Describe the extension as a predicated rather than + unpredicated extension. + * config/aarch64/aarch64-sve-builtins.cc + (function_expander::use_contiguous_load_insn): Add an extra + predicate for extending loads. + * config/aarch64/aarch64.c (aarch64_extending_load_p): New function. + (aarch64_sve_adjust_stmt_cost): Likewise. + (aarch64_add_stmt_cost): Use aarch64_sve_adjust_stmt_cost to adjust + the cost of SVE vector stmts. + +2019-11-16 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/iterators.md (SVE_HSDI): New mode iterator. + (narrower_mask): Handle VNx4HI, VNx2HI and VNx2SI. + * config/aarch64/aarch64-sve.md + (<ANY_EXTEND:optab><SVE_PARTIAL_I:mode><SVE_HSDI:mode>2): New pattern. + (*<ANY_EXTEND:optab><SVE_PARTIAL_I:mode><SVE_HSDI:mode>2): Likewise. + (@aarch64_pred_sxt<SVE_FULL_HSDI:mode><SVE_PARTIAL_I:mode>): Update + comment. Avoid new narrower_mask ambiguity. + (@aarch64_cond_sxt<SVE_FULL_HSDI:mode><SVE_PARTIAL_I:mode>): Likewise. + (*cond_uxt<mode>_2): Update comment. + (*cond_uxt<mode>_any): Likewise. + +2019-11-16 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/aarch64-modes.def: Define partial SVE vector + float modes. + * config/aarch64/aarch64-protos.h (aarch64_sve_pred_mode): New + function. + * config/aarch64/aarch64.c (aarch64_classify_vector_mode): Handle the + new vector float modes. + (aarch64_sve_container_bits): New function. + (aarch64_sve_pred_mode): Likewise. + (aarch64_get_mask_mode): Use it. + (aarch64_sve_element_int_mode): Handle structure modes and partial + modes. + (aarch64_sve_container_int_mode): New function. + (aarch64_vectorize_related_mode): Return SVE modes when given + SVE modes. Handle partial modes, taking the preferred number + of units from the size of the given mode. + (aarch64_hard_regno_mode_ok): Allow partial modes to be stored + in registers. + (aarch64_expand_sve_ld1rq): Use the mode form of aarch64_sve_pred_mode. + (aarch64_expand_sve_const_vector): Handle partial SVE vectors. + (aarch64_split_sve_subreg_move): Use the mode form of + aarch64_sve_pred_mode. + (aarch64_secondary_reload): Handle partial modes in the same way + as full big-endian vectors. + (aarch64_vector_mode_supported_p): Allow partial SVE vectors. + (aarch64_autovectorize_vector_modes): Try unpacked SVE vectors, + merging with the Advanced SIMD modes. If two modes have the + same size, try the Advanced SIMD mode first. + (aarch64_simd_valid_immediate): Use the container rather than + the element mode for INDEX constants. + (aarch64_simd_vector_alignment): Make the alignment of partial + SVE vector modes the same as their minimum size. + (aarch64_evpc_sel): Use the mode form of aarch64_sve_pred_mode. + * config/aarch64/aarch64-sve.md (mov<SVE_FULL:mode>): Extend to... + (mov<SVE_ALL:mode>): ...this. + (movmisalign<SVE_FULL:mode>): Extend to... + (movmisalign<SVE_ALL:mode>): ...this. + (*aarch64_sve_mov<mode>_le): Rename to... + (*aarch64_sve_mov<mode>_ldr_str): ...this. + (*aarch64_sve_mov<SVE_FULL:mode>_be): Rename and extend to... + (*aarch64_sve_mov<SVE_ALL:mode>_no_ldr_str): ...this. Handle + partial modes regardless of endianness. + (aarch64_sve_reload_be): Rename to... + (aarch64_sve_reload_mem): ...this and enable for little-endian. + Use aarch64_sve_pred_mode to get the appropriate predicate mode. + (@aarch64_pred_mov<SVE_FULL:mode>): Extend to... + (@aarch64_pred_mov<SVE_ALL:mode>): ...this. + (*aarch64_sve_mov<SVE_FULL:mode>_subreg_be): Extend to... + (*aarch64_sve_mov<SVE_ALL:mode>_subreg_be): ...this. + (@aarch64_sve_reinterpret<SVE_FULL:mode>): Extend to... + (@aarch64_sve_reinterpret<SVE_ALL:mode>): ...this. + (*aarch64_sve_reinterpret<SVE_FULL:mode>): Extend to... + (*aarch64_sve_reinterpret<SVE_ALL:mode>): ...this. + (maskload<SVE_FULL:mode><vpred>): Extend to... + (maskload<SVE_ALL:mode><vpred>): ...this. + (maskstore<SVE_FULL:mode><vpred>): Extend to... + (maskstore<SVE_ALL:mode><vpred>): ...this. + (vec_duplicate<SVE_FULL:mode>): Extend to... + (vec_duplicate<SVE_ALL:mode>): ...this. + (*vec_duplicate<SVE_FULL:mode>_reg): Extend to... + (*vec_duplicate<SVE_ALL:mode>_reg): ...this. + (sve_ld1r<SVE_FULL:mode>): Extend to... + (sve_ld1r<SVE_ALL:mode>): ...this. + (vec_series<SVE_FULL_I:mode>): Extend to... + (vec_series<SVE_I:mode>): ...this. + (*vec_series<SVE_FULL_I:mode>_plus): Extend to... + (*vec_series<SVE_I:mode>_plus): ...this. + (@aarch64_pred_sxt<SVE_FULL_HSDI:mode><SVE_PARTIAL_I:mode>): Avoid + new VPRED ambiguity. + (@aarch64_cond_sxt<SVE_FULL_HSDI:mode><SVE_PARTIAL_I:mode>): Likewise. + (add<SVE_FULL_I:mode>3): Extend to... + (add<SVE_I:mode>3): ...this. + * config/aarch64/iterators.md (SVE_ALL, SVE_I): New mode iterators. + (Vetype, Vesize, VEL, Vel, vwcore): Handle partial SVE vector modes. + (VPRED, vpred): Likewise. + (Vctype): New iterator. + (vw): Remove SVE modes. + +2019-11-16 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/iterators.md (SVE_PARTIAL): Rename to... + (SVE_PARTIAL_I): ...this. + * config/aarch64/aarch64-sve.md: Apply the above renaming throughout. + +2019-11-16 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/iterators.md (SVE_ALL): Rename to... + (SVE_FULL): ...this. + (SVE_I): Rename to... + (SVE_FULL_I): ...this. + (SVE_F): Rename to... + (SVE_FULL_F): ...this. + (SVE_BHSI): Rename to... + (SVE_FULL_BHSI): ...this. + (SVE_HSD): Rename to... + (SVE_FULL_HSD): ...this. + (SVE_HSDI): Rename to... + (SVE_FULL_HSDI): ...this. + (SVE_HSF): Rename to... + (SVE_FULL_HSF): ...this. + (SVE_SD): Rename to... + (SVE_FULL_SD): ...this. + (SVE_SDI): Rename to... + (SVE_FULL_SDI): ...this. + (SVE_SDF): Rename to... + (SVE_FULL_SDF): ...this. + (SVE_S): Rename to... + (SVE_FULL_S): ...this. + (SVE_D): Rename to... + (SVE_FULL_D): ...this. + * config/aarch64/aarch64-sve.md: Apply the above renaming throughout. + * config/aarch64/aarch64-sve2.md: Likewise. + +2019-11-16 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/aarch64.opt (--param=aarch64-sve-compare-costs): + New option. + * doc/invoke.texi: Document it. + * config/aarch64/aarch64.c (aarch64_autovectorize_vector_modes): + By default, return VECT_COMPARE_COSTS for SVE. + +2019-11-16 Richard Sandiford <richard.sandiford@arm.com> + + * target.h (VECT_COMPARE_COSTS): New constant. + * target.def (autovectorize_vector_modes): Return a bitmask of flags. + * doc/tm.texi: Regenerate. + * targhooks.h (default_autovectorize_vector_modes): Update accordingly. + * targhooks.c (default_autovectorize_vector_modes): Likewise. + * config/aarch64/aarch64.c (aarch64_autovectorize_vector_modes): + Likewise. + * config/arc/arc.c (arc_autovectorize_vector_modes): Likewise. + * config/arm/arm.c (arm_autovectorize_vector_modes): Likewise. + * config/i386/i386.c (ix86_autovectorize_vector_modes): Likewise. + * config/mips/mips.c (mips_autovectorize_vector_modes): Likewise. + * tree-vectorizer.h (_loop_vec_info::vec_outside_cost) + (_loop_vec_info::vec_inside_cost): New member variables. + * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize them. + (vect_better_loop_vinfo_p, vect_joust_loop_vinfos): New functions. + (vect_analyze_loop): When autovectorize_vector_modes returns + VECT_COMPARE_COSTS, try vectorizing the loop with each available + vector mode and picking the one with the lowest cost. + (vect_estimate_min_profitable_iters): Record the computed costs + in the loop_vec_info. + +2019-11-16 Richard Sandiford <richard.sandiford@arm.com> + + * tree-vectorizer.h (can_duplicate_and_interleave_p): Take an + element type rather than an element mode. + * tree-vect-slp.c (can_duplicate_and_interleave_p): Likewise. + Use get_vectype_for_scalar_type to query the natural types + for a given element type rather than basing everything on + GET_MODE_SIZE (vinfo->vector_mode). Limit int_mode_for_size + query to MAX_FIXED_MODE_SIZE. + (duplicate_and_interleave): Update call accordingly. + * tree-vect-loop.c (vectorizable_reduction): Likewise. + +2019-11-16 Richard Sandiford <richard.sandiford@arm.com> + + * tree-vectorizer.h (vect_get_vector_types_for_stmt): Take an + optional maximum nunits. + (get_vectype_for_scalar_type): Likewise. Also declare a form that + takes an slp_tree. + (get_mask_type_for_scalar_type): Take an optional slp_tree. + (vect_get_mask_type_for_stmt): Likewise. + * tree-vect-data-refs.c (vect_analyze_data_refs): Don't store + the vector type in STMT_VINFO_VECTYPE for BB vectorization. + * tree-vect-patterns.c (vect_recog_bool_pattern): Use + vect_get_vector_types_for_stmt instead of STMT_VINFO_VECTYPE + to get an assumed vector type for data references. + * tree-vect-slp.c (vect_update_shared_vectype): New function. + (vect_update_all_shared_vectypes): Likewise. + (vect_build_slp_tree_1): Pass the group size to + vect_get_vector_types_for_stmt. Use vect_update_shared_vectype + for BB vectorization. + (vect_build_slp_tree_2): Call vect_update_all_shared_vectypes + before building the vectof from scalars. + (vect_analyze_slp_instance): Pass the group size to + get_vectype_for_scalar_type. + (vect_slp_analyze_node_operations_1): Don't recompute the vector + types for BB vectorization here; just handle the case in which + we deferred the choice for booleans. + (vect_get_constant_vectors): Pass the slp_tree to + get_vectype_for_scalar_type. + * tree-vect-stmts.c (vect_prologue_cost_for_slp_op): Likewise. + (vectorizable_call): Likewise. + (vectorizable_simd_clone_call): Likewise. + (vectorizable_conversion): Likewise. + (vectorizable_shift): Likewise. + (vectorizable_operation): Likewise. + (vectorizable_comparison): Likewise. + (vect_is_simple_cond): Take the slp_tree as argument and + pass it to get_vectype_for_scalar_type. + (vectorizable_condition): Update call accordingly. + (get_vectype_for_scalar_type): Take a group_size argument. + For BB vectorization, limit the the vector to that number + of elements. Also define an overload that takes an slp_tree. + (get_mask_type_for_scalar_type): Add an slp_tree argument and + pass it to get_vectype_for_scalar_type. + (vect_get_vector_types_for_stmt): Add a group_size argument + and pass it to get_vectype_for_scalar_type. Don't use the + cached vector type for BB vectorization if a group size is given. + Handle data references in that case. + (vect_get_mask_type_for_stmt): Take an slp_tree argument and + pass it to get_mask_type_for_scalar_type. + +2019-11-15 Jan Hubicka <hubicka@ucw.cz> + + * ipa-inline.h (do_estimate_edge_time): Add nonspec_time + parameter. + (estimate_edge_time): Use it. + * ipa-inline-analysis.c (do_estimate_edge_time): Add + ret_nonspec_time parameter. + +2019-11-15 Szabolcs Nagy <szabolcs.nagy@arm.com> + + * config/m68k/linux.h (MUSL_DYNAMIC_LINKER): Define. + +2019-11-15 Nick Clifton <nickc@redhat.com> + Szabolcs Nagy <szabolcs.nagy@arm.com> + + PR target/65649 + * config/microblaze/microblaze.c (print_operand): Print value as long. + +2019-11-15 Jan Hubicka <hubicka@ucw.cz> + + * ipa-inline.c (edge_badness, inline_small_functions): Revert + accidental commit. + +2019-11-15 Kwok Cheung Yeung <kcy@codesourcery.com> + + * config/gcn/gcn.h (FIXED_REGISTERS): Unfix frame pointer. + (CALL_USED_REGISTERS): Make frame pointer callee-saved. + +2019-11-15 Kwok Cheung Yeung <kcy@codesourcery.com> + + * config/gcn/gcn.c (MAX_NORMAL_SGPR_COUNT, MAX_NORMAL_VGPR_COUNT): New. + (gcn_conditional_register_usage): Use constants in place of hard-coded + values. + (gcn_hsa_declare_function_name): Set lower bound for number of + SGPRs/VGPRs in non-leaf kernels to MAX_NORMAL_SGPR_COUNT and + MAX_NORMAL_VGPR_COUNT. + +2019-11-15 Martin Jambor <mjambor@suse.cz> + + * ipa-utils.h (ipa_remove_useless_jump_functions): Remove stray + declaration. + +2019-11-15 Kwok Cheung Yeung <kcy@codesourcery.com> + + * config/gcn/gcn.c (default_requested_args): New. + (gcn_parse_amdgpu_hsa_kernel_attribute): Initialize requested args + set with default_requested_args. + (gcn_conditional_register_usage): Limit register usage of non-kernel + functions. Reassign fixed registers if a non-standard set of args is + requested. + * config/gcn/gcn.h (FIXED_REGISTERS): Fix registers according to ABI. + +2019-11-15 Feng Xue <fxue@os.amperecomputing.com> + + PR ipa/92528 + * ipa-prop.c (update_jump_functions_after_inlining): Invalidate + aggregate jump function when inlined-to caller has no edge summary. + +2019-11-15 Kwok Cheung Yeung <kcy@codesourcery.com> + + * config/gcn/gcn.c (gcn_init_cumulative_args): Call reinit_regs. + +2019-11-15 Kwok Cheung Yeung <kcy@codesourcery.com> + + * config/gcn/gcn.c (gcn_expand_prologue): Remove initialization and + prologue use of v0. + (print_operand_address): Use v1 for zero vector offset. + +2019-11-15 Richard Sandiford <richard.sandiford@arm.com> + + PR tree-optimization/92515 + * tree-vect-stmts.c (vectorizable_shift): Record incompatible op1 + types when converting a vector/scalar shift into a vector/vector one, + using tree_nop_conversion_p instead of useless_type_conversion_p. + Move the conversion code to the transform block. + +2019-11-15 Matthew Malcomson <matthew.malcomson@arm.com> + + * read-rtl-function.c + (function_reader::add_fixup_source_location): Take additional + parameter of a column. + (function_reader::maybe_read_location): Optionally parse column + information and pass to add_fixup_source_location. + +2019-11-15 Richard Biener <rguenther@suse.de> + + PR tree-optimization/92512 + * tree-vect-loop.c (check_reduction_path): Fix operand index + computability check. Add check for second use in COND_EXPRs. + +2019-11-15 Richard Sandiford <richard.sandiford@arm.com> + + PR target/92515 + * config/rs6000/rs6000-call.c (rs6000_gimple_fold_builtin): Use + VIEW_CONVERT_EXPR to reinterpret vectors as different types. + +2019-11-15 Kwok Cheung Yeung <kcy@codesourcery.com> + + * config/gcn/gcn.c (gcn_regno_reg_class): Return VCC_CONDITIONAL_REG + register class for VCC_LO and VCC_HI. + (gcn_spill_class): Use SGPR_REGS to spill registers in + VCC_CONDITIONAL_REG. + +2019-11-15 Richard Biener <rguenther@suse.de> + + PR tree-optimization/92324 + * tree-vect-loop.c (vect_create_epilog_for_reduction): Fix + singedness of SLP reduction epilouge operations. Also reduce + the vector width for SLP reductions before doing elementwise + operations if possible. + +2019-11-15 Matthew Malcomson <matthew.malcomson@arm.com> + + * passes.c (skip_pass): Set epilogue_completed if skipping the + pro_and_epilogue pass. + +2019-11-15 Matthew Malcomson <matthew.malcomson@arm.com> + + * passes.c (should_skip_pass_p): Always run "dfinish". + +2019-11-15 Richard Biener <rguenther@suse.de> + + * ipa-inline.c (inline_small_functions): Move assignment + to next before call destroying edge. + +2019-11-15 Richard Biener <rguenther@suse.de> + + PR tree-optimization/92039 + PR tree-optimization/91975 + * tree-ssa-loop-ivcanon.c (constant_after_peeling): Revert + previous change, treat invariants consistently as non-constant. + (tree_estimate_loop_size): Ternary ops with just the first op + constant are not optimized away. + +2019-11-15 Jakub Jelinek <jakub@redhat.com> + + * gimplify.c (gimplify_call_expr): Don't call + omp_resolve_declare_variant after gimplification. + * omp-general.c (omp_context_selector_matches): For isa that might + match in some other function, defer if in declare simd function. + (omp_context_compute_score): Don't look for " score" in construct + trait set. Set *score to -1 if it can't ever match. + (omp_resolve_declare_variant): If any variants need to be deferred, + don't punt immediately, but compute scores of all variants and if + ther eis a score winner that doesn't need to be deferred, return that. + +2019-11-15 Luo Xiong Hu <luoxhu@linux.ibm.com> + + * ipa-comdats.c: Fix comments typo. + * ipa-profile.c: Fix comments typo. + * tree-profile.c (gimple_gen_ic_profiler): Use the new variable + __gcov_indirect_call.counters and __gcov_indirect_call.callee. + (gimple_gen_ic_func_profiler): Likewise. + (pass_ipa_tree_profile::gate): Fix comments typo. + +2019-11-15 Xiong Hu Luo <luoxhu@linux.ibm.com> + + * ipa-inline.c (inline_small_functions): Update iterator of next. + +2019-11-14 Kwok Cheung Yeung <kcy@codesourcery.com> + + * lra-spills.c (assign_spill_hard_regs): Check that the spill + register is suitable for the mode. + +2019-11-14 Andrew MacLeod <amacleod@redhat.com> + + * range-op.h (range_operator::fold_range): Return a bool. + * range-op.cc (range_operator::wi_fold): Assert supported type. + (range_operator::fold_range): Assert supported type and return true. + (operator_equal::fold_range): Return true. + (operator_not_equal::fold_range): Same. + (operator_lt::fold_range): Same. + (operator_le::fold_range): Same. + (operator_gt::fold_range): Same. + (operator_ge::fold_range): Same. + (operator_plus::op1_range): Adjust call to fold_range. + (operator_plus::op2_range): Same. + (operator_minus::op1_range): Same. + (operator_minus::op2_range): Same. + (operator_exact_divide::op1_range): Same. + (operator_lshift::fold_range): Return true and adjust fold_range call. + (operator_rshift::fold_range): Same. + (operator_cast::fold_range): Return true. + (operator_logical_and::fold_range): Same. + (operator_logical_or::fold_range): Same. + (operator_logical_not::fold_range): Same. + (operator_bitwise_not::fold_range): Adjust call to fold_range. + (operator_bitwise_not::op1_range): Same. + (operator_cst::fold_range): Return true. + (operator_identity::fold_range): Return true. + (operator_negate::fold_range): Return true and adjust fold_range call. + (operator_addr_expr::fold_range): Return true. + (operator_addr_expr::op1_range): Adjust call to fold_range. + (range_cast): Same. + * tree-vrp.c (range_fold_binary_symbolics_p): Adjust call to fold_range. + (range_fold_unary_symbolics_p): Same. + +2019-11-14 Andrew MacLeod <amacleod@redhat.com> + + PR tree-optimization/92506 + * range-op.cc (range_operator::fold_range): Start with range undefined. + (operator_abs::wi_fold): Fix wrong line copy... With wrapv, abs with + overflow is varying. + +2019-11-14 Aldy Hernandez <aldyh@redhat.com> + + * range-op.cc (*operator*::*range): Remove calls to + range_intersect, range_invert, and range_union in favor of calling + the in-place API methods. + (range_tests): Same. + * range.cc (range_intersect): Remove. + (range_union): Remove. + (range_invert): Remove. + * range.h (range_intersect): Remove. + (range_union): Remove. + (range_intersect): Remove. + +2019-11-14 Ilya Leoshkevich <iii@linux.ibm.com> + + PR rtl-optimization/92430 + * cfgcleanup.c (pass_jump_after_combine::gate): New function. + (pass_jump_after_combine::execute): Perform jump threading + unconditionally. + +2019-11-14 Jerome Lambourg <lambourg@adacore.com> + Doug Rupp <rupp@adacore.com> + Olivier Hainque <hainque@adacore.com> + + * config.gcc: Collapse the arm-vxworks entries into + a single arm-wrs-vxworks7* one, bpabi based. Update + the default cpu from arm8 to armv7-a + * config/arm/vxworks.h (CC1_SPEC): Simplify, knowing that + we always use ARM_UNWIND_INFO. + (DWARF2_UNWIND_INFO): Remove redefinition. + (ARM_TARGET2_DWARF_FORMAT): Likewise. + (VXWORKS_PERSONALITY): Define, to "llvm". + (VXWORKS_EXTRA_LIBS_RTP): Define, to "-lllvm". + +2019-11-14 Jerome Lambourg <lambourg@adacore.com> + + * config/arm/vxworks.h (TARGET_OS_CPP_BUILTINS): Use + _VX_CPU instead of CPU and handle arm_arch8. + +2019-11-14 Doug Rupp <rupp@adacore.com> + Olivier Hainque <hainque@adacore.com> + Jerome Lambourg <lambourg@adacore.com> + + * config.gcc: Handle aarch64*-wrs-vxworks7*. + * config/aarch64/aarch64-vxworks.h: New file. + * config/aarch64/t-aarch64-vxworks: New file. + +2019-11-06 Jerome Lambourg <lambourg@adacore.com> + Olivier Hainque <hainque@adacore.com> + + * config/vx-common.h (USE_TM_CLONE_REGISTRY): Remove + definition, pointless with a VxWorks specific version + of crtstuff. + (DWARF2_UNWIND_INFO): Conditionalize on !ARM_UNWIND_INFO. + * config/vxworks.h (VX_CRTBEGIN_SPEC, VX_CRTEND_SPEC): + New local macros, controlling the addition of vxworks specific + crtstuff objects depending on the EH mechanism and kind of + module being linked. + (VXWORKS_STARTFILE_SPEC, VXWORKS_ENDFILE_SPEC): Use them. + +2019-11-06 Pat Bernardi <bernardi@adacore.com> + Jerome Lambourg <lambourg@adacore.com> + Olivier Hainque <hainque@adacore.com> + + * config.gcc: Add comment to introduce the TARGET_VXWORKS + common macro definitions, conveying VXWORKS7 or 64bit general + variations. Add a block to set gcc_cv_initfini_array + unconditionally to "yes" for VxWorks7. + config/vx-common.h (VXWORKS_CC1_SPEC): New macro, empty string + by default. Update some comments. + config/vxworks.h (VXWORKS_EXTRA_LIBS_RTP): New macro, empty by + default, to be added the end of VXWORKS_LIBS_RTP. + (VXWORKS_LIBS_RTP): Replace hardcoded part by VXWORKS_BASE_LIBS_RTP + and append VXWORKS_EXTRA_LIBS_RTP, both of which specific ports may + redefine. + (VXWORKS_NET_LIBS_RTP): Account for VxWorks7 specificities. + (VXWORKS_CC1_SPEC): Common base definition, with VxWorks7 variation + to account for the now available TLS abilities. + (TARGET_LIBC_HAS_FUNCTION): Account for VxWorks7 abilities. + (VXWORKS_HAVE_TLS): Likewise. + +2019-11-14 Richard Sandiford <richard.sandiford@arm.com> + + * tree-vect-slp.c (vect_contains_pattern_stmt_p): New function. + (vect_slp_convert_to_external): Likewise. + (vect_slp_analyze_node_operations): If analysis fails, try building + the node from scalars instead. + +2019-11-14 Richard Sandiford <richard.sandiford@arm.com> + + * tree-cfg.c (verify_gimple_assign_unary): Handle conversions + between vector types. + * tree-vect-stmts.c (vectorizable_conversion): Extend the + non-widening and non-narrowing path to handle standard + conversion codes, if the target supports them. + * expr.c (convert_move): Try using the extend and truncate optabs + for vectors. + * optabs-tree.c (supportable_convert_operation): Likewise. + * config/aarch64/iterators.md (Vnarroqw): New iterator. + * config/aarch64/aarch64-simd.md (<optab><Vnarrowq><mode>2) + (trunc<mode><Vnarrowq>2): New patterns. + +2019-11-14 Richard Sandiford <richard.sandiford@arm.com> + + * tree-vect-stmts.c (vect_get_vector_types_for_stmt): Don't + require vectype and nunits_vectype to have the same size; + instead assert that nunits_vectype has at least as many + elements as vectype. Don't compute a separate nunits_vectype + if the scalar type is obviously the same as vectype's. + Tweak dump messages. + +2019-11-14 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/aarch64.c (aarch64_vectorize_related_mode): New + function. + (aarch64_autovectorize_vector_modes): Also add V4HImode and V2SImode. + (TARGET_VECTORIZE_RELATED_MODE): Define. + +2019-11-14 Richard Sandiford <richard.sandiford@arm.com> + + * tree-vectorizer.h (vec_info::mode_set): New typedef. + (vec_info::used_vector_mode): New member variable. + (vect_chooses_same_modes_p): Declare. + * tree-vect-stmts.c (get_vectype_for_scalar_type): Record each + chosen vector mode in vec_info::used_vector_mode. + (vect_chooses_same_modes_p): New function. + * tree-vect-loop.c (vect_analyze_loop): Use it to avoid trying + the same vector statements multiple times. + * tree-vect-slp.c (vect_slp_bb_region): Likewise. + +2019-11-14 Richard Sandiford <richard.sandiford@arm.com> + + * machmode.h (opt_machine_mode::operator==): New function. + (opt_machine_mode::operator!=): Likewise. + * tree-vectorizer.h (vec_info::vector_mode): Update comment. + (get_related_vectype_for_scalar_type): Delete. + (get_vectype_for_scalar_type_and_size): Declare. + * tree-vect-slp.c (vect_slp_bb_region): Print dump messages to say + whether analysis passed or failed, and with what vector modes. + Use related_vector_mode to check whether trying a particular + vector mode would be redundant with the autodetected mode, + and print a dump message if we decide to skip it. + * tree-vect-loop.c (vect_analyze_loop): Likewise. + (vect_create_epilog_for_reduction): Use + get_related_vectype_for_scalar_type instead of + get_vectype_for_scalar_type_and_size. + * tree-vect-stmts.c (get_vectype_for_scalar_type_and_size): Replace + with... + (get_related_vectype_for_scalar_type): ...this new function. + Take a starting/"prevailing" vector mode rather than a vector size. + Take an optional nunits argument, with the same meaning as for + related_vector_mode. Use related_vector_mode when not + auto-detecting a mode, falling back to mode_for_vector if no + target mode exists. + (get_vectype_for_scalar_type): Update accordingly. + (get_same_sized_vectype): Likewise. + * tree-vectorizer.c (get_vec_alignment_for_array_type): Likewise. + +2019-11-14 Richard Sandiford <richard.sandiford@arm.com> + + * tree-vect-stmts.c (vectorizable_call): Require the types + to have the same size. + +2019-11-14 Richard Sandiford <richard.sandiford@arm.com> + + * tree-vect-stmts.c (vectorizable_call): If an operand is + constant or external, use get_vectype_for_scalar_type + rather than get_same_sized_vectype to get its vector type. + (vectorizable_conversion, vectorizable_shift): Likewise. + (vectorizable_operation): Likewise. + +2019-11-14 Richard Sandiford <richard.sandiford@arm.com> + + * tree-vectorizer.h (vec_info::vector_size): Replace with... + (vec_info::vector_mode): ...this new field. + * tree-vect-loop.c (vect_update_vf_for_slp): Update accordingly. + (vect_analyze_loop, vect_transform_loop): Likewise. + * tree-vect-loop-manip.c (vect_do_peeling): Likewise. + * tree-vect-slp.c (can_duplicate_and_interleave_p): Likewise. + (vect_make_slp_decision, vect_slp_bb_region): Likewise. + * tree-vect-stmts.c (get_vectype_for_scalar_type): Likewise. + * tree-vectorizer.c (try_vectorize_loop_1): Likewise. + +2019-11-14 Richard Sandiford <richard.sandiford@arm.com> + + * target.h (vector_sizes, auto_vector_sizes): Delete. + (vector_modes, auto_vector_modes): New typedefs. + * target.def (autovectorize_vector_sizes): Replace with... + (autovectorize_vector_modes): ...this new hook. + * doc/tm.texi.in (TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_SIZES): + Replace with... + (TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_MODES): ...this new hook. + * doc/tm.texi: Regenerate. + * targhooks.h (default_autovectorize_vector_sizes): Delete. + (default_autovectorize_vector_modes): New function. + * targhooks.c (default_autovectorize_vector_sizes): Delete. + (default_autovectorize_vector_modes): New function. + * omp-general.c (omp_max_vf): Use autovectorize_vector_modes instead + of autovectorize_vector_sizes. Use the number of units in the mode + to calculate the maximum VF. + * omp-low.c (omp_clause_aligned_alignment): Use + autovectorize_vector_modes instead of autovectorize_vector_sizes. + Use a loop based on related_mode to iterate through all supported + vector modes for a given scalar mode. + * optabs-query.c (can_vec_mask_load_store_p): Use + autovectorize_vector_modes instead of autovectorize_vector_sizes. + * tree-vect-loop.c (vect_analyze_loop, vect_transform_loop): Likewise. + * tree-vect-slp.c (vect_slp_bb_region): Likewise. + * config/aarch64/aarch64.c (aarch64_autovectorize_vector_sizes): + Replace with... + (aarch64_autovectorize_vector_modes): ...this new function. + (TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_SIZES): Delete. + (TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_MODES): Define. + * config/arc/arc.c (arc_autovectorize_vector_sizes): Replace with... + (arc_autovectorize_vector_modes): ...this new function. + (TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_SIZES): Delete. + (TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_MODES): Define. + * config/arm/arm.c (arm_autovectorize_vector_sizes): Replace with... + (arm_autovectorize_vector_modes): ...this new function. + (TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_SIZES): Delete. + (TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_MODES): Define. + * config/i386/i386.c (ix86_autovectorize_vector_sizes): Replace with... + (ix86_autovectorize_vector_modes): ...this new function. + (TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_SIZES): Delete. + (TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_MODES): Define. + * config/mips/mips.c (mips_autovectorize_vector_sizes): Replace with... + (mips_autovectorize_vector_modes): ...this new function. + (TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_SIZES): Delete. + (TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_MODES): Define. + +2019-11-14 Richard Sandiford <richard.sandiford@arm.com> + + * tree-vect-stmts.c (vectorizable_shift): Check the number + of vector elements as well as the type mode when deciding + whether an op1_vectype is compatible. Reuse the result of + this check when generating vector statements. + +2019-11-14 Richard Sandiford <richard.sandiford@arm.com> + + * tree-vect-stmts.c (get_vectype_for_scalar_type_and_size): If + targetm.vectorize.preferred_simd_mode returns an integer mode, + use mode_for_vector to decide what the vector type's mode + should actually be. Use build_vector_type_for_mode instead + of build_vector_type. + +2019-11-14 Richard Sandiford <richard.sandiford@arm.com> + + * target.def (get_mask_mode): Take a vector mode itself as argument, + instead of properties about the vector mode. + * doc/tm.texi: Regenerate. + * targhooks.h (default_get_mask_mode): Update to reflect new + get_mode_mask interface. + * targhooks.c (default_get_mask_mode): Likewise. Use + related_int_vector_mode. + * optabs-query.c (can_vec_mask_load_store_p): Update call + to get_mask_mode. + * tree-vect-stmts.c (check_load_store_masking): Likewise, checking + first that the original mode really is a vector. + * tree.c (build_truth_vector_type_for): Likewise. + * config/aarch64/aarch64.c (aarch64_get_mask_mode): Update for new + get_mode_mask interface. + (aarch64_expand_sve_vcond): Update call accordingly. + * config/gcn/gcn.c (gcn_vectorize_get_mask_mode): Update for new + get_mode_mask interface. + * config/i386/i386.c (ix86_get_mask_mode): Likewise. + +2019-11-14 Richard Sandiford <richard.sandiford@arm.com> + + * tree.h (build_truth_vector_type): Delete. + (build_same_sized_truth_vector_type): Likewise. + * tree.c (build_truth_vector_type): Rename to... + (build_truth_vector_type_for): ...this. Make static and take + a vector type as argument. + (truth_type_for): Update accordingly. + (build_same_sized_truth_vector_type): Delete. + * tree-vect-generic.c (expand_vector_divmod): Use truth_type_for + instead of build_same_sized_truth_vector_type. + * tree-vect-loop.c (vect_create_epilog_for_reduction): Likewise. + (vect_record_loop_mask, vect_get_loop_mask): Likewise. + * tree-vect-patterns.c (build_mask_conversion): Likeise. + * tree-vect-slp.c (vect_get_constant_vectors): Likewise. + * tree-vect-stmts.c (vect_get_vec_def_for_operand): Likewise. + (vect_build_gather_load_calls, vectorizable_call): Likewise. + (scan_store_can_perm_p, vectorizable_scan_store): Likewise. + (vectorizable_store, vectorizable_condition): Likewise. + (get_mask_type_for_scalar_type, get_same_sized_vectype): Likewise. + (vect_get_mask_type_for_stmt): Use truth_type_for instead of + build_truth_vector_type. + * config/aarch64/aarch64-sve-builtins.cc (gimple_folder::convert_pred): + Use truth_type_for instead of build_same_sized_truth_vector_type. + * config/rs6000/rs6000-call.c (fold_build_vec_cmp): Likewise. + +2019-11-14 Richard Sandiford <richard.sandiford@arm.com> + + * tree.h (build_truth_vector_type_for_mode): Declare. + * tree.c (build_truth_vector_type_for_mode): New function, + split out from... + (build_truth_vector_type): ...here. + (build_opaque_vector_type): Fix head comment. + * tree-vectorizer.h (supportable_narrowing_operation): Remove + vec_info parameter. + (vect_halve_mask_nunits): Replace vec_info parameter with the + mode of the new vector. + (vect_double_mask_nunits): Likewise. + * tree-vect-loop.c (vect_halve_mask_nunits): Likewise. + (vect_double_mask_nunits): Likewise. + * tree-vect-loop-manip.c: Include insn-config.h, rtl.h and recog.h. + (vect_maybe_permute_loop_masks): Remove vinfo parameter. Update call + to vect_halve_mask_nunits, getting the required mode from the unpack + patterns. + (vect_set_loop_condition_masked): Update call accordingly. + * tree-vect-stmts.c (supportable_narrowing_operation): Remove vec_info + parameter and update call to vect_double_mask_nunits. + (vectorizable_conversion): Update call accordingly. + (simple_integer_narrowing): Likewise. Remove vec_info parameter. + (vectorizable_call): Update call accordingly. + (supportable_widening_operation): Update call to + vect_halve_mask_nunits. + * config/aarch64/aarch64-sve-builtins.cc (register_builtin_types): + Use build_truth_vector_type_mode instead of build_truth_vector_type. + +2019-11-14 Richard Sandiford <richard.sandiford@arm.com> + + * machmode.h (mode_for_int_vector): Delete. + (related_int_vector_mode): Declare. + * stor-layout.c (mode_for_int_vector): Delete. + (related_int_vector_mode): New function. + * optabs.c (expand_vec_perm_1): Use related_int_vector_mode + instead of mode_for_int_vector. + (expand_vec_perm_const): Likewise. + * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Likewise. + (aarch64_evpc_sve_tbl): Likewise. + * config/s390/s390.c (s390_expand_vec_compare_cc): Likewise. + (s390_expand_vcond): Likewise. + +2019-11-14 Richard Sandiford <richard.sandiford@arm.com> + + * target.def (related_mode): New hook. + * doc/tm.texi.in (TARGET_VECTORIZE_RELATED_MODE): New hook. + * doc/tm.texi: Regenerate. + * targhooks.h (default_vectorize_related_mode): Declare. + * targhooks.c (default_vectorize_related_mode): New function. + * machmode.h (related_vector_mode): Declare. + * stor-layout.c (related_vector_mode): New function. + * expmed.c (extract_bit_field_1): Use it instead of mode_for_vector. + * optabs-query.c (qimode_for_vec_perm): Likewise. + * tree-vect-stmts.c (get_group_load_store_type): Likewise. + (vectorizable_store, vectorizable_load): Likewise + +2019-11-14 Richard Henderson <richard.henderson@linaro.org> + + * config/arm/aarch-common-protos.h (arm_md_asm_adjust): Declare. + * config/arm/aarch-common.c (arm_md_asm_adjust): New. + * config/arm/arm-c.c (arm_cpu_builtins): Define + __GCC_ASM_FLAG_OUTPUTS__. + * config/arm/arm.c (TARGET_MD_ASM_ADJUST): New. + * config/aarch64/aarch64-c.c (aarch64_define_unconditional_macros): + Define __GCC_ASM_FLAG_OUTPUTS__. + * config/aarch64/aarch64.c (TARGET_MD_ASM_ADJUST): New. + * doc/extend.texi (FlagOutputOperands): Add documentation + for ARM and AArch64. + + * config/arm/arm-modes.def (CC_NZ): Rename from CC_NOOV. + * config/arm/predicates.md (nz_comparison_operator): Rename + from noov_comparison_operator. + * config/arm/arm.c (arm_select_cc_mode): Use CC_NZmode name. + (arm_gen_dicompare_reg): Likewise. + (maybe_get_arm_condition_code): Likewise. + (thumb1_final_prescan_insn): Likewise. + (arm_emit_coreregs_64bit_shift): Likewise. + * config/arm/arm.md (addsi3_compare0): Likewise. + (*addsi3_compare0_scratch, subsi3_compare0): Likewise. + (*mulsi3_compare0, *mulsi3_compare0_v6): Likewise. + (*mulsi3_compare0_scratch, *mulsi3_compare0_scratch_v6): Likewise. + (*mulsi3addsi_compare0, *mulsi3addsi_compare0_v6): Likewise. + (*mulsi3addsi_compare0_scratch): Likewise. + (*mulsi3addsi_compare0_scratch_v6): Likewise. + (*andsi3_compare0, *andsi3_compare0_scratch): Likewise. + (*zeroextractsi_compare0_scratch): Likewise. + (*ne_zeroextractsi, *ne_zeroextractsi_shifted): Likewise. + (*ite_ne_zeroextractsi, *ite_ne_zeroextractsi_shifted): Likewise. + (andsi_not_shiftsi_si_scc_no_reuse): Likewise. + (andsi_not_shiftsi_si_scc): Likewise. + (*andsi_notsi_si_compare0, *andsi_notsi_si_compare0_scratch): Likewise. + (*iorsi3_compare0, *iorsi3_compare0_scratch): Likewise. + (*xorsi3_compare0, *xorsi3_compare0_scratch): Likewise. + (*shiftsi3_compare0, *shiftsi3_compare0_scratch): Likewise. + (*not_shiftsi_compare0, *not_shiftsi_compare0_scratch): Likewise. + (*notsi_compare0, *notsi_compare0_scratch): Likewise. + (return_addr_mask, *check_arch2): Likewise. + (*arith_shiftsi_compare0, *arith_shiftsi_compare0_scratch): Likewise. + (*sub_shiftsi_compare0, *sub_shiftsi_compare0_scratch): Likewise. + (compare_scc splitters): Likewise. + (movcond_addsi): Likewise. + * config/arm/thumb2.md (thumb2_addsi3_compare0): Likewise. + (*thumb2_addsi3_compare0_scratch): Likewise. + (*thumb2_mulsi_short_compare0): Likewise. + (*thumb2_mulsi_short_compare0_scratch): Likewise. + (compare peephole2s): Likewise. + * config/arm/thumb1.md (thumb1_cbz): Use CC_NZmode and + nz_comparison_operator names. + (cbranchsi4_insn): Likewise. + + * config/arm/constraints.md (c): Use cc_register predicate. + + * config/aarch64/constraints.md (c): New constraint. + +2019-11-14 Jan Hubicka <hubicka@ucw.cz> + + * ipa-fnsummary.c (ipa_call_context::estimate_size_and_time, + ipa_merge_fn_summary_after_inlining): Micro optimize. + +2019-11-14 Jan Hubicka <hubicka@ucw.cz> + + * params.opt (max-inline-insns-single-O2): Set to 70 (instead of 30). + +2019-11-14 Jan Hubicka <hubicka@ucw.cz> + + * ipa-cp.c (ipa_vr_operation_and_type_effects): Move up in file. + (ipa_value_range_from_jfunc): New function. + * ipa-fnsummary.c (evaluate_conditions_for_known_args): Add + known_value_ranges parameter; use it to evalulate conditions. + (evaluate_properties_for_edge): Compute known value ranges. + (ipa_fn_summary_t::duplicate): Update use of + evaluate_conditions_for_known_args. + (estimate_ipcp_clone_size_and_time): Likewise. + (ipa_merge_fn_summary_after_inlining): Likewise. + * ipa-prop.h (ipa_value_range_from_jfunc): Declare. + +2019-11-14 Martin Liska <mliska@suse.cz> + + * ipa-inline.c (want_inline_small_function_p): Use + CIF_MAX_INLINE_INSNS_AUTO_LIMIT instead + of CIF_MAX_INLINE_INSNS_SINGLE_O2_LIMIT. + +2019-11-14 Martin Liska <mliska@suse.cz> + + * ipa-cp.c (devirtualization_time_bonus): Use opt_for_fn + of a callee to get value of the param. + * ipa-inline.c (inline_insns_auto): Use proper + opt_for_fn. + * opts.c (maybe_default_option): Do not overwrite param + value if optimization level does not match. Note that + params usually have default value set via Init() keyword. + * params.opt: Remove -param=max-inline-insns-auto-O2. + * cif-code.def (MAX_INLINE_INSNS_AUTO_O2_LIMIT): Remove. + * doc/invoke.texi: Remove documentation of + max-inline-insns-auto-O2. + +2019-11-14 Martin Liska <mliska@suse.cz> + + * tree-switch-conversion.c (switch_conversion::switch_conversion): + Do not initialize m_other_count. + (switch_conversion::collect): Do not count m_default_count and + m_other_count as we use frequencies for edges. + * tree-switch-conversion.h: Remove m_default_count and m_other_count. + +2019-11-14 Martin Liska <mliska@suse.cz> + + PR other/92329 + * doc/invoke.texi: Document -fallocation-dce. + +2019-11-14 Martin Liska <mliska@suse.cz> + + PR target/92389 + * config/i386/i386.h: Add PTA_AVX512VPOPCNTDQ to + PTA_ICELAKE_CLIENT which is later interited by + PTA_ICELAKE_SERVER and PTA_TIGERLAKE. + +2019-11-14 Martin Liska <mliska@suse.cz> + + * ipa-icf.c (sem_item_optimizer::execute): Save + loaded_symbols. + (sem_item_optimizer::parse_nonsingleton_classes): + Return number of loaded symbols. + (sem_item_optimizer::merge_classes): Print + statistics about totally needed symbols. + * ipa-icf.h (parse_nonsingleton_classes): Change return + type. + (merge_classes): Add one argument. + +2019-11-14 Martin Liska <mliska@suse.cz> + + * ipa-icf-gimple.c (func_checker::hash_operand): Improve + func_checker::hash_operand by handling of FIELD_DECLs. + +2019-11-14 Martin Liska <mliska@suse.cz> + + * ipa-icf-gimple.h (func_checker::func_checker): Add + default constructor. + * ipa-icf.c (sem_function::init): Make operand_equal_p + and hash_operand public. + (sem_item::add_expr): Remove. + (sem_item::add_type): Remove. + (sem_function::hash_stmt): Use m_checker for hashing + of GIMPLE statements. + (sem_function::parse): Init with checker. + (sem_variable::parse): Pass NULL as checker. + (sem_item_optimizer::parse_funcs_and_vars): + Pass checker to ::parse function. + (sem_item_optimizer::parse_nonsingleton_classes): Likewise. + (sem_variable::parse): New function. + (sem_variable::get_hash): Only return computed hash value. + (sem_variable::init): Initialize hash of a variable. + * ipa-icf.h: Remove add_expr, add_type and add func_checker + to couple of functions as a new argument. + +2019-11-14 Martin Liska <mliska@suse.cz> + + * ipa-icf-gimple.c (func_checker::compare_gimple_call): Update + bail out reason. + (func_checker::compare_gimple_assign): Likewise. + +2019-11-14 Jakub Jelinek <jakub@redhat.com> + + * config/i386/i386-options.c (ix86_omp_device_kind_arch_isa): Don't + change sse4.2 to sse4_2 and sse4.1 to sse4.1. + * config/i386/t-omp-device (omp-device-properties-i386): Likewise. + + * omp-general.c (omp_context_name_list_prop): New function. + (omp_context_selector_matches): Use it. Return 0 if it returns + NULL. + (omp_context_selector_props_compare): Allow equivalency of an + identifier and a string literal containing no embedded zeros. + +2019-11-14 Aldy Hernandez <aldyh@redhat.com> + + * range-op.cc (RANGE3): Remove. + (range_tests): Remove all selftest that check for multi-ranges. + Put tests in namespace selftest. + * selftest.h: Move range_tests into namespace selftest. + * value-range.h (class value_range): Unfriend range_tests. + +2019-11-14 Aldy Hernandez <aldyh@redhat.com> + + * tree-vrp.c (range_fold_binary_symbolics_p): Adapt for + normalize_symbolics and normalize_addresses working in place. + (range_fold_unary_symbolics_p): Same. + (range_fold_unary_symbolics_p): Same. + * value-range.cc (num_pairs): Same. + (lower_bound): Same. + (upper_bound): Same. + (contains_p): Same. + (normalize_addresses): Same. + (normalize_symbolics): Same. + * value-range.h (normalize_symbolics): Same. + (normalize_addresses): Same. + +2019-11-14 Feng Xue <fxue@os.amperecomputing.com> + + PR ipa/91682 + * ipa-prop.h (jump_func_type): New value IPA_JF_LOAD_AGG. + (ipa_load_agg_data, ipa_agg_value, ipa_agg_value_set): New structs. + (ipa_agg_jf_item): Add new field jftype and type, redefine field value. + (ipa_agg_jump_function): Remove member function equal_to. + (ipa_agg_jump_function_p): Remove typedef. + (ipa_copy_agg_values, ipa_release_agg_values): New functions. + * ipa-prop.c (ipa_print_node_jump_functions_for_edge): Dump + information for aggregate jump function. + (get_ssa_def_if_simple_copy): Add new parameter rhs_stmt to + record last definition statement. + (load_from_unmodified_param_or_agg): New function. + (ipa_known_agg_contents_list): Add new field type and value, remove + field constant. + (build_agg_jump_func_from_list): Rename parameter const_count to + value_count, build aggregate jump function from ipa_load_agg_data. + (analyze_agg_content_value): New function. + (extract_mem_content): Analyze memory store assignment to prepare + information for aggregate jump function generation. + (determine_known_aggregate_parts): Add new parameter fbi, remove + parameter aa_walk_budeget_p. + (update_jump_functions_after_inlining): Update aggregate jump function. + (ipa_find_agg_cst_for_param): Change type of parameter agg. + (try_make_edge_direct_simple_call): Add new parameter new_root. + (try_make_edge_direct_virtual_call): Add new parameter new_root and + new_root_info. + (update_indirect_edges_after_inlining): Pass new argument to + try_make_edge_direct_simple_call and try_make_edge_direct_virtual_call. + (ipa_write_jump_function): Write aggregate jump function to file. + (ipa_read_jump_function): Read aggregate jump function from file. + (ipa_agg_value::equal_to): Migrate from ipa_agg_jf_item::equal_to. + * ipa-cp.c (ipa_get_jf_arith_result): New function. + (ipa_agg_value_from_node): Likewise. + (ipa_agg_value_set_from_jfunc): Likewise. + (propagate_vals_across_arith_jfunc): Likewise. + (propagate_aggregate_lattice): Likewise. + (ipa_get_jf_pass_through_result): Call ipa_get_jf_arith_result. + (propagate_vals_across_pass_through): Call + propagate_vals_across_arith_jfunc. + (get_clone_agg_value): Move forward. + (propagate_aggs_across_jump_function): Handle value propagation for + aggregate jump function. + (agg_jmp_p_vec_for_t_vec): Remove. + (context_independent_aggregate_values): Replace vec<ipa_agg_jf_item> + with vec<ipa_agg_value>. + (copy_plats_to_inter, intersect_with_plats): Likewise. + (agg_replacements_to_vector, intersect_with_agg_replacements): Likewise. + (intersect_aggregate_with_edge): Likewise. + (find_aggregate_values_for_callers_subset): Likewise. + (cgraph_edge_brings_all_agg_vals_for_node): Likewise. + (estimate_local_effects): Replace vec<ipa_agg_jump_function> and + vec<ipa_agg_jump_function_p> with vec<ipa_agg_value_set>. + (gather_context_independent_values): Likewise. + (perform_estimation_of_a_value, decide_whether_version_node): Likewise. + * ipa-fnsummary.c (evaluate_conditions_for_known_args): Replace + vec<ipa_agg_jump_function_p> with vec<ipa_agg_value_set>. + (evaluate_properties_for_edge): Likewise. + (estimate_edge_devirt_benefit): Likewise. + (estimate_edge_size_and_time): Likewise. + (estimate_calls_size_and_time): Likewise. + (ipa_call_context::ipa_call_context): Likewise. + (estimate_ipcp_clone_size_and_time): Likewise. + * ipa-fnsummary.h (ipa_call_context): Replace + vec<ipa_agg_jump_function_p> with vec<ipa_agg_value_set>. + * ipa-inline-analysis.c (do_estimate_edge_time): Replace + vec<ipa_agg_jump_function_p> with vec<ipa_agg_value_set>. + (do_estimate_edge_size): Likewise. + (do_estimate_edge_hints): Likewise. + +2019-11-13 Jan Hubicka <hubicka@ucw.cz> + + * ipa-cp.c (propagate_vr_across_jump_function): Propagate also across + binary operations. + +2019-11-13 Jan Hubicka <hubicka@ucw.cz> + + * ipa-profile.c (check_argument_count): Check properly that e_info + is non-NULL; do not check descriptors. + +2019-11-13 Jan Hubicka <hubicka@ucw.cz> + + * ipa-inline-analysis.c (do_estimate_edge_time): Relax + check for ipa profiles. + +2019-11-13 Jan Hubicka <hubicka@ucw.cz> + + PR c++/92421 + * ipa-prop.c (update_indirect_edges_after_inlining): + Mark parameter as used. + * ipa-inline.c (recursive_inlining): Reset node cache + after inlining. + (inline_small_functions): Remove checking ifdef. + * ipa-inline-analysis.c (do_estimate_edge_time): Verify + cache consistency. + +2019-11-13 Jan Hubicka <hubicka@ucw.cz> + + PR ipa/92498 + * ipa-profile.c (check_argument_count): Do not ICE when descriptors + is NULL. + (ipa_profile): Fix reversed test. + +2019-11-13 Jan Hubicka <hubicka@ucw.cz> + + * ipa-cp.c (ignore_edge_p): Do not check caller flags. + (propagate_constants_topo): Fix typo. + +2019-11-13 Aldy Hernandez <aldyh@redhat.com> + + * Makefile.in (OBJS): Add value-range.o. + (GTFILES): Add value-range.h. + * gengtype.c (open_base_files): Add value-range.h to list of + header files. + * tree-vrp.c: Move the following value_range related functions: + ranges_from_anti_range, value_range, check, equal_p, symbolic_p, + constant_p, set_undefined, set_varying, may_contain_p, + singleton_p, type, dump, dump_value_range, debug, vrp_val_max, + vrp_val_min, vrp_val_is_min, vrp_val_is_max, set, set_nonzero, + set_zero, vrp_operand_equal_p, range_has_numeric_bounds_p, + value_inside_range, ranges_from_anti_range, union_ranges, + intersect_ranges, intersect_helper, union_helper, union_, + normalize_addresses, normalize_symbolics, num_pairs, lower_bound, + upper_bound, contains_p, invert, intersect... + * value-range.cc: ...to here. + * tree-vrp.h: Move class value_range, enum_value_range_kind, and + associated inline methods from here... + * value-range.h: ...to here. + +2019-11-13 Dragan Mladjenovic <dmladjenovic@wavecomp.com> + + * config/mips/mips.md (rotr<mode>3): Sanitize the constant argument + instead of asserting its value. + +(2019-11-13 Aldy Hernandez <aldyh@redhat.com> + + * gimple-fold.c (size_must_be_zero_p): Rewrite use of value_range + constructors and set methods so value_range_kind is the last + argument and defaults to VR_RANGE. + * gimple-ssa-evrp-analyze.c (record_ranges_from_stmt): Same. + * ipa-cp.c (propagate_vr_across_jump_function): Same. + * ipa-prop.c (ipa_get_value_range): Same. + (ipa_compute_jump_functions_for_edge): Same. + * range-op.cc (value_range_from_overflowed_bounds): Same. + (operator_cast::op1_range): Same. + (range_tests): Same. + * range.cc (range_nonzero): Same. + * tree-ssanames.c (get_range_info): Same. + * tree-vrp.c (value_range_equiv::set): Same. + (value_range::value_range): Same. + (value_range_equiv::value_range_equiv): Same. + (value_range_equiv::update): Same. + (value_range_equiv::deep_copy): Same. + (value_range_equiv::move): Same. + (value_range_equiv::set_undefined): Same. + (value_range::set): Same. + (value_range::set_nonzero): Same. + (ranges_from_anti_range): Same. + (extract_range_from_plus_minus_expr): Same. + (value_range::intersect_helper): Same. + (value_range_equiv::intersect): Same. + (value_range::union_helper): Same. + (value_range_equiv::union_): Same. + (value_range::normalize_symbolics): Same. + (value_range::invert): Same. + (determine_value_range_1): Same. + * tree-vrp.h (class value_range): Same. + (class value_range_equiv): Same. + * vr-values.c (set_value_range_to_nonnegative): Same. + (set_value_range_to_truthvalue): Same. + (vr_values::update_value_range): Same. + (vr_values::extract_range_for_var_from_comparison_expr): Same. + (vr_values::extract_range_from_binary_expr): Same. + (vr_values::extract_range_from_comparison): Same. + (vr_values::extract_range_basic): Same. + (vr_values::adjust_range_with_scev): Same. + (vr_values::vrp_evaluate_conditional_warnv_with_ops): Same. + (vr_values::extract_range_from_phi_node): Same. + +2019-11-13 Ulrich Drepper <drepper@redhat.com> + + * tree-dump.c (dequeue_and_dump): Print first tree operand + for VIEW_CONVERT_EXPR. + +2019-11-13 Joseph Myers <joseph@codesourcery.com> + + * ginclude/float.c [__STDC_VERSION__ > 201710L] (FLT_NORM_MAX, + DBL_NORM_MAX, LDBL_NORM_MAX): Define. + * real.c (get_max_float): Add norm_max argument. + * real.h (get_max_float): Update prototype. + * builtins.c (fold_builtin_interclass_mathfn): Update calls to + get_max_float. + +2019-11-13 Martin Liska <mliska@suse.cz> + + * dbgcnt.c (test_sorted_dbg_counters): New. + (dbgcnt_c_tests): Likewise. + * selftest-run-tests.c (selftest::run_tests): Likewise. + * selftest.h (dbgcnt_c_tests): Likewise. + +2019-11-13 Jan Hubicka <hubicka@ucw.cz> + Martin Jambor <mjambor@suse.cz> + + PR ipa/92454 + * ipa-cp.c (spread_undeadness): Check that IPA_NODE_REF exists. + (identify_dead_nodes): Likewise. + +2019-11-13 Martin Liska <mliska@suse.cz> + + * ipa-icf.c (sem_function::equals_private): Do not overuse + push/pop_cfun functions. + +2019-11-13 Martin Liska <mliska@suse.cz> + + * common.opt: Document change of -fdbg-cnt option. + * dbgcnt.c (DEBUG_COUNTER): Remove. + (dbg_cnt_is_enabled): Remove. + (dbg_cnt): Work with new intervals. + (dbg_cnt_set_limit_by_index): Set to new + list of intervals. + (dbg_cnt_set_limit_by_name): Likewise. + (dbg_cnt_process_single_pair): Process new format. + (dbg_cnt_process_opt): Likewise. + (dbg_cnt_list_all_counters): Likewise. + * doc/invoke.texi: Document change of -fdbg-cnt option. + (cmp_tuples): New. + +2019-11-13 Jan Hubicka <hubicka@ucw.cz> + + * ipa-inline.c (ipa_inline): Check that function is defined before + flattening. + +2019-11-13 Andrew Stubbs <ams@codesourcery.com> + Julian Brown <julian@codesourcery.com> + + * config/gcn/gcn.c (gcn_goacc_validate_dims): Ensure + flag_worker_partitioning is not set. + (TARGET_GOACC_WORKER_PARTITIONING): Remove target hook definition. + * config/gcn/gcn.opt (macc-experimental-workers): Default to off. + +2019-11-13 Andrew Stubbs <ams@codesourcery.com> + + * config/gcn/gcn-run.c (heap_region): New global variable. + (struct hsa_runtime_fn_info): Add hsa_memory_assign_agent_fn. + (init_hsa_runtime_functions): Initialize hsa_memory_assign_agent. + (get_kernarg_region): Move contents to .... + (get_memory_region): .... here. + (get_heap_region): New function. + (init_device): Initialize the heap_region. + (device_malloc): Add region parameter. + (struct kernargs): Move heap .... + (heap): ... to global scope. + (main): Allocate heap separate to kernargs. + +2019-11-13 Jan Hubicka <hubicka@ucw.cz> + + * ipa-prop.c (ipa_print_node_jump_functions, + ipa_print_node_params): Print info about missing summaries. + +2019-11-13 Richard Sandiford <richard.sandiford@arm.com> + + * tree-vect-loop.c (vect_estimate_min_profitable_iters): Include + the cost of generating loop masks. + +2019-11-13 Richard Sandiford <richard.sandiford@arm.com> + + * tree-vectorizer.h (vect_apply_runtime_profitability_check_p): + New function. + * tree-vect-loop-manip.c (vect_loop_versioning): Use it. + * tree-vect-loop.c (vect_analyze_loop_2): Likewise. + (vect_transform_loop): Likewise. + (vect_analyze_loop_costing): Don't take the cost of versioning + into account for the static profitability threshold if it turns + out that no versioning is needed. + +2019-11-13 Jan Hubicka <hubicka@ucw.cz> + + * ipa.c (cgraph_build_static_cdtor): Pass optimization_default_node + and target_option_default_node to get -fprofile-generate ctors working + right with LTO. + +2019-11-13 Richard Sandiford <richard.sandiford@arm.com> + + * tree-vectorizer.h (vect_nop_conversion_p): Declare. + * tree-vect-stmts.c (vect_nop_conversion_p): New function. + (vectorizable_assignment): Don't add a cost for nop conversions. + * tree-vect-loop.c (vect_compute_single_scalar_iteration_cost): + Likewise. + * tree-vect-slp.c (vect_bb_slp_scalar_cost): Likewise. + +2019-11-13 Richard Sandiford <richard.sandiford@arm.com> + + * tree-vect-stmts.c (vect_model_promotion_demotion_cost): Take the + number of ncopies as an additional argument. + (vectorizable_conversion): Update call accordingly. Use "modifier" + to check whether a conversion is between vectors with the same + numbers of units. + +2019-11-13 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/aarch64-sve-builtins-functions.h + (unary_count::expand): Use aarch64_sve_int_mode instead of + mode_for_int_vector. + +2019-11-13 Martin Liska <mliska@suse.cz> + + * opts.c: Update comment about OPT_LEVELS_2_PLUS_SPEED_ONLY. + +2019-11-13 Martin Liska <mliska@suse.cz> + + * tree-streamer-in.c (lto_input_ts_function_decl_tree_pointers): + Remove call to finalize_options_struct. + +2019-11-13 Georg-Johann Lay <avr@gjlay.de> + + PR target/92055 + * config/avr/t-avr (avr-mcus): Do not depend on + $(srcdir)/config/avr/t-multilib. + +2019-11-13 Richard Biener <rguenther@suse.de> + + PR tree-optimization/92473 + * tree-vect-loop.c (vect_create_epilog_for_reduction): Perform + direct optab reduction in the correct type. + +2019-11-12 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/rs6000.md (rs6000_set_fpscr_drn): Use ULL on big + hexadecimal literal. + +2019-11-12 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/vsx.md (xscmpexpdp_<code> for CMP_TEST): Handle + UNORDERED if !HONOR_NANS (DFmode). + (xscmpexpqp_<code>_<mode> for CMP_TEST and IEEE128): Handle UNORDERED + if !HONOR_NANS (<MODE>mode). + +2019-11-12 Jan Hubicka <hubicka@ucw.cz> + + * ipa-cp.c (ignore_edge_p): Also look for optimize flag. + (ipcp_verify_propagated_values): Likewise. + (propagate_constants_across_call): Likewise. + (propagate_constants_topo): Likewise. + (ipcp_propagate_stage): Likewise. + +2019-11-12 Jan Hubicka <hubicka@ucw.cz> + + PR ipa/92471 + * ipa-profile.c (check_argument_count): Break out from ...; + watch for missing summaries. + (ipa_profile): Here. + +2019-11-12 Martin Sebor <msebor@redhat.com> + + PR tree-optimization/92412 + * targhooks.c (default_ref_may_alias_errno): Errono can only alias + extern variables. + +2019-11-12 Martin Sebor <msebor@redhat.com> + + PR middle-end/83688 + * gimple-ssa-sprintf.c (format_result::alias_info): New struct. + (directive::argno): New member. + (format_result::aliases, format_result::alias_count): New data members. + (format_result::append_alias): New member function. + (fmtresult::dst_offset): New data member. + (pass_sprintf_length::call_info::dst_origin): New data member. + (pass_sprintf_length::call_info::dst_field, dst_offset): Same. + (char_type_p, array_elt_at_offset, field_at_offset): New functions. + (get_origin_and_offset): Same. + (format_string): Call it. + (format_directive): Call append_alias and set directive argument + number. + (maybe_warn_overlap): New function. + (pass_sprintf_length::compute_format_length): Call it. + (pass_sprintf_length::handle_gimple_call): Initialize new members. + * tree-ssa-strlen.c (): Also enable when -Wrestrict is on. + +2019-11-12 Ilya Leoshkevich <iii@linux.ibm.com> + + PR rtl-optimization/92430 + * cfgcleanup.c (pass_jump_after_combine::execute): Free + dominance info at the beginning. + +2019-11-12 Richard Biener <rguenther@suse.de> + + PR tree-optimization/92460 + * tree-vect-stmts.c (vectorizable_simd_clone_call): Unshare + expression before gimplifying. + +2019-11-12 Richard Biener <rguenther@suse.de> + + PR tree-optimization/92461 + * tree-vect-loop.c (vect_create_epilog_for_reduction): Update + stmt after propagation. + +2019-11-12 Martin Liska <mliska@suse.cz> + + * config/i386/i386-options.c (ix86_recompute_optlev_based_flags): + Use SET_OPTION_IF_UNSET. + (ix86_option_override_internal): Likewise. + * opts.c (default_options_optimization): Likewise. + (finish_options): Likewise. + (enable_fdo_optimizations): Likewise. + (common_handle_option): Likewise. + +2019-11-12 Martin Liska <mliska@suse.cz> + + * common/common-target.def: Remove option_validate_param and + option_default_params. + * common/common-targhooks.c (default_option_validate_param): + Remove. + * common/common-targhooks.h (default_option_validate_param): + Remove. + * common/config/aarch64/aarch64-common.c (TARGET_OPTION_DEFAULT_PARAMS): + Remove usage of this. + (TARGET_OPTION_VALIDATE_PARAM): Likewise. + (aarch64_option_validate_param): Likewise. + (aarch64_option_default_params): Likewise + * common/config/bpf/bpf-common.c (bpf_option_default_params): Likewise. + (TARGET_OPTION_DEFAULT_PARAMS): Likewise. + * common/config/ia64/ia64-common.c (ia64_option_default_params): Likewise. + (TARGET_OPTION_DEFAULT_PARAMS): Likewise. + * common/config/powerpcspe/powerpcspe-common.c (rs6000_option_default_params): Likewise. + (TARGET_OPTION_DEFAULT_PARAMS): Likewise. + * common/config/rs6000/rs6000-common.c (rs6000_option_default_params): Likewise. + (TARGET_OPTION_DEFAULT_PARAMS): Likewise. + * common/config/sh/sh-common.c (sh_option_default_params): Likewise. + (TARGET_OPTION_DEFAULT_PARAMS): Likewise. + * config/aarch64/aarch64.c (aarch64_override_options_internal): Validate + guard_size here. + * doc/tm.texi: Remove option_default_params and option_validate_param. + * doc/tm.texi.in: Likewise. + +2019-11-12 Martin Liska <mliska@suse.cz> + + * common/common-target.def: + Do not mention set_default_param_value + and set_param_value. + * doc/tm.texi: Likewise. + +2019-11-12 Martin Liska <mliska@suse.cz> + + * common.opt: Remove param_values. + * config/i386/i386-options.c (ix86_valid_target_attribute_p): + Remove finalize_options_struct. + * gcc.c (driver::decode_argv): Do not call global_init_params + and finish_params. + (driver::finalize): Do not call params_c_finalize + and finalize_options_struct. + * opt-suggestions.c (option_proposer::get_completions): Remove + special casing of params. + (option_proposer::find_param_completions): Remove. + (test_completion_partial_match): Update expected output. + * opt-suggestions.h: Remove find_param_completions. + * opts-common.c (add_misspelling_candidates): Add + --param with a space. + * opts.c (handle_param): Remove. + (init_options_struct):. Remove init_options_struct and + similar calls. + (finalize_options_struct): Remove. + (common_handle_option): Use SET_OPTION_IF_UNSET. + * opts.h (finalize_options_struct): Remove. + * toplev.c (general_init): Do not call global_init_params. + (toplev::finalize): Do not call params_c_finalize and + finalize_options_struct. + +2019-11-12 Martin Liska <mliska@suse.cz> + + * Makefile.in: Remove PARAMS_H and params.list + and params.options. + * params-enum.h: Remove. + * params-list.h: Remove. + * params-options.h: Remove. + * params.c: Remove. + * params.def: Remove. + * params.h: Remove. + * asan.c: Do not include params.h. + * auto-profile.c: Likewise. + * bb-reorder.c: Likewise. + * builtins.c: Likewise. + * cfgcleanup.c: Likewise. + * cfgexpand.c: Likewise. + * cfgloopanal.c: Likewise. + * cgraph.c: Likewise. + * combine.c: Likewise. + * common/config/aarch64/aarch64-common.c: Likewise. + * common/config/gcn/gcn-common.c: Likewise. + * common/config/ia64/ia64-common.c: Likewise. + * common/config/powerpcspe/powerpcspe-common.c: Likewise. + * common/config/rs6000/rs6000-common.c: Likewise. + * common/config/sh/sh-common.c: Likewise. + * config/aarch64/aarch64.c: Likewise. + * config/alpha/alpha.c: Likewise. + * config/arm/arm.c: Likewise. + * config/avr/avr.c: Likewise. + * config/csky/csky.c: Likewise. + * config/i386/i386-builtins.c: Likewise. + * config/i386/i386-expand.c: Likewise. + * config/i386/i386-features.c: Likewise. + * config/i386/i386-options.c: Likewise. + * config/i386/i386.c: Likewise. + * config/ia64/ia64.c: Likewise. + * config/rs6000/rs6000-logue.c: Likewise. + * config/rs6000/rs6000.c: Likewise. + * config/s390/s390.c: Likewise. + * config/sparc/sparc.c: Likewise. + * config/visium/visium.c: Likewise. + * coverage.c: Likewise. + * cprop.c: Likewise. + * cse.c: Likewise. + * cselib.c: Likewise. + * dse.c: Likewise. + * emit-rtl.c: Likewise. + * explow.c: Likewise. + * final.c: Likewise. + * fold-const.c: Likewise. + * gcc.c: Likewise. + * gcse.c: Likewise. + * ggc-common.c: Likewise. + * ggc-page.c: Likewise. + * gimple-loop-interchange.cc: Likewise. + * gimple-loop-jam.c: Likewise. + * gimple-loop-versioning.cc: Likewise. + * gimple-ssa-split-paths.c: Likewise. + * gimple-ssa-sprintf.c: Likewise. + * gimple-ssa-store-merging.c: Likewise. + * gimple-ssa-strength-reduction.c: Likewise. + * gimple-ssa-warn-alloca.c: Likewise. + * gimple-ssa-warn-restrict.c: Likewise. + * graphite-isl-ast-to-gimple.c: Likewise. + * graphite-optimize-isl.c: Likewise. + * graphite-scop-detection.c: Likewise. + * graphite-sese-to-poly.c: Likewise. + * graphite.c: Likewise. + * haifa-sched.c: Likewise. + * hsa-gen.c: Likewise. + * ifcvt.c: Likewise. + * ipa-cp.c: Likewise. + * ipa-fnsummary.c: Likewise. + * ipa-inline-analysis.c: Likewise. + * ipa-inline.c: Likewise. + * ipa-polymorphic-call.c: Likewise. + * ipa-profile.c: Likewise. + * ipa-prop.c: Likewise. + * ipa-split.c: Likewise. + * ipa-sra.c: Likewise. + * ira-build.c: Likewise. + * ira-conflicts.c: Likewise. + * loop-doloop.c: Likewise. + * loop-invariant.c: Likewise. + * loop-unroll.c: Likewise. + * lra-assigns.c: Likewise. + * lra-constraints.c: Likewise. + * modulo-sched.c: Likewise. + * opt-suggestions.c: Likewise. + * opts.c: Likewise. + * postreload-gcse.c: Likewise. + * predict.c: Likewise. + * reload.c: Likewise. + * reorg.c: Likewise. + * resource.c: Likewise. + * sanopt.c: Likewise. + * sched-deps.c: Likewise. + * sched-ebb.c: Likewise. + * sched-rgn.c: Likewise. + * sel-sched-ir.c: Likewise. + * sel-sched.c: Likewise. + * shrink-wrap.c: Likewise. + * stmt.c: Likewise. + * targhooks.c: Likewise. + * toplev.c: Likewise. + * tracer.c: Likewise. + * trans-mem.c: Likewise. + * tree-chrec.c: Likewise. + * tree-data-ref.c: Likewise. + * tree-if-conv.c: Likewise. + * tree-inline.c: Likewise. + * tree-loop-distribution.c: Likewise. + * tree-parloops.c: Likewise. + * tree-predcom.c: Likewise. + * tree-profile.c: Likewise. + * tree-scalar-evolution.c: Likewise. + * tree-sra.c: Likewise. + * tree-ssa-ccp.c: Likewise. + * tree-ssa-dom.c: Likewise. + * tree-ssa-dse.c: Likewise. + * tree-ssa-ifcombine.c: Likewise. + * tree-ssa-loop-ch.c: Likewise. + * tree-ssa-loop-im.c: Likewise. + * tree-ssa-loop-ivcanon.c: Likewise. + * tree-ssa-loop-ivopts.c: Likewise. + * tree-ssa-loop-manip.c: Likewise. + * tree-ssa-loop-niter.c: Likewise. + * tree-ssa-loop-prefetch.c: Likewise. + * tree-ssa-loop-unswitch.c: Likewise. + * tree-ssa-math-opts.c: Likewise. + * tree-ssa-phiopt.c: Likewise. + * tree-ssa-pre.c: Likewise. + * tree-ssa-reassoc.c: Likewise. + * tree-ssa-sccvn.c: Likewise. + * tree-ssa-scopedtables.c: Likewise. + * tree-ssa-sink.c: Likewise. + * tree-ssa-strlen.c: Likewise. + * tree-ssa-structalias.c: Likewise. + * tree-ssa-tail-merge.c: Likewise. + * tree-ssa-threadbackward.c: Likewise. + * tree-ssa-threadedge.c: Likewise. + * tree-ssa-uninit.c: Likewise. + * tree-switch-conversion.c: Likewise. + * tree-vect-data-refs.c: Likewise. + * tree-vect-loop.c: Likewise. + * tree-vect-slp.c: Likewise. + * tree-vrp.c: Likewise. + * tree.c: Likewise. + * value-prof.c: Likewise. + * var-tracking.c: Likewise. + +2019-11-12 Martin Liska <mliska@suse.cz> + + * asan.c (asan_sanitize_stack_p): Replace old parameter syntax + with the new one, include opts.h if needed. Use SET_OPTION_IF_UNSET + macro. + (asan_sanitize_allocas_p): Likewise. + (asan_emit_stack_protection): Likewise. + (asan_protect_global): Likewise. + (instrument_derefs): Likewise. + (instrument_builtin_call): Likewise. + (asan_expand_mark_ifn): Likewise. + * auto-profile.c (auto_profile): Likewise. + * bb-reorder.c (copy_bb_p): Likewise. + (duplicate_computed_gotos): Likewise. + * builtins.c (inline_expand_builtin_string_cmp): Likewise. + * cfgcleanup.c (try_crossjump_to_edge): Likewise. + (try_crossjump_bb): Likewise. + * cfgexpand.c (defer_stack_allocation): Likewise. + (stack_protect_classify_type): Likewise. + (pass_expand::execute): Likewise. + * cfgloopanal.c (expected_loop_iterations_unbounded): Likewise. + (estimate_reg_pressure_cost): Likewise. + * cgraph.c (cgraph_edge::maybe_hot_p): Likewise. + * combine.c (combine_instructions): Likewise. + (record_value_for_reg): Likewise. + * common/config/aarch64/aarch64-common.c (aarch64_option_validate_param): Likewise. + (aarch64_option_default_params): Likewise. + * common/config/ia64/ia64-common.c (ia64_option_default_params): Likewise. + * common/config/powerpcspe/powerpcspe-common.c (rs6000_option_default_params): Likewise. + * common/config/rs6000/rs6000-common.c (rs6000_option_default_params): Likewise. + * common/config/sh/sh-common.c (sh_option_default_params): Likewise. + * config/aarch64/aarch64.c (aarch64_output_probe_stack_range): Likewise. + (aarch64_allocate_and_probe_stack_space): Likewise. + (aarch64_expand_epilogue): Likewise. + (aarch64_override_options_internal): Likewise. + * config/alpha/alpha.c (alpha_option_override): Likewise. + * config/arm/arm.c (arm_option_override): Likewise. + (arm_valid_target_attribute_p): Likewise. + * config/i386/i386-options.c (ix86_option_override_internal): Likewise. + * config/i386/i386.c (get_probe_interval): Likewise. + (ix86_adjust_stack_and_probe_stack_clash): Likewise. + (ix86_max_noce_ifcvt_seq_cost): Likewise. + * config/ia64/ia64.c (ia64_adjust_cost): Likewise. + * config/rs6000/rs6000-logue.c (get_stack_clash_protection_probe_interval): Likewise. + (get_stack_clash_protection_guard_size): Likewise. + * config/rs6000/rs6000.c (rs6000_option_override_internal): Likewise. + * config/s390/s390.c (allocate_stack_space): Likewise. + (s390_emit_prologue): Likewise. + (s390_option_override_internal): Likewise. + * config/sparc/sparc.c (sparc_option_override): Likewise. + * config/visium/visium.c (visium_option_override): Likewise. + * coverage.c (get_coverage_counts): Likewise. + (coverage_compute_profile_id): Likewise. + (coverage_begin_function): Likewise. + (coverage_end_function): Likewise. + * cse.c (cse_find_path): Likewise. + (cse_extended_basic_block): Likewise. + (cse_main): Likewise. + * cselib.c (cselib_invalidate_mem): Likewise. + * dse.c (dse_step1): Likewise. + * emit-rtl.c (set_new_first_and_last_insn): Likewise. + (get_max_insn_count): Likewise. + (make_debug_insn_raw): Likewise. + (init_emit): Likewise. + * explow.c (compute_stack_clash_protection_loop_data): Likewise. + * final.c (compute_alignments): Likewise. + * fold-const.c (fold_range_test): Likewise. + (fold_truth_andor): Likewise. + (tree_single_nonnegative_warnv_p): Likewise. + (integer_valued_real_single_p): Likewise. + * gcse.c (want_to_gcse_p): Likewise. + (prune_insertions_deletions): Likewise. + (hoist_code): Likewise. + (gcse_or_cprop_is_too_expensive): Likewise. + * ggc-common.c: Likewise. + * ggc-page.c (ggc_collect): Likewise. + * gimple-loop-interchange.cc (MAX_NUM_STMT): Likewise. + (MAX_DATAREFS): Likewise. + (OUTER_STRIDE_RATIO): Likewise. + * gimple-loop-jam.c (tree_loop_unroll_and_jam): Likewise. + * gimple-loop-versioning.cc (loop_versioning::max_insns_for_loop): Likewise. + * gimple-ssa-split-paths.c (is_feasible_trace): Likewise. + * gimple-ssa-store-merging.c (imm_store_chain_info::try_coalesce_bswap): Likewise. + (imm_store_chain_info::coalesce_immediate_stores): Likewise. + (imm_store_chain_info::output_merged_store): Likewise. + (pass_store_merging::process_store): Likewise. + * gimple-ssa-strength-reduction.c (find_basis_for_base_expr): Likewise. + * graphite-isl-ast-to-gimple.c (class translate_isl_ast_to_gimple): Likewise. + (scop_to_isl_ast): Likewise. + * graphite-optimize-isl.c (get_schedule_for_node_st): Likewise. + (optimize_isl): Likewise. + * graphite-scop-detection.c (build_scops): Likewise. + * haifa-sched.c (set_modulo_params): Likewise. + (rank_for_schedule): Likewise. + (model_add_to_worklist): Likewise. + (model_promote_insn): Likewise. + (model_choose_insn): Likewise. + (queue_to_ready): Likewise. + (autopref_multipass_dfa_lookahead_guard): Likewise. + (schedule_block): Likewise. + (sched_init): Likewise. + * hsa-gen.c (init_prologue): Likewise. + * ifcvt.c (bb_ok_for_noce_convert_multiple_sets): Likewise. + (cond_move_process_if_block): Likewise. + * ipa-cp.c (ipcp_lattice::add_value): Likewise. + (merge_agg_lats_step): Likewise. + (devirtualization_time_bonus): Likewise. + (hint_time_bonus): Likewise. + (incorporate_penalties): Likewise. + (good_cloning_opportunity_p): Likewise. + (ipcp_propagate_stage): Likewise. + * ipa-fnsummary.c (decompose_param_expr): Likewise. + (set_switch_stmt_execution_predicate): Likewise. + (analyze_function_body): Likewise. + (compute_fn_summary): Likewise. + * ipa-inline-analysis.c (estimate_growth): Likewise. + * ipa-inline.c (caller_growth_limits): Likewise. + (inline_insns_single): Likewise. + (inline_insns_auto): Likewise. + (can_inline_edge_by_limits_p): Likewise. + (want_early_inline_function_p): Likewise. + (big_speedup_p): Likewise. + (want_inline_small_function_p): Likewise. + (want_inline_self_recursive_call_p): Likewise. + (edge_badness): Likewise. + (recursive_inlining): Likewise. + (compute_max_insns): Likewise. + (early_inliner): Likewise. + * ipa-polymorphic-call.c (csftc_abort_walking_p): Likewise. + * ipa-profile.c (ipa_profile): Likewise. + * ipa-prop.c (determine_known_aggregate_parts): Likewise. + (ipa_analyze_node): Likewise. + (ipcp_transform_function): Likewise. + * ipa-split.c (consider_split): Likewise. + * ipa-sra.c (allocate_access): Likewise. + (process_scan_results): Likewise. + (ipa_sra_summarize_function): Likewise. + (pull_accesses_from_callee): Likewise. + * ira-build.c (loop_compare_func): Likewise. + (mark_loops_for_removal): Likewise. + * ira-conflicts.c (build_conflict_bit_table): Likewise. + * loop-doloop.c (doloop_optimize): Likewise. + * loop-invariant.c (gain_for_invariant): Likewise. + (move_loop_invariants): Likewise. + * loop-unroll.c (decide_unroll_constant_iterations): Likewise. + (decide_unroll_runtime_iterations): Likewise. + (decide_unroll_stupid): Likewise. + (expand_var_during_unrolling): Likewise. + * lra-assigns.c (spill_for): Likewise. + * lra-constraints.c (EBB_PROBABILITY_CUTOFF): Likewise. + * modulo-sched.c (sms_schedule): Likewise. + (DFA_HISTORY): Likewise. + * opts.c (default_options_optimization): Likewise. + (finish_options): Likewise. + (common_handle_option): Likewise. + * postreload-gcse.c (eliminate_partially_redundant_load): Likewise. + (if): Likewise. + * predict.c (get_hot_bb_threshold): Likewise. + (maybe_hot_count_p): Likewise. + (probably_never_executed): Likewise. + (predictable_edge_p): Likewise. + (predict_loops): Likewise. + (expr_expected_value_1): Likewise. + (tree_predict_by_opcode): Likewise. + (handle_missing_profiles): Likewise. + * reload.c (find_equiv_reg): Likewise. + * reorg.c (redundant_insn): Likewise. + * resource.c (mark_target_live_regs): Likewise. + (incr_ticks_for_insn): Likewise. + * sanopt.c (pass_sanopt::execute): Likewise. + * sched-deps.c (sched_analyze_1): Likewise. + (sched_analyze_2): Likewise. + (sched_analyze_insn): Likewise. + (deps_analyze_insn): Likewise. + * sched-ebb.c (schedule_ebbs): Likewise. + * sched-rgn.c (find_single_block_region): Likewise. + (too_large): Likewise. + (haifa_find_rgns): Likewise. + (extend_rgns): Likewise. + (new_ready): Likewise. + (schedule_region): Likewise. + (sched_rgn_init): Likewise. + * sel-sched-ir.c (make_region_from_loop): Likewise. + * sel-sched-ir.h (MAX_WS): Likewise. + * sel-sched.c (process_pipelined_exprs): Likewise. + (sel_setup_region_sched_flags): Likewise. + * shrink-wrap.c (try_shrink_wrapping): Likewise. + * targhooks.c (default_max_noce_ifcvt_seq_cost): Likewise. + * toplev.c (print_version): Likewise. + (process_options): Likewise. + * tracer.c (tail_duplicate): Likewise. + * trans-mem.c (tm_log_add): Likewise. + * tree-chrec.c (chrec_fold_plus_1): Likewise. + * tree-data-ref.c (split_constant_offset): Likewise. + (compute_all_dependences): Likewise. + * tree-if-conv.c (MAX_PHI_ARG_NUM): Likewise. + * tree-inline.c (remap_gimple_stmt): Likewise. + * tree-loop-distribution.c (MAX_DATAREFS_NUM): Likewise. + * tree-parloops.c (MIN_PER_THREAD): Likewise. + (create_parallel_loop): Likewise. + * tree-predcom.c (determine_unroll_factor): Likewise. + * tree-scalar-evolution.c (instantiate_scev_r): Likewise. + * tree-sra.c (analyze_all_variable_accesses): Likewise. + * tree-ssa-ccp.c (fold_builtin_alloca_with_align): Likewise. + * tree-ssa-dse.c (setup_live_bytes_from_ref): Likewise. + (dse_optimize_redundant_stores): Likewise. + (dse_classify_store): Likewise. + * tree-ssa-ifcombine.c (ifcombine_ifandif): Likewise. + * tree-ssa-loop-ch.c (ch_base::copy_headers): Likewise. + * tree-ssa-loop-im.c (LIM_EXPENSIVE): Likewise. + * tree-ssa-loop-ivcanon.c (try_unroll_loop_completely): Likewise. + (try_peel_loop): Likewise. + (tree_unroll_loops_completely): Likewise. + * tree-ssa-loop-ivopts.c (avg_loop_niter): Likewise. + (CONSIDER_ALL_CANDIDATES_BOUND): Likewise. + (MAX_CONSIDERED_GROUPS): Likewise. + (ALWAYS_PRUNE_CAND_SET_BOUND): Likewise. + * tree-ssa-loop-manip.c (can_unroll_loop_p): Likewise. + * tree-ssa-loop-niter.c (MAX_ITERATIONS_TO_TRACK): Likewise. + * tree-ssa-loop-prefetch.c (PREFETCH_BLOCK): Likewise. + (L1_CACHE_SIZE_BYTES): Likewise. + (L2_CACHE_SIZE_BYTES): Likewise. + (should_issue_prefetch_p): Likewise. + (schedule_prefetches): Likewise. + (determine_unroll_factor): Likewise. + (volume_of_references): Likewise. + (add_subscript_strides): Likewise. + (self_reuse_distance): Likewise. + (mem_ref_count_reasonable_p): Likewise. + (insn_to_prefetch_ratio_too_small_p): Likewise. + (loop_prefetch_arrays): Likewise. + (tree_ssa_prefetch_arrays): Likewise. + * tree-ssa-loop-unswitch.c (tree_unswitch_single_loop): Likewise. + * tree-ssa-math-opts.c (gimple_expand_builtin_pow): Likewise. + (convert_mult_to_fma): Likewise. + (math_opts_dom_walker::after_dom_children): Likewise. + * tree-ssa-phiopt.c (cond_if_else_store_replacement): Likewise. + (hoist_adjacent_loads): Likewise. + (gate_hoist_loads): Likewise. + * tree-ssa-pre.c (translate_vuse_through_block): Likewise. + (compute_partial_antic_aux): Likewise. + * tree-ssa-reassoc.c (get_reassociation_width): Likewise. + * tree-ssa-sccvn.c (vn_reference_lookup_pieces): Likewise. + (vn_reference_lookup): Likewise. + (do_rpo_vn): Likewise. + * tree-ssa-scopedtables.c (avail_exprs_stack::lookup_avail_expr): Likewise. + * tree-ssa-sink.c (select_best_block): Likewise. + * tree-ssa-strlen.c (new_stridx): Likewise. + (new_addr_stridx): Likewise. + (get_range_strlen_dynamic): Likewise. + (class ssa_name_limit_t): Likewise. + * tree-ssa-structalias.c (push_fields_onto_fieldstack): Likewise. + (create_variable_info_for_1): Likewise. + (init_alias_vars): Likewise. + * tree-ssa-tail-merge.c (find_clusters_1): Likewise. + (tail_merge_optimize): Likewise. + * tree-ssa-threadbackward.c (thread_jumps::profitable_jump_thread_path): Likewise. + (thread_jumps::fsm_find_control_statement_thread_paths): Likewise. + (thread_jumps::find_jump_threads_backwards): Likewise. + * tree-ssa-threadedge.c (record_temporary_equivalences_from_stmts_at_dest): Likewise. + * tree-ssa-uninit.c (compute_control_dep_chain): Likewise. + * tree-switch-conversion.c (switch_conversion::check_range): Likewise. + (jump_table_cluster::can_be_handled): Likewise. + * tree-switch-conversion.h (jump_table_cluster::case_values_threshold): Likewise. + (SWITCH_CONVERSION_BRANCH_RATIO): Likewise. + (param_switch_conversion_branch_ratio): Likewise. + * tree-vect-data-refs.c (vect_mark_for_runtime_alias_test): Likewise. + (vect_enhance_data_refs_alignment): Likewise. + (vect_prune_runtime_alias_test_list): Likewise. + * tree-vect-loop.c (vect_analyze_loop_costing): Likewise. + (vect_get_datarefs_in_loop): Likewise. + (vect_analyze_loop): Likewise. + * tree-vect-slp.c (vect_slp_bb): Likewise. + * tree-vectorizer.h: Likewise. + * tree-vrp.c (find_switch_asserts): Likewise. + (vrp_prop::check_mem_ref): Likewise. + * tree.c (wide_int_to_tree_1): Likewise. + (cache_integer_cst): Likewise. + * var-tracking.c (EXPR_USE_DEPTH): Likewise. + (reverse_op): Likewise. + (vt_find_locations): Likewise. + +2019-11-12 Martin Liska <mliska@suse.cz> + + * Makefile.in: Include params.opt. + * flag-types.h (enum parloops_schedule_type): Add + parloops_schedule_type used in params.opt. + * params.opt: New file. + +2019-11-12 Martin Liska <mliska@suse.cz> + + * common.opt: Remove --param and --param= options. + * opt-functions.awk: Mark CL_PARAMS for options + that have Param keyword. + * opts-common.c (decode_cmdline_options_to_array): + Replace --param key=value with --param=key=value. + * opts.c (print_filtered_help): Remove special + printing of params. + (print_specific_help): Update title for params. + (common_handle_option): Do not handle OPT__param. + opts.h (SET_OPTION_IF_UNSET): New macro. + * doc/options.texi: Document Param keyword. + +2019-11-12 Maciej W. Rozycki <macro@codesourcery.com> + Frederik Harwath <frederik@codesourcery.com> + Thomas Schwinge <thomas@codesourcery.com> + + * gimple.h (gf_mask): Add GF_OMP_TARGET_KIND_OACC_SERIAL + enumeration constant. + (is_gimple_omp_oacc): Handle GF_OMP_TARGET_KIND_OACC_SERIAL. + (is_gimple_omp_offloaded): Likewise. + * gimplify.c (omp_region_type): Add ORT_ACC_SERIAL enumeration + constant. Adjust the value of ORT_NONE accordingly. + (is_gimple_stmt): Handle OACC_SERIAL. + (oacc_default_clause): Handle ORT_ACC_SERIAL. + (gomp_needs_data_present): Likewise. + (gimplify_adjust_omp_clauses): Likewise. + (gimplify_omp_workshare): Handle OACC_SERIAL. + (gimplify_expr): Likewise. + * omp-expand.c (expand_omp_target): + Handle GF_OMP_TARGET_KIND_OACC_SERIAL. + (build_omp_regions_1, omp_make_gimple_edges): Likewise. + * omp-low.c (is_oacc_parallel): Rename function to... + (is_oacc_parallel_or_serial): ... this. + Handle GF_OMP_TARGET_KIND_OACC_SERIAL. + (scan_sharing_clauses): Adjust accordingly. + (scan_omp_for): Likewise. + (lower_oacc_head_mark): Likewise. + (convert_from_firstprivate_int): Likewise. + (lower_omp_target): Likewise. + (check_omp_nesting_restrictions): Handle + GF_OMP_TARGET_KIND_OACC_SERIAL. + (lower_oacc_reductions): Likewise. + (lower_omp_target): Likewise. + * tree.def (OACC_SERIAL): New tree code. + * tree-pretty-print.c (dump_generic_node): Handle OACC_SERIAL. + + * doc/generic.texi (OpenACC): Document OACC_SERIAL. + +2019-11-12 Jakub Jelinek <jakub@redhat.com> + + PR target/92449 + * tree-complex.c (expand_complex_multiplication): If !HONOR_NANS, + don't emit UNORDERED_EXPR guarded libcall. Formatting fixes. + + PR tree-optimization/92452 + * tree-vrp.c (vrp_prop::check_array_ref): If TRUNC_DIV_EXPR folds + into NULL_TREE, set up_bound to NULL_TREE instead of computing + MINUS_EXPR on it. + +2019-11-12 Andre Vieira <andre.simoesdiasvieira@arm.com> + + * tree-vect-loop.c (vect_transform_loop): Don't overwrite epilogues + safelen with 0. + +2019-11-12 Alan Modra <amodra@gmail.com> + + * config/rs6000/predicates.md (unspec_tls): Allow const0_rtx for got + element of unspec vec. + * config/rs6000/rs6000.c (rs6000_legitimize_tls_address): Support + PC-relative TLS. + * config/rs6000/rs6000.md (UNSPEC_TLSTLS_PCREL): New unspec. + (tls_gd_pcrel, tls_ld_pcrel): New insns. + (tls_dtprel, tls_tprel): Set attr prefixed when tls_size is not 16. + (tls_got_tprel_pcrel, tls_tls_pcrel): New insns. + +2019-11-12 Alan Modra <amodra@gmail.com> + + * config/rs6000/rs6000.opt (mtls-markers): Delete. + * config/rs6000/rs6000.h (TARGET_TLS_MARKERS): Don't define. + (IS_NOMARK_TLSGETADDR): Likewise. + * config/rs6000/rs6000-protos.h (rs6000_output_tlsargs): Delete. + * config/rs6000/rs6000.c (rs6000_output_tlsargs): Delete. + (rs6000_legitimize_tls_address): Remove !TARGET_TLS_MARKERS code. + (rs6000_call_template_1): Delete TARGET_TLS_MARKERS test and + allow other UNSPECs besides UNSPEC_TLSGD and UNSPEC_TLSLD. + (rs6000_indirect_call_template_1): Likewise. + (rs6000_pltseq_template): Likewise. + (rs6000_opt_vars): Remove "tls-markers" entry. + * config/rs6000/rs6000.md (tls_gd<bits>): Replace TARGET_TLS_MARKERS + with TARGET_ELF. + (tls_gd_high<bits>, tls_gd_low<bits>): Likewise. + (tls_ld<bits>, tls_ld_high<bits>, tls_ld_low<bits>): Likewise. + (pltseq_plt_pcrel<mode>): Likewise. + (call_value_local32): Remove IS_NOMARK_TLSGETADDR predicate test. + (call_value_local64): Likewise. + (call_value_indirect_nonlocal_sysv<mode>): Remove IS_NOMARK_TLSGETADDR + output and length attribute sub-expression. + (call_value_nonlocal_sysv<mode>), + (call_value_nonlocal_sysv_secure<mode>), + (call_value_local_aix<mode>, call_value_nonlocal_aix<mode>), + (call_value_indirect_aix<mode>, call_value_indirect_elfv2<mode>), + (call_value_indirect_pcrel<mode>): Likewise. + * doc/install.texi (powerpc-*-*): Require binutils-2.20. + * configure.ac (HAVE_AS_TLS_MARKERS): Delete test. + * configure: Regenerate. + * config.in: Regenerate. + +2019-11-11 Michael Meissner <meissner@linux.ibm.com> + + * config/rs6000/predicates.md (prefixed_memory): New predicate. + * config/rs6000/rs6000.md (stack_protect_setdi): Deal with either + address being a prefixed load/store. + (stack_protect_testdi): Deal with either address being a prefixed + load. + +2019-11-11 Jakub Jelinek <jakub@redhat.com> + + PR bootstrap/92433 + * config/rs6000/rs6000-c.c (altivec_build_resolved_builtin): Guard + ALTIVEC_BUILTIN_VEC_VCMPGE_P argument swapping with n == 3 check. Use + std::swap. + +2019-11-11 Richard Sandiford <richard.sandiford@arm.com> + + PR tree-optimization/92420 + * tree-vect-stmts.c (get_negative_load_store_type): Move further + up file. + (get_group_load_store_type): Use it for reversed SLP accesses. + +2019-11-11 Jan Hubicka <hubcika@ucw.cz> + + * ipa-prop.c (ipa_propagate_indirect_call_infos): Remove ipcp + summary. + (ipcp_transformation_t::duplicate): Break out from ... + (ipa_node_params_t::duplicate): ... here; add copying of agg + replacements. + * ipa-prop.h (ipcp_transformation): Add constructor and destructor. + (ipcp_transformation_t): Add duplicate. + +2019-11-11 Janne Blomqvist <jb@gcc.gnu.org> + + PR fortran/91828 + * doc/install.texi: Document that the minimum MPFR version is + 3.1.0. + +2019-11-11 Claudiu Zissulescu <claziss@gmail.com> + + * config/arc/arc.md (movsi_ne): Reorder instruction variants and + use new register constraint letters. + +2019-11-11 Claudiu Zissulescu <claziss@gmail.com> + + * config/arc/arc.c (arc_legitimize_pic_address): Consider UNSPECs + as well, if interesting recover the symbol and re-legitimize the + pic address. + +2019-11-11 Martin Liska <mliska@suse.cz> + + * dbgcnt.def (DEBUG_COUNTER): Sort counters + alphabetically. + +2019-11-11 Andre Vieira <andre.simoesdiasvieira@arm.com> + + * tree-vect-loop-manip.c (vect_do_peeling): Take epilogue gaps into + account when checking if there are enough iterations to vectorize + epilogue. + +2019-11-11 Tobias Burnus <tobias@codesourcery.com> + Kwok Cheung Yeung <kcy@codesourcery.com> + + * langhooks-def.h (LANG_HOOKS_OMP_CHECK_OPTIONAL_ARGUMENT): + Renamed from LANG_HOOKS_OMP_IS_OPTIONAL_ARGUMENT; update define. + (LANG_HOOKS_DECLS): Rename also here. + * langhooks.h (lang_hooks_for_decls): Rename + omp_is_optional_argument to omp_check_optional_argument; take + additional bool argument. + * omp-general.h (omp_check_optional_argument): Likewise. + * omp-general.h (omp_check_optional_argument): Likewise. + * omp-low.c (lower_omp_target): Update calls; handle absent + Fortran optional arguments with USE_DEVICE_ADDR/USE_DEVICE_PTR. + +2019-11-11 H.J. Lu <hjl.tools@gmail.com> + + PR target/87833 + * config/i386/intelmic-mkoffload.c (prepare_target_image): Put + -fPIC and -shared the last to create offload image. + +2019-11-11 Thomas Schwinge <thomas@codesourcery.com> + + * gimplify.c (gimplify_scan_omp_clauses): Assert 'offset2' instead + of 'offset'. + + * Makefile.in (LANG_CONFIGUREFRAGS): Define. + (config.status): Use/depend on it. + * configure.ac (all_lang_configurefrags): Track, 'AC_SUBST'. + * configure: Regenerate. + +2019-11-11 Jiufu Guo <guojiufu@linux.ibm.com> + + PR tree-optimization/88760 + * config/rs6000/rs6000.opt (-munroll-only-small-loops): New option. + * common/config/rs6000/rs6000-common.c + (rs6000_option_optimization_table) [OPT_LEVELS_2_PLUS_SPEED_ONLY]: + Turn on -funroll-loops and -munroll-only-small-loops. + [OPT_LEVELS_ALL]: Turn off -fweb and -frename-registers. + * config/rs6000/rs6000.c (rs6000_option_override_internal): Remove + set of PARAM_MAX_UNROLL_TIMES and PARAM_MAX_UNROLLED_INSNS. + Turn off -munroll-only-small-loops for explicit -funroll-loops. + (TARGET_LOOP_UNROLL_ADJUST): Add loop unroll adjust hook. + (rs6000_loop_unroll_adjust): Define it. Use -munroll-only-small-loops. + +2019-11-11 Kewen Lin <linkw@gcc.gnu.org> + + * config/rs6000/rs6000.c (rs6000_builtin_vectorization_cost): + Make scalar_load, vector_load, unaligned_load and + vector_gather_load cost more to conform hardware latency and + insn cost settings. + +2019-11-10 Iain Sandoe <iain@sandoe.co.uk> + + * config/darwin.h (MACHO_SYMBOL_FLAG_LINKER_VIS): New. + (MACHO_SYMBOL_LINKER_VIS_P): New. + +2019-11-10 Kwok Cheung Yeung <kcy@codesourcery.com> + + * lra-spills.c (assign_spill_hard_regs): Do not spill into + registers in eliminable_regset. + +2019-11-10 Jan Hubicka <hubicka@ucw.cz> + + * ipa-inline.c (compute_uninlined_call_time, + compute_inlined_call_time): Take edge frequency as + parameter rather than computing it by itself. + (big_speedup_p, edge_badness): Manually CSE sreal + frequency calculations. + +2019-11-10 Jan Hubicka <hubicka@ucw.cz> + + * profile-count.c (profile_count::to_sreal_scale): Short circuit + case where profiles are same. + +2019-11-10 Jan Hubicka <hubicka@ucw.cz> + + * cgraph.c (cgraph_edge::maybe_hot_p): Do not use sreal_frequency. + +2019-11-10 Jan Hubicka <hubicka@ucw.cz> + + * ipa-prop.c (ipa_propagate_indirect_call_infos): Remove ipa edge + args summaries of inlined edge unless it holds info about + described reference. + +2019-11-10 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/rs6000.md (CC_any): New mode iterator. + (*movcc_internal1): Rename to... + (*movcc_<mode> for CC_any): ... this. Support moves of all CC modes. + +2019-11-09 Jan Hubicka <hubicka@ucw.cz> + + * cgraph.h (struct cgraph_node): Add ipcp_clone flag. + (cgraph_node::create_virtual_clone): Copy it. + * ipa-cp.c (ipcp_versionable_function_p): Watch for missing + summaries. + (ignore_edge_p): If caller has ipa-cp disabled, skip the edge, too. + (ipcp_verify_propagated_values): Do not verify nodes where ipcp + is disabled. + (propagate_constants_across_call): If callee is not analyzed, give up. + (propagate_constants_topo): Lower to bottom latties of all callees of + functions with ipa-cp disabled. + (ipcp_propagate_stage): Skip functions with ipa-cp disabled. + (cgraph_edge_brings_value_p): Check for availability first. + (create_specialized_node): Set ipcp_clone. + (ipcp_store_bits_results): Check that info is present. + * ipa-fnsummary.c (evaluate_properties_for_edge): Do not analyze + thunks. + (ipa_call_context::duplicate_from, ipa_call_context::equal_to): Be + conservative when callee summary is missing. + (remap_edge_summaries): Lookup call summary only when needed. + * ipa-icf.c (sem_function::param_used_p): Be ready for missing summary. + * ipa-prpo.c (ipa_alloc_node_params, ipa_initialize_node_params): + Use get_create. + (ipa_analyze_node): Use get_create. + (propagate_controlled_uses): Do not propagate when function is not + analyzed. + (ipa_propagate_indirect_call_infos): Remove summary of inline clone. + (ipa_read_node_info): Use get_create. + * ipa-prop.h (IPA_NODE_REF): Use get. + (IPA_NODE_REF_GET_CREATE): New. + +2019-11-09 Jan Hubicka <hubicka@ucw.cz> + + * ipa-fnsummary.c (evaluate_properties_for_edge): Call IPA_NODE_REF + on function symbol. + +2019-11-09 Jan Hubicka <hubicka@ucw.cz> + + * tree.c (fld_incomplete_type_of): Clear TYPE_FINAL_P, TYPE_EMPTY_P, + ENUM_IS_OPAQUE and ENUM_IS_SCOPED. + (free_lang_data_in_binfo): Clear TREE_PUBLIC in BINFO + (free_lang_data_in_type): Clear ENUM_IS_OPAQUE and ENUM_IS_SCOPED. + +2019-11-09 Jan Hubicka <hubicka@ucw.cz> + + * ipa-inline-analysis.c (do_estimate_growth_1): Add support for + capping the growth cumulated. + (offline_size): Break out from ... + (estimate_growth): ... here. + (check_callers): Add N, OFFLINE and MIN_SIZE and KNOWN_EDGE + parameters. + (growth_likely_positive): Turn to ... + (growth_positive_p): Re-implement. + * ipa-inline.h (growth_likely_positive): Remove. + (growth_positive_p): Declare. + * ipa-inline.c (want_inline_small_function_p): Use + growth_positive_p. + (want_inline_function_to_all_callers_p): Likewise. + +2019-11-09 Jan Hubicka <hubicka@ucw.cz> + + * ipa-fnsummary.c (ipa_call_context::estimate_size_and_time): Fix + calculation of min_size. + (ipa_update_overall_fn_summary): Likewise. + +2019-11-09 Jan Hubicka <hubicka@ucw.cz> + + * ipa-fnsummary.c (estimate_edge_size_and_time): Do not call + estimate_edge_devirt_benefit when not computing hints; + do not compute time when not asked for. + (estimate_calls_size_and_time): Pass NULL hints and time when + these are not computed; do not evaluate hint predicates when these are + not computed. + (ipa_merge_fn_summary_after_inlining): Do not re-evaluate edge + frequency. + +2019-11-09 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/92401 + * gimple-match-head.c (gimple_resimplify1): Call const_unop only + if res_op->code is an expression with code length 1. + * gimple-match-head.c (gimple_resimplify2): Call const_binop only + if res_op->code is an expression with code length 2. + * gimple-match-head.c (gimple_resimplify3): Call fold_ternary only + if res_op->code is an expression with code length 3. + +2019-11-09 Iain Sandoe <iain@sandoe.co.uk> + + * config/darwin.c (machopic_mcount_stub_name): Validate the + symbol stub name when it is created. + * config/i386/darwin.h (FUNCTION_PROFILER): Remove the symbol + stub validation. + +2019-11-09 Jakub Jelinek <jakub@redhat.com> + + * symtab.c: Fix comment typos. + * cgraphunit.c: Likewise. + * cgraph.h: Likewise. + * cgraphclones.c: Likewise. + * cgraph.c: Likewise. + * varpool.c: Likewise. + * tree-ssa-strlen.c: Likewise. + * ipa-sra.c: Likewise. + (scan_expr_access, check_all_callers_for_issues): Fix typo + in a dump message. + +2019-11-08 Iain Sandoe <iain@sandoe.co.uk> + + * config/darwin-protos.h: Add include quard. + +2019-11-08 Andrew MacLeod <amacleod@redhat.com> + + * range-op.h (range_operator::fold_range): Return result in a + reference parameter instead of by value. + (range_operator::wi_fold): Same. + * range-op.cc (range_operator::wi_fold): Return result in a reference + parameter instead of by value. + (range_operator::fold_range): Same. + (value_range_from_overflowed_bounds): Same. + (value_range_with_overflow): Same + (create_possibly_reversed_range): Same. + (operator_equal::fold_range): Same. + (operator_not_equal::fold_range): Same. + (operator_lt::fold_range): Same. + (operator_le::fold_range): Same. + (operator_gt::fold_range): Same. + (operator_ge::fold_range): Same. + (operator_plus::wi_fold): Same. + (operator_plus::op1_range): Change call to fold_range. + (operator_plus::op2_range): Change call to fold_range. + (operator_minus::wi_fold): Return result via reference parameter. + (operator_minus::op1_range): Change call to fold_range. + (operator_minus::op2_range): Change call to fold_range. + (operator_min::wi_fold): Return result via reference parameter. + (operator_max::wi_fold): Same. + (cross_product_operator::wi_cross_product): Same. + (operator_mult::wi_fold): Same. + (operator_div::wi_fold): Same. + (operator_div op_floor_div): Fix whitespace. + (operator_exact_divide::op1_range): Change call to fold_range. + (operator_lshift::fold_range): Return result via reference parameter. + (operator_lshift::wi_fold): Same. + (operator_rshift::fold_range): Same. + (operator_rshift::wi_fold): Same. + (operator_cast::fold_range): Same. + (operator_cast::op1_range): Change calls to fold_range. + (operator_logical_and::fold_range): Return result via reference. + (wi_optimize_and_or): Adjust call to value_range_with_overflow. + (operator_bitwise_and::wi_fold): Return result via reference. + (operator_logical_or::fold_range): Same. + (operator_bitwise_or::wi_fold): Same. + (operator_bitwise_xor::wi_fold): Same. + (operator_trunc_mod::wi_fold): Same. + (operator_logical_not::fold_range): Same. + (operator_bitwise_not::fold_range): Same. + (operator_bitwise_not::op1_range): Change call to fold_range. + (operator_cst::fold_range): Return result via reference. + (operator_identity::fold_range): Same. + (operator_abs::wi_fold): Same. + (operator_absu::wi_fold): Same. + (operator_negate::fold_range): Same. + (operator_negate::op1_range): Change call to fold_range. + (operator_addr_expr::fold_range): Return result via reference. + (operator_addr_expr::op1_range): Change call to fold_range. + (operator_pointer_plus::wi_fold): Return result via reference. + (operator_pointer_min_max::wi_fold): Same. + (operator_pointer_and::wi_fold): Same. + (operator_pointer_or::wi_fold): Same. + (range_op_handler): Change call to fold_range. + (range_cast): Same. + * tree-vrp.c (range_fold_binary_symbolics_p): Change call to + fold_range. + (range_fold_unary_symbolics_p): Same. + (range_fold_binary_expr): Same. + (range_fold_unary_expr): Same. + +2019-11-08 Richard Sandiford <richard.sandiford@arm.com> + + * tree-vect-loop.c (neutral_op_for_slp_reduction): Take the + vector type as an argument rather than reading it from the + stmt_vec_info. + (vect_create_epilog_for_reduction): Update accordingly. + (vectorizable_reduction): Likewise. + (vect_transform_cycle_phi): Likewise. + +2019-11-08 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/predicates.md (branch_comparison_operator): Allow only + the comparison codes that make sense for the mode used, and only the + codes that can be done with a single branch instruction. + +2019-11-08 Andre Vieira <andre.simoesdiasvieira@arm.com> + + PR tree-optimization/92351 + * tree-vect-data-refs.c (vect_compute_data_ref_alignment): When we are + peeling the main loop for alignment, make sure to set the misalignment + of the epilogue's data references to DR_MISALIGNMENT_UNKNOWN. + +2019-11-08 Richard Biener <rguenther@suse.de> + + * dbgcnt.def (ivopts_loop): Add. + * tree-ssa-loop-ivopts.c (tree_ssa_iv_optimize): Check + ivopts_loop before optimizing a loop. + +2019-11-08 Richard Biener <rguenther@suse.de> + + PR ipa/92409 + * tree-inline.c (declare_return_variable): Properly handle + type mismatches for the return slot. + +2019-11-08 Eric Botcazou <ebotcazou@adacore.com> + + PR target/92095 + * config/sparc/sparc-protos.h (output_load_pcrel_sym): Declare. + * config/sparc/sparc.c (sparc_cannot_force_const_mem): Revert latest + change. + (got_helper_needed): New static variable. + (output_load_pcrel_sym): New function. + (get_pc_thunk_name): Remove after inlining... + (load_got_register): ...here. Rework the initialization of the GOT + register and of the GOT helper. + (save_local_or_in_reg_p): Test the REGNO of the GOT register. + (sparc_file_end): Test got_helper_needed to decide whether the GOT + helper must be emitted. Use output_asm_insn instead of fprintf. + (sparc_init_pic_reg): In PIC mode, always initialize the PIC register + if optimization is enabled. + * config/sparc/sparc.md (load_pcrel_sym<P:mode>): Emit the assembly + by calling output_load_pcrel_sym. + +2019-11-08 Richard Sandiford <richard.sandiford@arm.com> + + * tree-sra.c (create_access): Delay disqualifying the base + for poly_int values until we know we have a base. + +2019-11-08 Andre Vieira <andre.simoesdiasvieira@arm.com> + + * tree-vect-loop.c (vect_analyze_loop): Disable epilogue vectorization + for loops with SIMDUID set. Enable epilogue vectorization for loops + with SIMDLEN set after finding a main loop with a VF that matches it. + +2019-11-08 Jakub Jelinek <jakub@redhat.com> + + PR target/92038 + * gimple-ssa-store-merging.c (find_constituent_stores): For return + value only, return non-NULL if there is a single non-clobber + constituent store even if there are constituent clobbers and return + one of clobber constituent stores if all constituent stores are + clobbers. + (split_group): Handle clobbers. + (imm_store_chain_info::output_merged_store): When computing + bzero_first, look after all clobbers at the start. Don't count + clobber stmts in orig_num_stmts, except if the first orig store is + a clobber covering the whole area and split_stores cover the whole + area, consider equal number of stmts ok. Punt if split_stores + contains only ->orig stores and their number plus number of original + clobbers is equal to original number of stmts. For ->orig, look past + clobbers in the constituent stores. + (imm_store_chain_info::output_merged_stores): Don't remove clobber + stmts. + (rhs_valid_for_store_merging_p): Don't return false for clobber stmt + rhs. + (store_valid_for_store_merging_p): Allow clobber stmts. + (verify_clear_bit_region_be): Fix up a thinko in function comment. + + PR c++/92384 + * function.c (assign_parm_setup_block, assign_parm_setup_stack): Don't + copy TYPE_EMPTY_P arguments from data->entry_parm to data->stack_parm + slot. + (assign_parms): For TREE_ADDRESSABLE parms with TYPE_EMPTY_P type + force creation of a unique data.stack_parm slot. + +2019-11-08 Richard Biener <rguenther@suse.de> + + * genmatch.c (expr::gen_transform): Use the resimplify + member function instead of hard-coding the gimple_resimplifyN variant. + (dt_simplify::gen_1): Likewise. + +2019-11-08 Richard Sandiford <richard.sandiford@arm.com> + + * tree-ssa-sccvn.c (copy_reference_ops_from_ref): Handle + POLY_INT_CST. + +2019-11-08 Richard Sandiford <richard.sandiford@arm.com> + + * tree-inline.c (declare_return_variable): Check for poly_int_tree_p + instead of INTEGER_CST. + +2019-11-08 Richard Biener <rguenther@suse.de> + + PR tree-optimization/92324 + * tree-vect-loop.c (vect_create_epilog_for_reduction): Use + STMT_VINFO_REDUC_VECTYPE for all computations, inserting + sign-conversions as necessary. + (vectorizable_reduction): Reject conversions in the chain + that are not sign-conversions, base analysis on a non-converting + stmt and its operation sign. Set STMT_VINFO_REDUC_VECTYPE. + * tree-vect-stmts.c (vect_stmt_relevant_p): Don't dump anything + for debug stmts. + * tree-vectorizer.h (_stmt_vec_info::reduc_vectype): New. + (STMT_VINFO_REDUC_VECTYPE): Likewise. + +2019-11-08 Georg-Johann Lay <avr@gjlay.de> + + PR target/92055 + * config/avr/avr.opt (-mdouble=, -mlong-double=): + Fix a missing '-' when displaying these options in the + help screen. + +2019-11-08 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/iterators.md (SVE_BH, SVE_BHS): Delete. + +2019-11-08 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/aarch64-builtins.c + (aarch64_builtin_vectorized_function): Remove bswap handling. + +2019-11-08 Richard Sandiford <richard.sandiford@arm.com> + + * tree-core.h (tree_type_common::indivisible_p): New member variable. + * tree.h (TYPE_INDIVISIBLE_P): New macro. + * config/aarch64/aarch64-sve-builtins.cc (register_builtin_types): + Treat the vector types as indivisible. + +2019-11-08 Richard Sandiford <richard.sandiford@arm.com> + + * optabs.def (gather_load_optab, mask_gather_load_optab) + (scatter_store_optab, mask_scatter_store_optab): Turn into + conversion optabs, with the offset mode given explicitly. + * doc/md.texi: Update accordingly. + * config/aarch64/aarch64-sve-builtins-base.cc + (svld1_gather_impl::expand): Likewise. + (svst1_scatter_impl::expand): Likewise. + * internal-fn.c (gather_load_direct, scatter_store_direct): Likewise. + (expand_scatter_store_optab_fn): Likewise. + (direct_gather_load_optab_supported_p): Likewise. + (direct_scatter_store_optab_supported_p): Likewise. + (expand_gather_load_optab_fn): Likewise. Expect the mask argument + to be argument 4. + (internal_fn_mask_index): Return 4 for IFN_MASK_GATHER_LOAD. + (internal_gather_scatter_fn_supported_p): Replace the offset sign + argument with the offset vector type. Require the two vector + types to have the same number of elements but allow their element + sizes to be different. Treat the optabs as conversion optabs. + * internal-fn.h (internal_gather_scatter_fn_supported_p): Update + prototype accordingly. + * optabs-query.c (supports_at_least_one_mode_p): Replace with... + (supports_vec_convert_optab_p): ...this new function. + (supports_vec_gather_load_p): Update accordingly. + (supports_vec_scatter_store_p): Likewise. + * tree-vectorizer.h (vect_gather_scatter_fn_p): Take a vec_info. + Replace the offset sign and bits parameters with a scalar type tree. + * tree-vect-data-refs.c (vect_gather_scatter_fn_p): Likewise. + Pass back the offset vector type instead of the scalar element type. + Allow the offset to be wider than the memory elements. Search for + an offset type that the target supports, stopping once we've + reached the maximum of the element size and pointer size. + Update call to internal_gather_scatter_fn_supported_p. + (vect_check_gather_scatter): Update calls accordingly. + When testing a new scale before knowing the final offset type, + check whether the scale is supported for any signed or unsigned + offset type. Check whether the target supports the source and + target types of a conversion before deciding whether to look + through the conversion. Record the chosen offset_vectype. + * tree-vect-patterns.c (vect_get_gather_scatter_offset_type): Delete. + (vect_recog_gather_scatter_pattern): Get the scalar offset type + directly from the gs_info's offset_vectype instead. Pass a zero + of the result type to IFN_GATHER_LOAD and IFN_MASK_GATHER_LOAD. + * tree-vect-stmts.c (check_load_store_masking): Update call to + internal_gather_scatter_fn_supported_p, passing the offset vector + type recorded in the gs_info. + (vect_truncate_gather_scatter_offset): Update call to + vect_check_gather_scatter, leaving it to search for a valid + offset vector type. + (vect_use_strided_gather_scatters_p): Convert the offset to the + element type of the gs_info's offset_vectype. + (vect_get_gather_scatter_ops): Get the offset vector type directly + from the gs_info. + (vect_get_strided_load_store_ops): Likewise. + (vectorizable_load): Pass a zero of the result type to IFN_GATHER_LOAD + and IFN_MASK_GATHER_LOAD. + * config/aarch64/aarch64-sve.md (gather_load<mode>): Rename to... + (gather_load<mode><v_int_equiv>): ...this. + (mask_gather_load<mode>): Rename to... + (mask_gather_load<mode><v_int_equiv>): ...this. + (scatter_store<mode>): Rename to... + (scatter_store<mode><v_int_equiv>): ...this. + (mask_scatter_store<mode>): Rename to... + (mask_scatter_store<mode><v_int_equiv>): ...this. + +2019-11-08 Kewen Lin <linkw@gcc.gnu.org> + + PR target/92132 + * config/rs6000/predicates.md + (signed_or_equality_comparison_operator): New predicate. + (unsigned_or_equality_comparison_operator): Likewise. + * config/rs6000/rs6000.md (one_cmpl<mode>2): Remove expand. + (one_cmpl<mode>3_internal): Rename to one_cmpl<mode>2. + * config/rs6000/vector.md + (vcond_mask_<mode><mode> for VEC_I and VEC_I): New expand. + (vec_cmp<mode><mode> for VEC_I and VEC_I): Likewise. + (vec_cmpu<mode><mode> for VEC_I and VEC_I): Likewise. + (vcond_mask_<mode><VEC_int> for VEC_F): New expand for float + vector modes and same-size integer vector modes. + (vec_cmp<mode><VEC_int> for VEC_F): Likewise. + (vector_lt<mode> for VEC_F): New expand. + (vector_le<mode> for VEC_F): Likewise. + (vector_ne<mode> for VEC_F): Likewise. + (vector_unge<mode> for VEC_F): Likewise. + (vector_ungt<mode> for VEC_F): Likewise. + (vector_unle<mode> for VEC_F): Likewise. + (vector_unlt<mode> for VEC_F): Likewise. + (vector_uneq<mode>): Expose name. + (vector_ltgt<mode>): Likewise. + (vector_unordered<mode>): Likewise. + (vector_ordered<mode>): Likewise. + +2019-11-08 Hongtao Liu <Hongtao.liu@intel.com> + + PR target/92295 + * config/i386/i386-expand.c (ix86_expand_vector_init_concat) + Enhance ix86_expand_vector_init_concat. + +2019-11-08 Joseph Myers <joseph@codesourcery.com> + + * doc/invoke.texi (-Wold-style-definition): Document () not being + considered an old-style definition for C2x. + +2019-11-07 John David Anglin <danglin@gcc.gnu.org> + + * config/pa/pa.md (memory_barrier): Revise to use ldcw barriers. + Enhance comment. + (memory_barrier_coherent, memory_barrier_64, memory_barrier_32): New + insn patterns using ldcw instruction. + (memory_barrier): Remove insn pattern using sync instruction. + * config/pa/pa.opt (coherent-ldcw): New option. + (ordered): New option. + +2019-11-07 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/rs6000.c (validate_condition_mode): Don't assert for + valid conditions. + +2019-11-07 Jakub Jelinek <jakub@redhat.com> + + * ipa-utils.c (ipa_merge_profiles): Fix fprintf format string + typo - mistmatch -> mismatch. + * ipa-profile.c (ipa_profile): Likewise. + * ipa-devirt.c (compare_virtual_tables): Fix a comment typo + - mistmatch -> mismatch. + +2018-11-07 Segher Boessenkool <segher@kernel.crashing.org> + + * simplify-rtx.c (comparison_to_mask): New function. + (mask_to_comparison): New function. + (simplify_logical_relational_operation): New function. + (simplify_binary_operation_1): Call + simplify_logical_relational_operation. + +2019-11-07 Peter Bergner <bergner@linux.ibm.com> + + PR other/92090 + * config/rs6000/predicates.md (input_operand): Allow MODE_PARTIAL_INT + modes for integer constants. + +2019-11-07 Jan Hubicka <jh@suse.cz> + + PR ipa/92406 + * ipa-fnsummary.c (analyze_function_body): Use get_create to copy + summary. + +2019-11-07 Jan Hubicka <jh@suse.cz> + + * optc-save-gen.awk: Generate cl_target_option_free + and cl_optimization_option_free. + * opth-en.awk: Declare cl_target_option_free + and cl_optimization_option_free. + * tree.c (free_node): Use it. + +2019-11-06 Jan Hubicka <jh@suse.cz> + + * lto-streamer-in.c: Include alloc-pool.h. + (freeing_string_slot_hasher): Remove. + (string_slot_allocator): New object allocator. + (file_name_hash_table): Turn to hash_table<string_slot_hasher>. + (file_name_obstack): New obstack. + (canon_file_name): Allocate in obstack and allocator. + (lto_reader_init): Initialize obstack and allocator. + (lto_free_file_name_hash): New function. + * lto-streamer.h (lto_free_file_name_hash): New. + +2019-11-07 Feng Xue <fxue@os.amperecomputing.com> + + PR tree-optimization/89134 + * doc/invoke.texi (min-loop-cond-split-prob): Document new --params. + * params.def: Add min-loop-cond-split-prob. + * tree-ssa-loop-split.c (split_loop): Remove niter parameter, move some + outside checks on loop into the function. + (split_info): New class. + (find_vdef_in_loop, get_control_equiv_head_block): New functions. + (find_control_dep_blocks, vuse_semi_invariant_p): Likewise. + (ssa_semi_invariant_p, loop_iter_phi_semi_invariant_p): Likewise. + (control_dep_semi_invariant_p, stmt_semi_invariant_p_1): Likewise. + (stmt_semi_invariant_p, branch_removable_p): Likewise. + (get_cond_invariant_branch, compute_added_num_insns): Likewise. + (get_cond_branch_to_split_loop, do_split_loop_on_cond): Likewise. + (split_loop_on_cond): Likewise. + (tree_ssa_split_loops): Add loop split on conditional statement. + +2019-11-07 Andreas Krebbel <krebbel@linux.ibm.com> + + * config/s390/s390.md ("*cstorecc<mode>_z13"): New insn_and_split + pattern. + +2019-11-07 Richard Biener <rguenther@suse.de> + + PR tree-optimization/92405 + * tree-vect-loop.c (vectorizable_reduction): Appropriately + restrict lane-reducing ops to single stmt chains. + +2019-11-07 Martin Jambor <mjambor@suse.cz> + + PR lto/70929 + * cif-code.def (MISMATCHED_ARGUMENTS): Removed. + * cgraph.h (gimple_check_call_matching_types): Remove + * cgraph.c (gimple_check_call_args): Likewise. + (gimple_check_call_matching_types): Likewise. + (symbol_table::create_edge): Do not call + gimple_check_call_matching_types. + (cgraph_edge::make_direct): Likewise. + (cgraph_edge::redirect_call_stmt_to_callee): Likewise. + * value-prof.h (check_ic_target): Remove. + * value-prof.c (check_ic_target): Remove. + (gimple_ic_transform): Do nat call check_ic_target. + * auto-profile.c (function_instance::find_icall_target_map): Likewise. + (afdo_indirect_call): Likewise. + * ipa-prop.c (update_indirect_edges_after_inlining): Do not call + gimple_check_call_matching_types. + * ipa-inline.c (early_inliner): Likewise. + +2019-11-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/arm.md (arm_<simd32_op>): New define_expand. + (arm_<simd32_op><add_clobber_q_name>_insn): New define_insn. + * config/arm/arm_acle.h (__ssat16, __usat16): Define. + * config/arm/arm_acle_builtins.def: Define builtins for the above. + * config/arm/iterators.md (USSAT16): New int_iterator. + (simd32_op): Handle UNSPEC_SSAT16, UNSPEC_USAT16. + (sup): Likewise. + * config/arm/predicates.md (ssat16_imm): New predicate. + (usat16_imm): Likewise. + * config/arm/unspecs.md (UNSPEC_SSAT16, UNSPEC_USAT16): Define. + +2019-11-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/arm.md (arm_<simd32_op><add_clobber_q_name>_insn): + New define_insns. + (arm_<simd32_op>): New define_expands. + * config/arm/arm_acle.h (__smlad, __smladx, __smlsd, __smlsdx, + __smuad, __smuadx): Define. + * config/arm/arm_acle_builtins.def: Define builtins for the above. + * config/arm/iterators.md (SIMD32_TERNOP_Q): New int_iterator. + (SIMD32_BINOP_Q): Likewise. + (simd32_op): Handle the above. + * config/arm/unspecs.md: Define unspecs for the above. + +2019-11-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/aout.h (REGISTER_NAMES): Add apsrge. + * config/arm/arm.md (APSRGE_REGNUM): Define. + (arm_<simd32_op>): New define_insn. + (arm_sel): Likewise. + * config/arm/arm.h (FIXED_REGISTERS): Add entry for apsrge. + (CALL_USED_REGISTERS): Likewise. + (REG_ALLOC_ORDER): Likewise. + (FIRST_PSEUDO_REGISTER): Update value. + (ARM_GE_BITS_READ): Define. + * config/arm/arm.c (arm_conditional_register_usage): Clear + APSRGE_REGNUM from operand_reg_set. + (arm_ge_bits_access): Define. + * config/arm/arm-builtins.c (arm_check_builtin_call): Handle + ARM_BUIILTIN_sel. + * config/arm/arm-protos.h (arm_ge_bits_access): Declare prototype. + * config/arm/arm-fixed.md (add<mode>3): Convert to define_expand. + FAIL if ARM_GE_BITS_READ. + (*arm_add<mode>3): New define_insn. + (sub<mode>3): Convert to define_expand. FAIL if ARM_GE_BITS_READ. + (*arm_sub<mode>3): New define_insn. + * config/arm/arm_acle.h (__sel, __sadd8, __ssub8, __uadd8, __usub8, + __sadd16, __sasx, __ssax, __ssub16, __uadd16, __uasx, __usax, + __usub16): Define. + * config/arm/arm_acle_builtins.def: Define builtins for the above. + * config/arm/iterators.md (SIMD32_GE): New int_iterator. + (simd32_op): Handle the above. + * config/arm/unspecs.md (UNSPEC_GE_SET): Define. + (UNSPEC_SEL, UNSPEC_SADD8, UNSPEC_SSUB8, UNSPEC_UADD8, UNSPEC_USUB8, + UNSPEC_SADD16, UNSPEC_SASX, UNSPEC_SSAX, UNSPEC_SSUB16, UNSPEC_UADD16, + UNSPEC_UASX, UNSPEC_USAX, UNSPEC_USUB16): Define. + +2019-11-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/arm.md (arm_smlabb_setq): New define_insn. + (arm_smlabb): New define_expand. + (*maddhisi4tb): Rename to... + (maddhisi4tb): ... This. + (*maddhisi4tt): Rename to... + (maddhisi4tt): ... This. + (arm_smlatb_setq): New define_insn. + (arm_smlatb): New define_expand. + (arm_smlatt_setq): New define_insn. + (arm_smlatt): New define_expand. + (arm_<smlaw_op><add_clobber_name>_insn): New define_insn. + (arm_<smlaw_op>): New define_expand. + * config/arm/arm_acle.h (__smlabb, __smlatb, __smlabt, __smlatt, + __smlawb, __smlawt): Define. + * config/arm_acle_builtins.def: Define builtins for the above. + * config/arm/iterators.md (SMLAWBT): New int_iterator. + (slaw_op): New int_attribute. + * config/arm/unspecs.md (UNSPEC_SMLAWB, UNSPEC_SMLAWT): Define. + +2019-11-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/arm.md (arm_<ss_op>): New define_expand. + (arm_<ss_op><add_clobber_q_name>_insn): New define_insn. + * config/arm/arm_acle.h (__qadd, __qsub, __qdbl): Define. + * config/arm/arm_acle_builtins.def: Add builtins for qadd, qsub. + * config/arm/iterators.md (SSPLUSMINUS): New code iterator. + (ss_op): New code_attr. + +2019-11-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/aout.h (REGISTER_NAMES): Add apsrq. + * config/arm/arm.md (APSRQ_REGNUM): Define. + (add_setq): New define_subst. + (add_clobber_q_name): New define_subst_attr. + (add_clobber_q_pred): Likewise. + (maddhisi4): Change to define_expand. Split into mult and add if + ARM_Q_BIT_READ. + (arm_maddhisi4): New define_insn. + (*maddhisi4tb): Disable for ARM_Q_BIT_READ. + (*maddhisi4tt): Likewise. + (arm_ssat): New define_expand. + (arm_usat): Likewise. + (arm_get_apsr): New define_insn. + (arm_set_apsr): Likewise. + (arm_saturation_occurred): New define_expand. + (arm_set_saturation): Likewise. + (*satsi_<SAT:code>): Rename to... + (satsi_<SAT:code><add_clobber_q_name>): ... This. + (*satsi_<SAT:code>_shift): Disable for ARM_Q_BIT_READ. + * config/arm/arm.h (FIXED_REGISTERS): Mark apsrq as fixed. + (CALL_USED_REGISTERS): Mark apsrq. + (FIRST_PSEUDO_REGISTER): Update value. + (REG_ALLOC_ORDER): Add APSRQ_REGNUM. + (machine_function): Add q_bit_access. + (ARM_Q_BIT_READ): Define. + * config/arm/arm.c (TARGET_CHECK_BUILTIN_CALL): Define. + (arm_conditional_register_usage): Clear APSRQ_REGNUM from + operand_reg_set. + (arm_q_bit_access): Define. + * config/arm/arm-builtins.c: Include stringpool.h. + (arm_sat_binop_imm_qualifiers, + arm_unsigned_sat_binop_unsigned_imm_qualifiers, + arm_sat_occurred_qualifiers, arm_set_sat_qualifiers): Define. + (SAT_BINOP_UNSIGNED_IMM_QUALIFIERS, + UNSIGNED_SAT_BINOP_UNSIGNED_IMM_QUALIFIERS, SAT_OCCURRED_QUALIFIERS, + SET_SAT_QUALIFIERS): Likewise. + (arm_builtins): Define ARM_BUILTIN_SAT_IMM_CHECK. + (arm_init_acle_builtins): Initialize __builtin_sat_imm_check. + Handle 0 argument expander. + (arm_expand_acle_builtin): Handle ARM_BUILTIN_SAT_IMM_CHECK. + (arm_check_builtin_call): Define. + * config/arm/arm.md (ssmulsa3, usmulusa3, usmuluha3, + arm_ssatsihi_shift, arm_usatsihi): Disable when ARM_Q_BIT_READ. + * config/arm/arm-protos.h (arm_check_builtin_call): Declare prototype. + (arm_q_bit_access): Likewise. + * config/arm/arm_acle.h (__ssat, __usat, __ignore_saturation, + __saturation_occurred, __set_saturation_occurred): Define. + * config/arm/arm_acle_builtins.def: Define builtins for ssat, usat, + saturation_occurred, set_saturation_occurred. + * config/arm/unspecs.md (UNSPEC_Q_SET): Define. + (UNSPEC_APSR_READ): Likewise. + (VUNSPEC_APSR_WRITE): Likewise. + * config/arm/arm-fixed.md (ssadd<mode>3): Convert to define_expand. + (*arm_ssadd<mode>3): New define_insn. + (sssub<mode>3): Convert to define_expand. + (*arm_sssub<mode>3): New define_insn. + (ssmulsa3): Convert to define_expand. + (*arm_ssmulsa3): New define_insn. + (usmulusa3): Convert to define_expand. + (*arm_usmulusa3): New define_insn. + (ssmulha3): FAIL if ARM_Q_BIT_READ. + (arm_ssatsihi_shift, arm_usatsihi): Disable for ARM_Q_BIT_READ. + * config/arm/iterators.md (qaddsub_clob_q): New mode attribute. + +2019-11-07 Martin Liska <mliska@suse.cz> + + PR c++/92354 + * cgraph.c (delete_function_version): Clear global + variable version_info_node if equal to deleted + function. + +2019-11-07 Martin Liska <mliska@suse.cz> + + * fold-const.c (operand_compare::operand_equal_p): Add comparison + of CONSTRUCTOR_NO_CLEARING. + (operand_compare::hash_operand): Likewise. + +2019-11-07 Georg-Johann Lay <avr@gjlay.de> + + Support 64-bit double and 64-bit long double configurations. + + PR target/92055 + * config.gcc (tm_defines) [avr]: Set from --with-double=, + --with-long-double=. + * config/avr/t-multilib: Remove. + * config/avr/t-avr: Output of genmultilib.awk is now fully + dynamically generated and no more part of the repo. + (HAVE_DOUBLE_MULTILIB, HAVE_LONG_DOUBLE_MULTILIB): New variables. + Pass them down to... + * config/avr/genmultilib.awk: ...here and handle them. + * config/avr/avr.opt (-mdouble=, avr_double). New option and var. + (-mlong-double=, avr_long_double). New option and var. + * common/config/avr/avr-common.c (opts.h, diagnostic.h): Include. + (TARGET_OPTION_OPTIMIZATION_TABLE) <-mdouble=, -mlong-double=>: + Set default as requested by --with-double= + (TARGET_HANDLE_OPTION): Define to this... + (avr_handle_option): ...new hook worker. + * config/avr/avr.h (DOUBLE_TYPE_SIZE): Define to avr_double. + (LONG_DOUBLE_TYPE_SIZE): Define to avr_long_double. + (avr_double_lib): New proto for spec function. + (EXTRA_SPEC_FUNCTIONS) <double-lib>: Add. + (DRIVER_SELF_SPECS): Call %:double-lib. + * config/avr/avr.c (avr_option_override): Assert + sizeof(long double) >= sizeof(double) for the target. + * config/avr/avr-c.c (avr_cpu_cpp_builtins) + [__HAVE_DOUBLE_MULTILIB__, __HAVE_LONG_DOUBLE_MULTILIB__] + [__HAVE_DOUBLE64__, __HAVE_DOUBLE32__, __DEFAULT_DOUBLE__=] + [__HAVE_LONG_DOUBLE64__, __HAVE_LONG_DOUBLE32__] + [__HAVE_LONG_DOUBLE_IS_DOUBLE__, __DEFAULT_LONG_DOUBLE__=]: + New built-in define depending on --with-double=, --with-long-double=. + * config/avr/driver-avr.c (avr_double_lib): New spec function. + * doc/invoke.tex (AVR Options) <-mdouble=,-mlong-double=>: Doc. + * doc/install.texi (Cross-Compiler-Specific Options) + <--with-double=, --with-long-double=>: Doc. + +2019-11-07 Richard Biener <rguenther@suse.de> + + * dbgcnt.def (gimple_unroll): New. + * tree-ssa-loop-ivcanon.c (try_unroll_loop_completely): Check + gimple_unroll debug counter before applying transform. + (try_peel_loop): Likewise. + +2019-11-07 Kwok Cheung Yeung <kcy@codesourcery.com> + + * ira.c (setup_alloc_regs): Setup no_unit_alloc_regs for + frame pointer in multiple registers. + (ira_setup_eliminable_regset): Setup eliminable_regset, + ira_no_alloc_regs and regs_ever_live for frame pointer in + multiple registers. + +2019-11-06 Kelvin Nilsen <kelvin@gcc.gnu.org> + + * config/rs6000/vsx.md (xxswapd_<mode>): Add support for V2DF and + V2DI modes. + +2019-11-06 Jan Hubicka <jh@suse.cz> + + * ggc-common.c (ggc_prune_overhead_list): Do not delete surviving + allocations. + * mem-stats.h (mem_alloc_description<T>::release_object_overhead): + Do not silently ignore summary corruptions. + +2019-11-06 Richard Sandiford <richard.sandiford@arm.com> + + * tree-vect-loop.c (vect_analyze_loop): Only try to vectorize + the epilogue if there are peeled iterations for it to handle. + +2019-11-06 Claudiu Zissulescu <claziss@synopsys.com> + + * config/arc/arc.c (arc_split_ior): Add asserts. + (arc_split_mov_const): Likewise. + (arc_check_ior_const): Do not match known short immediate values. + * config/arc/arc.md (movsi): Don't split predicated instructions + (iorsi): Likewise. + +2019-11-06 Claudiu Zissulescu <claziss@synopsys.com> + + * config/arc/arc.opt (mea): Update help string. + * doc/invoke.texi(ARC): Update mea option info. + +2019-11-06 Claudiu Zissulescu <claziss@synopsys.com> + + * config/arc/arc.md (zero_extendqihi2_i): Cleanup pattern. + (zero_extendqisi2_ac): Likewise. + (zero_extendhisi2_i): Likewise. + (extendqihi2_i): Likewise. + (extendqisi2_ac): Likewise. + (extendhisi2_i): Likewise. + +2019-11-06 Richard Biener <rguenther@suse.de> + + * tree-vect-loop.c (vectorizable_reduction): Remember reduction + PHI. Use STMT_VINFO_REDUC_IDX to skip the reduction operand. + Simplify single_defuse_cycle condition. + +2019-11-06 Richard Sandiford <richard.sandiford@arm.com> + + * tree-vect-loop.c (vect_analyze_loop_2): When vectorizing an + epilogue loop, make sure that the VF is small enough or that + the epilogue loop can be fully-masked. + +2019-11-06 Richard Sandiford <richard.sandiford@arm.com> + + * tree-vect-loop.c (vect_analyze_loop): Break out of the main + loop when we've finished, rather than returning directly from + the loop. Use a local variable to track whether we're still + searching for the preferred simdlen. Make vect_epilogues + record whether the next iteration should try to treat the + loop as an epilogue. + +2019-11-06 Vineet Gupta <vgupta@synopsys.com> + + * config/arc/arc-c.c (arc_cpu_cpp_builtins) : Add + __arc_hard_float__, __ARC_HARD_FLOAT__, + __arc_soft_float__, __ARC_SOFT_FLOAT__ + +2019-11-06 Andre Vieira <andre.simoesdiasvieira@arm.com> + + PR tree-optimization/92317 + * tree-vect-loop-manip.c (slpeel_update_phi_nodes_for_guard2): Also + update phi's with constant phi arguments. + +2019-11-06 Eric Botcazou <ebotcazou@adacore.com> + Alexandre Oliva <oliva@adacore.com> + + * common.opt (-fcallgraph-info[=]): New option. + * doc/invoke.texi (Developer options): Document it. + * opts.c (common_handle_option): Handle it. + * builtins.c (expand_builtin_alloca): Record allocation if + -fcallgraph-info=da. + * calls.c (expand_call): If -fcallgraph-info, record the call. + (emit_library_call_value_1): Likewise. + * flag-types.h (enum callgraph_info_type): New type. + * explow.c: Include stringpool.h. + (set_stack_check_libfunc): Set SET_SYMBOL_REF_DECL on the symbol. + * function.c (allocate_stack_usage_info): New. + (allocate_struct_function): Call it for -fcallgraph-info. + (prepare_function_start): Call it otherwise. + (record_final_call, record_dynamic_alloc): New. + * function.h (struct callinfo_callee): New. + (CALLEE_FROM_CGRAPH_P): New. + (struct callinfo_dalloc): New. + (struct stack_usage): Add callees and dallocs. + (record_final_call, record_dynamic_alloc): Declare. + * gimplify.c (gimplify_decl_expr): Record dynamically-allocated + object if -fcallgraph-info=da. + * optabs-libfuncs.c (build_libfunc_function): Keep SYMBOL_REF_DECL. + * print-tree.h (print_decl_identifier): Declare. + (PRINT_DECL_ORIGIN, PRINT_DECL_NAME, PRINT_DECL_UNIQUE_NAME): New. + * print-tree.c: Include print-tree.h. + (print_decl_identifier): New function. + * toplev.c: Include print-tree.h. + (callgraph_info_file): New global variable. + (callgraph_info_external_printed): Likewise. + (output_stack_usage): Rename to... + (output_stack_usage_1): ... this. Make it static, add cf + parameter. If -fcallgraph-info=su, print stack usage to cf. + If -fstack-usage, use print_decl_identifier for + pretty-printing. + (INDIRECT_CALL_NAME): New. + (dump_final_node_vcg_start): New. + (dump_final_callee_vcg, dump_final_node_vcg): New. + (output_stack_usage): New. + (lang_dependent_init): Open and start file if + -fcallgraph-info. Allocated callgraph_info_external_printed. + (finalize): If callgraph_info_file is not null, finish it, + close it, and release callgraph_info_external_printed. + +2019-11-06 Gergö Barany <gergo@codesourcery.com> + Frederik Harwath <frederik@codesourcery.com> + Thomas Schwinge <thomas@codesourcery.com> + + * omp-low.c (struct omp_context): New fields + local_reduction_clauses, outer_reduction_clauses. + (new_omp_context): Initialize these. + (scan_sharing_clauses): Record reduction clauses on OpenACC constructs. + (scan_omp_for): Check reduction clauses for incorrect nesting. + +2019-11-06 Jakub Jelinek <jakub@redhat.com> + + PR inline-asm/92352 + * gimplify.c (gimplify_asm_expr): Reject VLA in output or input + operands with non-memory constraints. + +2019-11-05 Martin Sebor <msebor@redhat.com> + + PR tree-optimization/92373 + * tree.c (component_ref_size): Only consider initializers of objects + of matching struct types. + Return null for instances of interior zero-length arrays. + +2019-11-05 Segher Boessenkool <segher@kernel.crashing.org> + + * doc/md.texi (Insn Splitting): Fix combiner documentation. + +2019-11-05 Jason Merrill <jason@redhat.com> + + PR tree-optimization/91825 + * expmed.c: Reduce -Wmaybe-uninitialized to warning. + +2019-11-05 Jim Wilson <jimw@sifive.com> + + PR middle-end/92263 + * expr.c (emit_move_complex): Only use BLOCK_OP_NO_LIBCALL when + optimize_insn_for_speed_p is true. + +2019-11-05 Martin Sebor <msebor@redhat.com> + + PR middle-end/92333 + PR middle-end/82608 + * tree-vrp.c (vrp_prop::check_array_ref): Handle VLAs with constant + size. + * tree-ssa-ccp.c (fold_builtin_alloca_with_align): Use a meaninful + name and location for a temporary variable. + +2019-11-05 Aldy Hernandez <aldyh@redhat.com> + + * tree-vrp.c (value_range::value_range): Fix whitespace. + (defined_ranges_p): Same. + (range_fold_binary_symbolics_p): Same. + (value_range::intersect_helper): Same. + (value_range::union_helper): Same. + * tree-vrp.h (range_fold_binary_expr): Same. + +2019-11-04 Martin Sebor <msebor@redhat.com> + + PR middle-end/92341 + PR middle-end/82612 + * tree-sra.c (get_access_for_expr): Fail for out-of-bounds offsets. + * tree-vrp.c (vrp_prop::check_array_ref): Correct index and text + of message printed in a warning for empty arrays. + (vrp_prop::check_mem_ref): Also handle function parameters and + empty arrays. + +2019-11-05 Richard Biener <rguenther@suse.de> + + PR tree-optimization/92371 + * tree-vect-loop.c (vectorizable_reduction): Set STMT_VINFO_REDUC_DEF + on the original stmt of live stmts in the chain. + (vectorizable_live_operation): Look at the original stmt when + checking STMT_VINFO_REDUC_DEF. + +2019-11-05 Aldy Hernandez <aldyh@redhat.com> + + * gimple-fold.c, gimple-loop-versioning.cc, + gimple-ssa-evrp-analyze.[ch], gimple-ssa-evrp.c, + gimple-ssa-sprintf.c, ipa-cp.c, ipa-prop.c, ipa-prop.h, + range-op.[hc]*, range.[hc]*, selftest.h, tree-ssa-dom.c, + tree-ssa-strlen.c, tree-ssa-threadedge.c, tree-ssanames.[hc], + tree-vrp.[hc], vr-values.[hc]: Global rename of value_range to + value_range_equiv, and value_range_base to value_range. + +2019-11-05 Matthew Malcomson <matthew.malcomson@arm.com> + + * expr.c (build_personality_function): Fix generated type to + match actual personality functions. + +2019-11-05 Matthew Malcomson <matthew.malcomson@arm.com> + + * config/aarch64/aarch64.c (aarch64_handle_attr_cpu): Allocate + enough bytes for the NULL character. + +2019-11-05 Richard Biener <rguenther@suse.de> + + PR tree-optimization/92280 + * match.pd (BIT_FIELD_REF of CTOR): Unless the original CTOR + had a single use do not create a new CTOR. + * tree-ssa-forwprop.c (simplify_bitfield_ref): Do not re-fold + BIT_FIELD_REF of a CTOR via GENERIC. + +2019-11-05 Andreas Krebbel <krebbel@linux.ibm.com> + + * config/s390/s390.c (s390_vector_alignment): Check if the value + fits into uhwi before using it. + +2019-11-05 Martin Liska <mliska@suse.cz> + + * symbol-summary.h: Use ggc_delete. + +2019-11-05 Anton Youdkevitch <anton.youdkevitch@bell-sw.com> + + * config/aarch64/aarch64.c (thunderx2t99_vector_cost): + Change vec_perm field to 10. + +2019-11-05 Arnaud Charlet <charlet@adacore.com> + + * doc/install.texi: Further fix syntax for html generation. + +2019-11-05 Martin Liska <mliska@suse.cz> + + * symbol-summary.h: Rename allocator to m_allocator and + add comment. + +2019-11-05 Richard Biener <rguenther@suse.de> + + PR tree-optimization/92324 + * tree-vect-loop.c (check_reduction_path): For MIN/MAX require + all signed or unsigned operations. + +2019-11-05 Jan Hubicka <jh@suse.cz> + + * hsa-brig.c: Include alloc-pool.h + * hsa-dump.c: Likewise. + * hsa-gen.c: Likewise. + * hse-regalloc.c: Likewise. + * ipa-hsa.c: Likewise. + * ipa-predicate.c: Likewise. + * ipa-reference.c: Likewise. + * ipa-sra.c: Likewise. + * omp-expand.c: Likewise. + * omp-general.c: Likewise. + * omp-low.c: Likewise. + * sumbol-summary.h (function_summary_base): Add allocator. + (function_summary<T *>::function_summary): Update construction. + (fast_function_summary<T *, V>::fast_function_summary): Likewise. + (call_summary_base): Add allcator. + (call_summary<T *>::call_summary): Update construction. + (fast_call_summary<T *, V>::fast_call_summary): Likewise. + +2019-11-05 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/91945 + * builtins.c (compute_objsize): For ARRAY_REF, only multiply off + by tpsize if it is both non-NULL and INTEGER_CST, otherwise punt. + Formatting fix. + +2019-11-05 Aldy Hernandez <aldyh@redhat.com> + + * range-op.cc (wi_set_zero_nonzero_bits): Remove static qualifier. + * range-op.h (wi_set_zero_nonzero_bits): New prototype. + * tree-vrp.h (vrp_set_zero_nonzero_bits): Remove. + * tree-vrp.c (wide_int_range_set_zero_nonzero_bits): Remove. + (vrp_set_zero_nonzero_bits): Move to... + * vr-values.c (vr_set_zero_nonzero_bits): ...here. + (vr_values::simplify_bit_ops_using_ranges): Rename + vrp_set_zero_nonzero_bits to vr_set_zero_nonzero_bits. + +2019-11-05 Martin Liska <mliska@suse.cz> + + PR c++/92339 + * fold-const.c (operand_compare::hash_operand): Remove + FIELD_DECL handling. + +2019-11-05 Aldy Hernandez <aldyh@redhat.com> + + * tree-vrp.h (vrp_bitmap_equal_p): Remove. + * tree-vrp.c (vrp_bitmap_equal_p): Move before use and make + static. + +2019-11-05 Aldy Hernandez <aldyh@redhat.com> + + * tree-vrp.c (value_range_base::operator==): Use equal_p to + properly handle symbolics. + (range_compatible_p): Remove. + +2019-11-04 Kamlesh Kumar <kamleshbhalui@gmail.com> + + * common.opt (-fabi-version): Document =14. + * doc/invoke.texi (C++ Dialect Options): Likewise. + +2019-11-04 Aldy Hernandez <aldyh@redhat.com> + + * tree-vrp.c (value_range_base::set): Do not special case pointers. + +2019-11-04 Tobias Burnus <tobias@codesourcery.com> + + * config/gcn/gcn.c (gcn_omp_device_kind_arch_isa): New function. + (TARGET_OMP_DEVICE_KIND_ARCH_ISA): Redefine to + gcn_omp_device_kind_arch_isa. + * config/gcn/t-omp-device: New file. + * configure.ac: Support gcn for omp_device_property. + * configure: Regenerate. + +2019-11-04 Aldy Hernandez <aldyh@redhat.com> + + * tree-vrp.h (vrp_val_min): Remove handle_pointers argument. + (vrp_val_max): Same. + (vrp_val_is_min): Same. + (vrp_val_is_max): Same. + (value_range_base::nonzero_p): Remove last argument to + vrp_val_is_max. + * tree-vrp.c (vrp_val_min): Remove handle_pointers argument. + (vrp_val_max): Same. + (vrp_val_is_min): Same. + (vrp_val_is_max): Same. + (value_range_base::set_varying): Remove last argument to vrp_val*. + (value_range_base::dump): Same. + (value_range_base::set): Same. + (value_range_base::normalize_symbolics): Same. + (value_range_base::num_pairs): Same. + (value_range_base::lower_bound): Same. + (value_range_base::upper_bound): Same. + (ranges_from_anti_range): Remove handle_pointers argument. + (value_range_base::singleton_p): Remove last argument to + ranges_from_anti_range. + +2019-11-04 Jan Hubicka <jh@suse.cz> + + * ipa-reference.c (init_function_info): Initialize + info->global.statics_read. + +2019-11-04 Aldy Hernandez <aldyh@redhat.com> + + * tree-vrp.c (value_range_base::invert): Use constructors to build + range. + +2019-11-04 Aldy Hernandez <aldyh@redhat.com> + + * tree-vrp.c (range_int_cst_singleton_p): Remove. + * tree-vrp.h (range_int_cst_singleton_p): Remove. + +2019-11-04 Aldy Hernandez <aldyh@redhat.com> + + * tree-vrp.c (value_range_base::normalize_addresses): Handle + VR_UNDEFINED. + +2019-11-04 Aldy Hernandez <aldyh@redhat.com> + + * tree-vrp.c (dump_assert_info): New. + (dump_asserts_info): New. + +2019-11-04 Jan Hubicka <jh@suse.cz> + + * ipa-inline-transform.c: Include ipa-utils.h + (inline_call): Set thunk_expansion flag. + * ipa-utils.h (thunk_expansion): Declare. + * ipa-devirt.c (thunk_expansion): New global var. + (devirt_node_removal_hook): Do not invalidate cache while + doing thunk expansion. + +2019-11-04 Tamar Christina <tamar.christina@arm.com> + + * tree-vect-slp.c (vectorize_slp_instance_root_stmt): Initialize rstmt. + +2019-11-04 Martin Sebor <msebor@redhat.com> + + PR tree-optimization/92349 + * tree-vrp.c (vrp_prop::check_array_ref): Avoid assuming struct + memebers have constant sizes. + +2019-11-04 Andre Vieira <andre.simoesdiasvieira@arm.com> + + * tree-vect-loop.c (vect_analyze_loop): Remove orig_loop_vinfo + parameter. + * tree-vectorizer.h (vect_analyze_loop): Update declaration. + * tree-vectorizer.c (try_vectorize_loop_1): Update calls to + vect_analyze_loop. + +2019-11-04 Joel Hutton <Joel.Hutton@arm.com> + + * expr.c (store_constructor): Modify to handle single element vectors. + * tree-vect-slp.c (vect_analyze_slp_instance): Add case for vector + constructors. + (vect_slp_check_for_constructors): New function. + (vect_slp_analyze_bb_1): Call new function to check for vector + constructors. + (vectorize_slp_instance_root_stmt): New function. + (vect_schedule_slp): Call new function to vectorize root stmt of vector + constructors. + * tree-vectorizer.h (SLP_INSTANCE_ROOT_STMT): New field. + +2019-11-04 Richard Biener <rguenther@suse.de> + + PR tree-optimization/92345 + * tree-vect-loop.c (vect_is_simple_reduction): Return whether + we produced a reduction chain. + (vect_analyze_scalar_cycles_1): Do not add reduction chains to + LOOP_VINFO_REDUCTIONS. + +2019-11-04 Jan Hubicka <jh@suse.cz> + + * cgraphclones.c (cgraph_node::create_version_clone): Do not + duplicate summaries. + * ipa-fnsummary.c (ipa_fn_summary_alloc): Allocate size summary + first. + (ipa_fn_summary_t::duplicate): Use get instead of get_create to + access call summaries. + (dump_ipa_call_summary): Be ready for missing edge summaries. + (analyze_function_body): Use get instead of get_create to access + edge summary. + (estimate_calls_size_and_time): Do not access summaries of + inlined edges; sanity check they are missing. + (ipa_call_context::estimate_size_and_time): Use get instead + of get_create to access node summary. + (inline_update_callee_summaries): Do not update depth of + inlined edge. + (ipa_merge_fn_summary_after_inlining): Remove inline edge from + growth caches. + (ipa_merge_fn_summary_after_inlining): Use get instead + of get_create. + * ipa-fnsummary.h (ipa_remove_from_growth_caches): Declare. + * ipa-inline-analyssi.c (edge_growth_cache): Turn to + fast summary. + (initialize_growth_caches): Update. + (do_estimate_edge_time): Remove redundant copy of context. + (ipa_remove_from_growth_caches): New function. + * ipa-inline.c (flatten_function): Update overall summary + only when optimizing. + (inline_to_all_callers): Update overall summary of function + inlined to. + * ipa-inline.h (edge_growth_cache): Turn to fast summary. + * symbol-summary.h (call_summary_base): Set m_initialize_when_cloning + to false. + +2019-11-04 Richard Biener <rguenther@suse.de> + + * system.h: Include malloc.h if INCLUDE_MALLOC_H and HAVE_MALLINFO. + * ggc-common.c: Remove inclusion of malloc.h, define INCLUDE_MALLOC_H. + +2019-11-04 David Edelsohn <dje.gcc@gmail.com> + + * ggc-common.c: Include system.h before malloc.h. + +2019-11-04 Alexandre Oliva <oliva@adacore.com> + + * configure.ac: Pass --enable-obsolete=* and + --enable-option-checking=* down to build configure, and fail + if it fails. AC_SUBST HAVE_AUTO_BUILD. + * configure: Rebuild. + * Makefile.in [HAVE_AUTO_BUILD] (auto-build.h): New rule. + [HAVE_AUTO_BUILD] (config.status): Depend on auto-build.h. + +2019-11-04 Jozef Lawrynowicz <jozef.l@mittosystems.com> + + * config.in: Regenerate. + * config/msp430/msp430.c (msp430_option_override): Emit an error if + -mtiny-printf is used without GCC being configured with + --enable-newlib-nano-formatted-io. + * config/msp430/msp430.h (LINK_SPEC): Pass + "--wrap puts --wrap printf" when -mtiny-printf is used. + * config/msp430/msp430.opt: Document -mtiny-printf. + * configure: Regenerate. + * configure.ac: Enable --enable-newlib-nano-formatted-io flag. + Define HAVE_NEWLIB_NANO_FORMATTED_IO if + --enable-newlib-nano-formatted-io is passed. + * doc/invoke.texi: Document -mtiny-printf. + +2019-11-04 Jozef Lawrynowicz <jozef.l@mittosystems.com> + + * configure: Regenerate. + +2019-11-04 Jozef Lawrynowicz <jozef.l@mittosystems.com> + + * config/msp430/driver-msp430.c + (msp430_get_linker_devices_include_path): New spec function. + * config/msp430/msp430-devices.c (msp430_dirname): New function. + (extract_devices_dir_from_exec_prefix): New function. + (extract_devices_dir_from_collect_gcc): New function. + (msp430_check_env_var_for_devices): New function. + (msp430_check_path_for_devices): Use xstrdup instead of ASTRDUP. + (parse_devices_csv): Call msp430_check_env_var_for_devices if + devices.csv was not found using other methods. + * config/msp430/msp430-devices.h (msp430_check_env_var_for_devices): + New prototype. + (msp430_dirname): Likewise. + * config/msp430/msp430.c (msp430_register_pre_includes): New function. + * config/msp430/msp430.h (EXTRA_SPEC_FUNCTIONS): Add + msp430_get_linker_devices_include_path. + (TARGET_EXTRA_PRE_INCLUDES): Define. + * doc/invoke.texi: Document new ways of searching for support files. + +2019-11-04 Richard Biener <rguenther@suse.de> + + PR tree-optimization/92301 + * tree-vect-stmts.c (process_use): Force reduction PHI defs live + as required by epilogue generation + +2019-11-04 Martin Liska <mliska@suse.cz> + + PR ipa/92304 + * fold-const.c (operand_compare::hash_operand): Fix field + hashing of CONSTRUCTOR. + +2019-11-04 Martin Liska <mliska@suse.cz> + + * ggc.h (ggc_delete): New function. + * ipa-fnsummary.c (ipa_free_fn_summary): Use it. + * ipa-prop.c (ipa_free_all_edge_args): Likewise. + (ipa_free_all_node_params): Likewise. + * ipa-sra.c (ipa_sra_analysis): Likewise. + +2019-11-02 Jan Hubicka <hubicka@ucw.cz> + + * ipa-fnsummary.c (set_cond_stmt_execution_predicate, + set_switch_stmt_execution_predicate, compute_bb_predicates, + will_be_nonconstant_expr_predicate, + phi_result_unknown_predicate, + analyze_function_body): Pass arround params summary. + (ipa_call_context::duplicate_from): New comment; + only duplicate useful values. + (ipa_call_context::equal_to): Only compare useful values. + (remap_edge_summaries): Pass params_summary. + (remap_hint_predicate): Likewise. + (ipa_merge_fn_summary_after_inlining): Likewise. + (inline_read_section): Initialize params summary used flags. + * ipa-predicate.c (predicate::remap_after_inlining): Pass + around param_summary. + (add_condition): Initialized used params summary flags. + * ipa-predicate.h (inline_param_summary::equals_to): Make const. + (inline_param_summary::useless_p): New predicate. + (remap_after_inlining, add_condition): Update prototype + * ipa-prop.c (ipa_populate_param_decls): Watch overflow in + move_cost. + (ipa_note_param_call): Add parameter POLYMORPHIC; update params + summaries. + (ipa_analyze_indirect_call_uses): Update use of ipa_note_param_call. + (ipa_analyze_virtual_call_uses): Likewise. + (update_indirect_edges_after_inlining): Update param summaries. + (ipa_print_node_params): Print used flags. + (ipa_read_indirect_edge_info): Update param summareis. + * ipa-prop.h (ipa_param_descriptor): Add + used_by_ipa_predicates, used_by_indirect_call + and used_by_polymorphic_call. + (ipa_set_param_used_by_ipa_predicates, + ipa_set_param_used_by_indirect_call, + ipa_set_param_used_by_polymorphic_call, + ipa_is_param_used_by_ipa_predicates, + ipa_is_param_used_by_indirect_call, + ipa_is_param_used_by_polymorphic_call): New inline functions. + +2019-11-02 Jan Hubicka <hubicka@ucw.cz> + + * ipa-fnsummary.c (ipa_call_context::duplicate_from): New + member function. + (ipa_call_context::release): Add ALL parameter. + (ipa_call_context::equal_to): New member function. + * ipa-fnsummary.h (ipa_call_context): Add empty constructor; + duplicate_form, release, equal_to and exists_p member functoins. + * ipa-inline-analysis.c (node_context_cache_entry): New + class. + (node_context_summary): Likewise. + (node_context_cache, node_context_cache_hit, node_context_cache_miss, + node_context_clear): New static vars. + (initialize_growth_caches): New function. + (free_growth_caches): Also delete node_context_cache; output stats. + (do_estimate_edge_time): Cache contexts. + (reset_node_cache): New function. + * ipa-inline.c (reset_edge_caches): Reset also node cache. + (inline_small_functions): Initialize growth caches. + * ipa-inline.h (reset_node_cache, initialize_growth_caches): + Declare. + * ipa-predicate.h (inline_param_summary::equal_to): New. + * ipa-prop.c (ipa_agg_jf_item::equal_to): New. + * ipa-prop.h (ipa_agg_jf_item): Declare equal_to member function. + (ipa_agg_jump_function): Implement equal_to member function. + +2019-11-02 Jan Hubicka <hubicka@ucw.cz> + + * ipa-fnsummary.c (inline_read_section): Set vector size + ahead of time. + +2019-11-02 Jan Hubicka <hubicka@ucw.cz> + + * ipa-fnsummary.c (ipa_call_context): New constructor. + (estimate_node_size_and_time): Turn to ... + (ipa_call_context::estimate_size_and_time): ... this one. + (ipa_call_context::release): New. + * ipa-fnsummary.h (ipa_call_context): New class. + (estimate_node_size_and_time): Remove. + * ipa-inline-analysis.c (do_estimate_edge_time, do_estimate_edge_size, + do_estimate_edge_hints): Update. + +2019-11-02 Jan Hubicka <hubicka@ucw.cz> + + * config.in: Regenerate. + * configure: Regenerate. + * configure.ac: Check for mallinfo. + * ggc-common.c: Include malloc.h if available; + include options.h + (report_heap_memory_use): New functoin. + * ggc-page.c (ggc_grow): Do not print "start". + * ggc.h (report_heap_memory_use): Declare. + * pases.c (execute_one_pass): Report memory after IPA passes. + (ipa_read_summaries_1): Likewise. + (ipa_read_optimization_summaries_1): Likewise. + +2019-11-02 Jakub Jelinek <jakub@redhat.com> + + * gimplify.h (omp_construct_selector_matches): Change return + type to int, add a new SCORES argument. + * gimplify.c (omp_construct_selector_matches): Likewise. If + SCORES is non-NULL, compute scores of each construct. + * omp-general.h (omp_get_context_selector): Declare. + * omp-general.c (omp_maybe_offloaded, omp_context_selector_matches): + Adjust omp_construct_selector_matches callers. + (omp_get_context_selector): New function, moved from c-family/c-omp.c. + (omp_context_compute_score): New function. + (omp_resolve_declare_variant): Compute scores and decide based on + that. + + PR bootstrap/92314 + * configure.ac: Don't look for omp-device-properties files from + installed offloading compilers. Instead add tmake_file snippets + for configured offloading targets and use files they generate. + * Makefile.in (install): Don't depend on + install-omp-device-properties. + (install-omp-device-properties): Remove goal. + * config/i386/t-omp-device: New file. + * config/i386/t-intelmic (omp-device-properties): Remove goal. + * config/nvptx/t-omp-device: New file. + * config/nvptx/t-nvptx (omp-device-properties): Remove goal. + * configure: Regenerated. + + * omp-general.h (omp_context_selector_set_compare): Declare. + * omp-general.c (omp_construct_simd_compare, + omp_context_selector_props_compare, omp_context_selector_set_compare, + omp_context_selector_compare): New functions. + (omp_resolve_declare_variant): Prune variants that are strict subset + of another variant. + +2019-11-01 Martin Sebor <msebor@redhat.com> + + PR middle-end/91679 + PR middle-end/91647 + PR middle-end/91463 + PR middle-end/92312 + * doc/invoke.texi (-Wzero-length-bounds): Document. + * gimple-match-head.c (try_conditional_simplification): Use memcpy + instead of a hand-rolled loop to avoid PR 92323. + * tree-vrp.c (vrp_prop::check_array_ref): Handle trailing arrays + with initializers. + (vrp_prop::check_mem_ref): Handle declared struct objects. + * tree.c (last_field): New function. + (array_at_struct_end_p): Handle MEM_REF. + (get_initializer_for): New helper. + (component_ref_size): Add argument. Rename locals. Call + get_initializer_for instead of fold_ctor_reference. Correct handling + of flexible array members. + * wide-int.h (generic_wide_int <storage>::sign_mask): Assert invariant. + +2019-11-01 Kewen Lin <linkw@gcc.gnu.org> + + * config/rs6000/rs6000-modes.def (V2SF, V2SI): New modes. + * config/rs6000/vsx.md (UNSPEC_VSX_CVSPSXDS, + UNSPEC_VSX_CVSPUXDS): Remove. + (vsx_xvcvspdp): New define_expand, old define_insn split to... + (vsx_xvcvspdp_be): ... this. New. And... + (vsx_xvcvspdp_le): ... this. New. + (vsx_xvcv<su>xwdp): New define_expand, old define_insn split to... + (vsx_xvcv<su>xwdp_be): ... this. New. And... + (vsx_xvcv<su>xwdp_le): ... this. New. + (vsx_xvcvsp<su>xds): New define_expand, old define_insn split to... + (vsx_xvcvsp<su>xds_be): ... this. New. And... + (vsx_xvcvsp<su>xds_le): ... this. New. + +2019-11-01 Kewen Lin <linkw@gcc.gnu.org> + + * config/rs6000/vsx.md (UNSPEC_VSX_CVSXWSP, UNSPEC_VSX_CVUXWSP, + UNSPEC_VSX_XVCVSXDDP, UNSPEC_VSX_XVCVUXDDP, + UNSPEC_VSX_XVCVDPSXDS, UNSPEC_VSX_XVCVDPUXDS, + UNSPEC_VSX_XVCVSPSXWS): Remove. + (vsx_xvcv<su>xddp, vsx_xvcvdp<su>xds, vsx_xvcvsp<su>xws, + vsx_xvcv<su>xwsp): Update define_insn RTL patterns. + +2019-11-01 Kewen Lin <linkw@gcc.gnu.org> + + * config/rs6000/vsx.md (vsx_xvcdpsp): Remove define_insn. + (UNSPEC_VSX_XVCDPSP): Remove. + * config/rs6000/rs6000.c (rs6000_generate_float2_double_code): + Replace gen_vsx_xvcdpsp by gen_vsx_xvcvdpsp. + +2019-11-01 Tobias Burnus <tobias@codesourcery.com> + + * hooks.c (hook_tree_tree_bool_null): New. + * hooks.h (hook_tree_tree_bool_null): Declare. + * langhooks-def.h (LANG_HOOKS_OMP_ARRAY_DATA): Define. + (LANG_HOOKS_DECLS): Add it. + * langhooks.h (lang_hooks_for_decls): Add omp_array_data. + * omp-low.c (install_var_field): New mode for Fortran descriptor arrays. + (lower_omp_target): Handle Fortran array with descriptor in + OMP_CLAUSE_USE_DEVICE_ADDR/OMP_CLAUSE_USE_DEVICE_PTR. + +2019-10-31 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/aarch64-sve-builtins.cc (register_builtin_types): + Assert that the type we store in abi_vector_types is its own + main variant. + (svbool_type_p): Don't apply TYPE_MAIN_VARIANT here. + +2019-10-31 Richard Earnshaw <rearnsha@arm.com> + + * config/arm/arm.c (arm_legitimize_address): Don't form negative offsets + from a CONST_INT address when TARGET_THUMB2. + +2019-10-31 Richard Earnshaw <rearnsha@arm.com> + + * config/arm/arm.md (add_not_cin): New insn. + (add_not_shift_cin): Likewise. + +2019-10-31 Martin Liska <mliska@suse.cz> + + * ipa-icf-gimple.c (func_checker::compare_tree_ssa_label): Remove. + * ipa-icf-gimple.h: Remove declaration from compare_tree_ssa_label + and compare_memory_operand. + +2019-10-31 Jakub Jelinek <jakub@redhat.com> + + * configure.ac: Compute and substitute omp_device_properties and + omp_device_property_deps. + * Makefile.in (generated_files): Add omp-device-properties.h. + (omp-general.o): Depend on omp-device-properties.h. + (omp_device_properties): New make variable. + (omp-device-properties.h, s-omp-device-properties-h, + install-omp-device-properties): New goals. + (install): Depend on install-omp-device-properties for accelerators. + * target.def (TARGET_OMP_DEVICE_KIND_ARCH_ISA): New target hook. + * target.h (enum omp_device_kind_arch_isa): New enum. + * doc/tm.texi.in: Add placeholder for TARGET_OMP_DEVICE_KIND_ARCH_ISA + documentation. + * omp-general.c: Include omp-device-properties.h. + (omp_max_simt_vf): Expect OFFLOAD_TARGET_NAMES to be separated by + colon instead of comma. + (omp_offload_device_kind_arch_isa, omp_maybe_offloaded): New + functions. + (omp_context_selector_matches): Implement device set arch/isa + selectors, improve device set kind selector handling. + * config/i386/i386-options.h (ix86_omp_device_kind_arch_isa): Declare. + * config/i386/i386.c (TARGET_SIMD_CLONE_ADJUST, + TARGET_SIMD_CLONE_USABLE): Formatting fix. + (TARGET_OMP_DEVICE_KIND_ARCH_ISA): Redefine to + ix86_omp_device_kind_arch_isa. + * config/i386/i386-options.c (struct ix86_target_opts): Move type + definition from ix86_target_string to file scope. + (isa2_opts, isa_opts): Moved arrays from ix86_target_string function + to file scope. + (ix86_omp_device_kind_arch_isa): New function. + (ix86_target_string): Moved struct ix86_target_opts, isa2_opts and + isa_opts definitions to file scope. + * config/i386/t-intelmic (omp-device-properties): New goal. + * config/nvptx/t-nvptx (omp-device-properties): Likewise. + * config/nvptx/nvptx.c (nvptx_omp_device_kind_arch_isa): New function. + (TARGET_OMP_DEVICE_KIND_ARCH_ISA): Redefine to + nvptx_omp_device_kind_arch_isa. + * configure: Regenerate. + * doc/tm.texi: Regenerate. + + PR middle-end/92231 + * tree.h (fndecl_built_in_p): Use fndecl_built_in_p instead of + DECL_BUILT_IN in comment. Remove redundant ()s around return + argument. + * tree.c (free_lang_data_in_decl): Check if var is FUNCTION_DECL + before calling fndecl_built_in_p. + * gimple-fold.c (gimple_fold_stmt_to_constant_1): Check if + TREE_OPERAND (fn, 0) is a FUNCTION_DECL before calling + fndecl_built_in_p on it. + +2019-10-31 Andre Vieira <andre.simoesdiasvieira@arm.com> + + * params.def (PARAM_VECT_EPILOGUES_NOMASK): Enable by default. + +2019-10-31 Martin Liska <mliska@suse.cz> + + * config/arm/arm.c (arm_get_pcs_model): Remove usage + of cgraph_local_info and use local_info_node instead. + * config/bfin/bfin.c (bfin_load_pic_reg): Likewise. + (bfin_function_ok_for_sibcall): Likewise. + * config/c6x/c6x.c (c6x_function_ok_for_sibcall): Likewise. + (must_reload_pic_reg_p): Likewise. + +2019-10-31 Jakub Jelinek <jakub@redhat.com> + + PR c++/90947 + * tree.h (type_initializer_zero_p): Remove. + * tree.c (type_initializer_zero_p): Remove. + +2019-10-30 Bernd Edlinger <bernd.edlinger@hotmail.de> + + * doc/invoke.texi (-Wshadow, -Wshadow=global + -Wshadow=local, -Wshadow=compatible-local): Update documentation. + +2019-10-30 Tobias Burnus <tobias@codesourcery.com> + + * gimplify.c (gimplify_scan_omp_clauses): Remove FE-generated + GOMP_MAP_TO_PSET and GOMP_MAP_POINTER mapping for 'target update' + and 'target exit data'. + +2019-10-30 Martin Jambor <mjambor@suse.cz> + + ipa/92278 + * cgraph.c (cgraph_edge::possibly_call_in_translation_unit_p): Fix + availability comparison. + +2019-10-30 Jozef Lawrynowicz <jozef.l@mittosystems.com> + + * config/msp430/msp430.c (msp430_expand_helper): Support expansion of + calls to __mspabi_mpy* functions. + * config/msp430/msp430.md (mulhisi3): New define_expand. + (umulhisi3): New define_expand. + (*mulhisi3_inline): Use old mulhisi3 define_insn. + (*umulhisi3_inline): Use old umulhisi3 define_insn. + +2019-10-30 Jozef Lawrynowicz <jozef.l@mittosystems.com> + + * config/msp430/msp430.c (msp430_check_index_not_high_mem): New. + (msp430_check_plus_not_high_mem): New. + (msp430_op_not_in_high_mem): Use new functions to check if the operand + might be in low memory. + Indicate that a 16-bit absolute address is in lower memory. + +2019-10-30 Martin Jambor <mjambor@suse.cz> + + * ipa-prop.c (ipa_compute_jump_functions_for_bb): Fix the call to + ultimate_alias_target. + +2019-10-30 Richard Biener <rguenther@suse.de> + + PR tree-optimization/92275 + * tree-vect-loop-manip.c (slpeel_update_phi_nodes_for_loops): + Copy all loop-closed PHIs. + +2019-10-30 Martin Liska <mliska@suse.cz> + + * ipa-icf-gimple.c (func_checker::compare_ssa_name): Use + const_tree as function argument. + (func_checker::compare_decl): Likewise. + (func_checker::operand_equal_p): Likewise. + (func_checker::compare_variable_decl): Likewise. + (func_checker::parse_labels): Likewise. + * ipa-icf-gimple.h: Likewise. + +2019-10-30 Martin Liska <mliska@suse.cz> + + * ipa-icf-gimple.c (func_checker::compatible_types_p): + Do not compare alias sets. It's handled by operand_equal_p. + +2019-10-30 Martin Liska <mliska@suse.cz> + + * ipa-icf-gimple.c (func_checker::func_checker): Do not + initialize m_compare_polymorphic. + (func_checker::compare_decl): Do not compare polymorphic types. + * ipa-icf-gimple.h (m_compare_polymorphic): Remove. + * ipa-icf.c (sem_function::equals_private): Do not call + compare_polymorphic_p. + +2019-10-30 Martin Liska <mliska@suse.cz> + + * ipa-icf-gimple.c (func_checker::compare_ssa_name): Call + compare_operand. + (func_checker::compare_memory_operand): Remove. + (func_checker::compare_cst_or_decl): Remove. + (func_checker::operand_equal_valueize): Do not handle + FIELD_DECL. + (func_checker::compare_gimple_call): Call compare_operand. + (func_checker::compare_gimple_assign): Likewise. + * ipa-icf-gimple.h: Remove compare_cst_or_decl. + * ipa-icf.c (sem_function::icf_handled_component_p): Remove. + * ipa-icf.h (icf_handled_component_p): Remove. + +2019-10-30 Martin Liska <mliska@suse.cz> + + * ipa-icf-gimple.c (func_checker::hash_operand): New. + (func_checker::compare_cst_or_decl): Remove handling + of FIELD_DECL. + (func_checker::compare_operand): Transform to ... + (func_checker::operand_equal_p): ... this. + * ipa-icf-gimple.h (class func_checker): Add + operand_equal_p and hash_operand. + * ipa-icf.c (sem_function::equals_private): Fix + pushing and popping of cfun. + +2019-10-30 Martin Liska <mliska@suse.cz> + + * fold-const.c (operand_equal_p): Move to ... + (operand_compare::operand_equal_p): ... here. + (operand_compare::verify_hash_value): New. + (add_expr): Move to ... + (operand_compare::hash_operand): ... here. + * fold-const.h (operand_equal_p): Move to the class. + (class operand_compare): New. + * tree.c (add_expr): Remove. + +2019-10-30 Martin Liska <mliska@suse.cz> + + * fold-const.c (operand_equal_p): Support OBJ_TYPE_REF. + * tree.c (add_expr): Hash parts of OBJ_TYPE_REF. + +2019-10-30 Martin Liska <mliska@suse.cz> + + PR lto/91393 + PR lto/88220 + * cgraph.c (cgraph_node::get_create): Overwrite node->order + from a first_clone in order to get proper LTO section + in LTO stream. + (cgraph_node::get_untransformed_body): + Use lto_get_section_data where symtab_node::order + must be provided. + * cgraphclones.c (cgraph_node::find_replacement): + Update also symbol order. + * ipa-fnsummary.c (ipa_fn_summary_read): + Use new function lto_get_summary_section_data. + * ipa-hsa.c (ipa_hsa_read_summary): Likewise. + * ipa-icf.c (sem_item_optimizer::read_summary): + Likewise. + * ipa-prop.c (ipa_prop_read_jump_functions): + Likewise. + (ipcp_read_transformation_summaries): Likewise. + * ipa-sra.c (ipa_sra_read_summary): Likewise. + * lto-cgraph.c (input_node): Add also order_base. + (input_varpool_node): Likewise. + (input_cgraph_1): Assign the order_base. + (input_cgraph_opt_summary): Use new lto_get_summary_section_data. + * lto-opts.c (lto_write_options): Pass new argument. + * lto-section-in.c (lto_get_section_data): Add new argumente order. + (lto_get_summary_section_data): New. + (lto_get_raw_section_data): Add order argument. + (lto_create_simple_input_block): Likewise. + * lto-section-out.c (lto_destroy_simple_output_block): + Likewise. + * lto-streamer-in.c (lto_input_toplevel_asms): + Use lto_get_summary_section_data. + (lto_input_mode_table): Likewise. + * lto-streamer-out.c (produce_asm): Pass symtab_node::order. + (lto_output_toplevel_asms): Pass new argument. + (copy_function_or_variable): Likewise. + (produce_lto_section):Likewise. + (produce_symtab): Likewise. + (lto_write_mode_table): Likewise. + (produce_asm_for_decls): Likewise. + * lto-streamer.c (lto_get_section_name): Concat symbol name + and symbol order. + * lto-streamer.h (lto_get_section_data): Add order argument. + (lto_get_summary_section_data): New. + (lto_get_raw_section_data): Add order argument. + (lto_get_section_name): Likewise. + * varpool.c (varpool_node::get_constructor): Pass order argument. + +2019-10-30 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/92262 + * tree-ssa-loop-ivopts.c (get_debug_computation_at): Don't unshare + ubase or cbase here. + (remove_unused_ivs): Unshare comp before using it. + +2019-10-30 Jan Hubicka <hubicka@ucw.cz> + + * ipa-prop.c (update_jump_functions_after_inlining): + Watch for missing summaries. + +2019-10-30 Richard Biener <rguenther@suse.de> + + PR tree-optimization/65930 + * tree-vect-loop.c (vect_is_simple_reduction): For reduction + chains also allow a leading and trailing conversion. + * tree-vect-slp.c (vect_get_and_check_slp_defs): Handle + intermediate reduction chains. + (vect_analyze_slp_instance): Likewise. Build a SLP + node for a trailing conversion manually. + +2019-10-30 Martin Liska <mliska@suse.cz> + + * cgraph.c (cgraph_node::local_info): Transform to ... + (cgraph_node::local_info_node): ... this. + (cgraph_node::dump): Remove cgraph_local_info and + put its fields directly into cgraph_node. + (cgraph_node::get_availability): Likewise. + (cgraph_node::make_local): Likewise. + (cgraph_node::verify_node): Likewise. + * cgraph.h (struct GTY): Likewise. + * cgraphclones.c (set_new_clone_decl_and_node_flags): Likewise. + (duplicate_thunk_for_node): Likewise. + (cgraph_node::create_clone): Likewise. + (cgraph_node::create_virtual_clone): Likewise. + (cgraph_node::create_version_clone): Likewise. + * cgraphunit.c (cgraph_node::reset): Likewise. + (cgraph_node::finalize_function): Likewise. + (cgraph_node::add_new_function): Likewise. + (analyze_functions): Likewise. + * combine.c (setup_incoming_promotions): Likewise. + * config/i386/i386.c (ix86_function_regparm): Likewise. + (ix86_function_sseregparm): Likewise. + (init_cumulative_args): Likewise. + * ipa-cp.c (determine_versionability): Likewise. + (count_callers): Likewise. + (set_single_call_flag): Likewise. + (initialize_node_lattices): Likewise. + (estimate_local_effects): Likewise. + (create_specialized_node): Likewise. + (identify_dead_nodes): Likewise. + * ipa-fnsummary.c (compute_fn_summary): Likewise. + (ipa_fn_summary_generate): Likewise. + * ipa-hsa.c (check_warn_node_versionable): Likewise. + (process_hsa_functions): Likewise. + * ipa-icf.c (set_local): Likewise. + * ipa-inline-analysis.c (initialize_inline_failed): Likewise. + * ipa-inline.c (speculation_useful_p): Likewise. + * ipa-profile.c (ipa_propagate_frequency): Likewise. + (ipa_profile): Likewise. + * ipa-split.c (split_function): Likewise. + (execute_split_functions): Likewise. + * ipa-sra.c (ipa_sra_preliminary_function_checks): Likewise. + (ipa_sra_ipa_function_checks): Likewise. + * ipa-visibility.c (function_and_variable_visibility): Likewise. + * ipa.c (symbol_table::remove_unreachable_nodes): Likewise. + * lto-cgraph.c (lto_output_node): Likewise. + (input_overwrite_node): Likewise. + * multiple_target.c (expand_target_clones): Likewise. + * omp-simd-clone.c (simd_clone_create): Likewise. + * trans-mem.c (expand_call_tm): Likewise. + (ipa_tm_mayenterirr_function): Likewise. + (ipa_tm_diagnose_tm_safe): Likewise. + (ipa_tm_diagnose_transaction): Likewise. + (ipa_tm_create_version): Likewise. + (ipa_tm_transform_calls_redirect): Likewise. + (ipa_tm_execute): Likewise. + * tree-inline.c (expand_call_inline): Likewise. + +2019-10-29 Martin Liska <mliska@suse.cz> + + * symbol-summary.h (function_summary): Pass memory location + to underlaying hash_map (or vec). + (V>::fast_function_summary): Likewise. + +2019-10-29 Martin Liska <mliska@suse.cz> + + * ggc.h (ggc_alloc_no_dtor): New function. + * ipa-fnsummary.c (ipa_free_fn_summary): Call + destructor and ggc_free. + (ipa_free_size_summary): Call delete instead + of release. + * ipa-fnsummary.h: Use new function ggc_alloc_no_dtor. + * ipa-prop.c (ipa_check_create_edge_args): Likewise. + (ipa_free_all_edge_args): Call destructor and ggc_free. + (ipa_free_all_node_params): Likewise. + (ipcp_free_transformation_sum): Likewise. + * ipa-prop.h (ipa_check_create_node_params): + Call new ggc_alloc_no_dtor. + * ipa-sra.c (ipa_sra_generate_summary): Likewise. + (ipa_sra_analysis): Call destructor and ggc_free. + Replace release with delete operator. + * symbol-summary.h (release): Remove .. + (V>::~fast_function_summary): and move logic here. + Likewise for other classes. + +2019-10-29 Richard Biener <rguenther@suse.de> + + PR tree-optimization/92260 + * tree-vect-slp.c (vect_get_constant_vectors): Special-case + lane-reducing ops. + +2019-10-29 Andre Vieira <andre.simoesdiasvieira@arm.com> + + PR tree-optimization/88915 + * tree-ssa-loop-niter.h (simplify_replace_tree): Change declaration. + * tree-ssa-loop-niter.c (simplify_replace_tree): Add context parameter + and make the valueize function pointer also take a void pointer. + * tree-ssa-sccvn.c (vn_valueize_wrapper): New function to wrap + around vn_valueize, to call it without a context. + (process_bb): Use vn_valueize_wrapper instead of vn_valueize. + * tree-vect-loop.c (_loop_vec_info): Initialize epilogue_vinfos. + (~_loop_vec_info): Release epilogue_vinfos. + (vect_analyze_loop_costing): Use knowledge of main VF to estimate + number of iterations of epilogue. + (vect_analyze_loop_2): Adapt to analyse main loop for all supported + vector sizes when vect-epilogues-nomask=1. Also keep track of lowest + versioning threshold needed for main loop. + (vect_analyze_loop): Likewise. + (find_in_mapping): New helper function. + (update_epilogue_loop_vinfo): New function. + (vect_transform_loop): When vectorizing epilogues re-use analysis done + on main loop and call update_epilogue_loop_vinfo to update it. + * tree-vect-loop-manip.c (vect_update_inits_of_drs): No longer insert + stmts on loop preheader edge. + (vect_do_peeling): Enable skip-vectors when doing loop versioning if + we decided to vectorize epilogues. Update epilogues NITERS and + construct ADVANCE to update epilogues data references where needed. + * tree-vectorizer.h (_loop_vec_info): Add epilogue_vinfos. + (vect_do_peeling, vect_update_inits_of_drs, + determine_peel_for_niter, vect_analyze_loop): Add or update + declarations. + * tree-vectorizer.c (try_vectorize_loop_1): Make sure to use already + created loop_vec_info's for epilogues when available. Otherwise analyse + epilogue separately. + +2019-10-29 Richard Biener <rguenther@suse.de> + + * doc/tree-ssa.texi (Immediate Uses): Fix FOR_EACH_IMM_USE_STMT + example. + +2019-10-29 Richard Sandiford <richard.sandiford@arm.com> + + * tree-vect-stmts.c (vectorizable_condition): Get the reduction + index for the COND_EXPR from stmt_info rather than reduc_info. + +2019-10-29 Richard Biener <rguenther@suse.de> + + PR tree-optimization/65930 + * tree-vect-loop.c (check_reduction_path): Relax single-use + check allowing out-of-loop uses. + (vect_is_simple_reduction): SLP reduction chains cannot have + intermediate stmts used outside of the loop. + (vect_create_epilog_for_reduction): The adjustment might need + to be converted. + (vectorizable_reduction): Annotate live stmts of the reduction + chain with STMT_VINFO_REDUC_DEF. + * tree-vect-stms.c (process_use): Remove no longer true asserts. + +2019-10-29 Richard Sandiford <richard.sandiford@arm.com> + + * calls.c (pass_by_reference): Leave the target to decide whether + POLY_INT_CST-sized arguments should be passed by value or reference, + rather than forcing them to be passed by reference. + (must_pass_in_stack_var_size): Likewise. + * config/aarch64/aarch64.md (LAST_SAVED_REGNUM): Redefine from + V31_REGNUM to P15_REGNUM. + * config/aarch64/aarch64-protos.h (aarch64_init_cumulative_args): + Take an extra "silent_p" parameter, defaulting to false. + (aarch64_sve::svbool_type_p): Declare. + (aarch64_sve::nvectors_if_data_type): Likewise. + * config/aarch64/aarch64.h (NUM_PR_ARG_REGS): New macro. + (aarch64_frame::reg_offset): Turn into poly_int64s. + (aarch64_frame::save_regs_size): Likewise. + (aarch64_frame::below_hard_fp_saved_regs_size): New field. + (aarch64_frame::sve_callee_adjust): Likewise. + (aarch64_frame::spare_reg_reg): Likewise. + (ARM_PCS_SVE): New arm_pcs value. + (CUMULATIVE_ARGS::aapcs_nprn): New field. + (CUMULATIVE_ARGS::aapcs_nextnprn): Likewise. + (CUMULATIVE_ARGS::silent_p): Likewise. + (BITS_PER_SVE_PRED): New macro. + * config/aarch64/aarch64.c (handle_aarch64_vector_pcs_attribute): New + function. Reject aarch64_vector_pcs attributes on SVE functions. + (aarch64_attribute_table): Use the above handler. + (aarch64_sve_abi): New function. + (aarch64_sve_argument_p): Likewise. + (aarch64_returns_value_in_sve_regs_p): Likewise. + (aarch64_takes_arguments_in_sve_regs_p): Likewise. + (aarch64_fntype_abi): Check for SVE functions and return the SVE PCS + descriptor for them. + (aarch64_simd_decl_p): Delete. + (aarch64_emit_cfi_for_reg_p): New function. + (aarch64_reg_save_mode): Remove the fndecl argument and instead use + crtl->abi to choose the mode for FP registers. Handle the SVE PCS. + (aarch64_hard_regno_call_part_clobbered): Do not treat FP registers + as partly clobbered for the SVE PCS. + (aarch64_function_ok_for_sibcall): Check whether the two functions + use the same ABI, rather than checking specifically for whether + they're aarch64_vector_pcs functions. + (aarch64_pass_by_reference): Raise an error for attempts to pass + SVE arguments when SVE is disabled. Pass SVE arguments by reference + if there are not enough free registers left, or if the argument is + variadic. + (aarch64_function_value): Handle SVE predicates, vectors and tuples. + (aarch64_return_in_memory): Do not return SVE predicates, vectors and + tuples in memory. + (aarch64_layout_arg): Take a function_arg_info rather than + individual properties. Handle SVE predicates, vectors and tuples. + Raise an error if they are passed to unprototyped functions. + (aarch64_function_arg): If the silent_p flag is set, suppress the + usual error about using float registers without TARGET_FLOAT. + (aarch64_init_cumulative_args): Take a silent_p parameter and store + it in the cumulative_args structure. Initialize aapcs_nprn and + aapcs_nextnprn. If the silent_p flag is set, suppress the usual + error about using float registers without TARGET_FLOAT. + If the silent_p flag is not set, also raise an error about + using SVE functions when SVE is disabled. + (aarch64_function_arg_advance): Update the call to aarch64_layout_arg, + and call it for SVE functions too. Update aapcs_nprn similarly + to the other register counts. + (aarch64_layout_frame): If a big-endian function needs to save + and restore Z8-Z15, search for a spare predicate that it can use. + Store SVE predicates at the bottom of the register save area, + followed by SVE vectors, then followed by the normal slots. + Keep pointing the hard frame pointer at the base of the normal slots, + above the SVE vectors. Update the various frame creation and + tear-down strategies for the new layout, initializing the new + sve_callee_adjust field. Add an additional layout for frames + whose saved registers are all SVE registers. + (aarch64_register_saved_on_entry): Cope with poly_int64 reg_offsets. + (aarch64_return_address_signing_enabled): Likewise. + (aarch64_push_regs, aarch64_pop_regs): Update calls to + aarch64_reg_save_mode. + (aarch64_adjust_sve_callee_save_base): New function. + (aarch64_add_cfa_expression): Move earlier in file. Take the + saved register as an rtx rather than a register number and use + its mode for the MEM slot. + (aarch64_save_callee_saves): Remove the mode argument and instead + use aarch64_reg_save_mode to get the mode of each save slot. + Add a hard_fp_valid_p parameter. Cope with poly_int64 register + offsets. Allow GP offsets to be saved at a VL-based offset from + the stack, handling this case using the frame pointer if available + or a temporary register otherwise. Use ST1D to save Z8-Z15 for + big-endian SVE functions; use normal moves for other SVE saves. + Only mark the save as frame-related if aarch64_emit_cfi_for_reg_p + returns true. Add explicit CFA notes when not storing via the + stack pointer. Do not try to pair SVE saves. + (aarch64_restore_callee_saves): Cope with poly_int64 register + offsets. Use LD1D to restore Z8-Z15 for big-endian SVE functions; + use normal moves for other SVE restores. Only add CFA restore notes + if aarch64_emit_cfi_for_reg_p returns true. Do not try to pair + SVE restores. + (aarch64_get_separate_components): Always keep the first SVE save + in the prologue if we need to use it as a stack probe. Don't allow + Z8-Z15 saves and loads to be shrink-wrapped for big-endian targets. + Likewise the spare predicate register that they need. Update the + offset calculation to account for the SVE save area. Use the + appropriate range check for SVE LDR and STR instructions. + (aarch64_components_for_bb): Cope with poly_int64 reg_offsets. + (aarch64_process_components): Likewise. Update the offset + calculation to account for the SVE save area. Only mark the + save as frame-related if aarch64_emit_cfi_for_reg_p returns true. + Do not try to pair SVE saves. + (aarch64_allocate_and_probe_stack_space): Cope with poly_int64 + reg_offsets. When handling the final allocation, expect the + first SVE register save to be part of the initial allocation + and for it to act as a probe at SP. Account for the SVE callee + save area in the dump information. + (aarch64_expand_prologue): Update the frame diagram. Fold the + SVE callee allocation into the initial allocation if stack clash + protection is enabled. Use new variables to track the offset + of the frame chain (and hard frame pointer) from the current + stack pointer, and likewise the offset of the bottom of the + register save area. Update calls to aarch64_save_callee_saves + and aarch64_add_cfa_expression. Apply sve_callee_adjust before + saving the FP&SIMD registers. Save the predicate registers. + (aarch64_expand_epilogue): Take below_hard_fp_saved_regs_size + into account when setting the stack pointer from the frame pointer, + and when deciding whether we can inherit the initial adjustment + amount from the prologue. Restore the predicate registers after + the vector registers, then apply sve_callee_adjust, then restore + the general registers. + (aarch64_secondary_reload): Don't use secondary SVE reloads + for VNx16BImode. + (aapcs_vfp_sub_candidate): Assert that the type is not an SVE type. + (aarch64_short_vector_p): Return false for SVE types. + (aarch64_vfp_is_call_or_return_candidate): Initialize *is_ha + at the start of the function. Return false for SVE types. + (aarch64_asm_output_variant_pcs): Output .variant_pcs for SVE + functions too. + (TARGET_STRICT_ARGUMENT_NAMING): Redefine to request strict naming. + * config/aarch64/aarch64-sve.md (*aarch64_sve_mov<mode>_le): Extend + to big-endian targets for bytewise moves. + (*aarch64_sve_mov<mode>_be): Exclude the bytewise case. + +2019-10-29 Richard Sandiford <richard.sandiford@arm.com> + Kugan Vivekanandarajah <kugan.vivekanandarajah@linaro.org> + Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org> + + * config.gcc (aarch64*-*-*): Add arm_sve.h to extra_headers. + Add aarch64-sve-builtins.o, aarch64-sve-builtins-shapes.o and + aarch64-sve-builtins-base.o to extra_objs. Add + aarch64-sve-builtins.h and aarch64-sve-builtins.cc to target_gtfiles. + * config/aarch64/t-aarch64 (aarch64-sve-builtins.o): New rule. + (aarch64-sve-builtins-shapes.o): Likewise. + (aarch64-sve-builtins-base.o): New rules. + * config/aarch64/aarch64-c.c (aarch64_pragma_aarch64): New function. + (aarch64_resolve_overloaded_builtin): Likewise. + (aarch64_check_builtin_call): Likewise. + (aarch64_register_pragmas): Install aarch64_resolve_overloaded_builtin + and aarch64_check_builtin_call in targetm. Register the GCC aarch64 + pragma. + * config/aarch64/aarch64-protos.h (AARCH64_FOR_SVPRFOP): New macro. + (aarch64_svprfop): New enum. + (AARCH64_BUILTIN_SVE): New aarch64_builtin_class enum value. + (aarch64_sve_int_mode, aarch64_sve_data_mode): Declare. + (aarch64_fold_sve_cnt_pat, aarch64_output_sve_prefetch): Likewise. + (aarch64_output_sve_cnt_pat_immediate): Likewise. + (aarch64_output_sve_ptrues, aarch64_sve_ptrue_svpattern_p): Likewise. + (aarch64_sve_sqadd_sqsub_immediate_p, aarch64_sve_ldff1_operand_p) + (aarch64_sve_ldnf1_operand_p, aarch64_sve_prefetch_operand_p) + (aarch64_ptrue_all_mode, aarch64_convert_sve_data_to_pred): Likewise. + (aarch64_expand_sve_dupq, aarch64_replace_reg_mode): Likewise. + (aarch64_sve::init_builtins, aarch64_sve::handle_arm_sve_h): Likewise. + (aarch64_sve::builtin_decl, aarch64_sve::builtin_type_p): Likewise. + (aarch64_sve::mangle_builtin_type): Likewise. + (aarch64_sve::resolve_overloaded_builtin): Likewise. + (aarch64_sve::check_builtin_call, aarch64_sve::gimple_fold_builtin) + (aarch64_sve::expand_builtin): Likewise. + * config/aarch64/aarch64.c (aarch64_sve_data_mode): Make public. + (aarch64_sve_int_mode): Likewise. + (aarch64_ptrue_all_mode): New function. + (aarch64_convert_sve_data_to_pred): Make public. + (svprfop_token): New function. + (aarch64_output_sve_prefetch): Likewise. + (aarch64_fold_sve_cnt_pat): Likewise. + (aarch64_output_sve_cnt_pat_immediate): Likewise. + (aarch64_sve_move_pred_via_while): Use gen_while with UNSPEC_WHILE_LO + instead of gen_while_ult. + (aarch64_replace_reg_mode): Make public. + (aarch64_init_builtins): Call aarch64_sve::init_builtins. + (aarch64_fold_builtin): Handle AARCH64_BUILTIN_SVE. + (aarch64_gimple_fold_builtin, aarch64_expand_builtin): Likewise. + (aarch64_builtin_decl, aarch64_builtin_reciprocal): Likewise. + (aarch64_mangle_type): Call aarch64_sve::mangle_type. + (aarch64_sve_sqadd_sqsub_immediate_p): New function. + (aarch64_sve_ptrue_svpattern_p): Likewise. + (aarch64_sve_pred_valid_immediate): Check + aarch64_sve_ptrue_svpattern_p. + (aarch64_sve_ldff1_operand_p, aarch64_sve_ldnf1_operand_p) + (aarch64_sve_prefetch_operand_p, aarch64_output_sve_ptrues): New + functions. + * config/aarch64/aarch64.md (UNSPEC_LDNT1_SVE, UNSPEC_STNT1_SVE) + (UNSPEC_LDFF1_GATHER, UNSPEC_PTRUE, UNSPEC_WHILE_LE, UNSPEC_WHILE_LS) + (UNSPEC_WHILE_LT, UNSPEC_CLASTA, UNSPEC_UPDATE_FFR) + (UNSPEC_UPDATE_FFRT, UNSPEC_RDFFR, UNSPEC_WRFFR) + (UNSPEC_SVE_LANE_SELECT, UNSPEC_SVE_CNT_PAT, UNSPEC_SVE_PREFETCH) + (UNSPEC_SVE_PREFETCH_GATHER, UNSPEC_SVE_COMPACT, UNSPEC_SVE_SPLICE): + New unspecs. + * config/aarch64/iterators.md (SI_ONLY, DI_ONLY, VNx8HI_ONLY) + (VNx2DI_ONLY, SVE_PARTIAL, VNx8_NARROW, VNx8_WIDE, VNx4_NARROW) + (VNx4_WIDE, VNx2_NARROW, VNx2_WIDE, PRED_HSD): New mode iterators. + (UNSPEC_ADR, UNSPEC_BRKA, UNSPEC_BRKB, UNSPEC_BRKN, UNSPEC_BRKPA) + (UNSPEC_BRKPB, UNSPEC_PFIRST, UNSPEC_PNEXT, UNSPEC_CNTP, UNSPEC_SADDV) + (UNSPEC_UADDV, UNSPEC_FMLA, UNSPEC_FMLS, UNSPEC_FEXPA, UNSPEC_FTMAD) + (UNSPEC_FTSMUL, UNSPEC_FTSSEL, UNSPEC_COND_CMPEQ_WIDE): New unspecs. + (UNSPEC_COND_CMPGE_WIDE, UNSPEC_COND_CMPGT_WIDE): Likewise. + (UNSPEC_COND_CMPHI_WIDE, UNSPEC_COND_CMPHS_WIDE): Likewise. + (UNSPEC_COND_CMPLE_WIDE, UNSPEC_COND_CMPLO_WIDE): Likewise. + (UNSPEC_COND_CMPLS_WIDE, UNSPEC_COND_CMPLT_WIDE): Likewise. + (UNSPEC_COND_CMPNE_WIDE, UNSPEC_COND_FCADD90, UNSPEC_COND_FCADD270) + (UNSPEC_COND_FCMLA, UNSPEC_COND_FCMLA90, UNSPEC_COND_FCMLA180) + (UNSPEC_COND_FCMLA270, UNSPEC_COND_FMAX, UNSPEC_COND_FMIN): Likewise. + (UNSPEC_COND_FMULX, UNSPEC_COND_FRECPX, UNSPEC_COND_FSCALE): Likewise. + (UNSPEC_LASTA, UNSPEC_ASHIFT_WIDE, UNSPEC_ASHIFTRT_WIDE): Likewise. + (UNSPEC_LSHIFTRT_WIDE, UNSPEC_LDFF1, UNSPEC_LDNF1): Likewise. + (Vesize): Handle partial vector modes. + (self_mask, narrower_mask, sve_lane_con, sve_lane_pair_con): New + mode attributes. + (UBINQOPS, ANY_PLUS, SAT_PLUS, ANY_MINUS, SAT_MINUS): New code + iterators. + (s, paired_extend, inc_dec): New code attributes. + (SVE_INT_ADDV, CLAST, LAST): New int iterators. + (SVE_INT_UNARY): Add UNSPEC_RBIT. + (SVE_FP_UNARY, SVE_FP_UNARY_INT): New int iterators. + (SVE_FP_BINARY, SVE_FP_BINARY_INT): Likewise. + (SVE_COND_FP_UNARY): Add UNSPEC_COND_FRECPX. + (SVE_COND_FP_BINARY): Add UNSPEC_COND_FMAX, UNSPEC_COND_FMIN and + UNSPEC_COND_FMULX. + (SVE_COND_FP_BINARY_INT, SVE_COND_FP_ADD): New int iterators. + (SVE_COND_FP_SUB, SVE_COND_FP_MUL): Likewise. + (SVE_COND_FP_BINARY_I1): Add UNSPEC_COND_FMAX and UNSPEC_COND_FMIN. + (SVE_COND_FP_BINARY_REG): Add UNSPEC_COND_FMULX. + (SVE_COND_FCADD, SVE_COND_FP_MAXMIN, SVE_COND_FCMLA) + (SVE_COND_INT_CMP_WIDE, SVE_FP_TERNARY_LANE, SVE_CFP_TERNARY_LANE) + (SVE_WHILE, SVE_SHIFT_WIDE, SVE_LDFF1_LDNF1, SVE_BRK_UNARY) + (SVE_BRK_BINARY, SVE_PITER): New int iterators. + (optab): Handle UNSPEC_SADDV, UNSPEC_UADDV, UNSPEC_FRECPE, + UNSPEC_FRECPS, UNSPEC_RSQRTE, UNSPEC_RSQRTS, UNSPEC_RBIT, + UNSPEC_SMUL_HIGHPART, UNSPEC_UMUL_HIGHPART, UNSPEC_FMLA, UNSPEC_FMLS, + UNSPEC_FCMLA, UNSPEC_FCMLA90, UNSPEC_FCMLA180, UNSPEC_FCMLA270, + UNSPEC_FEXPA, UNSPEC_FTSMUL, UNSPEC_FTSSEL, UNSPEC_COND_FCADD90, + UNSPEC_COND_FCADD270, UNSPEC_COND_FCMLA, UNSPEC_COND_FCMLA90, + UNSPEC_COND_FCMLA180, UNSPEC_COND_FCMLA270, UNSPEC_COND_FMAX, + UNSPEC_COND_FMIN, UNSPEC_COND_FMULX, UNSPEC_COND_FRECPX and + UNSPEC_COND_FSCALE. + (maxmin_uns): Handle UNSPEC_COND_FMAX and UNSPEC_COND_FMIN. + (binqops_op, binqops_op_rev, last_op): New int attributes. + (su): Handle UNSPEC_SADDV and UNSPEC_UADDV. + (fn, ab): New int attributes. + (cmp_op): Handle UNSPEC_COND_CMP*_WIDE and UNSPEC_WHILE_*. + (while_optab_cmp, brk_op, sve_pred_op): New int attributes. + (sve_int_op): Handle UNSPEC_SMUL_HIGHPART, UNSPEC_UMUL_HIGHPART, + UNSPEC_ASHIFT_WIDE, UNSPEC_ASHIFTRT_WIDE, UNSPEC_LSHIFTRT_WIDE and + UNSPEC_RBIT. + (sve_fp_op): Handle UNSPEC_FRECPE, UNSPEC_FRECPS, UNSPEC_RSQRTE, + UNSPEC_RSQRTS, UNSPEC_FMLA, UNSPEC_FMLS, UNSPEC_FEXPA, UNSPEC_FTSMUL, + UNSPEC_FTSSEL, UNSPEC_COND_FMAX, UNSPEC_COND_FMIN, UNSPEC_COND_FMULX, + UNSPEC_COND_FRECPX and UNSPEC_COND_FSCALE. + (sve_fp_op_rev): Handle UNSPEC_COND_FMAX, UNSPEC_COND_FMIN and + UNSPEC_COND_FMULX. + (rot): Handle UNSPEC_COND_FCADD* and UNSPEC_COND_FCMLA*. + (brk_reg_con, brk_reg_opno): New int attributes. + (sve_pred_fp_rhs1_operand, sve_pred_fp_rhs2_operand): Handle + UNSPEC_COND_FMAX, UNSPEC_COND_FMIN and UNSPEC_COND_FMULX. + (sve_pred_fp_rhs2_immediate): Handle UNSPEC_COND_FMAX and + UNSPEC_COND_FMIN. + (max_elem_bits): New int attribute. + (min_elem_bits): Handle UNSPEC_RBIT. + * config/aarch64/predicates.md (subreg_lowpart_operator): Handle + TRUNCATE as well as SUBREG. + (ascending_int_parallel, aarch64_simd_reg_or_minus_one) + (aarch64_sve_ldff1_operand, aarch64_sve_ldnf1_operand) + (aarch64_sve_prefetch_operand, aarch64_sve_ptrue_svpattern_immediate) + (aarch64_sve_qadd_immediate, aarch64_sve_qsub_immediate) + (aarch64_sve_gather_immediate_b, aarch64_sve_gather_immediate_h) + (aarch64_sve_gather_immediate_w, aarch64_sve_gather_immediate_d) + (aarch64_sve_sqadd_operand, aarch64_sve_gather_offset_b) + (aarch64_sve_gather_offset_h, aarch64_sve_gather_offset_w) + (aarch64_sve_gather_offset_d, aarch64_gather_scale_operand_b) + (aarch64_gather_scale_operand_h): New predicates. + * config/aarch64/constraints.md (UPb, UPd, UPh, UPw, Utf, Utn, vgb) + (vgd, vgh, vgw, vsQ, vsS): New constraints. + * config/aarch64/aarch64-sve.md: Add a note on the FFR handling. + (*aarch64_sve_reinterpret<mode>): Allow any source register + instead of requiring an exact match. + (*aarch64_sve_ptruevnx16bi_cc, *aarch64_sve_ptrue<mode>_cc) + (*aarch64_sve_ptruevnx16bi_ptest, *aarch64_sve_ptrue<mode>_ptest) + (aarch64_wrffr, aarch64_update_ffr_for_load, aarch64_copy_ffr_to_ffrt) + (aarch64_rdffr, aarch64_rdffr_z, *aarch64_rdffr_z_ptest) + (*aarch64_rdffr_ptest, *aarch64_rdffr_z_cc, *aarch64_rdffr_cc) + (aarch64_update_ffrt): New patterns. + (@aarch64_load_<ANY_EXTEND:optab><VNx8_WIDE:mode><VNx8_NARROW:mode>) + (@aarch64_load_<ANY_EXTEND:optab><VNx4_WIDE:mode><VNx4_NARROW:mode>) + (@aarch64_load_<ANY_EXTEND:optab><VNx2_WIDE:mode><VNx2_NARROW:mode>) + (@aarch64_ld<fn>f1<mode>): New patterns. + (@aarch64_ld<fn>f1_<ANY_EXTEND:optab><VNx8_WIDE:mode><VNx8_NARROW:mode>) + (@aarch64_ld<fn>f1_<ANY_EXTEND:optab><VNx4_WIDE:mode><VNx4_NARROW:mode>) + (@aarch64_ld<fn>f1_<ANY_EXTEND:optab><VNx2_WIDE:mode><VNx2_NARROW:mode>) + (@aarch64_ldnt1<mode>): New patterns. + (gather_load<mode>): Use aarch64_sve_gather_offset_<Vesize> for + the scalar part of the address. + (mask_gather_load<SVE_S:mode>): Use aarch64_sve_gather_offset_w for the + scalar part of the addresse and add an alternative for handling + nonzero offsets. + (mask_gather_load<SVE_D:mode>): Likewise aarch64_sve_gather_offset_d. + (*mask_gather_load<mode>_sxtw, *mask_gather_load<mode>_uxtw) + (@aarch64_gather_load_<ANY_EXTEND:optab><VNx4_WIDE:mode><VNx4_NARROW:mode>) + (@aarch64_gather_load_<ANY_EXTEND:optab><VNx2_WIDE:mode><VNx2_NARROW:mode>) + (*aarch64_gather_load_<ANY_EXTEND:optab><VNx2_WIDE:mode><VNx2_NARROW:mode>_sxtw) + (*aarch64_gather_load_<ANY_EXTEND:optab><VNx2_WIDE:mode><VNx2_NARROW:mode>_uxtw) + (@aarch64_ldff1_gather<SVE_S:mode>, @aarch64_ldff1_gather<SVE_D:mode>) + (*aarch64_ldff1_gather<mode>_sxtw, *aarch64_ldff1_gather<mode>_uxtw) + (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode><VNx4_NARROW:mode>) + (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode><VNx2_NARROW:mode>) + (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode><VNx2_NARROW:mode>_sxtw) + (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode><VNx2_NARROW:mode>_uxtw) + (@aarch64_sve_prefetch<mode>): New patterns. + (@aarch64_sve_gather_prefetch<SVE_I:mode><VNx4SI_ONLY:mode>) + (@aarch64_sve_gather_prefetch<SVE_I:mode><VNx2DI_ONLY:mode>) + (*aarch64_sve_gather_prefetch<SVE_I:mode><VNx2DI_ONLY:mode>_sxtw) + (*aarch64_sve_gather_prefetch<SVE_I:mode><VNx2DI_ONLY:mode>_uxtw) + (@aarch64_store_trunc<VNx8_NARROW:mode><VNx8_WIDE:mode>) + (@aarch64_store_trunc<VNx4_NARROW:mode><VNx4_WIDE:mode>) + (@aarch64_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>) + (@aarch64_stnt1<mode>): New patterns. + (scatter_store<mode>): Use aarch64_sve_gather_offset_<Vesize> for + the scalar part of the address. + (mask_scatter_store<SVE_S:mode>): Use aarch64_sve_gather_offset_w for + the scalar part of the addresse and add an alternative for handling + nonzero offsets. + (mask_scatter_store<SVE_D:mode>): Likewise aarch64_sve_gather_offset_d. + (*mask_scatter_store<mode>_sxtw, *mask_scatter_store<mode>_uxtw) + (@aarch64_scatter_store_trunc<VNx4_NARROW:mode><VNx4_WIDE:mode>) + (@aarch64_scatter_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>) + (*aarch64_scatter_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>_sxtw) + (*aarch64_scatter_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>_uxtw): + New patterns. + (vec_duplicate<mode>): Use QI as the mode of the input operand. + (extract_last_<mode>): Generalize to... + (@extract_<LAST:last_op>_<mode>): ...this. + (*<SVE_INT_UNARY:optab><mode>2): Rename to... + (@aarch64_pred_<SVE_INT_UNARY:optab><mode>): ...this. + (@cond_<SVE_INT_UNARY:optab><mode>): New expander. + (@aarch64_pred_sxt<SVE_HSDI:mode><SVE_PARTIAL:mode>): New pattern. + (@aarch64_cond_sxt<SVE_HSDI:mode><SVE_PARTIAL:mode>): Likewise. + (@aarch64_pred_cnot<mode>, @cond_cnot<mode>): New expanders. + (@aarch64_sve_<SVE_FP_UNARY_INT:optab><mode>): New pattern. + (@aarch64_sve_<SVE_FP_UNARY:optab><mode>): Likewise. + (*<SVE_COND_FP_UNARY:optab><mode>2): Rename to... + (@aarch64_pred_<SVE_COND_FP_UNARY:optab><mode>): ...this. + (@cond_<SVE_COND_FP_UNARY:optab><mode>): New expander. + (*<SVE_INT_BINARY_IMM:optab><mode>3): Rename to... + (@aarch64_pred_<SVE_INT_BINARY_IMM:optab><mode>): ...this. + (@aarch64_adr<mode>, *aarch64_adr_sxtw): New patterns. + (*aarch64_adr_uxtw_unspec): Likewise. + (*aarch64_adr_uxtw): Rename to... + (*aarch64_adr_uxtw_and): ...this. + (@aarch64_adr<mode>_shift): New expander. + (*aarch64_adr_shift_sxtw): New pattern. + (aarch64_<su>abd<mode>_3): Rename to... + (@aarch64_pred_<su>abd<mode>): ...this. + (<su>abd<mode>_3): Update accordingly. + (@aarch64_cond_<su>abd<mode>): New expander. + (@aarch64_<SBINQOPS:su_optab><optab><mode>): New pattern. + (@aarch64_<UBINQOPS:su_optab><optab><mode>): Likewise. + (*<su>mul<mode>3_highpart): Rename to... + (@aarch64_pred_<optab><mode>): ...this. + (@cond_<MUL_HIGHPART:optab><mode>): New expander. + (*cond_<MUL_HIGHPART:optab><mode>_2): New pattern. + (*cond_<MUL_HIGHPART:optab><mode>_z): Likewise. + (*<SVE_INT_BINARY_SD:optab><mode>3): Rename to... + (@aarch64_pred_<SVE_INT_BINARY_SD:optab><mode>): ...this. + (cond_<SVE_INT_BINARY_SD:optab><mode>): Add a "@" marker. + (@aarch64_bic<mode>, @cond_bic<mode>): New expanders. + (*v<ASHIFT:optab><mode>3): Rename to... + (@aarch64_pred_<ASHIFT:optab><mode>): ...this. + (@aarch64_sve_<SVE_SHIFT_WIDE:sve_int_op><mode>): New pattern. + (@cond_<SVE_SHIFT_WIDE:sve_int_op><mode>): New expander. + (*cond_<SVE_SHIFT_WIDE:sve_int_op><mode>_m): New pattern. + (*cond_<SVE_SHIFT_WIDE:sve_int_op><mode>_z): Likewise. + (@cond_asrd<mode>): New expander. + (*cond_asrd<mode>_2, *cond_asrd<mode>_z): New patterns. + (sdiv_pow2<mode>3): Expand to *cond_asrd<mode>_2. + (*sdiv_pow2<mode>3): Delete. + (@cond_<SVE_COND_FP_BINARY_INT:optab><mode>): New expander. + (*cond_<SVE_COND_FP_BINARY_INT:optab><mode>_2): New pattern. + (*cond_<SVE_COND_FP_BINARY_INT:optab><mode>_any): Likewise. + (@aarch64_sve_<SVE_FP_BINARY:optab><mode>): New pattern. + (@aarch64_sve_<SVE_FP_BINARY_INT:optab><mode>): Likewise. + (*<SVE_COND_FP_BINARY_REG:optab><mode>3): Rename to... + (@aarch64_pred_<SVE_COND_FP_BINARY_REG:optab><mode>): ...this. + (@aarch64_pred_<SVE_COND_FP_BINARY_INT:optab><mode>): New pattern. + (cond_<SVE_COND_FP_BINARY:optab><mode>): Add a "@" marker. + (*add<SVE_F:mode>3): Rename to... + (@aarch64_pred_add<SVE_F:mode>): ...this and add alternatives + for SVE_STRICT_GP. + (@aarch64_pred_<SVE_COND_FCADD:optab><mode>): New pattern. + (@cond_<SVE_COND_FCADD:optab><mode>): New expander. + (*cond_<SVE_COND_FCADD:optab><mode>_2): New pattern. + (*cond_<SVE_COND_FCADD:optab><mode>_any): Likewise. + (*sub<SVE_F:mode>3): Rename to... + (@aarch64_pred_sub<SVE_F:mode>): ...this and add alternatives + for SVE_STRICT_GP. + (@aarch64_pred_abd<SVE_F:mode>): New expander. + (*fabd<SVE_F:mode>3): Rename to... + (*aarch64_pred_abd<SVE_F:mode>): ...this. + (@aarch64_cond_abd<SVE_F:mode>): New expander. + (*mul<SVE_F:mode>3): Rename to... + (@aarch64_pred_<SVE_F:optab><mode>): ...this and add alternatives + for SVE_STRICT_GP. + (@aarch64_mul_lane_<SVE_F:mode>): New pattern. + (*<SVE_COND_FP_MAXMIN_PUBLIC:optab><mode>3): Rename and generalize + to... + (@aarch64_pred_<SVE_COND_FP_MAXMIN:optab><mode>): ...this. + (*<LOGICAL:optab><PRED_ALL:mode>3_ptest): New pattern. + (*<nlogical><PRED_ALL:mode>3): Rename to... + (aarch64_pred_<nlogical><PRED_ALL:mode>_z): ...this. + (*<nlogical><PRED_ALL:mode>3_cc): New pattern. + (*<nlogical><PRED_ALL:mode>3_ptest): Likewise. + (*<logical_nn><PRED_ALL:mode>3): Rename to... + (aarch64_pred_<logical_nn><mode>_z): ...this. + (*<logical_nn><PRED_ALL:mode>3_cc): New pattern. + (*<logical_nn><PRED_ALL:mode>3_ptest): Likewise. + (*fma<SVE_I:mode>4): Rename to... + (@aarch64_pred_fma<SVE_I:mode>): ...this. + (*fnma<SVE_I:mode>4): Rename to... + (@aarch64_pred_fnma<SVE_I:mode>): ...this. + (@aarch64_<sur>dot_prod_lane<vsi2qi>): New pattern. + (*<SVE_FP_TERNARY:optab><mode>4): Rename to... + (@aarch64_pred_<SVE_FP_TERNARY:optab><mode>): ...this. + (cond_<SVE_FP_TERNARY:optab><mode>): Add a "@" marker. + (@aarch64_<SVE_FP_TERNARY_LANE:optab>_lane_<mode>): New pattern. + (@aarch64_pred_<SVE_COND_FCMLA:optab><mode>): Likewise. + (@cond_<SVE_COND_FCMLA:optab><mode>): New expander. + (*cond_<SVE_COND_FCMLA:optab><mode>_4): New pattern. + (*cond_<SVE_COND_FCMLA:optab><mode>_any): Likewise. + (@aarch64_<FCMLA:optab>_lane_<mode>): Likewise. + (@aarch64_sve_tmad<mode>): Likewise. + (vcond_mask_<SVE_ALL:mode><vpred>): Add a "@" marker. + (*aarch64_sel_dup<mode>): Rename to... + (@aarch64_sel_dup<mode>): ...this. + (@aarch64_pred_cmp<cmp_op><SVE_I:mode>_wide): New pattern. + (*aarch64_pred_cmp<cmp_op><SVE_I:mode>_wide_cc): Likewise. + (*aarch64_pred_cmp<cmp_op><SVE_I:mode>_wide_ptest): Likewise. + (@while_ult<GPI:mode><PRED_ALL:mode>): Generalize to... + (@while_<while_optab_cmp><GPI:mode><PRED_ALL:mode>): ...this. + (*while_ult<GPI:mode><PRED_ALL:mode>_cc): Generalize to. + (*while_<while_optab_cmp><GPI:mode><PRED_ALL:mode>_cc): ...this. + (*while_<while_optab_cmp><GPI:mode><PRED_ALL:mode>_ptest): New pattern. + (*fcm<cmp_op><mode>): Rename to... + (@aarch64_pred_fcm<cmp_op><mode>): ...this. Make operand order + match @aarch64_pred_cmp<cmp_op><SVE_I:mode>. + (*fcmuo<mode>): Rename to... + (@aarch64_pred_fcmuo<mode>): ...this. Make operand order + match @aarch64_pred_cmp<cmp_op><SVE_I:mode>. + (@aarch64_pred_fac<cmp_op><mode>): New expander. + (@vcond_mask_<PRED_ALL:mode><mode>): New pattern. + (fold_extract_last_<mode>): Generalize to... + (@fold_extract_<last_op>_<mode>): ...this. + (@aarch64_fold_extract_vector_<last_op>_<mode>): New pattern. + (*reduc_plus_scal_<SVE_I:mode>): Replace with... + (@aarch64_pred_reduc_<optab>_<mode>): ...this pattern, making the + DImode result explicit. + (reduc_plus_scal_<mode>): Update accordingly. + (*reduc_<optab>_scal_<SVE_I:mode>): Rename to... + (@aarch64_pred_reduc_<optab>_<SVE_I:mode>): ...this. + (*reduc_<optab>_scal_<SVE_F:mode>): Rename to... + (@aarch64_pred_reduc_<optab>_<SVE_F:mode>): ...this. + (*aarch64_sve_tbl<mode>): Rename to... + (@aarch64_sve_tbl<mode>): ...this. + (@aarch64_sve_compact<mode>): New pattern. + (*aarch64_sve_dup_lane<mode>): Rename to... + (@aarch64_sve_dup_lane<mode>): ...this. + (@aarch64_sve_dupq_lane<mode>): New pattern. + (@aarch64_sve_splice<mode>): Likewise. + (aarch64_sve_<perm_insn><mode>): Rename to... + (@aarch64_sve_<perm_insn><mode>): ...this. + (*aarch64_sve_ext<mode>): Rename to... + (@aarch64_sve_ext<mode>): ...this. + (aarch64_sve_<su>unpk<perm_hilo>_<SVE_BHSI:mode>): Add a "@" marker. + (*aarch64_sve_<optab>_nontrunc<SVE_F:mode><SVE_HSDI:mode>): Rename + to... + (@aarch64_sve_<optab>_nontrunc<SVE_F:mode><SVE_HSDI:mode>): ...this. + (*aarch64_sve_<optab>_trunc<VNx2DF_ONLY:mode><VNx4SI_ONLY:mode>): + Rename to... + (@aarch64_sve_<optab>_trunc<VNx2DF_ONLY:mode><VNx4SI_ONLY:mode>): + ...this. + (@cond_<optab>_nontrunc<SVE_F:mode><SVE_HSDI:mode>): New expander. + (@cond_<optab>_trunc<VNx2DF_ONLY:mode><VNx4SI_ONLY:mode>): Likewise. + (*cond_<optab>_trunc<VNx2DF_ONLY:mode><VNx4SI_ONLY:mode>): New pattern. + (*aarch64_sve_<optab>_nonextend<SVE_HSDI:mode><SVE_F:mode>): Rename + to... + (@aarch64_sve_<optab>_nonextend<SVE_HSDI:mode><SVE_F:mode>): ...this. + (aarch64_sve_<optab>_extend<VNx4SI_ONLY:mode><VNx2DF_ONLY:mode>): Add + a "@" marker. + (@cond_<optab>_nonextend<SVE_HSDI:mode><SVE_F:mode>): New expander. + (@cond_<optab>_extend<VNx4SI_ONLY:mode><VNx2DF_ONLY:mode>): Likewise. + (*cond_<optab>_extend<VNx4SI_ONLY:mode><VNx2DF_ONLY:mode>): New + pattern. + (*aarch64_sve_<optab>_trunc<SVE_SDF:mode><SVE_HSF:mode>): Rename to... + (@aarch64_sve_<optab>_trunc<SVE_SDF:mode><SVE_HSF:mode>): ...this. + (@cond_<optab>_trunc<SVE_SDF:mode><SVE_HSF:mode>): New expander. + (*cond_<optab>_trunc<SVE_SDF:mode><SVE_HSF:mode>): New pattern. + (aarch64_sve_<optab>_nontrunc<SVE_HSF:mode><SVE_SDF:mode>): Add a + "@" marker. + (@cond_<optab>_nontrunc<SVE_HSF:mode><SVE_SDF:mode>): New expander. + (*cond_<optab>_nontrunc<SVE_HSF:mode><SVE_SDF:mode>): New pattern. + (aarch64_sve_punpk<perm_hilo>_<mode>): Add a "@" marker. + (@aarch64_brk<SVE_BRK_UNARY:brk_op>): New pattern. + (*aarch64_brk<SVE_BRK_UNARY:brk_op>_cc): Likewise. + (*aarch64_brk<SVE_BRK_UNARY:brk_op>_ptest): Likewise. + (@aarch64_brk<SVE_BRK_BINARY:brk_op>): Likewise. + (*aarch64_brk<SVE_BRK_BINARY:brk_op>_cc): Likewise. + (*aarch64_brk<SVE_BRK_BINARY:brk_op>_ptest): Likewise. + (@aarch64_sve_<SVE_PITER:sve_pred_op><mode>): Likewise. + (*aarch64_sve_<SVE_PITER:sve_pred_op><mode>_cc): Likewise. + (*aarch64_sve_<SVE_PITER:sve_pred_op><mode>_ptest): Likewise. + (aarch64_sve_cnt_pat): Likewise. + (@aarch64_sve_<ANY_PLUS:inc_dec><DI_ONLY:mode>_pat): Likewise. + (*aarch64_sve_incsi_pat): Likewise. + (@aarch64_sve_<SAT_PLUS:inc_dec><SI_ONLY:mode>_pat): Likewise. + (@aarch64_sve_<ANY_PLUS:inc_dec><VNx2DI_ONLY:mode>_pat): Likewise. + (@aarch64_sve_<ANY_PLUS:inc_dec><VNx4SI_ONLY:mode>_pat): Likewise. + (@aarch64_sve_<ANY_PLUS:inc_dec><VNx8HI_ONLY:mode>_pat): New expander. + (*aarch64_sve_<ANY_PLUS:inc_dec><VNx8HI_ONLY:mode>_pat): New pattern. + (@aarch64_sve_<ANY_MINUS:inc_dec><DI_ONLY:mode>_pat): Likewise. + (*aarch64_sve_decsi_pat): Likewise. + (@aarch64_sve_<SAT_MINUS:inc_dec><SI_ONLY:mode>_pat): Likewise. + (@aarch64_sve_<ANY_MINUS:inc_dec><VNx2DI_ONLY:mode>_pat): Likewise. + (@aarch64_sve_<ANY_MINUS:inc_dec><VNx4SI_ONLY:mode>_pat): Likewise. + (@aarch64_sve_<ANY_MINUS:inc_dec><VNx8HI_ONLY:mode>_pat): New expander. + (*aarch64_sve_<ANY_MINUS:inc_dec><VNx8HI_ONLY:mode>_pat): New pattern. + (@aarch64_pred_cntp<mode>): Likewise. + (@aarch64_sve_<ANY_PLUS:inc_dec><DI_ONLY:mode><PRED_ALL:mode>_cntp): + New expander. + (*aarch64_sve_<ANY_PLUS:inc_dec><DI_ONLY:mode><PRED_ALL:mode>_cntp) + (*aarch64_incsi<PRED_ALL:mode>_cntp): New patterns. + (@aarch64_sve_<SAT_PLUS:inc_dec><SI_ONLY:mode><PRED_ALL:mode>_cntp): + New expander. + (*aarch64_sve_<SAT_PLUS:inc_dec><SI_ONLY:mode><PRED_ALL:mode>_cntp): + New pattern. + (@aarch64_sve_<ANY_PLUS:inc_dec><VNx2DI_ONLY:mode>_cntp): New expander. + (*aarch64_sve_<ANY_PLUS:inc_dec><VNx2DI_ONLY:mode>_cntp): New pattern. + (@aarch64_sve_<ANY_PLUS:inc_dec><VNx4SI_ONLY:mode>_cntp): New expander. + (*aarch64_sve_<ANY_PLUS:inc_dec><VNx4SI_ONLY:mode>_cntp): New pattern. + (@aarch64_sve_<ANY_PLUS:inc_dec><VNx8HI_ONLY:mode>_cntp): New expander. + (*aarch64_sve_<ANY_PLUS:inc_dec><VNx8HI_ONLY:mode>_cntp): New pattern. + (@aarch64_sve_<ANY_MINUS:inc_dec><DI_ONLY:mode><PRED_ALL:mode>_cntp): + New expander. + (*aarch64_sve_<ANY_MINUS:inc_dec><DI_ONLY:mode><PRED_ALL:mode>_cntp) + (*aarch64_incsi<PRED_ALL:mode>_cntp): New patterns. + (@aarch64_sve_<SAT_MINUS:inc_dec><SI_ONLY:mode><PRED_ALL:mode>_cntp): + New expander. + (*aarch64_sve_<SAT_MINUS:inc_dec><SI_ONLY:mode><PRED_ALL:mode>_cntp): + New pattern. + (@aarch64_sve_<ANY_MINUS:inc_dec><VNx2DI_ONLY:mode>_cntp): New + expander. + (*aarch64_sve_<ANY_MINUS:inc_dec><VNx2DI_ONLY:mode>_cntp): New pattern. + (@aarch64_sve_<ANY_MINUS:inc_dec><VNx4SI_ONLY:mode>_cntp): New + expander. + (*aarch64_sve_<ANY_MINUS:inc_dec><VNx4SI_ONLY:mode>_cntp): New pattern. + (@aarch64_sve_<ANY_MINUS:inc_dec><VNx8HI_ONLY:mode>_cntp): New + expander. + (*aarch64_sve_<ANY_MINUS:inc_dec><VNx8HI_ONLY:mode>_cntp): New pattern. + * config/aarch64/arm_sve.h: New file. + * config/aarch64/aarch64-sve-builtins.h: Likewise. + * config/aarch64/aarch64-sve-builtins.cc: Likewise. + * config/aarch64/aarch64-sve-builtins.def: Likewise. + * config/aarch64/aarch64-sve-builtins-base.h: Likewise. + * config/aarch64/aarch64-sve-builtins-base.cc: Likewise. + * config/aarch64/aarch64-sve-builtins-base.def: Likewise. + * config/aarch64/aarch64-sve-builtins-functions.h: Likewise. + * config/aarch64/aarch64-sve-builtins-shapes.h: Likewise. + * config/aarch64/aarch64-sve-builtins-shapes.cc: Likewise. + +2019-10-29 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/aarch64-sve.md (@aarch64_sve_rev<PRED_ALL:mode>): + New pattern. + * config/aarch64/aarch64.c (aarch64_evpc_rev_global): Handle all + SVE modes. + +2019-10-29 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/aarch64.md (FFR_REGNUM, FFRT_REGNUM): New constants. + * config/aarch64/aarch64.h (FIRST_PSEUDO_REGISTER): Bump to + FFRT_REGNUM + 1. + (FFR_REGS, PR_AND_FFR_REGS): New register classes. + (REG_CLASS_NAMES, REG_CLASS_CONTENTS): Add entries for them. + * config/aarch64/aarch64.c (pr_or_ffr_regnum_p): New function. + (aarch64_hard_regno_nregs): Handle the new register classes. + (aarch64_hard_regno_mode_ok): Likewise. + (aarch64_regno_regclass): Likewise. + (aarch64_class_max_nregs): Likewise. + (aarch64_register_move_cost): Likewise. + (aarch64_conditional_register_usage): Don't treat FFR and FFRT + as general register_operands. + +2019-10-29 Martin Liska <mliska@suse.cz> + + * ggc-common.c: One can't subtract unsigned types + in compare function. + +2019-10-29 Martin Liska <mliska@suse.cz> + + * cgraphunit.c (symbol_table::compile): Pass + title as dump_memory_report argument. + * toplev.c (dump_memory_report): New argument. + (finalize): Pass new argument. + * toplev.h (dump_memory_report): Add argument. + +2019-10-29 Martin Liska <mliska@suse.cz> + + * ggc-common.c: Move Leak to the first column. + +2019-10-29 Martin Liska <mliska@suse.cz> + + * cgraphunit.c (symbol_table::compile): Remove argument + for dump_memory_report. + * ggc-common.c (dump_ggc_loc_statistics): Likewise. + (compare_final): Remove in order to make report + better readable. + * ggc.h (dump_ggc_loc_statistics): Remove argument. + * mem-stats.h (mem_alloc_description::get_list): + Do not pass cmp. + (mem_alloc_description::dump): Likewise here. + * toplev.c (dump_memory_report): Remove final + argument. + (finalize): Likewise. + * toplev.h (dump_memory_report): Remove argument. + +2019-10-29 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/aarch64.c (aarch64_sve_cmp_immediate_p) + (aarch64_simd_shift_imm_p): Accept scalars as well as vectors. + * config/aarch64/predicates.md (aarch64_sve_cmp_vsc_immediate) + (aarch64_sve_cmp_vsd_immediate): Accept "const_int", but don't + accept "const". + +2019-10-29 Richard Sandiford <richard.sandiford@arm.com> + + * coretypes.h (string_int_pair): New typedef. + * langhooks-def.h (LANG_HOOKS_SIMULATE_ENUM_DECL): Define. + (LANG_HOOKS_FOR_TYPES_INITIALIZER): Include it. + * langhooks.h (lang_hooks_for_types::simulate_enum_decl): New hook. + +2019-10-29 Richard Sandiford <richard.sandiford@arm.com> + + * langhooks.h (lang_hooks::simulate_builtin_function_decl): New hook. + (simulate_builtin_function_decl): Declare. + * langhooks-def.h (LANG_HOOKS_SIMULATE_BUILTIN_FUNCTION_DECL): Define. + (LANG_HOOKS_INITIALIZER): Include it. + * langhooks.c (add_builtin_function_common): Rename to... + (build_builtin_function): ...this. Add a location parameter and use + it instead of BUILTINS_LOCATION. Remove the hook parameter and return + the decl instead. + (add_builtin_function): Update accordingly, passing the returned + decl to the lang hook. + (add_builtin_function_ext_scope): Likewise + (simulate_builtin_function_decl): New function. + +2019-10-29 Jakub Jelinek <jakub@redhat.com> + + * doc/install.texi (--enable-offload-targets): Fix up a typo in the + example, use actual names of supported offload targets. + + PR target/92258 + * config/i386/sse.md (iptr): Revert 2019-10-27 change. + +2019-10-28 Martin Sebor <msebor@redhat.com> + + * tree-ssa-strlen.c (get_addr_stridx): Add argument and use it. + (handle_store): Pass argument to get_addr_stridx. + +2019-10-28 Martin Sebor <msebor@redhat.com> + + PR tree-optimization/92226 + * tree-ssa-strlen.c (compare_nonzero_chars): Return -1 also when + the offset is in the open range outlined by SI's length. + +2019-10-28 Martin Sebor <msebor@redhat.com> + + PR c/66970 + * doc/cpp.texi (__has_builtin): Document. + * doc/extend.texi (__builtin_frob_return_addr): Correct spelling. + +2019-10-28 Mihailo Stojanovic <mistojanovic@wavecomp.com> + + PR target/82981 + * config/mips/mips.md (<u>mulditi3): Generate patterns for high + doubleword and low doubleword result of multiplication on + MIPS64R6. + + * config/mips/mips.c (DIRECT_BUILTIN_PURE): New macro. Add a + pure qualifier to the built-in. + (MSA_BUILTIN_PURE): New macro. Add a pure qualifier to the MSA + built-ins. + (struct mips_builtin_description): Add is_pure flag. + (mips_init_builtins): Mark built-in as pure if the flag in the + corresponding mips_builtin_description struct is set. + + * config/mips/mips-msa.md (msa_insert_<msaftm_f>): Add an + alternative which covers the floating-point input value. Also + forbid the split of insert.d pattern for floating-point values. + +2019-10-28 Andrew Burgess <andrew.burgess@embecosm.com> + + * config.gcc: Add riscv-sr.o to extra_objs for riscv. + * config/riscv/riscv-sr.c: New file. + * config/riscv/riscv.c (riscv_reorg): New function. + (TARGET_MACHINE_DEPENDENT_REORG): Define. + * config/riscv/riscv.h (SIBCALL_REG_P): Define. + (riscv_remove_unneeded_save_restore_calls): Declare. + * config/riscv/t-riscv (riscv-sr.o): New build rule. + +2019-10-28 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org> + + PR tree-optimization/92163 + * tree-ssa-dse.c (delete_dead_or_redundant_assignment): New param + need_eh_cleanup with default value NULL. Gate on need_eh_cleanup + before calling bitmap_set_bit. + (dse_optimize_redundant_stores): Pass global need_eh_cleanup to + delete_dead_or_redundant_assignment. + (dse_dom_walker::dse_optimize_stmt): Likewise. + * tree-ssa-dse.h (delete_dead_or_redundant_assignment): Adjust prototype. + +2019-10-28 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org> + + PR middle-end/91272 + * tree-vect-stmts.c (vectorizable_condition): Support + EXTRACT_LAST_REDUCTION with fully-masked loops. + +2019-10-28 Richard Biener <rguenther@suse.de> + + PR tree-optimization/92252 + * tree-vect-slp.c (vect_get_and_check_slp_defs): Adjust + STMT_VINFO_REDUC_IDX when swapping operands. + +2019-10-28 Richard Biener <rguenther@suse.de> + + PR tree-optimization/92241 + * tree-vect-loop.c (vect_fixup_scalar_cycles_with_patterns): When + we failed to update the reduction index do not use the pattern + stmts for the reduction chain. + (vectorizable_reduction): When the reduction chain is corrupt, + fail. + * tree-vect-patterns.c (vect_mark_pattern_stmts): Stop when we + fail to update the reduction chain. + +2019-10-28 Richard Biener <rguenther@suse.de> + + * tree-vect-loop.c (vect_create_epilog_for_reduction): Use + STMT_VINFO_REDUC_IDX from the actual stmt. + (vect_transform_reduction): Likewise. + (vectorizable_reduction): Compute the reduction chain length, + do not recompute the reduction operand index. Remove no longer + necessary restriction for condition reduction chains. + +2019-10-28 Uroš Bizjak <ubizjak@gmail.com> + + PR target/92225 + * config/i386/sse.md (REDUC_SSE_SMINMAX_MODE): Use TARGET_SSE4_2 + condition for V2DImode. + +2019-10-28 Uroš Bizjak <ubizjak@gmail.com> + + * config/i386/sse.md (sse_cvtss2si<rex64namesuffix>_2): + Remove %k operand modifier. + (*vec_extractv2df_1_sse): Remove %q operand modifier. + +2019-10-28 Ilya Leoshkevich <iii@linux.ibm.com> + + PR rtl-optimization/92007 + * cfgcleanup.c (thread_jump): Add an assertion that we don't + call it after reload if hot/cold partitioning has been done. + (class pass_postreload_jump): Rename to + pass_jump_after_combine. + (make_pass_postreload_jump): Rename to + make_pass_jump_after_combine. + * passes.def(pass_postreload_jump): Move before reload, rename + to pass_jump_after_combine. + * tree-pass.h (make_pass_postreload_jump): Rename to + make_pass_jump_after_combine. + +2019-10-25 Jan Hubicka <hubicka@ucw.cz> + + PR ipa/92242 + * ipa-fnsummary.c (ipa_merge_fn_summary_after_inlining): Check + for missing EDGE_REF + * ipa-prop.c (update_jump_functions_after_inlining): Likewise. + +2019-10-25 Jiufu Guo <guojiufu@linux.ibm.com> + + PR tree-optimization/88760 + * config/rs6000/rs6000-common.c (rs6000_option_optimization_table): + Enable -funroll-loops for -O2 and above. + * config/rs6000/rs6000.c (rs6000_option_override_internal): Set + PARAM_MAX_UNROLL_TIMES to 2 and PARAM_MAX_UNROLLED_INSNS to 20, and + do not turn on web and rngreg implicitly, if the unroller is not + explicitly enabled. + +2019-10-27 Jan Hubicka <hubicka@ucw.cz> + + * ipa-prop.c (ipa_propagate_indirect_call_infos): Do not remove + jump functions. + +2019-10-27 Eric Botcazou <ebotcazou@adacore.com> + + * cgraph.c (cgraph_node::rtl_info): Fix cut&pasto in comment. + * cgraph.h (cgraph_node::rtl_info): Likewise. + +2019-10-27 Jan Hubicka <hubicka@ucw.cz> + + * ipa-cp.c (propagate_constants_across_call): If args are not available + just drop everything to varying. + (find_aggregate_values_for_callers_subset): Watch for missing + edge summary. + (find_more_scalar_values_for_callers_subs): Likewise. + * ipa-prop.c (ipa_compute_jump_functions_for_edge, + update_jump_functions_after_inlining, propagate_controlled_uses): + Watch for missing summaries. + (ipa_propagate_indirect_call_infos): Remove summary after propagation + is finished. + (ipa_write_node_info): Watch for missing summaries. + (ipa_read_edge_info): Create new ref. + (ipa_edge_args_sum_t): Add remove. + (IPA_EDGE_REF_GET_CREATE): New macro. + * ipa-fnsummary.c (evaluate_properties_for_edge): Watch for missing + edge summary. + (remap_edge_change_prob): Likewise. + +2019-10-27 Jan Hubicka <hubicka@ucw.cz> + + * ipa-inline-transform.c (inline_call): update function summaries + after expanidng thunk. + +2019-10-27 Jan Hubicka <hubicka@ucw.cz> + + * ipa-icf.c (sem_function::merge): Update function summaries. + * ipa-prop.h (ipa_get_param): Do not sanity check for WPA. + +2019-10-27 Hongtao Liu <hongtao.liu@intel.com> + + * config/i386/sse.md (*<sse>_vm<plusminus_insn><mode>3, + <sse>_vm<multdiv_mnemonic><mode>3): Remove <iptr> since + operand already has scalar mode. + (iptr): Remove SF/DF. + +2019-10-26 Segher Boessenkool <segher@kernel.crashing.org> + + PR target/91289 + * config/rs6000/rs6000-logue.c (rs6000_emit_allocate_stack): Don't add + an immediate to r0; use r11 instead. Save and restore r11 to r0 around + this. + +2019-10-26 Hongtao Liu <hongtao.liu@intel.com> + + * config/i386/sse.md + (<sse>_vm<plusminus_insn><mode>3<mask_scalar_name><round_scalar_name>, + <sse>_vm<multdiv_mnemonic><mode>3<mask_scalar_name><round_scalar_name>, + <sse>_vmsqrt<mode>2<mask_scalar_name><round_scalar_name>, + <sse>_vm<code><mode>3<mask_scalar_name><round_saeonly_scalar_name>, + <sse>_vmmaskcmp<mode>3): + Change predicates from vector_operand to nonimmediate_operand, + constraints xBm to xm, since scalar operations don't need + memory address alignment. + (avx512f_vmcmp<mode>3<round_saeonly_name>, + avx512f_vmcmp<mode>3_mask<round_saeonly_name>): Replace + round_saeonly_nimm_predicate with + round_saeonly_nimm_scalar_predicate. + (fmai_vmfmadd_<mode><round_name>, fmai_vmfmsub_<mode><round_name>, + fmai_vmfnmadd_<mode><round_name>,fmai_vmfnmsub_<mode><round_name>, + *fmai_fmadd_<mode>, *fmai_fmsub_<mode>, + *fmai_fnmadd_<mode><round_name>, *fmai_fnmsub_<mode><round_name>, + avx512f_vmfmadd_<mode>_mask3<round_name>, + avx512f_vmfmadd_<mode>_maskz_1<round_name>, + *avx512f_vmfmsub_<mode>_mask<round_name>, + avx512f_vmfmsub_<mode>_mask3<round_name>, + *avx512f_vmfmsub_<mode>_maskz_1<round_name>, + *avx512f_vmfnmadd_<mode>_mask<round_name>, + *avx512f_vmfnmadd_<mode>_mask3<round_name>, + *avx512f_vmfnmadd_<mode>_maskz_1<round_name>, + *avx512f_vmfnmsub_<mode>_mask<round_name>, + *avx512f_vmfnmsub_<mode>_mask3<round_name>, + *avx512f_vmfnmsub_<mode>_maskz_1<round_name>, + cvtusi2<ssescalarmodesuffix>32<round_name>, + cvtusi2<ssescalarmodesuffix>64<round_name>, ): Replace + round_nimm_predicate with round_nimm_scalr_predicate. + (avx512f_sfixupimm<mode><sd_maskz_name><round_saeonly_name>, + avx512f_sfixupimm<mode>_mask<round_saeonly_name>, + avx512er_vmrcp28<mode><round_saeonly_name>, + avx512er_vmrsqrt28<mode><round_saeonly_name>, + ): Replace round_saeonly_nimm_predicate with + round_saeonly_nimm_scalar_predicate. + (avx512dq_vmfpclass<mode><mask_scalar_merge_name>): Replace + vector_operand with nonimmediate_operand. + * config/i386/subst.md (round_scalar_nimm_predicate, + round_saeonly_scalar_nimm_predicate): Replace + vector_operand with nonimmediate_operand. + +2019-10-26 Hongtao Liu <hongtao.liu@intel.com> + + PR target/89071 + * config/i386/i386.md (*rcpsf2_sse): Add + avx_partial_xmm_update, prefer m constraint for TARGET_AVX. + (*rsqrtsf2_sse): Ditto. + (*sqrt<mode>2_sse): Ditto. + (sse4_1_round<mode>2): separate constraint vm, add + avx_partail_xmm_update, prefer m constraint for TARGET_AVX. + * config/i386/sse.md (*sse_vmrcpv4sf2"): New define_insn used + by pass rpad. + (*<sse>_vmsqrt<mode>2<mask_scalar_name><round_scalar_name>*): + Ditto. + (*sse_vmrsqrtv4sf2): Ditto. + (*avx512f_rndscale<mode><round_saeonly_name>): Ditto. + (*sse4_1_round<ssescalarmodesuffix>): Ditto. + (sse4_1_round<ssescalarmodesuffix>): Add m constraint and + <iptr> pointer size modifier since vround support memory operand. + +2019-10-18 Georg-Johann Lay <avr@gjlay.de> + + PR target/85969 + * config/avr/gen-avr-mmcu-specs.c (str_prefix_p): Remove unused + static function. + +2019-10-25 Cesar Philippidis <cesar@codesourcery.com> + Tobias Burnus <tobias@codesourcery.com> + + * gimplify.c (oacc_default_clause): Privatize fortran common blocks. + (omp_notice_variable): Defer the expansion of DECL_VALUE_EXPR for + common block decls. + +2019-10-25 Richard Biener <rguenther@suse.de> + + PR tree-optimization/92222 + * tree-vect-slp.c (_slp_oprnd_info::first_pattern): Remove. + (_slp_oprnd_info::second_pattern): Likewise. + (_slp_oprnd_info::any_pattern): New. + (vect_create_oprnd_info): Adjust. + (vect_get_and_check_slp_defs): Compute whether any stmt is + in a pattern. + (vect_build_slp_tree_2): Avoid building up a node from scalars + if any of the operand defs, not just the first, is in a pattern. + +2019-10-25 Richard Biener <rguenther@suse.de> + + * tree-vect-slp.c (vect_get_and_check_slp_defs): Only fail + swapping if we actually have to modify the IL on a shared stmt. + (vect_build_slp_tree_2): Never fail swapping on shared stmts + because we no longer modify the IL. + +2019-10-25 Martin Liska <mliska@suse.cz> + + * tree.c (dump_tree_statistics): Use sorted index 'j' and not 'i'. + +2019-10-25 Richard Sandiford <richard.sandiford@arm.com> + + * tree-vect-loop.c (vectorizable_reduction): Restrict the + LOOP_VINFO_CAN_FULLY_MASK_P handling to cases that will be + handled by vect_transform_reduction. Allow fully-masked loops + to be used with reduction chains. + * tree-vect-stmts.c (vectorizable_operation): Handle reduction + operations in fully-masked loops. + (vectorizable_condition): Reject EXTRACT_LAST_REDUCTION + operations in fully-masked loops. + +2019-10-25 Richard Biener <rguenther@suse.de> + + * tree-vect-loop.c (vectorizable_reduction): Verify + STMT_VINFO_REDUC_IDX on the to be vectorized stmts is set up + correctly. + * tree-vect-patterns.c (vect_mark_pattern_stmts): Transfer + STMT_VINFO_REDUC_IDX from the original stmts to the pattern + stmts. + +2019-10-24 Jakub Jelinek <jakub@redhat.com> + + * gimplify.h (omp_construct_selector_matches): Declare. + * gimplify.c (struct gimplify_omp_ctx): Add code member. + (gimplify_call_expr): Call omp_resolve_declare_variant and remap + called function if needed for flag_openmp. + (gimplify_scan_omp_clauses): Set ctx->code. + (omp_construct_selector_matches): New function. + * omp-general.h (omp_constructor_traits_to_codes, + omp_context_selector_matches, omp_resolve_declare_variant): Declare. + * omp-general.c (omp_constructor_traits_to_codes, + omp_context_selector_matches, omp_resolve_declare_variant): New + functions. + + * config/arc/arc.c (hwloop_optimize): Add missing space in string + literal. + * config/rx/rx.c (rx_print_operand): Likewise. + * tree-vect-data-refs.c (vect_analyze_data_refs): Likewise. + * tree-ssa-loop-ch.c (should_duplicate_loop_header_p): Likewise. + * ipa-sra.c (create_parameter_descriptors, process_scan_results): + Likewise. + * genemit.c (emit_c_code): Likewise. + * plugin.c (try_init_one_plugin): Likewise. Formatting fix. + +2019-10-24 Jan Hubicka <hubicka@ucw.cz> + + * symbols-summary.h (fast_function_summary<T *, V>::release, + fast_call_summary<T *, V>::release): Free m_vector. + +2019-10-24 Jan Hubicka <hubicka@ucw.cz> + + * cgraphunit.c (symbol_table::process_new_functions): Call + ipa_free_size_summary. + * ipa-cp.c (ipcp_cloning_candidate_p): Update. + (devirtualization_time_bonus): Update. + (ipcp_propagate_stage): Update. + * ipa-fnsummary.c (ipa_size_summaries): New. + (ipa_fn_summary_alloc): Alloc size summary. + (dump_ipa_call_summary): Update. + (ipa_dump_fn_summary): Update. + (analyze_function_body): Update. + (compute_fn_summary): Likewise. + (ipa_get_stack_frame_offset): New function. + (inline_update_callee_summaries): Do not update frame offsets. + (ipa_merge_fn_summary_after_inlining): Update frame offsets here; + remove call and function summary. + (ipa_update_overall_fn_summary): Update. + (inline_read_section): Update. + (ipa_fn_summary_write): Update. + (ipa_free_fn_summary): Do not remove summaries. + (ipa_free_size_summary): New. + (release summary pass): Also run at WPA. + * ipa-fnsummary.h (ipa_size_summary): Declare. + (ipa_fn_summary): Remove size, self_size, stack_frame_offset, + estimated_self_stack_size. + (ipa_size_summary_t): New type. + (ipa_size_summaries): Declare. + (ipa_free_size_summary): Declare. + (ipa_get_stack_frame_offset): Declare. + * ipa-icf.c (sem_function::merge): Update. + * ipa-inline-analysis.c (estimate_size_after_inlining): Update. + (estimate_growth): Update. + (growth_likely_positive): Update. + (clone_inlined_nodes): Update. + (inline_call): Update. + * ipa-inline.c (caller_growth_limits): Update. + (edge_badness): Update. + (recursive_inlining): Update. + (inline_small_functions): Update. + (inline_to_all_callers_1): Update. + * ipa-prop.h (ipa_edge_args_sum_t): Update comment. + +2019-10-24 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/altivec.md (altivec_vavgu<VI_char>): Rename to... + (uavg<mode>3_ceil): ... This. + (altivec_vavgs<VI_char>): Rename to... + (avg<mode>3_ceil): ... This. + * config/rs6000/rs6000-builtin.def (VAVGUB, VAVGSB, VAVGUH, VAVGSH, + VAVGUW, VAVGSW): Adjust. + +2019-10-24 Nathan Sidwell <nathan@acm.org> + + * dumpfile.c (dump_begin): Reorder decls to use RAII. + +2019-10-24 Martin Liska <mliska@suse.cz> + + * symbol-summary.h (gt_pch_nx): Mark all functions + with gcc_unreachable as we do not expect to be called. + +2019-10-24 Richard Biener <rguenther@suse.de> + + * tree-vect-slp.c (vect_get_and_check_slp_defs): For reduction + chains try harder with operand swapping and instead of + putting a shifted chain into the reduction operands put + a repetition of the final reduction op there as if we'd + reassociate the expression. + +2019-10-24 Jan Hubicka <hubicka@ucw.cz> + + * ipa-reference.c (ipa_reference_optimization_summary_d): Rename + statics_not_read and statics_not_written to statics_read and + statics_written respectively. + (no_module_statics): New static var. + (ipa_reference_get_not_read_global): Rename to ... + (ipa_reference_get_read_global): ... this. + (ipa_reference_get_not_written_global): Rename to ... + (ipa_reference_get_written_global): ... this. + (dump_static_vars_set_to_file): Dump no_module_statics. + (copy_static_var_set): Add for propagation parameter. + (ipa_init): Initialize no_module_statics. + (ipa_ref_opt_summary_t::duplicate): Update. + (ipa_ref_opt_summary_t::remove): Update. + (propagate): Update. + (write_node_summary_p): Look correctly for bitmap differences. + (ipa_reference_write_optimization_summary): Update. + (ipa_reference_read_optimization_summary): Update. + * ipa-reference.h + (ipa_reference_get_not_read_global): Rename to ... + (ipa_reference_get_read_global): ... this. + (ipa_reference_get_not_written_global): Rename to ... + (ipa_reference_get_written_global): ... this. + * tree-ssa-alias.c (ref_maybe_used_by_call_p_1): Update. + (call_may_clobber_ref_p_1): Update. + +2019-10-24 Jozef Lawrynowicz <jozef.l@mittosystems.com> + + * config/msp430/msp430.c (msp430_hard_regno_nregs_has_padding): Remove + and add comment. + (msp430_hard_regno_nregs_with_padding): Remove. + +2019-10-24 Jozef Lawrynowicz <jozef.l@mittosystems.com> + + * config/msp430/constraints.md: Allow post_inc for "Ya" constraint. + * config/msp430/msp430.md (430x_shift_left): Use RLAM when the constant + shift amount is between 1 and 4. + (430x_arithmetic_shift_right): Use RRAM when the constant shift amount + is between 1 and 4. + +2019-10-24 Richard Biener <rguenther@suse.de> + + PR tree-optimization/92205 + * tree-vect-loop.c (vectorizable_reduction): Restrict + search for alternate vectype_in to lane-reducing patterns + we support. + +2019-10-24 Richard Biener <rguenther@suse.de> + + PR tree-optimization/92203 + * treee-ssa-sccvn.c (eliminate_dom_walker::eliminate_stmt): + Skip eliminating conversion stmts inserted by insertion. + +2019-10-24 Ilya Leoshkevich <iii@linux.ibm.com> + + * config/s390/s390.c (s390_get_thread_pointer): Use + gen_get_thread_pointer. + (s390_expand_split_stack_prologue): Likewise. + * config/s390/s390.md (UNSPEC_GET_TP): New UNSPEC. + (*get_tp_31): New 31-bit splitter for UNSPEC_GET_TP. + (*get_tp_64): New 64-bit splitter for UNSPEC_GET_TP. + (get_thread_pointer<mode>): Use UNSPEC_GET_TP, use + parameterized name. + +2019-10-24 Richard Biener <rguenther@suse.de> + + * tree-vect-slp.c (vect_analyze_slp): When reduction group + SLP discovery fails try to handle the reduction as part + of SLP reduction discovery. + +2019-10-23 Michael Meissner <meissner@linux.ibm.com> + + * config/rs6000/rs6000-protos.h (rs6000_adjust_insn_length): New + declaration. + * config/rs6000/rs6000.c (rs6000_insn_cost): Use num_insns insn + attribute if it exists, rather than the insn size. If we use the + insn size, adjust the size to remove the extra size that prefixed + instructions take. + (rs6000_adjust_insn_length): New function. + * config/rs6000/rs6000.h (ADJUST_INSN_LENGTH): New target hook to + update the instruction sized if prefixed instructions are used. + * config/rs6000/rs6000.md (prefixed_length attribute): Delete. + (non_prefixed_length attribute): Delete. + (num_insns attribute): New insn attribute to return the number of + instructions. + (max_prefixed_insns attribute): New insn attribute to return the + maximum number of prefixed instructions in an insn. + (length attribute): Do not adjust for prefix instructions here, + punt to ADJUST_INSN_LENGTH. + (mov<mode>_64bit): Set max_prefixed_insns and num_insns. + (movtd_64bit_nodm): Set max_prefixed_insns and num_insns. + (mov<mode>_ppc64): Set max_prefixed_insns and num_insns. + * config/rs6000/vsx.md: (vsx_mov<mode>_64bit): Set + max_prefixed_insns and num_insns. + + * config/rs6000/rs6000.md (mov<mode>_64bit_dm): Reformat. + (movtd_64bit_nodm): Reformat. + (mov<mode>_32bit): Reformat. + (mov<mode>_softfloat): Reformat. + (FMOVE128_GPR splitter): Reformat. + (DIFD splitter): Reformat. + (TI2 splitter): Reformat. + * config/rs6000/predicates.md (lwa_operand): If the bottom two + bits of the offset for the memory address are non-zero, use PLWA + if prefixed instructions are available. + +2019-10-23 Jan Hubicka <hubicka@ucw.cz> + + * lto-streamer-out.c (cmp_symbol_files): Watch for overflow. + +2019-10-23 Jan Hubicka <hubicka@ucw.cz> + + * ipa-reference.c (varpool_removal_hook, ipa_reference_c_finalize): Fix + previous patch. + +2019-10-23 Jan Hubicka <hubicka@ucw.cz> + + * lto-streamer-out.c (output_constructor): Push CTORS_OUT timevar. + (cmp_symbol_files): New. + (lto_output): Copy sections in file order. + * lto-streamer.h (lto_file_decl_data): Add field order. + +2019-10-23 Jan Hubicka <hubicka@ucw.cz> + + * ipa-reference.h (ipa_reference_var_uid): Move offline. + * ipa-reference.c (reference_vars_map_t): new type. + (ipa_reference_vars_map, ipa_reference_vars_uids): New static vars. + (ipa_reference_var_uid): Implement. + (varpool_node_hooks): New static var. + (varpool_removal_hook): New function. + (is_improper): Do not check bitmap for id==-1 + (get_static_name): Update. + (ipa_init): Initialize new datastructures. + (analyze_function): Do not recompute ids. + (propagate): Free reference_vars_to_consider. + (stream_out_bitmap): Update. + (ipa_reference_read_optimization_summary): Update. + +2019-10-23 qing zhao <qing.zhao@oracle.com> + + PR gcov-profile/91971 + * coverage.c (coverage_init): Mangle the full path of filename when + filename is a absolute path. + +2019-10-23 Jozef Lawrynowicz <jozef.l@mittosystems.com> + + * config/msp430/msp430-protos.h (msp430_has_hwmult): New. + * config/msp430/msp430.c (msp430_no_hwmult): Remove. + (msp430_has_hwmult): New. + (msp430_output_labelref): + s/msp430_hwmult_type != MSP430_HWMULT_NONE/msp430_has_hwmult ()/ + * config/msp430/msp430.md (mulhisi3): Likewise. + (umulhisi3): Likewise. + (mulsidi3): Likewise. + (umulsidi3): Likewise. + +2019-10-23 Jan Hubicka <hubicka@ucw.cz> + + PR ipa/92074 + * params.def (inline-heuristics-hint-percent): Set to 600. + +2019-10-23 Richard Biener <rguenther@suse.de> + + PR tree-optimization/65930 + * tree-vect-loop.c (check_reduction_path): Allow conversions + that only change the sign. + (vectorizable_reduction): Relax latch def stmts we handle further. + +2019-10-23 Jakub Jelinek <jakub@redhat.com> + + PR debug/90231 + * tree-ssa-loop-ivopts.c (get_debug_computation_at): New function. + (remove_unused_ivs): Use it instead of get_computation_at. When + choosing best candidate, only consider candidates where + get_debug_computation_at actually returns non-NULL. + +2019-10-23 Eric Botcazou <ebotcazou@adacore.com> + + PR tree-optimization/92131 + * tree-vrp.c (extract_range_from_plus_minus_expr): If the resulting + range would be symbolic, drop to varying for any explicit overflow + in the constant part or if neither range is a singleton. + +2019-10-23 Martin Liska <mliska@suse.cz> + + PR middle-end/81669 + * fibonacci_heap.h (fibonacci_node::fibonacci_node): + Initialize m_data. + +2019-10-23 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Use + int_mode_for_mode rather than mode_for_int_vector for scalars. + +2019-10-23 Richard Biener <rguenther@suse.de> + + PR tree-optimization/92179 + * tree-vect-stmts.c (vectorizable_shift): For shift args + that are all the same remove type restriction in the SLP case. + Adjust SLP code to handle converting of the shift arg to + only apply in case the modes are different. + +2019-10-23 Martin Liska <mliska@suse.cz> + + PR ipa/91969 + * ipa-inline.c (recursive_inlining): Do not print + when curr->count is not initialized. + +2019-10-23 Richard Biener <rguenther@suse.de> + + * tree-vect-slp.c (vect_build_slp_tree_2): Do not build + op from scalars in case there's a constant operand in its + definition. + +2019-10-23 Iain Sandoe <iain@sandoe.co.uk> + + * config/rs6000/darwin.h (ASM_OUTPUT_MAX_SKIP_ALIGN): Guard + against out of range max skip or log values. + +2019-10-22 Giuliano Belinassi <giuliano.belinassi@usp.br> + + * cgraph.c (dump_graphviz): Change name to dump_name + +2019-10-22 Richard Earnshaw <rearnsha@arm.com> + + * config/arm/arm.md (rsbsi_carryin_reg): New pattern. + * config/arm/arm.c (arm_rtx_costs_internal, case MINUS): Handle + subtraction from a carry operation. + +2019-10-22 Richard Earnshaw <rearnsha@arm.com> + + * config/arm/predicates.md (arm_borrow_operation): Handle CC_ADCmode. + +2019-10-22 Richard Biener <rguenther@suse.de> + + PR tree-optimization/92173 + * tree-vect-loop.c (vectorizable_reduction): If + vect_transform_reduction cannot handle code-generation try without + the single-def-use-cycle optimization. Pass optab_vector to + optab_for_tree_code to get vector shifts as that's what we'd + generate. + +2019-10-22 Michael Matz <matz@suse.de> + + PR middle-end/90796 + * gimple-loop-jam.c (any_access_function_variant_p): New function. + (adjust_unroll_factor): Use it to constrain safety, new parameter. + (tree_loop_unroll_and_jam): Adjust call and profitable unroll factor. + +2019-10-22 Richard Biener <rguenther@suse.de> + + PR tree-optimization/92173 + * tree-vect-loop.c (vectorizable_reduction): If + vect_transform_reduction cannot handle code-generation try without + the single-def-use-cycle optimization. Pass optab_vector to + optab_for_tree_code to get vector shifts as that's what we'd + generate. + +2019-10-22 Martin Liska <mliska@suse.cz> + + * diagnostic-format-json.cc (json_from_expanded_location): + Use json::integer_number. + * gcov.c (output_intermediate_json_line): Use new + json::integer_number. + (output_json_intermediate_file): Likewise. + * json.cc (number::print): Move to ... + (float_number::print): ... this. + (integer_number::print): New. + (test_writing_numbers): Move to ... + (test_writing_float_numbers): ... this. + (test_writing_integer_numbers): New. + (json_cc_tests): Register test_writing_integer_numbers. + * json.h (class value): Add forward declaration + for float_number and integer_number. + (enum kind): Add JSON_INTEGER and JSON_FLOAT. + (class number): Move to ... + (class float_number): ... this. + (class integer_number): New. + * optinfo-emit-json.cc (optrecord_json_writer::impl_location_to_json): + Use json::integer_number. + (optrecord_json_writer::location_to_json): Likewise. + (optrecord_json_writer::profile_count_to_json): Likewise. + (optrecord_json_writer::pass_to_json): Likewise. + +2019-10-22 Richard Sandiford <richard.sandiford@arm.com> + + * tree-vect-slp.c (vect_slp_bb_region): Check whether + autodetected_vector_size rather than vector_size is zero. + * tree-vect-loop.c (vect_analyze_loop): Likewise. + Set autodetected_vector_size immediately after calling + vect_analyze_loop_2. Check for a fatal error before advancing + next_size. + +2019-10-21 Jason Merrill <jason@redhat.com> + + * lock-and-run.sh: Check for process existence rather than timeout. + +2019-10-21 Jozef Lawrynowicz <jozef.l@mittosystems.com> + + * expr.c (expand_expr_real_2): Don't widen constant op1 when expanding + widening multiplication. + +2019-10-21 Richard Earnshaw <rearnsha@arm.com> + + * config/arm/iterators.md (t2_binop0): Fix typo in comment. + * config/arm/arm.md (addsi3_carryin_shift): Simplify selection of the + type attribute. + (subsi3_carryin_shift): Separate into register and constant controlled + alternatives. Use shift_amount_operand for operand 4. Set shift + attribute and simplify type attribute. + (subsi3_carryin_shift_alt): Likewise. + (rsbsi3_carryin_shift): Likewise. + (rsbsi3_carryin_shift_alt): Likewise. + (andsi_not_shiftsi_si): Enable for TARGET_32BIT. Separate constant + and register controlled shifts into distinct alternatives. + (andsi_not_shiftsi_si_scc_no_reuse): Likewise. + (andsi_not_shiftsi_si_scc): Likewise. + (arm_cmpsi_negshiftsi_si): Likewise. + (not_shiftsi): Remove redundant M constraint from alternative 1. + (not_shiftsi_compare0): Likewise. + (arm_cmpsi_insn): Remove redundant alternative 2. + (cmpsi_shift_swp): Likewise. + (sub_shiftsi): Likewise. + (sub_shiftsi_compare0_scratch): Likewise. + * config/arm/thumb2.md (thumb_andsi_not_shiftsi_si): Delete pattern. + (thumb2_cmpsi_neg_shiftsi): Likewise. + +2019-10-21 Richard Biener <rguenther@suse.de> + + PR tree-optimization/92162 + * tree-vect-loop.c (vect_create_epilog_for_reduction): Lookup + STMT_VINFO_REDUC_IDX in reduc_info. + * tree-vect-stmts.c (vectorizable_condition): Likewise. + +2019-10-21 Richard Biener <rguenther@suse.de> + + * tree-vectorizer.h (_slp_tree::ops): New member. + (SLP_TREE_SCALAR_OPS): New. + (vect_get_slp_defs): Adjust prototype. + * tree-vect-slp.c (vect_free_slp_tree): Release + SLP_TREE_SCALAR_OPS. + (vect_create_new_slp_node): Initialize it. New overload for + initializing by an operands array. + (_slp_oprnd_info::ops): New member. + (vect_create_oprnd_info): Initialize it. + (vect_free_oprnd_info): Release it. + (vect_get_and_check_slp_defs): Populate the operands array. + Do not swap operands in the IL when not necessary. + (vect_build_slp_tree_2): Build SLP nodes for invariant operands. + Record SLP_TREE_SCALAR_OPS for all invariant nodes. Also + swap operands in the operands array. Do not swap operands in + the IL. + (vect_slp_rearrange_stmts): Re-arrange SLP_TREE_SCALAR_OPS as well. + (vect_gather_slp_loads): Fix. + (vect_detect_hybrid_slp_stmts): Likewise. + (vect_slp_analyze_node_operations_1): Search for a internal + def child for computing reduction SLP_TREE_NUMBER_OF_VEC_STMTS. + (vect_slp_analyze_node_operations): Skip ops-only stmts for + the def-type push/pop dance. + (vect_get_constant_vectors): Compute number_of_vectors here. + Use SLP_TREE_SCALAR_OPS and simplify greatly. + (vect_get_slp_vect_defs): Use gimple_get_lhs also for PHIs. + (vect_get_slp_defs): Simplify greatly. + * tree-vect-loop.c (vectorize_fold_left_reduction): Simplify. + (vect_transform_reduction): Likewise. + * tree-vect-stmts.c (vect_get_vec_defs): Simplify. + (vectorizable_call): Likewise. + (vectorizable_operation): Likewise. + (vectorizable_load): Likewise. + (vectorizable_condition): Likewise. + (vectorizable_comparison): Likewise. + +2019-10-21 Richard Biener <rguenther@suse.de> + + PR tree-optimization/92161 + * tree-vect-loop.c (vect_analyze_loop_2): Reset stmts def-type + for reductions. + +2019-10-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/aarch64/aarch64.md (UNSPEC_RNDR, UNSPEC_RNDRRS): Define. + (aarch64_rndr): New define_insn. + (aarch64_rndrrs): Likewise. + * config/aarch64/aarch64.h (AARCH64_ISA_RNG): Define. + (TARGET_RNG): Likewise. + * config/aarch64/aarch64.c (aarch64_expand_builtin): Use IGNORE + argument. + * config/aarch64/aarch64-protos.h (aarch64_general_expand_builtin): + Add fourth argument in prototype. + * config/aarch64/aarch64-builtins.c (enum aarch64_builtins): + Add AARCH64_BUILTIN_RNG_RNDR, AARCH64_BUILTIN_RNG_RNDRRS. + (aarch64_init_rng_builtins): Define. + (aarch64_general_init_builtins): Call aarch64_init_rng_builtins. + (aarch64_expand_rng_builtin): Define. + (aarch64_general_expand_builtin): Use IGNORE argument, handle + RNG builtins. + * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define + __ARM_FEATURE_RNG when TARGET_RNG. + * config/aarch64/arm_acle.h (__rndr, __rndrrs): Define. + +2019-10-21 Andre Vieira <andre.simoesdiasvieira@arm.com> + + * tree-vect-stmts (ensure_base_align): Only change alignment if new + alignment is more restrictive. + +2019-10-21 Richard Sandiford <richard.sandiford@arm.com> + + * tree-vectorizer.h (vec_info::vector_size): New member variable. + (vect_update_max_nunits): Update comment. + (current_vector_size): Delete. + * tree-vect-stmts.c (current_vector_size): Likewise. + (get_vectype_for_scalar_type): Use vec_info::vector_size instead + of current_vector_size. + (get_mask_type_for_scalar_type): Likewise. + * tree-vectorizer.c (try_vectorize_loop_1): Likewise. + * tree-vect-loop.c (vect_update_vf_for_slp): Likewise. + (vect_analyze_loop, vect_halve_mask_nunits): Likewise. + (vect_double_mask_nunits, vect_transform_loop): Likewise. + * tree-vect-slp.c (can_duplicate_and_interleave_p): Likewise. + (vect_make_slp_decision, vect_slp_bb_region): Likewise. + +2019-10-21 Richard Sandiford <richard.sandiford@arm.com> + + * tree-vectorizer.h (vect_double_mask_nunits): Take a vec_info. + * tree-vect-loop.c (vect_double_mask_nunits): Likewise. + * tree-vect-stmts.c (supportable_narrowing_operation): Update call + accordingly. + +2019-10-21 Richard Sandiford <richard.sandiford@arm.com> + + * tree-vectorizer.h (vect_halve_mask_nunits): Take a vec_info. + * tree-vect-loop.c (vect_halve_mask_nunits): Likewise. + * tree-vect-loop-manip.c (vect_maybe_permute_loop_masks): Update + call accordingly. + * tree-vect-stmts.c (supportable_widening_operation): Likewise. + +2019-10-21 Richard Sandiford <richard.sandiford@arm.com> + + * tree-vect-loop-manip.c (vect_maybe_permute_loop_masks): Take + a loop_vec_info. + (vect_set_loop_condition_masked): Update call accordingly. + +2019-10-21 Richard Sandiford <richard.sandiford@arm.com> + + * tree-vectorizer.h (supportable_narrowing_operation): Take a vec_info. + * tree-vect-stmts.c (supportable_narrowing_operation): Likewise. + (simple_integer_narrowing): Update call accordingly. + (vectorizable_conversion): Likewise. + +2019-10-21 Richard Sandiford <richard.sandiford@arm.com> + + * tree-vect-stmts.c (simple_integer_narrowing): Take a vec_info. + (vectorizable_call): Update call accordingly. + +2019-10-21 Richard Sandiford <richard.sandiford@arm.com> + + * tree-vectorizer.h (can_duplicate_and_interleave_p): Take a vec_info. + * tree-vect-slp.c (can_duplicate_and_interleave_p): Likewise. + (duplicate_and_interleave): Update call accordingly. + * tree-vect-loop.c (vectorizable_reduction): Likewise. + +2019-10-21 Richard Sandiford <richard.sandiford@arm.com> + + * tree-vectorizer.h (duplicate_and_interleave): Take a vec_info. + * tree-vect-slp.c (duplicate_and_interleave): Likewise. + (vect_get_constant_vectors): Update call accordingly. + * tree-vect-loop.c (get_initial_defs_for_reduction): Likewise. + +2019-10-21 Richard Sandiford <richard.sandiford@arm.com> + + * tree-vectorizer.h (get_vectype_for_scalar_type): Take a vec_info. + * tree-vect-stmts.c (get_vectype_for_scalar_type): Likewise. + (vect_prologue_cost_for_slp_op): Update call accordingly. + (vect_get_vec_def_for_operand, vect_get_gather_scatter_ops) + (vect_get_strided_load_store_ops, vectorizable_simd_clone_call) + (vect_supportable_shift, vect_is_simple_cond, vectorizable_comparison) + (get_mask_type_for_scalar_type): Likewise. + (vect_get_vector_types_for_stmt): Likewise. + * tree-vect-data-refs.c (vect_analyze_data_refs): Likewise. + * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise. + (get_initial_def_for_reduction, build_vect_cond_expr): Likewise. + * tree-vect-patterns.c (vect_supportable_direct_optab_p): Likewise. + (vect_split_statement, vect_convert_input): Likewise. + (vect_recog_widen_op_pattern, vect_recog_pow_pattern): Likewise. + (vect_recog_over_widening_pattern, vect_recog_mulhs_pattern): Likewise. + (vect_recog_average_pattern, vect_recog_cast_forwprop_pattern) + (vect_recog_rotate_pattern, vect_recog_vector_vector_shift_pattern) + (vect_synth_mult_by_constant, vect_recog_mult_pattern): Likewise. + (vect_recog_divmod_pattern, vect_recog_mixed_size_cond_pattern) + (check_bool_pattern, adjust_bool_pattern_cast, adjust_bool_pattern) + (search_type_for_mask_1, vect_recog_bool_pattern): Likewise. + (vect_recog_mask_conversion_pattern): Likewise. + (vect_add_conversion_to_pattern): Likewise. + (vect_recog_gather_scatter_pattern): Likewise. + * tree-vect-slp.c (vect_build_slp_tree_2): Likewise. + (vect_analyze_slp_instance, vect_get_constant_vectors): Likewise. + +2019-10-21 Richard Sandiford <richard.sandiford@arm.com> + + * tree-vectorizer.h (get_mask_type_for_scalar_type): Take a vec_info. + * tree-vect-stmts.c (get_mask_type_for_scalar_type): Likewise. + (vect_check_load_store_mask): Update call accordingly. + (vect_get_mask_type_for_stmt): Likewise. + * tree-vect-patterns.c (check_bool_pattern): Likewise. + (search_type_for_mask_1, vect_recog_mask_conversion_pattern): Likewise. + (vect_convert_mask_for_vectype): Likewise. + +2019-10-21 Richard Sandiford <richard.sandiford@arm.com> + + * tree-vect-patterns.c (vect_supportable_direct_optab_p): Take + a vec_info. + (vect_recog_dot_prod_pattern): Update call accordingly. + (vect_recog_sad_pattern, vect_recog_pow_pattern): Likewise. + (vect_recog_widen_sum_pattern): Likewise. + +2019-10-21 Richard Sandiford <richard.sandiford@arm.com> + + * tree-vectorizer.h (vect_supportable_shift): Take a vec_info. + * tree-vect-stmts.c (vect_supportable_shift): Likewise. + * tree-vect-patterns.c (vect_synth_mult_by_constant): Update call + accordingly. + +2019-10-21 Richard Sandiford <richard.sandiford@arm.com> + + * tree-vectorizer.c (get_vec_alignment_for_array_type): Use + get_vectype_for_scalar_type_and_size instead of + get_vectype_for_scalar_type. + +2019-10-20 Bernd Edlinger <bernd.edlinger@hotmail.de> + + * common.opt (-fcommon): Fix description. + +2019-10-20 Jakub Jelinek <jakub@redhat.com> + + * config/i386/i386-protos.h (ix86_pre_reload_split): Declare. + * config/i386/i386.c (ix86_pre_reload_split): New function. + * config/i386/i386.md (*fix_trunc<mode>_i387_1, *add<mode>3_eq, + *add<mode>3_ne, *add<mode>3_eq_0, *add<mode>3_ne_0, *add<mode>3_eq, + *add<mode>3_ne, *add<mode>3_eq_1, *add<mode>3_eq_0, *add<mode>3_ne_0, + *anddi3_doubleword, *andndi3_doubleword, *<code>di3_doubleword, + *one_cmpldi2_doubleword, *ashl<dwi>3_doubleword_mask, + *ashl<dwi>3_doubleword_mask_1, *ashl<mode>3_mask, *ashl<mode>3_mask_1, + *<shift_insn><mode>3_mask, *<shift_insn><mode>3_mask_1, + *<shift_insn><dwi>3_doubleword_mask, + *<shift_insn><dwi>3_doubleword_mask_1, *<rotate_insn><mode>3_mask, + *<rotate_insn><mode>3_mask_1, *<btsc><mode>_mask, *<btsc><mode>_mask_1, + *btr<mode>_mask, *btr<mode>_mask_1, *jcc_bt<mode>, *jcc_bt<mode>_1, + *jcc_bt<mode>_mask, *popcounthi2_1, frndintxf2_<rounding>, + *fist<mode>2_<rounding>_1, *<code><mode>3_1, *<code>di3_doubleword): + Use ix86_pre_reload_split instead of can_create_pseudo_p in condition. + * config/i386/sse.md (*sse4_1_<code>v8qiv8hi2<mask_name>_2, + *avx2_<code>v8qiv8si2<mask_name>_2, + *sse4_1_<code>v4qiv4si2<mask_name>_2, + *sse4_1_<code>v4hiv4si2<mask_name>_2, + *avx512f_<code>v8qiv8di2<mask_name>_2, + *avx2_<code>v4qiv4di2<mask_name>_2, *avx2_<code>v4hiv4di2<mask_name>_2, + *sse4_1_<code>v2hiv2di2<mask_name>_2, + *sse4_1_<code>v2siv2di2<mask_name>_2, sse4_2_pcmpestr, + sse4_2_pcmpistr): Likewise. + +2019-10-20 Gerald Pfeifer <gerald@pfeifer.com> + + * doc/install.texi (Configuration, --enable-objc-gc): hboehm.info + now defaults to https. + +2019-10-20 Jan Hubicka <hubicka@ucw.cz> + + * tree-ssa-alias.c (nonoverlapping_refs_since_match_p): Do not + skip non-zero array accesses. + +2019-10-20 Richard Sandiford <richard.sandiford@arm.com> + + * tree-vect-slp.c (vect_slp_analyze_bb_1): Take a bb_vec_info + and return a boolean success value. Move the allocation and + initialization of the bb_vec_info to... + (vect_slp_bb_region): ...here. Update call accordingly. + (vect_slp_bb): Apply PARAM_SLP_MAX_INSNS_IN_BB here rather + than in vect_slp_analyze_bb_1. + +2019-10-20 Richard Sandiford <richard.sandiford@arm.com> + + * tree-vect-slp.c (vect_slp_analyze_bb_1): Call save_datarefs + when processing the given datarefs for the first time and + check_datarefs subsequently. + (vect_slp_bb_region): New function, split out of... + (vect_slp_bb): ...here. Don't recompute the region bounds and + dataref sets when retrying with a different vector size. + +2019-10-19 Jakub Jelinek <jakub@redhat.com> + Uroš Bizjak <ubizjak@gmail.com> + + PR target/92140 + * config/i386/predicates.md (int_nonimmediate_operand): New special + predicate. + * config/i386/i386.md (*add<mode>3_eq, *add<mode>3_ne, + *add<mode>3_eq_0, *add<mode>3_ne_0, *sub<mode>3_eq, *sub<mode>3_ne, + *sub<mode>3_eq_1, *sub<mode>3_eq_0, *sub<mode>3_ne_0): New + define_insn_and_split patterns. + +2019-10-19 Iain Sandoe <iain@sandoe.co.uk> + + * config/rs6000/rs6000.md: Delete out--of-date comment about + special-casing integer loads. + +2019-10-19 JeanHeyd Meneide <phdofthehouse@gmail.com> + + * escaped_string.h (escaped_string): New header. + * tree.c (escaped_string): Remove escaped_string class. + +2019-10-18 Martin Sebor <msebor@redhat.com> + + PR tree-optimization/92157 + * tree-ssa-strlen.c (handle_builtin_string_cmp): Be prepared for + compute_string_length to return a negative result. + +2019-10-18 Richard Earnshaw <rearnsha@arm.com> + + * config/arm/arm.md (negv<SIDI:mode>3): New expansion rule. + (negvsi3, negvdi3): Delete. + (negdi2_compare): Delete. + +2019-10-18 Richard Earnshaw <rearnsha@arm.com> + + * config/arm/arm.md (subvdi4): Decompose calculation into 32-bit + operations. + (subdi3_compare1): Delete pattern. + (subvsi3_borrow): New insn pattern. + (subvsi3_borrow_imm): Likewise. + +2019-10-18 Richard Earnshaw <rearnsha@arm.com> + + * config/arm/arm.md (subv<mode>4): Delete. + (subvdi4): New expander pattern. + (subvsi4): Likewise. Handle some immediate values. + (subvsi3_intmin): New insn pattern. + (subvsi3): Likewise. + (subvsi3_imm1): Likewise. + * config/arm/arm.c (select_cc_mode): Also allow minus for CC_V + idioms. + +2019-10-18 Richard Earnshaw <rearnsha@arm.com> + + * config/arm/arm.md (usubvdi4): Allow registers or integers for + incoming operands. Early split the calculation into SImode + operations. + (usubvsi3_borrow): New insn pattern. + (usubvsi3_borrow_imm): Likewise. + +2019-10-18 Richard Earnshaw <rearnsha@arm.com> + + * config/arm/arm.md (usubv<mode>4): Delete expansion. + (usubvsi4): New pattern. Allow some immediate values for inputs. + (usubvdi4): New pattern. + +2019-10-18 Richard Earnshaw <rearnsha@arm.com> + + * config/arm/arm.c (arm_select_cc_mode): Allow either the first + or second operand of the PLUS inside a DImode equality test to be + sign-extend when selecting CC_Vmode. + * config/arm/arm.md (addvdi4): Early-split the operation into SImode + instructions. + (addsi3_cin_vout_reg, addsi3_cin_vout_imm, addsi3_cin_vout_0): New + expand patterns. + (addsi3_cin_vout_reg_insn, addsi3_cin_vout_imm_insn): New patterns. + (addsi3_cin_vout_0): Likewise. + (adddi3_compareV): Delete. + +2019-10-18 Richard Earnshaw <rearnsha@arm.com> + + * config/arm/arm.md (addsi3_compareV_reg_nosum): New insn. + (addsi3_compareV_imm_nosum): New insn. Also add peephole2 patterns + to transform this back into the summation version when that leads + to smaller code. + +2019-10-18 Richard Earnshaw <rearnsha@arm.com> + + * config/arm/arm.md (addv<mode>4): Delete. + (addvsi4): New pattern. Handle immediate values that the architecture + supports. + (addvdi4): New pattern. + (addsi3_compareV): Rename to ... + (addsi3_compareV_reg): ... this. Add constraints for thumb2 variants + and use COMPARE rather than NE. + (addsi3_compareV_imm): New pattern. + * config/arm/arm.c (arm_select_cc_mode): Return CC_Vmode for + a signed-overflow check. + +2019-10-18 Richard Earnshaw <rearnsha@arm.com> + + * config/arm/arm-modes.def (CC_ADC): New CC mode. + * config/arm/arm.c (arm_select_cc_mode): Detect selection of + CC_ADCmode. + (maybe_get_arm_condition_code): Handle CC_ADCmode. + * config/arm/arm.md (uaddvdi4): Early expansion of unsigned addition + with overflow. + (addsi3_cin_cout_reg, addsi3_cin_cout_imm, addsi3_cin_cout_0): New + expand patterns. + (addsi3_cin_cout_reg_insn, addsi3_cin_cout_0_insn): New insn patterns + (addsi3_cin_cout_imm_insn): Likewise. + (adddi3_compareC): Delete insn. + * config/arm/predicates.md (arm_carry_operation): Handle CC_ADCmode. + +2019-10-18 Richard Earnshaw <rearnsha@arm.com> + + * config/arm/arm.md (adddi3): Call gen_addsi3_compare_op1. + * (uaddv<mode>4): Delete expansion pattern. + (uaddvsi4): New pattern. + (uaddvdi4): Likewise. + (addsi3_compareC): Delete pattern, change callers to use + addsi3_compare_op1. + (addsi3_compare_op1): No-longer anonymous. Clean up constraints to + reduce the number of alternatives and re-work type attribute handling. + (addsi3_compare_op2): Clean up constraints to reduce the number of + alternatives and re-work type attribute handling. + (compare_addsi2_op0): Likewise. + (compare_addsi2_op1): Likewise. + +2019-10-18 Richard Earnshaw <rearnsha@arm.com> + + * config/arm/arm-modes.def (CC_NCV, CC_CZ): Delete CC modes. + * config/arm/arm.c (arm_select_cc_mode): Remove old selection code + for DImode operands. + (arm_gen_dicompare_reg): Remove unreachable expansion code. + (maybe_get_arm_condition_code): Remove support for CC_CZmode and + CC_NCVmode. + * config/arm/arm.md (arm_cmpdi_insn): Delete. + (arm_cmpdi_unsigned): Delete. + +2019-10-18 Richard Earnshaw <rearnsha@arm.com> + + * config/arm/arm.c (arm_const_double_prefer_rsbs_rsc): New function. + (arm_canonicalize_comparison): For GT/LE/GTU/GEU, use the constant + unchanged only if that will be cheaper. + (arm_select_cc_mode): Recognize a swapped comparison that will + be regenerated using RSBS or RSCS. Relax restriction on selecting + CC_RSBmode. + (arm_gen_dicompare_reg): Handle LE/GT/LEU/GEU comparisons against + a constant. + (arm_gen_compare_reg): Handle compare (CONST, X) when the mode + is CC_RSBmode. + (maybe_get_arm_condition_code): CC_RSBmode now returns the same codes + as CCmode. + * config/arm/arm.md (rsb_imm_compare_scratch): New pattern. + (rscsi3_<CC_EXTEND>out_scratch): New pattern. + +2019-10-18 Richard Earnshaw <rearnsha@arm.com> + + * config/arm/arm-modes.def (CC_NV, CC_B): New CC modes. + * config/arm/arm.c (arm_select_cc_mode): Recognize constructs that + need these modes. + (arm_gen_dicompare_reg): New code to early expand the sub-operations + of EQ, NE, LT, GE, LTU and GEU. + * config/arm/iterators.md (CC_EXTEND): New code attribute. + * config/arm/predicates.md (arm_adcimm_operand): New predicate.. + * config/arm/arm.md (cmpsi3_carryin_<CC_EXTEND>out): New pattern. + (cmpsi3_imm_carryin_<CC_EXTEND>out): Likewise. + (cmpsi3_0_carryin_<CC_EXTEND>out): Likewise. + +2019-10-18 Richard Earnshaw <rearnsha@arm.com> + + * config/arm/arm.md (cbranchdi4): Accept reg_or_int_operand for + operand 2. + (cstoredi4): Similarly, but for operand 3. + * config/arm/arm.c (arm_canoncialize_comparison): Allow + canonicalization of unsigned compares with a constant on Arm. + Prefer using const+1 and adjusting the comparison over swapping the + operands whenever the original constant was not valid. + (arm_gen_dicompare_reg): If Y is not a valid operand, force it to a + register here. + (arm_validize_comparison): Do not force invalid DImode operands to + registers here. + +2019-10-18 Richard Earnshaw <rearnsha@arm.com> + + * config/arm/arm.c (arm_select_cc_mode): For DImode equality tests + return CC_Zmode if comparing against a constant where one word is + zero. + (arm_gen_compare_reg): Split DImode handling to ... + (arm_gen_dicompare_reg): ... here. Handle equality comparisons + against simple constants. + * config/arm/arm.md (arm_cmpdi_zero): Delete pattern. + +2019-10-18 Richard Earnshaw <rearnsha@arm.com> + + * config/arm/arm.md (subsi3_carryin_shift_alt): New pattern. + (rsbsi3_carryin_shift_alt): Likewise. + +2019-10-18 Richard Earnshaw <rearnsha@arm.com> + + * config/arm/arm.md (negscc_borrow): New pattern. + (mov_negscc): Don't split if the insn would match negscc_borrow. + * config/arm/thumb2.md (thumb2_mov_negscc): Likewise. + (thumb2_mov_negscc_strict_it): Likewise. + +2019-10-18 Richard Earnshaw <rearnsha@arm.com> + + * config/arm/arm.c (arm_insn_cost): New function. + (TARGET_INSN_COST): Override default definition. + +2019-10-18 Richard Earnshaw <rearnsha@arm.com> + + * config/arm/arm.c (arm_rtx_costs_internal, case MINUS): Handle + borrow operations. + +2019-10-18 Richard Earnshaw <rearnsha@arm.com> + + * config/arm/arm.c (strip_carry_operation): New function. + (arm_rtx_costs_internal, case PLUS): Handle addtion with carry-in + for SImode. + +2019-10-18 Richard Earnshaw <rearnsha@arm.com> + + * config/arm/predicates.md (arm_carry_operation): New special + predicate. + * config/arm/iterators.md (LTUGEU): Delete iterator. + (cnb): Delete code attribute. + (optab): Delete ltu and geu elements. + * config/arm/arm.md (addsi3_carryin): Renamed from + addsi3_carryin_<optab>. Remove iterator and use arm_carry_operand. + (add0si3_carryin): Similarly, but from add0si3_carryin_<optab>. + (addsi3_carryin_alt2): Similarly, but from addsi3_carryin_alt2_<optab>. + (addsi3_carryin_clobercc): Similarly. + (addsi3_carryin_shift): Similarly. Do not allow register shifts in + Thumb2 state. + +2019-10-18 Richard Earnshaw <rearnsha@arm.com> + + * config/arm/arm.md (arm_subdi3): Delete insn. + (zextendsidi_negsi, negdi_extendsidi): Delete insn_and_split. + +2019-10-18 Richard Earnshaw <rearnsha@arm.com> + + * config/arm/arm-modes.def (CC_RSB): New CC mode. + * config/arm/predicates.md (arm_borrow_operation): Handle CC_RSBmode. + * config/arm/arm.c (arm_select_cc_mode): Detect when we should + return CC_RSBmode. + (maybe_get_arm_condition_code): Handle CC_RSBmode. + * config/arm/arm.md (subsi3_carryin): Make this pattern available to + expand. + (subdi3): Rewrite to early-expand the sub-operations. + (rsb_im_compare): New pattern. + (negdi2): Delete. + (negdi2_insn): Delete. + (arm_negsi2): Correct type attribute to alu_imm. + (negsi2_0compare): New insn pattern. + (negsi2_carryin): New insn pattern. + +2019-10-18 Richard Earnshaw <rearnsha@arm.com> + + * config/arm/arm.md (addsi3_carryin_alt2): Use arm_not_operand for + operand 2. + +2019-10-18 Richard Earnshaw <rearnsha@arm.com> + + * config/arm/arm.md (addsi3_carryin_shift_<optab>): Reorder operands + to match canonical form. + +2019-10-18 Richard Earnshaw <rearnsha@arm.com> + + * config/arm/arm.md (zero_extend<mode>di2): Convert to define_expand. + (extend<mode>di2): Likewise. + +2019-10-18 Richard Earnshaw <rearnsha@arm.com> + + * config/arm/arm-protos.h (arm_decompose_di_binop): New prototype. + * config/arm/arm.c (arm_decompose_di_binop): New function. + * config/arm/arm.md (adddi3): Also accept any const_int for op2. + If not generating Thumb-1 code, decompose the operation into 32-bit + pieces. + * add0si_carryin_<optab>: New pattern. + +2019-10-18 Richard Earnshaw <rearnsha@arm.com> + + * arm.md (adddi3): Only accept register operands. + (arm_adddi3): Convert to simple insn with no split. Do not accept + constants. + (adddi_sesidi_di): Delete patern. + (adddi_zesidi_di): Likewise. + (uaddv<mode>4): Use LTU as condition for branch. + (adddi3_compareV): Convert to simple insn with no split. + (addsi3_compareV_upper): Delete pattern. + (adddi3_compareC): Convert to simple insn with no split. Correct + flags setting expression. + (addsi3_compareC_upper): Delete pattern. + (addsi3_compareC): Correct flags setting expression. + (subdi3_compare1): Convert to simple insn with no split. + (subsi3_carryin_compare): Delete pattern. + (arm_subdi3): Convert to simple insn with no split. + (subdi_zesidi): Delete pattern. + (subdi_di_sesidi): Delete pattern. + (subdi_zesidi_di): Delete pattern. + (subdi_sesidi_di): Delete pattern. + (subdi_zesidi_zesidi): Delete pattern. + (negvdi3): Use s_register_operand. + (negdi2_compare): Convert to simple insn with no split. + (negdi2_insn): Likewise. + (negsi2_carryin_compare): Delete pattern. + (negdi_zero_extendsidi): Delete pattern. + (arm_cmpdi_insn): Convert to simple insn with no split. + (negdi2): Don't call gen_negdi2_neon. + * config/arm/neon.md (adddi3_neon): Delete pattern. + (subdi3_neon): Delete pattern. + (negdi2_neon): Delete pattern. + (splits for negdi2_neon): Delete splits. + +2019-10-18 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/92153 + * ggc-page.c (release_pages): Read g->alloc_size before free rather + than after it. + +2019-10-18 Andre Vieira <andre.simoesdiasvieira@arm.com> + + * config/arm/t-multilib: Add rule to regenerate mutlilib header file + with any change to t-multilib, t-aprofile and t-rmprofile. Also add + new multilib variants and new mappings. + +2019-10-18 Georg-Johann Lay <avr@gjlay.de> + + PR target/86040 + * config/avr/avr.c (avr_out_lpm): Do not shortcut-return. + +2019-10-18 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org> + Richard Sandiford <richard.sandiford@arm.com> + + PR target/86753 + * tree-vectorizer.h (scalar_cond_masked_key): New struct, + and define hashmap traits for it. + (loop_vec_info::scalar_cond_masked_set): New member. + (vect_record_loop_mask): Adjust prototype. + * tree-vectorizer.c (scalar_cond_masked_key::get_cond_ops_from_tree): + Implement method. + * tree-vect-loop.c (vectorizable_reduction): Pass NULL as last arg to + vect_record_loop_mask. + (vectorizable_live_operation): Likewise. + (vect_record_loop_mask): New param scalar_mask. Add entry + cond, loop_mask to scalar_cond_masked_set if scalar_mask is non NULL. + * tree-vect-stmts.c (check_load_store_masking): New param scalar_mask. + Pass it as last arg to vect_record_loop_mask. + (vectorizable_call): Pass scalar_mask as last arg to + vect_record_loop_mask. + (vectorizable_store): Likewise. + (vectorizable_load): Likewise. + (vectorizable_condition): Check if another part of vectorized code + applies loop_mask to condition or to it's inverse, and if yes, + apply loop_mask to result of vector comparison. + +2019-10-17 John David Anglin <danglin@gcc.gnu.org> + + * config/pa/pa.c (pa_output_indirect_call): Fix typos in last change. + +2019-10-18 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/92056 + * tree-ssa-strlen.c (determine_min_objsize): Call init_object_sizes + before calling compute_builtin_object_size. + +2019-10-17 Iain Sandoe <iain@sandoe.co.uk> + + PR target/65342 + * config/rs6000/darwin.md (movdi_low, movsi_low_st): Delete. + (movdi_low_st): Delete. + * config/rs6000/rs6000.c + (darwin_rs6000_legitimate_lo_sum_const_p): New. + (mem_operand_gpr): Validate Mach-O LO_SUM cases separately. + * config/rs6000/rs6000.md (movsi_low): Delete. + +2019-10-17 Jason Merrill <jason@redhat.com> + + * gimplify.h (get_initialized_tmp_var): Add default argument to + post_p. + * gimplify.c (gimplify_self_mod_expr, gimplify_omp_atomic): Remove + NULL post_p argument. + * targhooks (std_gimplify_va_arg_expr): Likewise. + +2019-10-17 Richard Biener <rguenther@suse.de> + + * tree-vectorizer.h (_stmt_vec_info::cond_reduc_code): Remove. + (STMT_VINFO_VEC_COND_REDUC_CODE): Likewise. + * tree-vectorizer.c (vec_info::new_stmt_vec_info): Do not + initialize STMT_VINFO_VEC_COND_REDUC_CODE. + * tree-vect-loop.c (vect_is_simple_reduction): Set + STMT_VINFO_REDUC_CODE. + (vectorizable_reduction): Remove dead and redundant code, use + STMT_VINFO_REDUC_CODE instead of STMT_VINFO_VEC_COND_REDUC_CODE. + +2019-10-17 Georg-Johann Lay <avr@gjlay.de> + + Fix breakage introduced by r276985. + + * config/avr/avr.c (avr_option_override): Remove set of + PARAM_ALLOW_STORE_DATA_RACES. + * common/config/avr/avr-common.c (avr_option_optimization_table) + [OPT_LEVELS_ALL]: Turn on -fallow-store-data-races. + +2019-10-17 H.J. Lu <hongjiu.lu@intel.com> + + * config/i386/i386.h (processor_costs): Add clear_ratio. + (CLEAR_RATIO): Remove MIN and use ix86_cost->clear_ratio. + * config/i386/x86-tune-costs.h: Set clear_ratio to the minimum + of 6 and move_ratio in all cost models. + +2019-10-17 Richard Biener <rguenther@suse.de> + + * tree-vect-loop.c (check_reduction_path): Compute reduction + operation here. + (vect_is_simple_reduction): Remove special-case of single-stmt + reduction path detection. + +2019-10-17 Richard Earnshaw <rearnsha@arm.com> + + * config/arm/arm-cpus.in (marvel-pj4): Add +fp to the architecture. + +2019-10-17 Yuliang Wang <yuliang.wang@arm.com> + + * config/aarch64/aarch64-sve2.md (aarch64_sve2_eor3<mode>) + (aarch64_sve2_nor<mode>, aarch64_sve2_nand<mode>) + (aarch64_sve2_bsl<mode>, aarch64_sve2_nbsl<mode>) + (aarch64_sve2_bsl1n<mode>, aarch64_sve2_bsl2n<mode>): + New combine patterns. + * config/aarch64/iterators.md (BSL_DUP): New int iterator for the + above. + (bsl_1st, bsl_2nd, bsl_dup, bsl_mov): Attributes for the above. + +2019-10-17 Aldy Hernandez <aldyh@redhat.com> + + * tree-vrp.c (value_range_base::dump): Display +INF for both + pointers and integers when appropriate. + +2019-10-17 Andre Vieira <andre.simoesdiasvieira@arm.com> + + * tree-vect-loop.c (vect_analyze_loop_2): Use same condition to decide + when to use versioning threshold. + +2019-10-17 Andre Vieira <andre.simoesdiasvieira@arm.com> + + * tree-vect-loop.c (determine_peel_for_niter): New function contained + outlined code from ... + (vect_analyze_loop_2): ... here. + +2019-10-17 Andre Vieira <andre.simoesdiasvieira@arm.com> + + * tree-vect-loop.c (vect_transform_loop): Move code from here... + * tree-vect-loop-manip.c (vect_loop_versioning): ... to here. + * tree-vectorizer.h (vect_loop_versioning): Remove unused parameters. + +2019-10-17 Richard Biener <rguenther@suse.de> + + * tree-vect-loop.c (needs_fold_left_reduction_p): Export. + (vect_is_simple_reduction): Move all validity checks ... + (vectorizable_reduction): ... here. Compute whether we + need a fold-left reduction here. + * tree-vect-patterns.c (vect_reassociating_reduction_p): Merge + both overloads, check needs_fold_left_reduction_p directly. + * tree-vectorizer.h (needs_fold_left_reduction_p): Declare. + +2019-10-17 Richard Biener <rguenther@suse.de> + + * tree-ssa-pre.c (create_component_ref_by_pieces_1): Fix + TARGET_MEM_REF creation. + +2019-10-17 Richard Biener <rguenther@suse.de> + + PR tree-optimization/92129 + * tree-vect-loop.c (vectorizable_reduction): Also fail + on GIMPLE_SINGLE_RHS. + +2019-10-17 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/92056 + * tree-object-size.c (cond_expr_object_size): Return early if then_ + processing resulted in unknown size. + + PR tree-optimization/92115 + * tree-ssa-ifcombine.c (ifcombine_ifandif): Force condition into + temporary if it could trap. + +2019-10-17 Richard Biener <rguenther@suse.de> + + PR debug/91887 + * dwarf2out.c (gen_formal_parameter_die): Also try to match + context_die against a DW_TAG_GNU_formal_parameter_pack parent. + +2019-10-16 Jakub Jelinek <jakub@redhat.com> + + * tree-ssa-strlen.c (maybe_invalidate): Use + HOST_WIDE_INT_PRINT_UNSIGNED instead of "%zu". + +2019-10-16 Andrew Burgess <andrew.burgess@embecosm.com> + Jim Wilson <jimw@sifive.com> + + * config/riscv/riscv.h (REG_CLASS_CONTENTS): Add argument passing + regs to SIBCALL_REGS. + * config/riscv/riscv.c (riscv_regno_to_class): Change argument + passing regs to SIBCALL_REGS. + +2019-10-16 Martin Sebor <msebor@redhat.com> + + PR tree-optimization/83821 + * tree-ssa-strlen.c (maybe_invalidate): Add argument. Consider + the length of a string when available. + (handle_builtin_memset) Add argument. + (handle_store, strlen_check_and_optimize_call): Same. + (check_and_optimize_stmt): Same. Pass it to callees. + +2019-10-16 Martin Sebor <msebor@redhat.com> + + PR tree-optimization/91996 + * tree-ssa-strlen.c (maybe_warn_pointless_strcmp): Improve location + information. + (compare_nonzero_chars): Add an overload. + (count_nonzero_bytes): Add an argument. Call overload above. + Handle non-constant lengths in some range. + (handle_store): Add an argument. + (check_and_optimize_stmt): Pass an argument to handle_store. + +2019-10-16 Richard Earnshaw <rearnsha@arm.com> + + * config/arm/arm.c (neon_valid_immediate): Clear bytes before use. + +2019-10-16 Mihailo Stojanovic <mistojanovic@wavecomp.com> + + * config/mips/mips.c (mips_expand_builtin_insn): Force the + operands which correspond to the same input-output register to + have the same pseudo assigned to them. + +2019-10-16 Ilya Leoshkevich <iii@linux.ibm.com> + + * cfgrtl.c (find_partition_fixes): Remove bbs_in_cold_partition. + +2019-10-16 Wilco Dijkstra <wdijkstr@arm.com> + + * config/aarch64/aarch64.c (aarch64_classify_symbol): + Apply reasonable limit to symbol offsets. + +2019-10-16 Richard Biener <rguenther@suse.de> + + * tree-vect-loop.c (vect_valid_reduction_input_p): Remove. + (vect_is_simple_reduction): Delay checking to + vectorizable_reduction and relax the checking. + (vectorizable_reduction): Check we have a simple use. Check + for bogus condition reductions. + * tree-vect-stmts.c (vect_transform_stmt): Make sure we + are looking at the last stmt in a pattern sequence when + filling in backedge PHI values. + +2019-10-16 Peter Bergner <bergner@linux.ibm.com> + Jiufu Guo <guojiufu@linux.ibm.com> + + PR target/70010 + * config/rs6000/rs6000.c (rs6000_can_inline_p): Prohibit inlining if + the callee explicitly disables some isa_flags the caller is using. + +2019-10-16 Richard Sandiford <richard.sandiford@arm.com> + + * function-abi.cc (expr_callee_abi): Assert for POINTER_TYPE_P. + +2019-10-16 Richard Sandiford <richard.sandiford@arm.com> + + * genmodes.c (mode_data::order): New field. + (blank_mode): Update accordingly. + (VECTOR_MODES_WITH_PREFIX): Add an order parameter. + (make_vector_modes): Likewise. + (VECTOR_MODES): Update use accordingly. + (cmp_modes): Sort by the new order field ahead of sorting by size. + * config/aarch64/aarch64-modes.def (VNx2QI, VN2xHI, VNx2SI) + (VNx4QI, VNx4HI, VNx8QI): New partial vector modes. + * config/aarch64/aarch64.c (VEC_PARTIAL): New flag value. + (aarch64_classify_vector_mode): Handle the new partial modes. + (aarch64_vl_bytes): New function. + (aarch64_hard_regno_nregs): Use it instead of BYTES_PER_SVE_VECTOR + when counting the number of registers in an SVE mode. + (aarch64_class_max_nregs): Likewise. + (aarch64_hard_regno_mode_ok): Don't allow partial vectors + in registers yet. + (aarch64_classify_address): Treat partial vectors analogously + to full vectors. + (aarch64_print_address_internal): Consolidate the printing of + MUL VL addresses, using aarch64_vl_bytes as the number of + bytes represented by "VL". + (aarch64_vector_mode_supported_p): Reject partial vector modes. + +2019-10-16 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/aarch64.c (aarch64_layout_frame): Use is_constant + rather than known_lt when choosing frame layouts. + +2019-10-16 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/aarch64.c (aarch64_layout_frame): Assert + that all the adjustments add up to the full frame size. + Use crtl->outgoing_args_size directly as the final adjustment + where appropriate. + +2019-10-16 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/aarch64.c (aarch64_layout_frame): Use a local + "frame" reference instead of always referring directly to + "cfun->machine->frame". + +2019-10-16 Richard Biener <rguenther@suse.de> + + PR tree-optimization/92119 + * tree-vect-patterns.c (vect_recog_rotate_pattern): Guard + against missing bswap lhs. + +2019-10-16 Richard Sandiford <richard.sandiford@arm.com> + + PR middle-end/92033 + * poly-int.h (constant_lower_bound_with_limit): New function. + (constant_upper_bound_with_limit): Likewise. + * doc/poly-int.texi: Document them. + * tree-vrp.c (value_range_base::set): Convert POLY_INT_CST bounds + into the worst-case INTEGER_CST bounds. + +2019-10-16 Feng Xue <fxue@os.amperecomputing.com> + + PR ipa/91088 + * doc/invoke.texi (ipa-max-param-expr-ops): Document new option. + * params.def (PARAM_IPA_MAX_PARAM_EXPR_OPS): New. + * ipa-predicat.h (struct expr_eval_op): New struct. + (expr_eval_ops): New typedef. + (struct condition): Add type and param_ops fields, remove size field. + (add_condition): Replace size parameter with type parameter, add + param_ops parameter. + * ipa-predicat.c (expr_eval_ops_equal_p): New function. + (predicate::add_clause): Add comparisons on type and param_ops. + (dump_condition): Add debug dump for param_ops. + (remap_after_inlining): Adjust call arguments to add_condition. + (add_condition): Replace size parameter with type parameter, add + param_ops parameter. Unshare constant value used in conditions. + * ipa-fnsummary.c (evaluate_conditions_for_known_args): Fold + parameter expressions using param_ops. + (decompose_param_expr): New function. + (set_cond_stmt_execution_predicate): Use call to decompose_param_expr + to replace call to unmodified_parm_or_parm_agg_item. + (set_switch_stmt_execution_predicate): Likewise. + (will_be_nonconstant_expr_predicate): Likewise. Replace usage of size + with type. + (inline_read_section): Read param_ops from summary stream. + (ipa_fn_summary_write): Write param_ops to summary stream. + +2019-10-15 Segher Boessenkool <segher@kernel.crashing.org> + + PR rtl-optimization/92107 + * genattrtab.c (write_attr_value) <do_operator>: Parenthesize the + expression written. + +2019-10-15 Iain Sandoe <iain@sandoe.co.uk> + + * config/darwin.c: Update description of fix and continue. + +2019-10-15 Iain Sandoe <iain@sandoe.co.uk> + + * config/darwin.c (darwin_binds_local_p): Update to call + default_binds_local_p_3 () directly. amend comments. + +2019-10-15 Richard Biener <rguenther@suse.de> + + * lto-streamer-out.c (lto_variably_modified_type_p): New. + (tree_is_indexable): Use it. + * tree-streamer-out.c (pack_ts_type_common_value_fields): + Stream variably_modified_type_p as TYPE_LANG_FLAG_0. + * tree-streamer-in.c (unpack_ts_type_common_value_fields): Likewise. + +2019-10-15 Jozef Lawrynowicz <jozef.l@mittosystems.com> + + * config/msp430/msp430.md (zero_extendqipsi2): New. + (zero_extendqisi2): Optimize case where src register and base dst + register are the same. + (zero_extendhipsi2): Don't use 430X insn for rYs->r case. + (zero_extendpsisi2): Optimize r->m case. + Add unnamed insn patterns to catch insns combine searches for when + optimizing pointer manipulation. + +2019-10-15 Jozef Lawrynowicz <jozef.l@mittosystems.com> + + * config/msp430/msp430.md: Group zero_extend* insns together. + +2019-10-15 Jozef Lawrynowicz <jozef.l@mittosystems.com> + + * config/msp430/constraints.md: Allow post_inc operand for "Ya" + constraint. + * config/msp430/msp430.c (msp430_legitimate_address_p): Handle + POST_INC. + (msp430_subreg): Likewise. + (msp430_split_addsi): Likewise. + (msp430_print_operand_addr): Likewise. + * config/msp430/msp430.h (HAVE_POST_INCREMENT): Define. + (USE_STORE_POST_INCREMENT): Define. + * config/msp430/msp430.md: Use the msp430_general_dst_operand or + msp430_general_dst_nonv_operand predicates for the lvalues of insns. + * config/msp430/predicates.md (msp430_nonpostinc_operand): New. + (msp430_general_dst_operand): New. + (msp430_general_dst_nonv_operand): New. + (msp430_nonsubreg_operand): Remove. + (msp430_nonsubreg_dst_operand): New. + (msp430_nonsubreg_or_imm_operand): Allow reg or mem operands in place + of defunct msp430_nonsubreg_operand. + (msp430_nonsubregnonpostinc_or_imm_operand): New. + +2019-10-15 Richard Biener <rguenther@suse.de> + + PR tree-optimization/91929 + * tree-ssa-pre.c (pre_expr_d::loc): New member. + (get_or_alloc_expr_for_name): Initialize it. + (get_or_alloc_expr_for_constant): Likewise. + (phi_translate_1): Copy it. + (create_expression_by_pieces): Use the original location + of the expression for the inserted stmt. + (compute_avail): Record the location of the stmt for the + expressions created. + +2019-10-15 Richard Sandiford <richard.sandiford@arm.com> + + * tree-ssa-strlen.c (count_nonzero_bytes): Check tree_fits_uhwi_p + before using tree_to_uhwi. + +2019-10-15 Ilya Leoshkevich <iii@linux.ibm.com> + + * config/s390/s390.md: Run %a0:DI splitters only after reload. + +2019-10-15 Richard Biener <rguenther@suse.de> + + PR tree-optimization/92094 + * tree-vect-loop.c (vectorizable_reduction): For nested cycles + do not adjust the reduction definition def type. + * tree-vect-stmts.c (vect_transform_stmt): Verify the scalar stmt + defines the latch argument of the PHI. + +2019-10-15 Hongyu Wang <hongtao.wang@intel.com> + + PR target/92035 + * config/i386/avx512fintrin.h (_mm_mask_roundscale_ss, + _mm_maskz_roundscale_ss, _mm_maskz_roundscale_round_ss, + _mm_maskz_roundscale_round_ss, _mm_mask_roundscale_sd, + _mm_maskz_roundscale_sd, _mm_mask_roundscale_round_sd, + _mm_maskz_roundscale_round_sd): New intrinsics. + (_mm_roundscale_ss, _mm_roundscale_round_ss): Use + __builtin_ia32_rndscales?_mask_round builtins instead of + __builtin_ia32_rndscales?_round. + * config/i386/i386-builtin.def (__builtin_ia32_rndscaless_round, + __builtin_ia32_rndscalesd_round): Remove. + (__builtin_ia32_rndscaless_mask_round, + __builtin_ia32_rndscalesd_mask_round): New intrinsics. + * config/i386/sse.md + (avx512f_rndscale<mode><round_saeonly_name>): Renamed to ... + (avx512f_rndscale<mode><mask_scalar_name><round_saeonly_scalar_name>): + ... this, adjust and add subst atrributes to make it maskable. + +2019-10-15 Richard Biener <rguenther@suse.de> + + PR middle-end/92046 + * common.opt (fallow-store-data-races): New. + * params.def (PARAM_ALLOW_STORE_DATA_RACES): Remove. + * params.h (ALLOW_STORE_DATA_RACES): Likewise. + * doc/invoke.texi (fallow-store-data-races): Document. + (--param allow-store-data-races): Remove docs. + * opts.c (default_options_table): Enable -fallow-store-data-races + at -Ofast. + (default_options_optimization): Do not enable --param + allow-store-data-races at -Ofast. + * tree-if-conv.c (ifcvt_memrefs_wont_trap): Use flag_store_data_races + instead of PARAM_ALLOW_STORE_DATA_RACES. + * tree-ssa-loop-im.c (execute_sm): Likewise. + +2019-10-15 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org> + + PR tree-optimization/92085 + * tree-if-conv.c (ifcvt_local_dce): Call gsi_next in else clause, + instead of calling it unconditionally after + delete_dead_or_redundant_assignment and fix indentation. + +2019-10-15 Kugan Vivekanandarajah <kugan.vivekanandarajah@linaro.org> + + * config/arm/vfp.md (fma<SDF:mode>4): Enable DF only when + TARGET_VFP_DOUBLE. + (*fmsub<SDF:mode>4): Likewise. + *fnmsub<SDF:mode>4): Likewise. + (*fnmadd<SDF:mode>4): Likewise. + +2019-10-14 Joel Hutton <Joel.Hutton@arm.com> + + * doc/tree-ssa.texi: Update renamed macro name. + +2019-10-14 Mihailo Stojanovic <mistojanovic@wavecomp.com> + + * config/mips/mips.c (mips_cannot_force_const_mem): Reject + vector constants. + +2019-10-14 Iain Sandoe <iain@sandoe.co.uk> + + * config/darwin.c: Use unsigned ints for the picbase label + counters, initialise the vars explicitly. + (update_pic_label_number_if_needed): Move a variable declaration + to where it's needed. + (machopic_output_function_base_name): Use a more strict checking + assert, and and unsigned int for the picbase label counter. + (machopic_get_function_picbase): Likewise. + +2019-10-14 Richard Biener <rguenther@suse.de> + + PR middle-end/92046 + * dse.c (scan_insn): Use param max_active_local_stores. + (dse_step1): Get PARAM_MAX_DSE_ACTIVE_LOCAL_STORES and adjust + based on optimization level. + * loop-invariant.c (move_loop_invariants): Adjust + LOOP_INVARIANT_MAX_BBS_IN_LOOP based on optimization level. + * opts.c (default_options_optimization): Do not adjust + PARAM_MAX_DSE_ACTIVE_LOCAL_STORES and + LOOP_INVARIANT_MAX_BBS_IN_LOOP here. + +2019-10-14 Wilco Dijkstra <wdijkstr@arm.com> + + * config/arm/arm.c (arm_legitimize_address): Remove Thumb-2 bailout. + +2019-10-14 Wilco Dijkstra <wdijkstr@arm.com> + + * config/arm/arm.c (arm_option_override): Don't override sched + pressure algorithm. + +2019-10-14 Richard Biener <rguenther@suse.de> + + PR tree-optimization/92069 + * tree-vect-loop.c (vect_analyze_scalar_cycles_1): For nested + cycles do not set vect_nested_cycle on the latch definition. + +2019-10-14 Richard Sandiford <richard.sandiford@arm.com> + + * function-abi.h (expr_callee_abi): Declare. + * function-abi.cc (expr_callee_abi): New function. + +2019-10-14 Aldy Hernandez <aldyh@redhat.com> + + * tree-vrp.c (value_range_base::set): Normalize unsigned ~[0,0] + into [1,MAX]. + * tree-vrp.h (value_range_base::nonzero_p): Adjust for unsigned + non-zero being represented as [1,MAX]. + +2019-10-14 Xiong Hu Luo <luoxhu@linux.ibm.com> + + * tree-sra.c (dump_access): Add missing braces. + +2019-10-13 Iain Sandoe <iain@sandoe.co.uk> + + * config/darwin.c (machopic_indirection_name): Rework the + function to emit linker-visible symbols only for indirections + in the data section. Clean up the code and update comments. + +2019-10-13 Iain Sandoe <iain@sandoe.co.uk> + + * config/darwin.c (machopic_indirect_data_reference): Remove + redundant code. + +2019-10-13 Nathan Sidwell <nathan@acm.org> + + * gengtype-lex.l (CXX_KEYWORD): Add 'mutable'. + +2019-10-13 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> + + * doc/sourcebuild.texi (Test Directives, Add Options): Remove + c99_runtime. + +2019-10-12 Jan Hubicka <hubicka@ucw.cz> + + * lto-streamer-out.c (collect_block_tree_leafs): Renumber statements + so non-virutal are before virutals. + (output_function): Avoid body modifications. + +2019-10-12 John David Anglin <danglin@gcc.gnu.org> + + * config/pa/pa.c (pa_output_call): Load descriptor address to register + %r22. Load function address before global pointer. + (pa_attr_length_indirect_call): Adjust length of inline versions of + $$dyncall. + (pa_output_indirect_call): Remove fast inline version of $$dyncall + before normal cases. Update inline $$dyncall sequences to preserve + function descriptor address in register %r22. + (TRAMPOLINE_CODE_SIZE): Adjust. + (pa_asm_trampoline_template): Revise 32-bit trampoline. Don't assume + register %r22 contains trampoline address. + (pa_trampoline_init): Adjust offsets. + (pa_trampoline_adjust_address): Likewise. + * config/pa/pa.h (TRAMPOLINE_SIZE): Adjust 32-bit size. + +2019-10-12 Iain Sandoe <iain@sandoe.co.uk> + + PR target/67183 + * config/darwin.c (machopic_indirection): New field to flag + non-lazy-symbol-pointers in the data section. + (machopic_indirection_name): Compute if an indirection should + appear in the data section. + (machopic_output_data_section_indirection): New callback split + from machopic_output_indirection. + (machopic_output_stub_indirection): Likewise. + (machopic_output_indirection): Retain the code for non-lazy + symbol pointers in their regular section. + (machopic_finish): Use the new callbacks to order the indirection + output. + +2019-10-12 Iain Sandoe <iain@sandoe.co.uk> + + * config/darwin-protos.h (machopic_finish): Delete. + * config/darwin.c (machopic_finish): Make static. + +2019-10-12 Iain Sandoe <iain@sandoe.co.uk> + + * config/darwin.c (darwin_file_end): Only emit empty CTOR/DTOR + sections when building kernel extension code. + +2019-10-12 Palmer Dabbelt <palmer@sifive.com> + + * doc/extend.texi (Alternate Keywords): Change "-std=c11" to "a + later standard." + +2019-10-12 John David Anglin <danglin@gcc.gnu.org> + + * config/pa/pa.c (pa_option_override): Remove trailing comma + from warning. + +2019-10-12 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/92063 + * tree-eh.c (operation_could_trap_helper_p) <case COND_EXPR> + <case VEC_COND_EXPR>: Return false with *handled = false. + (tree_could_trap_p): For {,VEC_}COND_EXPR return false instead of + recursing on the first operand. + * fold-const.c (simple_operand_p_2): Use generic_expr_could_trap_p + instead of tree_could_trap_p. + * tree-ssa-sccvn.c (vn_nary_may_trap): Formatting fixes. + +2019-10-11 Jim Wilson <jimw@sifive.com> + + PR rtl-optimization/91860 + * combine.c (subst): If new_rtx is a constant, also check for + SIGN_EXTEND when deciding whether to call simplify_unary_operation. + +2019-10-11 Richard Sandiford <richard.sandiford@arm.com> + + * expr.c (store_expr): Use rtx_to_poly_int64 rather than + INTVAL when calling store_bit_field. + +2019-10-11 Wilco Dijkstra <wdijkstr@arm.com> + + * config/arm/arm.h (HONOR_REG_ALLOC_ORDER): Set when optimizing for + size. + +2019-10-11 Bernd Edlinger <bernd.edlinger@hotmail.de> + + * tree-vect-loop.c (vect_analyze_loop_operations): Adjust call to + vectorizable_live_operation. + (vectorizable_live_operation): Adjust parameters. + * tree-vect-stmts.c (vect_init_vector, + vect_gen_widened_results_half): Fix typo in function comment. + (can_vectorize_live_stmts): Adjust function comment. + Adjust parameters. Adjust call to vectorizable_live_operation. + (vect_analyze_stmt): Adjust call to can_vectorize_live_stmts. + (vect_transform_stmt): Adjust function comment. Adjust call to + can_vectorize_live_stmts. + * tree-vectorizer.h (vectorizable_live_operation): Adjust parameters. + +2019-10-11 Richard Biener <rguenther@suse.de> + + PR tree-optimization/90883 + PR tree-optimization/91091 + * tree-ssa-sccvn.c (vn_reference_lookup_3): Use correct + alias-sets both for recording VN table entries and continuing + walking after translating through copies. Handle same-sized + reads from SSA names by returning the plain SSA name. + (eliminate_dom_walker::eliminate_stmt): Properly handle + non-size precision stores in redundant store elimination. + +2019-10-11 Jan Hubicka <hubicka@ucw.cz> + + * ggc-page.c (release_pages): Output statistics when !quiet_flag. + (ggc_collect): Dump later to not interfere with release_page dump. + (ggc_trim): New function. + * ggc-none.c (ggc_trim): New. + * ggc.h (ggc_trim): Declare. + +2019-10-11 Richard Biener <rguenther@suse.de> + + PR tree-optimization/92066 + PR tree-optimization/92046 + * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): + Fix bogus cost model check. + +2019-10-11 Tobias Burnus <tobias@codesourcery.com> + + * langhooks-def.h (LANG_HOOKS_OMP_IS_ALLOCATABLE_OR_PTR): Define. + (LANG_HOOKS_DECLS): Add it. + * langhooks.h (lang_hooks_for_decls): Add omp_is_allocatable_or_ptr; + update comment for omp_is_optional_argument. + * omp-general.c (omp_is_allocatable_or_ptr): New. + * omp-general.h (omp_is_allocatable_or_ptr): Declare. + * omp-low.c (scan_sharing_clauses, lower_omp_target): Handle + Fortran's optional arguments and allocatable/pointer scalars + with use_device_addr. + +2019-10-11 Ilya Leoshkevich <iii@linux.ibm.com> + + PR target/77918 + * config/s390/2827.md: Add new opcodes. + * config/s390/2964.md: Likewise. + * config/s390/3906.md: Likewise. + * config/s390/8561.md: Likewise. + * config/s390/s390-builtins.def (s390_vfchesb): Use + the new vec_cmpgev4sf_quiet_nocc. + (s390_vfchedb): Use the new vec_cmpgev2df_quiet_nocc. + (s390_vfchsb): Use the new vec_cmpgtv4sf_quiet_nocc. + (s390_vfchdb): Use the new vec_cmpgtv2df_quiet_nocc. + (vec_cmplev4sf): Use the new vec_cmplev4sf_quiet_nocc. + (vec_cmplev2df): Use the new vec_cmplev2df_quiet_nocc. + (vec_cmpltv4sf): Use the new vec_cmpltv4sf_quiet_nocc. + (vec_cmpltv2df): Use the new vec_cmpltv2df_quiet_nocc. + * config/s390/s390-modes.def (CCSFPS): New mode. + * config/s390/s390.c (s390_match_ccmode_set): Support CCSFPS. + (s390_select_ccmode): Return CCSFPS for LT, LE, GT, GE and LTGT. + (s390_branch_condition_mask): Reuse CCS for CCSFPS. + (s390_expand_vec_compare): Use non-signaling patterns where + necessary. + (s390_reverse_condition): Support CCSFPS. + * config/s390/s390.md (*cmp<mode>_ccsfps): New pattern. + * config/s390/vector.md: (VFCMP_HW_OP): Remove. + (asm_fcmp_op): Likewise. + (*smaxv2df3_vx): Use pattern for quiet comparison. + (*sminv2df3_vx): Likewise. + (*vec_cmp<VFCMP_HW_OP:code><mode>_nocc): Remove. + (*vec_cmpeq<mode>_quiet_nocc): New pattern. + (vec_cmpgt<mode>_quiet_nocc): Likewise. + (vec_cmplt<mode>_quiet_nocc): New expander. + (vec_cmpge<mode>_quiet_nocc): New pattern. + (vec_cmple<mode>_quiet_nocc): New expander. + (*vec_cmpeq<mode>_signaling_nocc): New pattern. + (*vec_cmpgt<mode>_signaling_nocc): Likewise. + (*vec_cmpgt<mode>_signaling_finite_nocc): Likewise. + (*vec_cmpge<mode>_signaling_nocc): Likewise. + (*vec_cmpge<mode>_signaling_finite_nocc): Likewise. + (vec_cmpungt<mode>): New expander. + (vec_cmpunge<mode>): Likewise. + (vec_cmpuneq<mode>): Use quiet patterns. + (vec_cmpltgt<mode>): Allow only on z14+. + (vec_cmpordered<mode>): Use quiet patterns. + (vec_cmpunordered<mode>): Likewise. + (VEC_CMP_EXPAND): Add ungt and unge. + +2019-10-11 Jan Hubicka <hubicka@ucw.cz> + + * gimple-streamer-out.c (output_gimple_stmt): Add explicit function + parameter. + * lto-streamer-out.c: Include tree-dfa.h. + (output_cfg): Do not use cfun. + (lto_prepare_function_for_streaming): New. + (output_function): Do not push cfun; do not initialize loop optimizer. + * lto-streamer.h (lto_prepare_function_for_streaming): Declare. + * passes.c (ipa_write_summaries): Use it. + (ipa_write_optimization_summaries): Do not modify bodies. + * tree-dfa.c (renumber_gimple_stmt_uids): Add function parameter. + * tree.dfa.h (renumber_gimple_stmt_uids): Update prototype. + * tree-ssa-dse.c (pass_dse::execute): Update use of + renumber_gimple_stmt_uids. + * tree-ssa-math-opts.c (pass_optimize_widening_mul::execute): Likewise. + +2019-10-11 Kewen Lin <linkw@gcc.gnu.org> + + * config/rs6000/rs6000.c (rs6000_builtin_vectorization_cost): Lower + vec_promote_demote cost to 1 for non-Power7 VSX architectures. + +2019-10-10 Joseph Myers <joseph@codesourcery.com> + + * ginclude/float.h [!__DEC32_MANT_DIG__]: Do not define DFP + macros. + [__STDC_WANT_IEC_60559_DFP_EXT__ || __STDC_VERSION__ > 201710L]: + Also define DFP macros for these conditions. + [!__STDC_WANT_DEC_FP__] (DEC32_SUBNORMAL_MIN, DEC64_SUBNORMAL_MIN, + DEC128_SUBNORMAL_MIN): Do not define. + [__STDC_WANT_IEC_60559_DFP_EXT__ || __STDC_VERSION__ > 201710L] + (DEC32_TRUE_MIN, DEC64_TRUE_MIN, DEC128_TRUE_MIN): New macros. + +2019-10-10 Xiong Hu Luo <luoxhu@linux.ibm.com> + Sandra Loosemore <sandra@codesourcery.com> + + PR middle-end/26241 + * doc/lto.texi (IPA): Reference to the IPA passes. + * doc/passes.texi (Pass manager): Add node IPA passes and + description for each IPA pass. + +2019-10-10 Jan Hubicka <hubicka@ucw.cz> + + * ipa-reference.c: Do not include splay-tree.h + (reference_vars_to_consider): Turn to hash map. + (get_static_name, ipa_init, analyze_function, propagate, + stream_out_bitmap, ipa_reference_write_optimization_summary, + ipa_reference_write_optimization_summary): Update. + +2019-10-10 Jan Hubicka <hubicka@ucw.cz> + + * ipa-reference.c (propagate): Fix releasing of IPA summaries. + +2019-10-10 Iain Sandoe <iain@sandoe.co.uk> + + * config/darwin.c: Lookup Objective C metadata and force indirection + for IVAR refs. + +2019-10-10 Michael Meissner <meissner@linux.ibm.com> + + * config/rs6000/rs6000.c (quad_address_p): Add check for prefixed + addresses. + (mem_operand_gpr): Add check for prefixed addresses. + (mem_operand_ds_form): Add check for prefixed addresses. + (rs6000_legitimate_offset_address_p): If we support prefixed + addresses, check for a 34-bit offset instead of 16-bit. + (rs6000_legitimate_address_p): Add check for prefixed addresses. + Do not allow load/store with update if the address is prefixed. + (rs6000_mode_dependent_address): If we support prefixed + addresses, check for a 34-bit offset instead of 16-bit. + +2019-10-10 Ilya Leoshkevich <iii@linux.ibm.com> + + PR target/77918 + * config/s390/vector.md (vcond_comparison_operator): New + predicate. + (vcond<V_HW:mode><V_HW2:mode>): Use vcond_comparison_operator. + +2019-10-10 David Malcolm <dmalcolm@redhat.com> + + PR 87488 + * Makefile.in (CFLAGS-opts.o): Pass in DOCUMENTATION_ROOT_URL via + -D. + * configure.ac (--with-documentation-root-url): New option. + * configure: Regenerate. + * diagnostic-format-json.cc (json_end_diagnostic): If there is an + option URL, add it as a new string field of the diagnostic option. + * diagnostic.c (diagnostic_initialize): Initialize get_option_url. + (print_option_information): If get_option_url is non-NULL, call + it, and if the result is non-NULL, potentially emit an escape + sequence to markup the option text with the resulting URL. + * diagnostic.h (diagnostic_context::get_option_url): New callback. + * doc/invoke.texi (-fdiagnostics-format=): Add "option_url" to + example of JSON output. + * opts-diagnostic.h (get_option_url): New decl. + * opts.c (get_option_url): New function. + * toplev.c (general_init): Initialize the get_option_url callback. + +2019-10-10 David Malcolm <dmalcolm@redhat.com> + + PR 87488 + * common.opt (fdiagnostics-urls=): New option. + (diagnostic-url.h): Add SourceInclude. + (diagnostic_url_rule): New enum. + * diagnostic-color.c: Include "diagnostic-url.h". + (diagnostic_urls_enabled_p): New function. + * diagnostic-url.h: New file. + * diagnostic.c: Include "diagnostic-url.h". + (diagnostic_urls_init): New function. + * diagnostic.h (diagnostic_urls_init): New decl. + * doc/invoke.texi (Diagnostic Message Formatting Options): Add + -fdiagnostics-urls to the list. + (-fdiagnostics-urls): New option. + * gcc.c (driver_handle_option): Handle OPT_fdiagnostics_urls_. + (driver::global_initializations): Call diagnostic_urls_init. + * opts-global.c (init_options_once): Likewise. + * opts.c (common_handle_option): Handle OPT_fdiagnostics_urls_. + * pretty-print.c (pretty_printer::pretty_printer): Initialize + show_urls. + (pp_begin_url): New function. + (pp_end_url): New function. + (selftest::test_urls): New selftest. + (selftest::pretty_print_c_tests): Call it. + * pretty-print.h (pretty_printer::show_urls): New field. + (pp_begin_url): New decl. + (pp_end_url): New decl. + +2019-10-10 Uroš Bizjak <ubizjak@gmail.com> + + PR target/92022 + * config/alpha/alpha.c (alpha_handle_trap_shadows): Skip DEBUG_INSN. + +2019-10-10 Oleg Endo <olegendo@gcc.gnu.org> + + PR target/88630 + * config/sh/sh.h (TARGET_FPU_SH4_300): New macro. + * config/sh/sh.c (sh_option_override): Enable fsca and fsrra insns + also for TARGET_FPU_SH4_300. + (sh_emit_mode_set): Check for TARGET_FPU_SH4_300 instead of + TARGET_SH4_300. + * config/sh/sh.md (toggle_pr): Add TARGET_FPU_SH4_300 condition. + (negsf2): Expand to either negsf2_fpscr or negsf2_no_fpscr. + (*negsf2_i): Split into ... + (negsf2_fpscr, negsf2_no_fpscr): ... these new patterns. + (abssf2): Expand to either abssf2_fpsc or abssf2_no_fpsc. + (**abssf2_i): Split into ... + (abssf2_fpscr, abssf2_no_fpscr): ... these new patterns. + (negdf2): Expand to either negdf2_fpscr or negdf2_no_fpscr. + (*negdf2_i): Split into ... + (negdf2_fpscr, negdf2_no_fpscr): ... these new patterns. + (absdf2): Expand to either absdf2_fpscr or absdf2_no_fpsc. + (**abssf2_i): Split into ... + (absdf2_fpscr, absdf2_no_fpscr): ... these new patterns. + +2019-10-10 Richard Biener <rguenther@suse.de> + + PR middle-end/92046 + * opts.c (finish_options): Do not influence global --params + from options that are adjustable per function. + * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): + Apply --param adjustment based on active cost-model. + * tree-ssa-phiopt.c (cond_if_else_store_replacement): Disable + further store-sinking when vectorization or if-conversion + are not enabled. + +2019-10-10 Jan Hubicka <hubicka@ucw.cz> + + PR middle-end/92037 + * cgraph.c (symbol_table_test::symbol_table_test): Use ggc_alloc + rather than ggc_alloc_cleared to alloc symbol table. + * toplev.c (general_init): Likewise. + * cgraph.h (symbol_table): Explicitly construct every field. + +2019-10-10 Andreas Krebbel <krebbel@linux.ibm.com> + + * common/config/s390/s390-common.c (PF_ARCH13): Rename to... + (PF_Z15): ... this. + * config.gcc: Add z15 as option for --with-arch and --with-tune + configure switches. + * config/s390/s390-c.c (s390_resolve_overloaded_builtin): Add + error reporting for unsupported builtins. + * config/s390/s390-opts.h (enum processor_type): Rename + PROCESSOR_8561_ARCH13 to PROCESSOR_8561_Z15. + * config/s390/8561.md: Rename arch13 to z15 throughout the file. + * config/s390/driver-native.c (s390_host_detect_local_cpu): + Likewise. + * config/s390/s390-builtins.def: Likewise. + * config/s390/s390.c (processor_table): Add z15 as option and keep arch13 as alternative. + (s390_expand_builtin): Add missing check for unsupported builtins. + (s390_canonicalize_comparison): Rename TARGET_ARCH13 to TARGET_Z15. + (s390_rtx_costs): Likewise. + (s390_get_sched_attrmask): Rename arch13 to z15. + (s390_get_unit_mask): Likewise. + (s390_is_fpd): Likewise. + (s390_is_fxd): Likewise. + * config/s390/s390.h (enum processor_flags): Likewise. + * config/s390/s390.md: Likewise. + * config/s390/vector.md: Likewise. + * config/s390/vx-builtins.md: Likewise. + * config/s390/s390.opt: Add z15 to processor_type value. + +2019-10-10 Andreas Krebbel <krebbel@linux.ibm.com> + + PR target/91035 + * config/s390/s390-protos.h (s390_output_split_stack_data): Add + prototype. + * config/s390/s390.md (UNSPECV_SPLIT_STACK_DATA): Remove. + ("split_stack_data", "split_stack_call") + ("split_stack_call_<mode>", "split_stack_cond_call") + ("split_stack_cond_call_<mode>"): Remove. + ("@split_stack_call<mode>", "@split_stack_cond_call<mode>"): New + insn definition. + * config/s390/s390.c (s390_output_split_stack_data): New function. + (s390_expand_split_stack_prologue): Use the merged expander. + +2019-10-09 Martin Sebor <msebor@redhat.com> + + PR tree-optimization/90879 + * builtins.c (check_access): Avoid using maxbound when null. + * calls.c (maybe_warn_nonstring_arg): Adjust to get_range_strlen change. + * doc/invoke.texi (-Wstring-compare): Document new warning option. + * gimple-fold.c (get_range_strlen_tree): Make setting maxbound + conditional. + (get_range_strlen): Overwrite initial maxbound when non-null. + * gimple-ssa-sprintf.c (get_string_length): Adjust to get_range_strlen + changes. + * tree-ssa-strlen.c (maybe_diag_stxncpy_trunc): Same. + (used_only_for_zero_equality): New function. + (handle_builtin_memcmp): Call it. + (determine_min_objsize): Return an integer instead of tree. + (get_len_or_size, strxcmp_eqz_result): New functions. + (maybe_warn_pointless_strcmp): New function. + (handle_builtin_string_cmp): Call it. Fold zero-equality of strcmp + between a longer string and a smaller array. + (get_range_strlen_dynamic): Overwrite initial maxbound when non-null. + +2019-10-09 Iain Sandoe <iain@sandoe.co.uk> + + * config/darwin.c (darwin_override_options): Make the check for + Objective-C ABI version more specific for 64bit code. + +2019-10-09 Iain Sandoe <iain@sandoe.co.uk> + + * config/darwin.c (machopic_indirect_data_reference): Set flag to + indicate that the new symbol is an indirection. + (machopic_indirect_call_target): Likewise. + * config/darwin.h (MACHO_SYMBOL_FLAG_INDIRECTION): New. + (MACHO_SYMBOL_INDIRECTION_P): New. + (MACHO_SYMBOL_FLAG_STATIC): Adjust bit number. + +2019-10-08 Jason Merrill <jason@redhat.com> + + * doc/invoke.texi: Document -fconcepts-ts. + +2019-10-09 Richard Biener <rguenther@suse.de> + + * tree-vect-loop.c (vect_is_simple_reduction): Simplify and + allow stmts other than GIMPLE_ASSIGN in nested cycles. + +2019-10-08 Richard Biener <rguenther@suse.de> + + * tree-vectorizer.h (_stmt_vec_info::reduc_vectype_in): New. + (_stmt_vec_info::force_single_cycle): Likewise. + (STMT_VINFO_FORCE_SINGLE_CYCLE): New. + (STMT_VINFO_REDUC_VECTYPE_IN): Likewise. + * tree-vect-loop.c (vectorizable_reduction): Set + STMT_VINFO_REDUC_VECTYPE_IN and STMT_VINFO_FORCE_SINGLE_CYCLE. + (vect_transform_reduction): Use them to remove redundant code. + (vect_transform_cycle_phi): Likewise. + +2019-10-08 Dmitrij Pochepko <dmitrij.pochepko@bell-sw.com> + + PR tree-optimization/90836 + * match.pd (popcount): New pattern. + +2019-10-08 Martin Sebor <msebor@redhat.com> + + PR middle-end/92026 + PR middle-end/92014 + * tree-ssa-strlen.c (count_nonzero_bytes): Avoid recursing for MEM_REF + again once nbytes has been set. Set the access size when not yet set. + +2019-10-08 Iain Sandoe <iain@sandoe.co.uk> + + * config/darwin.c (machopic_select_section): Remove dead code for + old Objective-C section selection method, replace with unreachable. + +2019-10-08 Iain Sandoe <iain@sandoe.co.uk> + + * config/darwin.c (machopic_indirect_data_reference): Check for + required indirections before making direct access to defined + values. + (machopic_output_indirection): Place the indirected pointes for + required indirections into the non-lazy symbol pointers section. + (darwin_encode_section_info): + * config/darwin.h (MACHO_SYMBOL_FLAG_MUST_INDIRECT): New. + (MACHO_SYMBOL_MUST_INDIRECT_P): New. + +2019-10-08 Uroš Bizjak <ubizjak@gmail.com> + + PR target/91994 + * config/i386/i386.c (x86_avx_u128_mode_needed): Use SSE_REG + instead of ALL_SSE_REG to check if function call preserves some + 256-bit SSE registers. + +2019-10-08 Tulio Magno Quites Machado Filho <tuliom@linux.ibm.com> + + * config.gcc: Move -L usage from LINK_OS_EXTRA_SPEC32 and + LINK_OS_EXTRA_SPEC64 to MD_STARTFILE_PREFIX and + MD_STARTFILE_PREFIX_1 when using --with-advance-toolchain. + +2019-10-08 Richard Biener <rguenther@suse.de> + + * tree-vectorizer.h (_stmt_vec_info::v_reduc_type): Remove. + (_stmt_vec_info::is_reduc_info): Add. + (STMT_VINFO_VEC_REDUCTION_TYPE): Remove. + (vectorizable_condition): Remove. + (vectorizable_shift): Likewise. + (vectorizable_reduction): Adjust. + (info_for_reduction): New. + * tree-vect-loop.c (vect_force_simple_reduction): Fold into... + (vect_analyze_scalar_cycles_1): ... here. + (vect_analyze_loop_operations): Adjust. + (needs_fold_left_reduction_p): Simplify for single caller. + (vect_is_simple_reduction): Likewise. Remove stmt restriction + for nested cycles not part of double reductions. + (vect_model_reduction_cost): Pass in the reduction type. + (info_for_reduction): New function. + (vect_create_epilog_for_reduction): Use it, access reduction + meta off the stmt info it returns. Use STMT_VINFO_REDUC_TYPE + instead of STMT_VINFO_VEC_REDUCTION_TYPE. + (vectorize_fold_left_reduction): Remove pointless assert. + (vectorizable_reduction): Analyze the full reduction when + visiting the outermost PHI. Simplify. Use STMT_VINFO_REDUC_TYPE + instead of STMT_VINFO_VEC_REDUCTION_TYPE. Direct reduction + stmt code-generation to vectorizable_* in most cases. Verify + code-generation only for cases handled by + vect_transform_reductuon. + (vect_transform_reduction): Use info_for_reduction to get at + reduction meta. Simplify. + (vect_transform_cycle_phi): Likewise. + (vectorizable_live_operation): Likewise. + * tree-vect-patterns.c (vect_reassociating_reduction_p): Look + at the PHI node for STMT_VINFO_REDUC_TYPE. + * tree-vect-slp.c (vect_schedule_slp_instance): Remove no + longer necessary code. + * tree-vect-stmts.c (vectorizable_shift): Make static again. + (vectorizable_condition): Likewise. Get at reduction related + info via info_for_reduction. + (vect_analyze_stmt): Adjust. + (vect_transform_stmt): Likewise. + * tree-vectorizer.c (vec_info::new_stmt_vec_info): Initialize + STMT_VINFO_REDUC_TYPE instead of STMT_VINFO_VEC_REDUCTION_TYPE. + +2019-10-08 Joseph Myers <joseph@codesourcery.com> + + * doc/invoke.texi (-ffp-int-builtin-inexact): Document + -fno-fp-int-builtin-inexact default for C2X. + +2019-10-07 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org> + Richard Biener <rguenther@suse.de> + + PR tree-optimization/91532 + * tree-if-conv.c: Include tree-ssa-dse.h. + (ifcvt_local_dce): Change param from bb to loop, + and call dse_classify_store. + (tree_if_conversion): Pass loop instead of loop->header as arg + to ifcvt_local_dce. + * tree-ssa-dse.c: Include tree-ssa-dse.h. + (delete_dead_or_redundant_assignment): Remove static qualifier from + declaration, and add prototype in tree-ssa-dse.h. + (dse_store_status): Move to tree-ssa-dse.h. + (dse_classify_store): Remove static qualifier and add new tree param + stop_at_vuse, and add prototype in tree-ssa-dse.h. + * tree-ssa-dse.h: New header. + +2019-10-07 Iain Sandoe <iain@sandoe.co.uk> + + * config/darwin.c (machopic_output_indirection): Don't put + hidden symbol indirections into the .data section, use the + non-lazy symbol pointers section as normal. + (darwin_encode_section_info): Record if a symbol is hidden. + * config/darwin.h (MACHO_SYMBOL_FLAG_HIDDEN_VIS): New. + (MACHO_SYMBOL_HIDDEN_VIS_P): New. + +2019-10-07 Iain Sandoe <iain@sandoe.co.uk> + + * config/darwin.c (machopic_symbol_defined_p): Use symbol flag + predicates instead of accessing bits directly. + (machopic_indirect_call_target): Likewise. + (machopic_output_indirection): Likewise. + (darwin_encode_section_info): Improve description. Use renamed + symbol flags. Use predicate macros for variables and functions. + * config/darwin.h: + Rename MACHO_SYMBOL_VARIABLE to MACHO_SYMBOL_FLAG_VARIABLE. + Rename MACHO_SYMBOL_DEFINED to MACHO_SYMBOL_FLAG_DEFINED. + Rename MACHO_SYMBOL_STATIC to MACHO_SYMBOL_FLAG_STATIC. + (MACHO_SYMBOL_VARIABLE_P): New. + (MACHO_SYMBOL_DEFINED_P):New. + (MACHO_SYMBOL_STATIC_P): New. + * config/i386/darwin.h (MACHO_SYMBOL_FLAG_VARIABLE): Delete. + (SYMBOL_FLAG_SUBT_DEP): New. + * config/rs6000/darwin.h (SYMBOL_FLAG_SUBT_DEP): New. + +2019-10-07 Jozef Lawrynowicz <jozef.l@mittosystems.com> + + * config/msp430/msp430.c (msp430_file_end): s/msp_/msp430_/ + (msp430_expand_epilogue): Likewise. + * config/msp430/predicates.md: Likewise. + * config/msp430/msp430.md: Likewise. + Replace blocks of 8 spaces with tabs. + +2019-10-07 Jozef Lawrynowicz <jozef.l@mittosystems.com> + + * config/msp430/msp430-protos.h (msp430_split_addsi): New prototype. + * config/msp430/msp430.c (msp430_split_addsi): New. + * config/msp430/msp430.md: Call msp430_split_addsi () instead of using + a block of C code for splitting addsi. + +2019-10-07 Uroš Bizjak <ubizjak@gmail.com> + + * config/i386/i386-expand.c (ix86_expand_floorceildf_32, + ix86_expand_rounddf_32): Reorder functions. + * config/i386/i386-protos.h: Update. + +2019-10-07 Jozef Lawrynowicz <jozef.l@mittosystems.com> + + * config.in: Regenerate. + * config/msp430/constraints.md: Fix docstring for "Ys" constraint. + Add new "Yx" constraint. + * config/msp430/driver-msp430.c (msp430_propagate_region_opt): New spec + function. + * config/msp430/msp430-protos.h (msp430_op_not_in_high_mem): New + prototype. + * config/msp430/msp430.c (msp430_option_override): Allow the lower + code/data region to be selected in the small memory model. + (msp430_section_attr): Don't warn if the "section" and "lower" + attributes are used together. + (msp430_handle_generic_attribute): Likewise. + (msp430_var_in_low_mem): New function. + (TARGET_ENCODE_SECTION_INFO): Define. + (msp430_encode_section_info): New function. + (gen_prefix): Return early in the small memory model. + Require TARGET_USE_LOWER_REGION_PREFIX to be set before adding the + ".lower" prefix if -m{code,data}-region=lower have been passed. + (msp430_output_aligned_decl_common): Emit common symbols when + -mdata-region=lower is passed unless TARGET_USE_LOWER_REGION_PREFIX is + set. + (TARGET_ASM_FILE_END): Define. + (msp430_file_end): New function. + (msp430_do_not_relax_short_jumps): Allow relaxation when + function will be in the lower region. + (msp430_op_not_in_high_mem): New function. + (msp430_print_operand): Check "msp430_op_not_in_high_mem" for + the 'X' operand selector. + Clarify comment for 'x' operand selector. + * config/msp430/msp430.h (LINK_SPEC): Propagate + -m{code,data}-region to the linker via spec function + msp430_propagate_region_opt. + (msp430_propagate_region_opt): New prototype. + (EXTRA_SPEC_FUNCTIONS): Add msp430_propagate_region_opt. + (SYMBOL_FLAG_LOW_MEM): Define. + * config/msp430/msp430.md (addsipsi3): Add missing "%X" operand + selector. + (zero_extendqihi2): Fix operand number used by "%X" selector. + (zero_extendqisi2): Likewise. + (zero_extendhisi2): Likewise. + (movqi): Use "Yx" constraint in place of "%X" operand selector. + (movhi): Likewise. + (addqi3): Likewise. + (addhi3): Likewise. + (addsi3): Likewise. + (addhi3_cy): Likewise. + (addchi4_cy): Likewise. + (subqi3): Likewise. + (subhi3): Likewise. + (subsi3): Likewise. + (bic<mode>3): Likewise. + (and<mode>3): Likewise. + (ior<mode>3): Likewise. + (xor<mode>3): Likewise. + (slli_1): Add missing "%X" operand selector. + (slll_1): Likewise. + (slll_2): Likewise. + (srai_1): Likewise. + (sral_1): Likewise. + (sral_2): Likewise. + (srli_1): Likewise. + (srll_1): Likewise. + (cbranchqi4_real): Use "Yx" constraint in place of "%X" operand + selector. + (cbranchhi4_real): Likewise. + (cbranchqi4_reversed): Likewise. + (cbranchhi4_reversed): Likewise. + (*bitbranch<mode>4): Likewise. + (*bitbranch<mode>4_z): Remove unnecessary "%x" operand selector. + * config/msp430/msp430.opt (mcode-region=): Set default to + MSP430_REGION_LOWER. Improve docstring. + (mdata-region=): Likewise. + (muse-lower-region-prefix): New option. + * config/msp430/t-msp430 (MULTILIB_OPTIONS): Add + mdata-region=none multilib. + (MULTILIB_MATCHES): Set mdata-region={upper,either} to match + mdata-region=none multilib. + MULTILIB_EXCEPTIONS: Remove. + MULTILIB_REQUIRED: Define. + * configure: Regenerate. + * configure.ac: Define HAVE_AS_GNU_ATTRIBUTE and + HAVE_AS_MSPABI_ATTRIBUTE if GAS version >= 2.33.50. + * doc/extend.texi: Clarify comment for {upper,lower,either} + function attributes. + Add separate description for "lower" variable attribute. + +2019-10-07 Ilya Leoshkevich <iii@linux.ibm.com> + + PR target/77918 + * optabs-tree.c (vcond_icode_p): New function. + (vcond_eq_icode_p): Likewise. + (expand_vec_cond_expr_p): Use vcond_icode_p and + vcond_eq_icode_p. + * optabs.c (can_vcond_compare_p): New function. + * optabs.h (can_vcond_compare_p): Likewise. + +2019-10-07 Ilya Leoshkevich <iii@linux.ibm.com> + + PR target/77918 + * gimple-expr.c (gimple_cond_get_ops_from_tree): Assert that the + caller passes a non-trapping condition. + (is_gimple_condexpr): Allow trapping conditions. + (is_gimple_condexpr_1): New helper function. + (is_gimple_condexpr_for_cond): New function, acts like old + is_gimple_condexpr. + * gimple-expr.h (is_gimple_condexpr_for_cond): New function. + * gimple.c (gimple_could_trap_p_1): Handle COND_EXPR and + VEC_COND_EXPR. Fix an issue with statements like i = (fp < 1.). + * gimplify.c (gimplify_cond_expr): Use + is_gimple_condexpr_for_cond. + (gimplify_expr): Allow is_gimple_condexpr_for_cond. + * tree-eh.c (operation_could_trap_p): Assert on COND_EXPR and + VEC_COND_EXPR. + (tree_could_trap_p): Handle COND_EXPR and VEC_COND_EXPR. + * tree-ssa-forwprop.c (forward_propagate_into_gimple_cond): Use + is_gimple_condexpr_for_cond, remove pointless tmp check + (forward_propagate_into_cond): Remove pointless tmp check. + +2019-10-07 Vladislav Ivanishin <vlad@ispras.ru> + + * gimple-iterator.h (gsi_next_nonvirtual_phi): Change the semantics to + match that of other gsi_next_* functions. Adjust the comment. + (gsi_start_nonvirtual_phis): New function. + * ipa-icf.c (sem_function::compare_phi_node): Update uses of + gsi_next_nonvirtual_phi accordingly. (No functional change.) + +2019-10-07 Vladislav Ivanishin <vlad@ispras.ru> + + * doc/invoke.texi (-Wuninitialized): Don't mention the clobbered by + setjmp situation here. Fix a verb's ending: "the exact variables or + elements for which there are warnings depends" -> "... depend". + +2019-10-07 Aldy Hernandez <aldyh@redhat.com> + + * ipa-prop.c (ipa_vr::nonzero_p): Add TYPE_UNSIGNED check. + +2019-10-07 Aldy Hernandez <aldyh@redhat.com> + + * ipa-prop.c (ipa_vr::nonzero_p): New. + (ipcp_update_vr): Use nonzero_p instead of open-coding check for + non-zero range. + * ipa-prop.h (class ipa_vr): Add nonzero_p. + * tree-vrp.c (range_has_numeric_bounds_p): New. + (range_int_cst_p): Use range_has_numeric_bounds_p. + (get_range_op_handler): New. + (supported_types_p): New. + (defined_ranges_p): New. + (drop_undefines_to_varying): New. + (range_fold_binary_symbolics_p): New. + (range_fold_unary_symbolics_p): New. + (range_fold_unary_expr): Extract out into above functions. + (range_fold_binary_expr): Same. + (value_range_base::normalize_addresses): New. + (value_range_base::normalize_symbolics): Normalize addresses. + * tree-vrp.h (class value_range_base): Add normalize_addresses. + +2019-10-07 Aldy Hernandez <aldyh@redhat.com> + + * tree-vrp.c (value_range_base::singleton_p): Use + value_range_base::num_pairs instead of vrp_val_is* to check + if a range has one sub-range. + +2019-10-07 Richard Sandiford <richard.sandiford@arm.com> + + * ira-lives.c (check_and_make_def_conflict): Handle cases in which + DEF is not a true earlyclobber but is tied to a specific input + operand, and so is effectively earlyclobber wrt inputs that have + different values. + (make_early_clobber_and_input_conflicts): Pass this case to the above. + +2019-10-07 Richard Sandiford <richard.sandiford@arm.com> + + * machmode.h (opt_mode): Mark constructors with CONSTEXPR. + (pod_mode): Mark operators likewise. + (scalar_int_mode): Mark non-default constructors and + operators with CONSTEXPR. + (scalar_float_mode, scalar_mode, complex_mode): Likewise. + (fixed_size_mode): Likewise. + +2019-10-07 Richard Sandiford <richard.sandiford@arm.com> + + PR target/91994 + * config/i386/sse.md (avx_vzeroupper): Turn into a define_expand + and wrap the unspec_volatile in a parallel. + (*avx_vzeroupper): New define_insn. Use a match_parallel around + the unspec_volatile. + * config/i386/predicates.md (vzeroupper_pattern): Expect the + unspec_volatile to be wrapped in a parallel. + * config/i386/i386-features.c (ix86_add_reg_usage_to_vzeroupper) + (ix86_add_reg_usage_to_vzerouppers): New functions. + (rest_of_handle_insert_vzeroupper): Use them to add register + usage information to the vzeroupper instructions. + +2019-10-07 Richard Biener <rguenther@suse.de> + + PR tree-optimization/91975 + * tree-ssa-loop-ivcanon.c (constant_after_peeling): Consistently + handle invariants. + +2019-10-06 Richard Sandiford <richard.sandiford@arm.com> + + * var-tracking.c (dataflow_set_clear_at_call): Hoist temporary + function result outside of EXECUTE_IF_SET_IN_HARD_REG_SET. + +2019-10-06 Iain Sandoe <iain@sandoe.co.uk> + + * config/darwin.c (darwin_override_options): Adjust objective-c + ABI version error messages to avoid punctuation and contracted + negations. + +2019-10-05 Jan Hubicka <hubicka@ucw.cz> + + * ipa-inline.c: Fix type; compute size rather than self_size + for size of caller function. + +2019-10-05 Iain Sandoe <iain@sandoe.co.uk> + + PR target/59888 + * config/darwin.c (darwin_rodata_section): Add relocation flag, + choose const_data section for constants with relocations. + (machopic_select_section): Pass relocation flag to + darwin_rodata_section (). + +2019-10-05 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/91734 + * generic-match-head.c: Include fold-const-call.h. + * match.pd (sqrt(x) cmp c): Check the boundary value and + in case inexact computation of c*c affects comparison of the boundary, + turn LT_EXPR into LE_EXPR, GE_EXPR into GT_EXPR, LE_EXPR into LT_EXPR + or GT_EXPR into GE_EXPR. Punt for sqrt comparisons against NaN and + for -frounding-math. For c2, try the next smaller or larger floating + point constant depending on comparison code and if it has the same + sqrt as c2, use it instead of c2. + +2019-10-04 Martin Sebor <msebor@redhat.com> + + PR middle-end/91977 + * tree-ssa-strlen.c (count_nonzero_bytes): Handle assignments with + MEM_REF right operand. Avoid failing for MEM_REF assignments from + uninitialized objects. + +2019-10-04 Martin Sebor <msebor@redhat.com> + + * builtins.c (compute_objsize): Add an argument. + * tree-object-size.c (addr_object_size): Same. + (compute_builtin_object_size): Same. + * tree-object-size.h (compute_builtin_object): Same. + +2019-10-04 Jan Hubicka <hubicka@ucw.cz> + + * ipa-inline.c (inline_insns_single, inline_insns_auto): Fix typo. + +2019-10-04 Rafael Tsuha <rafael.tsuha@usp.br> + + * match.pd (sinh (x) / cosh (x)): New simplification rule. + +2019-10-04 Martin Jambor <mjambor@suse.cz> + + * tree-ssa-forwprop.c (simplify_builtin_call): Set gimple call + fntype when switching to calling memcpy instead of memset. + +2019-10-04 Bernd Edlinger <bernd.edlinger@hotmail.de> + + * hash-table.h (hash_table::empty_slow): Don't assign + size_t values to int variables. + +2019-10-04 Bernd Edlinger <bernd.edlinger@hotmail.de> + + * expr.c (convert_mode_scalar): Remove shadowing local var. + (emit_block_move): Rename local vars. + (block_move_libcall_safe_for_call_parm): Remove shadowing local var. + (emit_push_insn): Rename local vars. + (expand_assignment): Fix wrong mode in assign_stack_temp. Remove + shadowing local vars. + (store_constructor): Remove shadowing local vars. Rename local var. + (store_field, expand_cond_expr_using_cmove, + expand_expr_real_2): Remove shadowing local vars. + (expand_expr_real_1, + do_store_flag): Remove shadowing local vars. Rename local vars. + +2019-10-04 Bernd Edlinger <bernd.edlinger@hotmail.de> + + * cgraph.h (FOR_EACH_ALIAS): Avoid shadowing the loop variable. + +2019-10-04 Bernd Edlinger <bernd.edlinger@hotmail.de> + + * genmatch.c (commutate): Rename local var. + (lower_cond): Reuse local var. + (dt_node::gen, dt_node::gen_kids, dt_node::gen_kids_1, + dt_operand::gen, dt_operand::gen_gimple_expr, + dt_simplify::gen): Add a param. Rename generated vars. + (decision_tree::insert_operand, + (capture_info::walk_match, capture_info::walk_result, + capture_info::walk_c_expr): Rename local vars. + (expr::gen_transform): Rename generated vars. + Use snprintf. Rename local vars. + (capture::gen_transform, dt_operand::get_name, + dt_operand::gen_opname): Rename generated vars. + (write_predicate): Adjust call to gen_kids. + (parser::get_internal_capture_id): Rename generated vars. + (parser::parse_expr): Rename local vars. + (parser::parse_if): Remove local var. + (parser::parse_pattern, add_operator): Rename local vars. + +2019-10-04 Joseph Myers <joseph@codesourcery.com> + + * builtins.def (DEF_C2X_BUILTIN): New macro. + (exp10, exp10f, exp10l, fabsd32, fabsd64, fabsd128, nand32) + (nand64, nand128, roundeven, roundevenf, roundevenl, strdup) + (strndup): Use DEF_C2X_BUILTIN. + * coretypes.h (enum function_class): Add function_c2x_misc. + +2019-10-04 Maya Rashish <coypu@sdf.org> + + * ira-color.c (update_costs_from_allocno): Call + ira_init_register_move_cost_if_necessary. + +2019-10-04 Jeff Law <law@redhat.com> + + * config/h8300/h8300.md (cpymemsi): Disable. + (movmd, movmd_internal_<mode>, movstr, movsd): + (movstr, movsd, stpcpy_internal_<mode>: Likewise. + (movmd splitter, movsd splitter): Likewise. + + * range-op.cc (range_tests): Avoid two tests when ints and + shorts are the same size. + +2019-10-04 Richard Biener <rguenther@suse.de> + + PR lto/91968 + * tree.c (find_decls_types_r): Do not remove LABEL_DECLs from + BLOCK_VARS. + +2019-10-04 Richard Biener <rguenther@suse.de> + + PR tree-optimization/91982 + * tree-vect-loop.c (vectorizable_live_operation): Also guard + against EXTRACT_LAST_REDUCTION. + * tree-vect-stmts.c (vect_transform_stmt): Likewise. + +2019-10-04 Aldy Hernandez <aldyh@redhat.com> + + * range-op.o (value_range_from_overflowed_bounds): Rename from + adjust_overflow_bound. + (value_range_with_overflow): Rename from + create_range_with_overflow. + (create_possibly_reversed_range): Adjusted for above renames. + (operator_*::wi_fold): Same. + (cross_product_operator::wi_cross_productor): Same. + +2019-10-04 Bernd Edlinger <bernd.edlinger@hotmail.de> + + * doc/invoke.texi (-Wshadow=global, -Wshadow=local, + -Wshadow=compatible-local): Fix description. + Add an example where -Wshadow=compatible-local does not + warn. + +2019-10-03 John David Anglin <danglin@gcc.gnu.org> + + * config/pa/pa.h (MAX_PCREL17F_OFFSET): Adjust. + + * config/pa/pa.c (pa_output_call): Remove 64-bit sibcall sequence. + (pa_attr_length_call): Adjust length for 64-bit plabel sequence. + +2019-10-03 Aaron Sawdey <acsawdey@linux.ibm.com> + + * expr.c (emit_block_move_hints): Slightly cleaner fix to + can_move_by_pieces issue. + +2019-10-03 Iain Sandoe <iain@sandoe.co.uk> + + PR target/87243 + * config/darwin-driver.c (maybe_get_sysroot_from_sdkroot): New. + (darwin_driver_init): Use the sysroot provided by SDKROOT when that + is available and the user has not set one on the command line. + +2019-10-03 Dragan Mladjenovic <dmladjenovic@wavecomp.com> + + PR target/91769 + * config/mips/mips.c (mips_split_move): Use reg_overlap_mentioned_p + instead of REGNO equality check on addr.reg. + +2019-10-03 Jan Hubicka <hubicka@ucw.cz> + + * params.def (PARAM_INLINE_HEURISTICS_HINT_PERCENT, + PARAM_INLINE_HEURISTICS_HINT_PERCENT_O2): New. + * doc/invoke.texi (inline-heuristics-hint-percent, + inline-heuristics-hint-percent-O2): Document. + * tree-inline.c (inline_insns_single, inline_insns_auto): Add new + hint attribute. + (can_inline_edge_by_limits_p): Use it. + +2019-10-03 Richard Sandiford <richard.sandiford@arm.com> + + * config/arm/arm.c (arm_print_value): Use real_to_decimal + to print CONST_DOUBLEs. + +2019-10-03 Andrea Corallo <andrea.corallo@arm.com> + + * ipa-cp.c (ipa_cp_c_finalize): Release ipcp_transformation_sum. + * ipa-prop.c (ipcp_free_transformation_sum): New function. + * ipa-prop.h (ipcp_free_transformation_sum): Add declaration. + +2019-10-03 Aldy Hernandez <aldyh@redhat.com> + + * Makefile.in (OBJS): Add range.o and range-op.o. + Remove wide-int-range.o. + * function-tests.c (test_ranges): New. + (function_tests_c_tests): Call test_ranges. + * ipa-cp.c (ipa_vr_operation_and_type_effects): Call + range_fold_unary_expr instead of extract_range_from_unary_expr. + * ipa-prop.c (ipa_compute_jump_functions_for_edge): Same. + * range-op.cc: New file. + * range-op.h: New file. + * range.cc: New file. + * range.h: New file. + * selftest.h (range_tests): New prototype. + * ssa.h: Include range.h. + * tree-vrp.c (value_range_base::value_range_base): New + constructors. + (value_range_base::singleton_p): Do not call + ranges_from_anti_range until sure we will need to. + (value_range_base::type): Rename gcc_assert to + gcc_checking_assert. + (vrp_val_is_max): New argument. + (vrp_val_is_min): Same. + (wide_int_range_set_zero_nonzero_bits): Move from + wide-int-range.cc. + (extract_range_into_wide_ints): Remove. + (extract_range_from_multiplicative_op): Remove. + (extract_range_from_pointer_plus_expr): Abstract POINTER_PLUS code + from extract_range_from_binary_expr. + (extract_range_from_plus_minus_expr): Abstract PLUS/MINUS code + from extract_range_from_binary_expr. + (extract_range_from_binary_expr): Remove. + (normalize_for_range_ops): New. + (range_fold_binary_expr): New. + (range_fold_unary_expr): New. + (value_range_base::num_pairs): New. + (value_range_base::lower_bound): New. + (value_range_base::upper_bound): New. + (value_range_base::upper_bound): New. + (value_range_base::contains_p): New. + (value_range_base::invert): New. + (value_range_base::union_): New. + (value_range_base::intersect): New. + (range_compatible_p): New. + (value_range_base::operator==): New. + (determine_value_range_1): Call range_fold_*expr instead of + extract_range_from_*expr. + * tree-vrp.h (class value_range_base): Add new constructors. + Add methods for union_, intersect, operator==, contains_p, + num_pairs, lower_bound, upper_bound, invert. + (vrp_val_is_min): Add handle_pointers argument. + (vrp_val_is_max): Same. + (extract_range_from_unary_expr): Remove. + (extract_range_from_binary_expr): Remove. + (range_fold_unary_expr): New. + (range_fold_binary_expr): New. + * vr-values.c (vr_values::extract_range_from_binary_expr): Call + range_fold_binary_expr instead of extract_range_from_binary_expr. + (vr_values::extract_range_basic): Same. + (vr_values::extract_range_from_unary_expr): Call + range_fold_unary_expr instead of extract_range_from_unary_expr. + * wide-int-range.cc: Remove. + * wide-int-range.h: Remove. + +2019-10-02 Michael Meissner <meissner@linux.ibm.com> + + * config/rs6000/rs6000.c (mem_operand_gpr): Use + SIGNED_16BIT_OFFSET_EXTRA_P macro. + (mem_operand_ds_form): Use SIGNED_16BIT_OFFSET_EXTRA_P macro. + (rs6000_mode_dependent_address): Use SIGNED_16BIT_OFFSET_EXTRA_P + macro. + +2019-10-02 Joseph Myers <joseph@codesourcery.com> + + * ginclude/stdint-gcc.h [__STDC_WANT_IEC_60559_BFP_EXT__]: Change + condition on WIDTH macros to [__STDC_WANT_IEC_60559_BFP_EXT__ || + (__STDC_VERSION__ && __STDC_VERSION__ > 201710L)]. + * glimits.h: Likewise. + +2019-10-03 Jakub Jelinek <jakub@redhat.com> + + PR rtl-optimization/91976 + * expr.c (emit_block_move_hints): Don't call can_move_by_pieces if + size is not CONST_INT_P, set pieces_ok to false in that case. Simplify + CONST_INT_P (size) && pieces_ok to pieces_ok. Formatting fix. + +2019-10-02 Martin Sebor <msebor@redhat.com> + + PR tree-optimization/80936 + * builtins.def (bcmp, bcopy, bzero): Declare nonnull. + +2019-10-02 Richard Sandiford <richard.sandiford@arm.com> + + * cgraph.c (cgraph_node::rtl_info): Use SET_HARD_REG_SET + instead of reg_class_contents[ALL_REGS]. + +2019-09-30 Jason Merrill <jason@redhat.com> + + Add some hash_map_safe_* functions like vec_safe_*. + * hash-map.h (default_hash_map_size): New variable. + (create_ggc): Use it as default argument. + (hash_map_maybe_create, hash_map_safe_get) + (hash_map_safe_get_or_insert, hash_map_safe_put): New fns. + +2019-10-02 Jan Hubicka <hubicka@ucw.cz> + + * cif-code.def (MAX_INLINE_INSNS_SINGLE_O2_LIMIT, + MAX_INLINE_INSNS_AUTO_O2_LIMIT): New. + * ipa-inline.c (inline_insns_single, inline_insns_auto): New functions. + (can_inline_edge_by_limits_p): Use it. + (big_speedup_p): Use PARAM_INLINE_MIN_SPEEDUP_O2. + (want_inline_small_function_p): Use O2 bounds. + (edge_badness): LIkewise. + * opts.c (default_options): Add OPT_finline_functions. + * params.def (PARAM_INLINE_MIN_SPEEDUP_O2, + PARAM_MAX_INLINE_INSNS_SINGLE_O2, PARAM_MAX_INLINE_INSNS_AUTO_O2): + New parameters. + * doc/invoke.texi (-finline-functions): Update documentation. + (max-inline-insns-single-O2, max-inline-insns-auto-O2, + inline-min-speedup-O2): Document. + (early-inlining-insns-O2): Simplify docs. + +2019-10-02 Alexander Monakov <amonakov@ispras.ru> + + PR rtl-optimization/87047 + * ifcvt.c (average_cost): New static function. Use it... + (noce_process_if_block): ... here. + +2019-10-02 Aaron Sawdey <acsawdey@linux.ibm.com> + + * config/rs6000/rs6000-protos.h (expand_block_move): Change prototype. + * config/rs6000/rs6000-string.c (expand_block_move): Add + might_overlap parm. + * config/rs6000/rs6000.md (movmemsi): Add new pattern. + (cpymemsi): Add might_overlap parm to expand_block_move() call. + +2019-10-02 Aaron Sawdey <acsawdey@linux.ibm.com> + + * builtins.c (expand_builtin_memory_copy_args): Add might_overlap parm. + (expand_builtin_memcpy): Use might_overlap parm. + (expand_builtin_mempcpy_args): Use might_overlap parm. + (expand_builtin_memmove): Call expand_builtin_memory_copy_args. + (expand_builtin_memory_copy_args): Add might_overlap parm. + * expr.c (emit_block_move_via_cpymem): Rename to + emit_block_move_via_pattern, add might_overlap parm, use cpymem + or movmem optab as appropriate. + (emit_block_move_hints): Add might_overlap parm, do the right + thing for might_overlap==true. + * expr.h (emit_block_move_hints): Update prototype. + +2019-10-02 Eric Botcazou <ebotcazou@adacore.com> + + * tree-eh.h (unsplit_eh_edges): Declare. + * tree-eh.c (maybe_remove_unreachable_handlers): Detect more cases. + (unsplit_eh_edges): New function wrapping unsplit_all_eh. + * gimple-ssa-store-merging.c: Include cfganal.h cfgcleanup.h except.h. + (struct store_immediate_info): Add lp_nr field. + (store_immediate_info::store_immediate_info): Add NR2 parameter and + initialize lp_nr with it. + (struct merged_store_group): Add lp_nr and only_constants fields. + (merged_store_group::merged_store_group): Initialize them. + (merged_store_group::can_be_merged_into): Deal with them. + (pass_store_merging): Rename terminate_and_release_chain into + terminate_and_process_chain. + (pass_store_merging::terminate_and_process_all_chains): Adjust to above + renaming and remove useless assertions. + (pass_store_merging::terminate_all_aliasing_chains): Small tweak. + (stmts_may_clobber_ref_p): Be prepared for different basic blocks. + (imm_store_chain_info::coalesce_immediate_stores): Use only_constants + instead of always recomputing it and compare lp_nr. + (imm_store_chain_info::output_merged_store): If the group is in an + active EH region, register new stores if they can throw. Moreover, + if the insertion has created new basic blocks, adjust the PHI nodes + of the post landing pad. + (imm_store_chain_info::output_merged_stores): If the original stores + are in an active EH region, deregister them. + (lhs_valid_for_store_merging_p): Prettify. + (adjust_bit_pos): New function extracted from... + (mem_valid_for_store_merging): ...here. Use it for the base address + and also for the offset if it is the addition of a constant. + (lp_nr_for_store): New function. + (pass_store_merging::process_store): Change return type to bool. + Call lp_nr_for_store to initialize the store info. Propagate the + return status of various called functions to the return value. + (store_valid_for_store_merging_p): New predicate. + (enum basic_block_status): New enumeration. + (get_status_for_store_merging): New function. + (pass_store_merging::execute): If the function can throw and catch + non-call exceptions, unsplit the EH edges on entry and clean up the + CFG on exit if something changed. Call get_status_for_store_merging + for every basic block and keep the chains open across basic blocks + when possible. Terminate and process open chains at the end, if any. + +2019-10-02 Richard Sandiford <richard.sandiford@arm.com> + + * reginfo.c (globalize_reg): Fix shadowed variable in + function_abis walk. + +2019-10-02 Martin Jambor <mjambor@suse.cz> + + * cgraph.c (symbol_table::create_edge): New parameter cloning_p, + do not compute some stuff when set. + (cgraph_node::create_edge): Likewise. + (cgraph_node::create_indirect_edge): Renamed last parameter to + coning_p and flipped its meaning, don't even calculate + inline_failed when set. + * cgraph.h (cgraph_node::create_edge): Add new parameter. + (symbol_table::::create_edge): Likewise. + (cgraph_node::create_indirect_edge): Rename last parameter, flip + the default value. + * cgraphclones.c (cgraph_edge::clone): Pass true cloning_p to all + call graph edge creating functions. + +2019-10-01 Jan Hubicka <hubicka@ucw.cz> + + PR c++/91222 + * ipa-devirt.c (warn_types_mismatch): Fix conditional on anonymous + namespace types. + +2019-10-02 Shahab Vahedi <shahab@synopsys.com> + + * config/arc/arc.h (ASM_SPEC): Pass -mcode-density. + +2019-10-02 Richard Biener <rguenther@suse.de> + + * tree-vectorizer.h (vect_transform_reduction): Declare. + * tree-vect-stmts.c (vect_transform_stmt): Use it. + * tree-vect-loop.c (vectorizable_reduction): Split out reduction + stmt transform to ... + (vect_transform_reduction): ... this. + +2019-10-02 Tobias Burnus <tobias@codesourcery.com> + + * omp-low.c (lower_omp_target): Dereference optional argument + to work with the right pointer. + +2019-10-02 Kwok Cheung Yeung <kcy@codesourcery.com> + + * langhooks-def.h (LANG_HOOKS_OMP_IS_OPTIONAL_ARGUMENT): Default to + false. + (LANG_HOOKS_DECLS): Add LANG_HOOKS_OMP_IS_OPTIONAL_ARGUMENT. + * langhooks.h (omp_is_optional_argument): New hook. + * omp-general.c (omp_is_optional_argument): New. + * omp-general.h (omp_is_optional_argument): New declaration. + * omp-low.c (lower_omp_target): Create temporary for received value + and take the address for new_var if the original variable was a + DECL_BY_REFERENCE. Use size of referenced object when a + pass-by-reference optional argument used as argument to firstprivate. + +2019-10-02 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/91940 + * tree-vect-patterns.c: Include tree-vector-builder.h and + vec-perm-indices.h. + (vect_recog_rotate_pattern): Also handle __builtin_bswap16, either by + unpromoting the argument back to uint16_t, or by converting into a + rotate, or into shifts plus ior. + +2019-10-02 Richard Biener <rguenther@suse.de> + + * tree-vectorizer.h (stmt_vec_info_type::cycle_phi_info_type): + New. + (vect_transform_cycle_phi): Declare. + * tree-vect-stmts.c (vect_transform_stmt): Call + vect_transform_cycle_phi. + * tree-vect-loop.c (vectorizable_reduction): Split out + PHI transformation stage to ... + (vect_transform_cycle_phi): ... here. + +2019-10-02 Richard Sandiford <richard.sandiford@arm.com> + + PR middle-end/91957 + * lra-lives.c (make_hard_regno_dead): Don't record conflicts for + eliminable registers. + (make_hard_regno_live): Likewise, and don't make them live. + +2019-10-01 David Malcolm <dmalcolm@redhat.com> + + * diagnostic-show-locus.c (layout::print_gap_in_line_numbering): + Call pp_emit_prefix. + (layout::print_source_line): Likewise. + (layout::start_annotation_line): Likewise. + (diagnostic_show_locus): Remove call to temporarily clear the + prefix. + (selftest::test_one_liner_fixit_remove): Add test coverage for the + interaction of pp_set_prefix with rulers and fix-it hints. + * diagnostic.c (default_diagnostic_finalizer): Temporarily clear + prefix when calling diagnostic_show_locus, rather than destroying + it afterwards. + (print_parseable_fixits): Temporarily clear prefix. + * pretty-print.c (pp_format): Save and restore line_length, rather + than assuming it is zero. + (pp_output_formatted_text): Remove assertion that line_length is + zero. + +2019-10-01 Jan Hubicka <hubicka@ucw.cz> + + * tree-ssa-alias.c (nonoverlapping_component_refs_since_match_p): + Rename to ... + (nonoverlapping_refs_since_match_p): ... this; handle also + ARRAY_REFs. + (alias_stats): Update stats. + (dump_alias_stats): Likewise. + (cheap_array_ref_low_bound): New function. + (aliasing_matching_component_refs_p): Add partial_overlap + argument; + pass it to nonoverlapping_refs_since_match_p. + (aliasing_component_refs_walk): Update call of + aliasing_matching_component_refs_p + (nonoverlapping_array_refs_p): New function. + (decl_refs_may_alias_p, indirect_ref_may_alias_decl_p, + indirect_refs_may_alias_p): Update calls of + nonoverlapping_refs_since_match_p. + +2019-10-01 Maya Rashish <coypu@sdf.org> + + PR target/85401 + * ira-color.c (allocno_copy_cost_saving): Call + ira_init_register_move_cost_if_necessary. + +2019-10-01 Maciej W. Rozycki <macro@wdc.com> + + * Makefile.in (gnat_install_lib): New variable. + * configure.ac: Substitute it. + * configure: Regenerate. + +2019-10-01 Jan Hubicka <hubicka@ucw.cz> + + PR lto/91222 + * ipa-devirt.c (warn_types_mismatch): Do not ICE when anonymous type + is matched with non-C++ type + +2019-10-01 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org> + + * tree-if-conv.c (tree_if_conversion): Move call to ifcvt_local_dce + after local CSE. + +2019-10-01 Jan Hubicka <hubicka@ucw.cz> + + * doc/invoke.texi (early-inlining-insns-O2): Document. + (early-inlining-insns): Update. + * params.def (early-inlining-insns-O2): New bound. + (early-inlining-insns): Update docs. + * ipa-inline.c (want_early_inline_function_p): Use new bound. + +2019-10-01 Oleg Endo <olegendo@gcc.gnu.org> + + PR target/88562 + * config/sh/sh.c (sh_extending_set_of_reg::use_as_extended_reg): Use + sh_check_add_incdec_notes to preserve REG_INC notes when replacing + a memory access insn. + +2019-10-01 Bill Schmidt <wschmidt@linux.ibm.com> + + * config/rs6000/rs6000-p8swap.c (rtx_is_swappable_p): Don't swap + vpmsumd. + +2019-10-01 Ilya Leoshkevich <iii@linux.ibm.com> + + PR target/77918 + * config/s390/s390.c (s390_expand_vec_compare): Use + gen_vec_cmpordered and gen_vec_cmpunordered. + * config/s390/vector.md (vec_cmpuneq, vec_cmpltgt, vec_ordered, + vec_unordered): Delete. + (vec_ordered<mode>): Rename to vec_cmpordered<mode>. + (vec_unordered<mode>): Rename to vec_cmpunordered<mode>. + (VEC_CMP_EXPAND): New iterator for the generic dispatcher. + (vec_cmp<code>): Generic dispatcher. + +2019-10-01 Ilya Leoshkevich <iii@linux.ibm.com> + + PR target/77918 + * config/s390/vector.md (V_HW): Add V1TI in order to make + vcond$a$b generate vcondv1tiv1tf. + +2019-10-01 Richard Sandiford <richard.sandiford@arm.com> + + PR rtl-optimization/91948 + * ira-build.c (ira_create_allocno): Initialize + ALLOCNO_CROSSED_CALLS_ABIS. + * ira-color.c (allocno_reload_assign): Pass hard_regno rather + than regno to ira_need_caller_save_p. + +2019-10-01 Alexandre Oliva <oliva@adacore.com> + + * config/i386/i386-options.c + (ix86_recompute_optlev_based_flags): New, moved out of... + (ix86_option_override_internal): ... this. Call it. + (ix86_override_options_after_change): Call it here too. + + PR debug/91507 + * dwarf2out.c (override_type_for_decl_p): New. + (gen_variable_die): Use it. + +2019-10-01 Richard Biener <rguenther@suse.de> + + * tree-vect-loop.c (vectorizable_reduction): Move variables + to where they are used. + +2019-10-01 Segher Boessenkool <segher@kernel.crashing.org> + + * regrename.c (hide_operands): Use pc_rtx instead of cc0_rtx. + (build_def_use): Use PC instead of CC0 in a comment. + +2019-10-01 Richard Sandiford <richard.sandiford@arm.com> + + * rtl.def (CLOBBER_HIGH): Delete. + * doc/rtl.texi (clobber_high): Remove documentation. + * rtl.h (SET_DEST): Remove CLOBBER_HIGH from the list of codes. + (reg_is_clobbered_by_clobber_high): Delete. + (gen_hard_reg_clobber_high): Likewise. + * alias.c (record_set): Remove CLOBBER_HIGH handling. + * cfgexpand.c (expand_gimple_stmt): Likewise. + * combine-stack-adj.c (single_set_for_csa): Likewise. + * combine.c (find_single_use_1, set_nonzero_bits_and_sign_copies) + (can_combine_p, is_parallel_of_n_reg_sets, try_combine) + (record_dead_and_set_regs_1, reg_dead_at_p_1): Likewise. + * cse.c (invalidate_reg): Remove clobber_high parameter. + (invalidate): Update call accordingly. + (canonicalize_insn): Remove CLOBBER_HIGH handling. + (invalidate_from_clobbers, invalidate_from_sets_and_clobbers) + (count_reg_usage, insn_live_p): Likewise. + * cselib.h (cselib_invalidate_rtx): Remove sett argument. + * cselib.c (cselib_invalidate_regno, cselib_invalidate_rtx): Likewise. + (cselib_invalidate_rtx_note_stores): Update call accordingly. + (cselib_expand_value_rtx_1): Remove CLOBBER_HIGH handling. + (cselib_invalidate_regno, cselib_process_insn): Likewise. + * dce.c (deletable_insn_p, mark_nonreg_stores_1): Likewise. + (mark_nonreg_stores_2): Likewise. + * df-scan.c (df_find_hard_reg_defs, df_uses_record): Likewise. + (df_get_call_refs): Likewise. + * dwarf2out.c (mem_loc_descriptor): Likewise. + * emit-rtl.c (verify_rtx_sharing): Likewise. + (copy_insn_1, copy_rtx_if_shared_1): Likewise. + (hard_reg_clobbers_high, gen_hard_reg_clobber_high): Delete. + * genconfig.c (walk_insn_part): Remove CLOBBER_HIGH handling. + * genemit.c (gen_exp, gen_insn): Likewise. + * genrecog.c (validate_pattern, remove_clobbers): Likewise. + * haifa-sched.c (haifa_classify_rtx): Likewise. + * ira-build.c (create_insn_allocnos): Likewise. + * ira-costs.c (scan_one_insn): Likewise. + * ira.c (equiv_init_movable_p, memref_referenced_p): Likewise. + (rtx_moveable_p, interesting_dest_for_shprep): Likewise. + * jump.c (mark_jump_label_1): Likewise. + * lra-int.h (lra_insn_reg::clobber_high): Delete. + * lra-eliminations.c (lra_eliminate_regs_1): Remove CLOBBER_HIGH + handling. + (mark_not_eliminable): Likewise. + * lra-lives.c (process_bb_lives): Likewise. + * lra.c (new_insn_reg): Remove clobber_high parameter. + (collect_non_operand_hard_regs): Likewise. Update call to new + insn_reg. Remove CLOBBER_HIGH handling. + (lra_set_insn_recog_data): Remove CLOBBER_HIGH handling. Update call + to collect_non_operand_hard_regs. + (add_regs_to_insn_regno_info): Remove CLOBBER_HIGH handling. + Update call to new_insn_reg. + (lra_update_insn_regno_info): Remove CLOBBER_HIGH handling. + * postreload.c (reload_cse_simplify, reload_combine_note_use) + (move2add_note_store): Likewise. + * print-rtl.c (print_pattern): Likewise. + * recog.c (store_data_bypass_p_1, store_data_bypass_p): Likewise. + (if_test_bypass_p): Likewise. + * regcprop.c (kill_clobbered_value, kill_set_value): Likewise. + * reginfo.c (reg_scan_mark_refs): Likewise. + * reload1.c (maybe_fix_stack_asms, eliminate_regs_1): Likewise. + (elimination_effects, mark_not_eliminable, scan_paradoxical_subregs) + (forget_old_reloads_1): Likewise. + * reorg.c (find_end_label, try_merge_delay_insns, redundant_insn) + (own_thread_p, fill_simple_delay_slots, fill_slots_from_thread) + (dbr_schedule): Likewise. + * resource.c (update_live_status, mark_referenced_resources) + (mark_set_resources): Likewise. + * rtl.c (copy_rtx): Likewise. + * rtlanal.c (reg_referenced_p, set_of_1, single_set_2, noop_move_p) + (note_pattern_stores): Likewise. + (reg_is_clobbered_by_clobber_high): Delete. + * sched-deps.c (sched_analyze_reg, sched_analyze_insn): Remove + CLOBBER_HIGH handling. + +2019-10-01 Richard Sandiford <richard.sandiford@arm.com> + + PR target/91452 + * config/aarch64/aarch64.h (ARM_PCS_TLSDESC): New arm_pcs. + * config/aarch64/aarch64-protos.h (aarch64_tlsdesc_abi_id): Declare. + * config/aarch64/aarch64.c (aarch64_hard_regno_call_part_clobbered): + Handle ARM_PCS_TLSDESC. + (aarch64_tlsdesc_abi_id): New function. + * config/aarch64/aarch64.md (tlsdesc_small_sve_<mode>): Use a call + rtx instead of a list of clobbers and clobber_highs. + (tlsdesc_small_<mode>): Update accordingly. + +2019-10-01 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/aarch64-protos.h (aarch64_expand_call): Take an + extra callee_abi argument. + * config/aarch64/aarch64.c (aarch64_expand_call): Likewise. + Insert a CALLEE_ABI unspec into the call pattern as the second + element in the PARALLEL. + (aarch64_simd_call_p): Delete. + (aarch64_insn_callee_abi): Get the arm_pcs of the callee from + the new CALLEE_ABI element of the PARALLEL. + (aarch64_init_cumulative_args): Get the arm_pcs of the callee + from the function type, if given. + (aarch64_function_arg_advance): Handle ARM_PCS_SIMD. + (aarch64_function_arg): Likewise. Return the arm_pcs of the callee + when passed the function_arg_info end marker. + (aarch64_output_mi_thunk): Pass the arm_pcs of the callee as the + final argument of gen_sibcall. + * config/aarch64/aarch64.md (UNSPEC_CALLEE_ABI): New unspec. + (call): Make operand 2 a const_int_operand and pass it to expand_call. + Wrap it in an UNSPEC_CALLEE_ABI unspec for the dummy define_expand + pattern. + (call_value): Likewise operand 3. + (sibcall): Likewise operand 2. Place the unspec before rather than + after the return. + (sibcall_value): Likewise operand 3. + (*call_insn, *call_value_insn): Include an UNSPEC_CALLEE_ABI. + (tlsgd_small_<mode>, *tlsgd_small_<mode>): Likewise. + (*sibcall_insn, *sibcall_value_insn): Likewise. Remove empty + constraint strings. + (untyped_call): Pass const0_rtx as the callee ABI to gen_call. + +2019-10-01 Richard Sandiford <richard.sandiford@arm.com> + + * regs.h (HARD_REGNO_CALLER_SAVE_MODE): Update call to + choose_hard_reg_mode. + * config/sparc/sparc.h (HARD_REGNO_CALLER_SAVE_MODE): Likewise. + +2019-10-01 Segher Boessenkool <segher@kernel.crashing.org> + + * doc/md.texi (vec_pack_trunc_@var{m}): Fix typo. + (vec_pack_sfix_trunc_@var{m}, vec_pack_ufix_trunc_@var{m}): Ditto. + (vec_packs_float_@var{m}, vec_packu_float_@var{m}): Ditto. + +2019-09-30 David Malcolm <dmalcolm@redhat.com> + + * diagnostic-show-locus.c (line_label::line_label): Initialize + m_has_vbar. + (line_label::comparator): Reverse the sort order by m_state_idx, + so that when the list is walked backwards the labels appear in + order of insertion into the rich_location. + (line_label::m_has_vbar): New field. + (layout::print_any_labels): When dealing with multiple labels at + the same line and column, only print vertical bars for the one + with the highest label_line. + (selftest::test_one_liner_labels): Update test for multiple labels + to expect the labels to be in the order of insertion into the + rich_location. Add a test for many such labels, where the column + numbers are out-of-order relative to the insertion order. + +2019-09-30 Richard Sandiford <richard.sandiford@arm.com> + + * config/i386/i386.h (ix86_frame::expensive_p): New field. + (ix86_frame::expensive_count): Likewise. + * config/i386/i386.c (ix86_compute_frame_layout): Make the choice + of use_fast_prologue_epilogue robust against incidental changes + in function size. + +2019-09-30 Ilya Leoshkevich <iii@linux.ibm.com> + + PR target/77918 + * config/s390/vector.md (vec_unordered<mode>): Call + gen_vec_ordered<mode>. + +2019-09-30 Yuliang Wang <yuliang.wang@arm.com> + + * config/aarch64/aarch64-sve.md (sdiv_pow2<mode>3): + New pattern for ASRD. + * config/aarch64/iterators.md (UNSPEC_ASRD): New unspec. + * internal-fn.def (IFN_DIV_POW2): New internal function. + * optabs.def (sdiv_pow2_optab): New optab. + * tree-vect-patterns.c (vect_recog_divmod_pattern): + Modify pattern to support new operation. + * doc/md.texi (sdiv_pow2$var{m3}): Documentation for the above. + * doc/sourcebuild.texi (vect_sdiv_pow2_si): + Document new target selector. + +2019-09-30 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/aarch64.c (aarch64_layout_frame): Use crtl->abi + to test whether we're compiling a vector PCS function and to test + whether the function needs to save a particular register. + Remove the vector PCS handling of df_set_regs_ever_live. + (aarch64_components_for_bb): Use crtl->abi to test whether + the function needs to save a particular register. + (aarch64_process_components): Use crtl->abi to test whether + we're compiling a vector PCS function. + (aarch64_expand_prologue, aarch64_expand_epilogue): Likewise. + (aarch64_epilogue_uses): Remove handling of vector PCS functions. + +2019-09-30 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/aarch64-protos.h (aarch64_use_simple_return_insn_p): + Delete. + * config/aarch64/aarch64.c (aarch64_components_for_bb): Check + whether the block calls a function that clobbers more registers + than the current function is allowed to. + (aarch64_use_simple_return_insn_p): Delete. + * config/aarch64/aarch64.md (simple_return): Remove condition. + +2019-09-30 Richard Sandiford <richard.sandiford@arm.com> + + * function-abi.h (function_abi_aggregator): New class. + * function-abi.cc (function_abi_aggregator::caller_save_regs): New + function. + * ira.c (update_equiv_regs_prescan): New function. Call + set_paradoxical_subreg here rather than... + (update_equiv_regs): ...here. + (ira): Call update_equiv_regs_prescan. + +2019-09-30 Richard Sandiford <richard.sandiford@arm.com> + + * hard-reg-set.h (regs_invalidated_by_call): Only define if + IN_TARGET_CODE. + (call_used_or_fixed_regs): Likewise. + (call_used_or_fixed_reg_p): Likewise. + * reginfo.c (regs_invalidated_by_call): New macro. + +2019-09-30 Richard Sandiford <richard.sandiford@arm.com> + + * shrink-wrap.c: Include function-abi.h. + (requires_stack_frame_p): Use crtl->abi to test whether the + current function can use a register without saving it first. + +2019-09-30 Richard Sandiford <richard.sandiford@arm.com> + + * sel-sched-ir.h (_def::crosses_call): Replace with... + (_def::crossed_call_abis): ..this new field. + (def_list_add): Take a mask of ABIs instead of a crosses_call + boolean. + * sel-sched-ir.c (def_list_add): Likewise. Update initialization + of _def accordingly. + * sel-sched.c: Include function-abi.h. + (hard_regs_data::regs_for_call_clobbered): Delete. + (reg_rename::crosses_call): Replace with... + (reg_rename::crossed_call_abis): ...this new field. + (fur_static_params::crosses_call): Replace with... + (fur_static_params::crossed_call_abis): ...this new field. + (init_regs_for_mode): Don't initialize sel_hrd.regs_for_call_clobbered. + (init_hard_regs_data): Use crtl->abi to test which registers the + current function would need to save before it uses them. + (mark_unavailable_hard_regs): Update handling of call-clobbered + registers, using call_clobbers_in_region to find out which registers + might be call-clobbered (but without taking -fipa-ra into account + for now). Remove separate handling of partially call-clobbered + registers. + (verify_target_availability): Use crossed_call_abis instead of + crosses_call. + (get_spec_check_type_for_insn, find_used_regs): Likewise. + (fur_orig_expr_found, fur_on_enter, fur_orig_expr_not_found): Likewise. + +2019-09-30 Richard Sandiford <richard.sandiford@arm.com> + + * sched-deps.c (deps_analyze_insn): Use the ABI of the target + function to test whether a register is fully or partly clobbered. + +2019-09-30 Richard Sandiford <richard.sandiford@arm.com> + + * rtlanal.c: Include function-abi.h. + (reg_set_p): Use insn_callee_abi to get the ABI of the called + function and clobbers_reg_p to test whether the register + is call-clobbered. + (find_all_hard_reg_sets): When implicit is true, use insn_callee_abi + to get the ABI of the called function and full_reg_clobbers to + get the set of fully call-clobbered registers. Warn about the + pitfalls of using this mode. + +2019-09-30 Richard Sandiford <richard.sandiford@arm.com> + + * reload.c: Include function-abi.h. + (find_equiv_reg): Use clobbers_reg_p to test whether either + of the equivalent registers is clobbered by a call. + * reload1.c: Include function-abi.h. + (reg_reloaded_call_part_clobbered): Delete. + (reload): Use crtl->abi to test which registers would need + saving in the prologue before use. + (find_reg): Likewise. + (emit_reload_insns): Remove code for reg_reloaded_call_part_clobbered. + (reload_as_needed): Likewise. Use full_and_partial_reg_clobbers + instead of call_used_or_fixed_regs | reg_reloaded_call_part_clobbered. + +2019-09-30 Richard Sandiford <richard.sandiford@arm.com> + + * regrename.h (du_head::call_clobber_mask): New field. + (du_head::need_caller_save_reg): Replace with... + (du_head::call_abis): ...this new field. + * regrename.c: Include function-abi.h. + (call_clobbered_in_chain_p): New function. + (check_new_reg_p): Use crtl->abi when deciding whether a register + is free for use after RA. Use call_clobbered_in_chain_p to test + whether a candidate register would be clobbered by a call. + (find_rename_reg): Don't add call-clobber conflicts here. + (rename_chains): Check call_abis instead of need_caller_save_reg. + (merge_chains): Update for changes to du_head. + (build_def_use): Use insn_callee_abi to get the ABI of the call insn + target. Record the ABI identifier in call_abis and the set of + fully or partially clobbered registers in call_clobber_mask. + Add fully-clobbered registers to hard_conflicts here rather + than in find_rename_reg. + * config/aarch64/cortex-a57-fma-steering.c: Include function-abi.h. + (rename_single_chain): Check call_abis instead of need_caller_save_reg. + * config/aarch64/falkor-tag-collision-avoidance.c: Include + function-abi.h. + * config/c6x/c6x.c: Likewise. + +2019-09-30 Richard Sandiford <richard.sandiford@arm.com> + + * regcprop.c (copyprop_hardreg_forward_1): Use the recorded + mode of the register when deciding whether it is no longer + available after a call. + +2019-09-30 Richard Sandiford <richard.sandiford@arm.com> + + * recog.c: Include function-abi.h. + (peep2_find_free_register): Use crtl->abi when deciding whether + a register is free for use after RA. + +2019-09-30 Richard Sandiford <richard.sandiford@arm.com> + + * postreload-gcse.c: Include regs.h and function-abi.h. + (record_opr_changes): Use insn_callee_abi to get the ABI of the + call insn target. Conservatively assume that partially-clobbered + registers are altered. + +2019-09-30 Richard Sandiford <richard.sandiford@arm.com> + + * postreload.c (reload_combine_recognize_pattern): Use crtl->abi + when deciding whether a register is free for use after RA. + (reload_combine): Remove unnecessary use of fixed_reg_set. + (reload_cse_move2add): Use insn_callee_abi to get the ABI of the + call insn target. Use reg_mode when testing whether a register + is no longer available. + +2019-09-30 Richard Sandiford <richard.sandiford@arm.com> + + * target.def (return_call_with_max_clobbers): Delete. + * doc/tm.texi.in (TARGET_RETURN_CALL_WITH_MAX_CLOBBERS): Delete. + * doc/tm.texi: Regenerate. + * config/aarch64/aarch64.c (aarch64_return_call_with_max_clobbers) + (TARGET_RETURN_CALL_WITH_MAX_CLOBBERS): Delete. + * lra-int.h (lra_reg::actual_call_used_reg_set): Delete. + (lra_reg::call_insn): Delete. + * lra.c: Include function-abi.h. + (initialize_lra_reg_info_element): Don't initialize the fields above. + (lra): Use crtl->abi to test whether the current function needs to + save a register in the prologue. Remove special pre-inheritance + lra_create_live_ranges pass for flag_ipa_ra. + * lra-assigns.c: Include function-abi.h + (find_hard_regno_for_1): Use crtl->abi to test whether the current + function needs to save a register in the prologue. + (lra_assign): Assert that registers aren't allocated to a + conflicting register, rather than checking only for overlaps + with call_used_or_fixed_regs. Do this even for flag_ipa_ra, + and for registers that are not live across a call. + * lra-constraints.c (last_call_for_abi): New variable. + (full_and_partial_call_clobbers): Likewise. + (setup_next_usage_insn): Remove the register from + full_and_partial_call_clobbers. + (need_for_call_save_p): Use call_clobbered_in_region_p to test + whether the register needs a caller save. + (need_for_split_p): Use full_and_partial_reg_clobbers instead + of call_used_or_fixed_regs. + (inherit_in_ebb): Initialize and maintain last_call_for_abi and + full_and_partial_call_clobbers. + * lra-lives.c (check_pseudos_live_through_calls): Replace + last_call_used_reg_set and call_insn arguments with an abi argument. + Remove handling of lra_reg::call_insn. Use function_abi::mode_clobbers + as the set of conflicting registers. + (calls_have_same_clobbers_p): Delete. + (process_bb_lives): Track the ABI of the last call instead of an + insn/HARD_REG_SET pair. Update calls to + check_pseudos_live_through_calls. Use eh_edge_abi to calculate + the set of registers that could be clobbered by an EH edge. + Include partially-clobbered as well as fully-clobbered registers. + (lra_create_live_ranges_1): Don't initialize lra_reg::call_insn. + * lra-remat.c: Include function-abi.h. + (call_used_regs_arr_len, call_used_regs_arr): Delete. + (set_bb_regs): Use insn_callee_abi to get the set of call-clobbered + registers and bitmap_view to combine them into dead_regs. + (call_used_input_regno_present_p): Take a function_abi argument + and use it to test whether a register is call-clobbered. + (calculate_gen_cands): Use insn_callee_abi to get the ABI of the + call insn target. Update tje call to call_used_input_regno_present_p. + (do_remat): Likewise. + (lra_remat): Remove the initialization of call_used_regs_arr_len + and call_used_regs_arr. + +2019-09-30 Richard Sandiford <richard.sandiford@arm.com> + + * loop-iv.c: Include regs.h and function-abi.h. + (simplify_using_initial_values): Use insn_callee_abi to get the + ABI of the call insn target. Conservatively assume that + partially-clobbered registers are altered. + +2019-09-30 Richard Sandiford <richard.sandiford@arm.com> + + * function-abi.h (call_clobbers_in_region): Declare. + (call_clobbered_in_region_p): New function. + * function-abi.cc (call_clobbers_in_region): Likewise. + * ira-int.h: Include function-abi.h. + (ira_allocno::crossed_calls_abis): New field. + (ALLOCNO_CROSSED_CALLS_ABIS): New macro. + (ira_need_caller_save_regs): New function. + (ira_need_caller_save_p): Likewise. + * ira.c (setup_reg_renumber): Use ira_need_caller_save_p instead + of call_used_or_fixed_regs. + (do_reload): Use crtl->abi to test whether the current function + needs to save a register in the prologue. Count registers that + need to be saved rather than registers that don't. + * ira-build.c (create_cap_allocno): Copy ALLOCNO_CROSSED_CALLS_ABIS. + Remove unnecessary | from ALLOCNO_CROSSED_CALLS_CLOBBERED_REGS. + (propagate_allocno_info): Merge ALLOCNO_CROSSED_CALLS_ABIS too. + (propagate_some_info_from_allocno): Likewise. + (copy_info_to_removed_store_destinations): Likewise. + (ira_flattening): Say that ALLOCNO_CROSSED_CALLS_ABIS and + ALLOCNO_CROSSED_CALLS_CLOBBERED_REGS are handled conservatively. + (ira_build): Use ira_need_caller_save_regs instead of + call_used_or_fixed_regs. + * ira-color.c (calculate_saved_nregs): Use crtl->abi to test + whether the current function would need to save a register + before using it. + (calculate_spill_cost): Likewise. + (allocno_reload_assign): Use ira_need_caller_save_regs and + ira_need_caller_save_p instead of call_used_or_fixed_regs. + * ira-conflicts.c (ira_build_conflicts): Use + ira_need_caller_save_regs rather than call_used_or_fixed_regs + as the set of call-clobbered registers. Remove the + call_used_or_fixed_regs mask from the calculation of + temp_hard_reg_set and mask its use instead. Remove special + handling of partially-clobbered registers. + * ira-costs.c (ira_tune_allocno_costs): Use ira_need_caller_save_p. + * ira-lives.c (process_bb_node_lives): Use mode_clobbers to + calculate the set of conflicting registers for calls that + can throw. Record the ABIs of calls in ALLOCNO_CROSSED_CALLS_ABIS. + Use full_and_partial_reg_clobbers rather than full_reg_clobbers + for the calculation of ALLOCNO_CROSSED_CALLS_CLOBBERED_REGS. + Use eh_edge_abi to calculate the set of registers that could + be clobbered by an EH edge. Include partially-clobbered as + well as fully-clobbered registers. + +2019-09-30 Richard Sandiford <richard.sandiford@arm.com> + + * haifa-sched.c: Include function-abi.h. + (alloc_global_sched_pressure_data): Use crtl->abi to check whether + the function would need to save a register before using it. + +2019-09-30 Richard Sandiford <richard.sandiford@arm.com> + + * gcse.c: Include function-abi.h. + (compute_hash_table_work): Use insn_callee_abi to get the ABI of + the call insn target. Invalidate partially call-clobbered + registers as well as fully call-clobbered ones. + +2019-09-30 Richard Sandiford <richard.sandiford@arm.com> + + * function.c (aggregate_value_p): Work out which ABI the + function is using before testing which registers are at least + partly preserved by a call. + +2019-09-30 Richard Sandiford <richard.sandiford@arm.com> + + * early-remat.c: Include regs.h and function-abi.h. + (early_remat::maybe_add_candidate): Don't check for call-clobbered + registers here. + (early_remat::restrict_remat_for_unavail_regs): New function. + (early_remat::restrict_remat_for_call): Likewise. + (early_remat::process_block): Before calling emit_remat_insns + for a previous call in the block, invalidate any candidates + that would clobber call-preserved registers. + (early_remat::emit_remat_insns_for_block): Likewise for the + final call in a block. Do the same thing for live-in registers + when calling emit_remat_insns at the head of a block. + +2019-09-30 Richard Sandiford <richard.sandiford@arm.com> + + * df-scan.c (df_get_entry_block_def_set): Use crtl->abi to test + whether the current function needs to save at least part of a + register before using it. + (df_get_exit_block_use_set): Likewise for epilogue restores. + +2019-09-30 Richard Sandiford <richard.sandiford@arm.com> + + * df-problems.c: Include regs.h and function-abi.h. + (df_rd_problem_data): Rename sparse_invalidated_by_call to + sparse_invalidated_by_eh and dense_invalidated_by_call to + dense_invalidated_by_eh. + (df_print_bb_index): Update accordingly. + (df_rd_alloc, df_rd_start_dump, df_rd_confluence_n): Likewise. + (df_lr_confluence_n): Use eh_edge_abi to get the set of registers + that are clobbered by an EH edge. Clobber partially-clobbered + registers as well as fully-clobbered ones. + (df_md_confluence_n): Likewise. + (df_rd_local_compute): Likewise. Update for changes to + df_rd_problem_data. + * df-scan.c (df_scan_start_dump): Use eh_edge_abi to get the set + of registers that are clobbered by an EH edge. Includde partially- + clobbered registers as well as fully-clobbered ones. + +2019-09-30 Richard Sandiford <richard.sandiford@arm.com> + + * cselib.c (cselib_process_insn): If we know what mode a + register was set in, check whether it is clobbered in that + mode by a call. Only fall back to reg_raw_mode if that fails. + +2019-09-30 Richard Sandiford <richard.sandiford@arm.com> + + * cse.c: Include regs.h and function-abi.h. + (invalidate_for_call): Take the call insn as an argument. + Use insn_callee_abi to get the ABI of the call and invalidate + partially clobbered registers as well as fully clobbered ones. + (cse_insn): Update call accordingly. + +2019-09-30 Richard Sandiford <richard.sandiford@arm.com> + + * combine.c: Include function-abi.h. + (record_dead_and_set_regs): Use insn_callee_abi to get the ABI + of the target of call insns. Invalidate partially-clobbered + registers as well as fully-clobbered ones. + +2019-09-30 Richard Sandiford <richard.sandiford@arm.com> + + * cfgloopanal.c: Include regs.h and function-abi.h. + (init_set_costs): Use default_function_abi to test whether + a general register is call-clobbered. + +2019-09-30 Richard Sandiford <richard.sandiford@arm.com> + + * cfgcleanup.c (old_insns_match_p): Compare the ABIs of calls + instead of the call-clobbered sets. + +2019-09-30 Richard Sandiford <richard.sandiford@arm.com> + + * caller-save.c (setup_save_areas): Remove redundant |s of + fixed_reg_set. + (save_call_clobbered_regs): Likewise. Use the call ABI rather + than call_used_or_fixed_regs to decide whether a REG_RETURNED + value is useful. + +2019-09-30 Richard Sandiford <richard.sandiford@arm.com> + + * rtl.h (predefined_function_abi): Declare. + (choose_hard_reg_mode): Take a pointer to a predefined_function_abi + instead of a boolean call_save flag. + * config/gcn/gcn.c (gcn_hard_regno_caller_save_mode): Update call + accordingly. + * config/i386/i386.h (HARD_REGNO_CALLER_SAVE_MODE): Likewise. + * config/ia64/ia64.h (HARD_REGNO_CALLER_SAVE_MODE): Likewise. + * config/mips/mips.c (mips_hard_regno_caller_save_mode): Likewise. + * config/msp430/msp430.h (HARD_REGNO_CALLER_SAVE_MODE): Likewise. + * config/rs6000/rs6000.h (HARD_REGNO_CALLER_SAVE_MODE): Likewise. + * config/sh/sh.c (sh_hard_regno_caller_save_mode): Likewise. + * reginfo.c (init_reg_modes_target): Likewise. + (choose_hard_reg_mode): Take a pointer to a predefined_function_abi + instead of a boolean call_save flag. + * targhooks.c: Include function-abi.h. + (default_dwarf_frame_reg_mode): Update call to choose_hard_reg_mode, + using eh_edge_abi to choose the mode. + +2019-09-30 Richard Sandiford <richard.sandiford@arm.com> + + * target.def (hard_regno_call_part_clobbered): Take an ABI + identifier instead of an rtx_insn. + * doc/tm.texi: Regenerate. + * hooks.h (hook_bool_insn_uint_mode_false): Delete. + (hook_bool_uint_uint_mode_false): New function. + * hooks.c (hook_bool_insn_uint_mode_false): Delete. + (hook_bool_uint_uint_mode_false): New function. + * config/aarch64/aarch64.c (aarch64_hard_regno_call_part_clobbered): + Take an ABI identifier instead of an rtx_insn. + * config/avr/avr.c (avr_hard_regno_call_part_clobbered): Likewise. + * config/i386/i386.c (ix86_hard_regno_call_part_clobbered): Likewise. + * config/mips/mips.c (mips_hard_regno_call_part_clobbered): Likewise. + * config/pru/pru.c (pru_hard_regno_call_part_clobbered): Likewise. + * config/rs6000/rs6000.c (rs6000_hard_regno_call_part_clobbered): + Likewise. + * config/s390/s390.c (s390_hard_regno_call_part_clobbered): Likewise. + * cselib.c: Include function-abi.h. + (cselib_process_insn): Update call to + targetm.hard_regno_call_part_clobbered, using insn_callee_abi + to get the appropriate ABI identifier. + * function-abi.cc (predefined_function_abi::initialize): Update call + to targetm.hard_regno_call_part_clobbered. + * ira-conflicts.c (ira_build_conflicts): Likewise. + * ira-costs.c (ira_tune_allocno_costs): Likewise. + * lra-constraints.c: Include function-abi.h. + (need_for_call_save_p): Update call to + targetm.hard_regno_call_part_clobbered, using insn_callee_abi + to get the appropriate ABI identifier. + * lra-lives.c (check_pseudos_live_through_calls): Likewise. + * regcprop.c (copyprop_hardreg_forward_1): Update call + to targetm.hard_regno_call_part_clobbered. + * reginfo.c (choose_hard_reg_mode): Likewise. + * regrename.c (check_new_reg_p): Likewise. + * reload.c (find_equiv_reg): Likewise. + * reload1.c (emit_reload_insns): Likewise. + * sched-deps.c: Include function-abi.h. + (deps_analyze_insn): Update call to + targetm.hard_regno_call_part_clobbered, using insn_callee_abi + to get the appropriate ABI identifier. + * sel-sched.c (init_regs_for_mode, mark_unavailable_hard_regs): Update + call to targetm.hard_regno_call_part_clobbered. + * targhooks.c (default_dwarf_frame_reg_mode): Likewise. + +2019-09-30 Richard Sandiford <richard.sandiford@arm.com> + + * config/i386/i386.c: Include function-abi.h. + (ix86_avx_u128_mode_needed): Treat function calls as AVX_U128_ANY + if they preserve some 256-bit or 512-bit SSE registers. + +2019-09-30 Richard Sandiford <richard.sandiford@arm.com> + + * target.def (insn_callee_abi): New hook. + (remove_extra_call_preserved_regs): Delete. + * doc/tm.texi.in (TARGET_INSN_CALLEE_ABI): New macro. + (TARGET_REMOVE_EXTRA_CALL_PRESERVED_REGS): Delete. + * doc/tm.texi: Regenerate. + * targhooks.h (default_remove_extra_call_preserved_regs): Delete. + * targhooks.c (default_remove_extra_call_preserved_regs): Delete. + * config/aarch64/aarch64.c (aarch64_simd_call_p): Constify the + insn argument. + (aarch64_remove_extra_call_preserved_regs): Delete. + (aarch64_insn_callee_abi): New function. + (TARGET_REMOVE_EXTRA_CALL_PRESERVED_REGS): Delete. + (TARGET_INSN_CALLEE_ABI): New macro. + * rtl.h (get_call_fndecl): Declare. + (cgraph_rtl_info): Fix formatting. Tweak comment for + function_used_regs. Remove function_used_regs_valid. + * rtlanal.c (get_call_fndecl): Moved from final.c + * function-abi.h (insn_callee_abi): Declare. + (target_function_abi_info): Mention insn_callee_abi. + * function-abi.cc (fndecl_abi): Handle flag_ipa_ra in a similar + way to get_call_reg_set_usage did. + (insn_callee_abi): New function. + * regs.h (get_call_reg_set_usage): Delete. + * final.c: Include function-abi.h. + (collect_fn_hard_reg_usage): Add fixed and stack registers to + function_used_regs before the main loop rather than afterwards. + Use insn_callee_abi instead of get_call_reg_set_usage. Exit early + if function_used_regs ends up not being useful. + (get_call_fndecl): Move to rtlanal.c + (get_call_cgraph_rtl_info, get_call_reg_set_usage): Delete. + * caller-save.c: Include function-abi.h. + (setup_save_areas, save_call_clobbered_regs): Use insn_callee_abi + instead of get_call_reg_set_usage. + * cfgcleanup.c: Include function-abi.h. + (old_insns_match_p): Use insn_callee_abi instead of + get_call_reg_set_usage. + * cgraph.h (cgraph_node::rtl_info): Take a const_tree instead of + a tree. + * cgraph.c (cgraph_node::rtl_info): Likewise. Initialize + function_used_regs. + * df-scan.c: Include function-abi.h. + (df_get_call_refs): Use insn_callee_abi instead of + get_call_reg_set_usage. + * ira-lives.c: Include function-abi.h. + (process_bb_node_lives): Use insn_callee_abi instead of + get_call_reg_set_usage. + * lra-lives.c: Include function-abi.h. + (process_bb_lives): Use insn_callee_abi instead of + get_call_reg_set_usage. + * postreload.c: Include function-abi.h. + (reload_combine): Use insn_callee_abi instead of + get_call_reg_set_usage. + * regcprop.c: Include function-abi.h. + (copyprop_hardreg_forward_1): Use insn_callee_abi instead of + get_call_reg_set_usage. + * resource.c: Include function-abi.h. + (mark_set_resources, mark_target_live_regs): Use insn_callee_abi + instead of get_call_reg_set_usage. + * var-tracking.c: Include function-abi.h. + (dataflow_set_clear_at_call): Use insn_callee_abi instead of + get_call_reg_set_usage. + +2019-09-30 Richard Sandiford <richard.sandiford@arm.com> + + * target.def (fntype_abi): New target hook. + * doc/tm.texi.in (TARGET_FNTYPE_ABI): Likewise. + * doc/tm.texi: Regenerate. + * target.h (predefined_function_abi): Declare. + * function-abi.cc (fntype_abi): Call targetm.calls.fntype_abi, + if defined. + * config/aarch64/aarch64.h (ARM_PCS_SIMD): New arm_pcs value. + * config/aarch64/aarch64.c: Include function-abi.h. + (aarch64_simd_abi, aarch64_fntype_abi): New functions. + (TARGET_FNTYPE_ABI): Define. + +2019-09-30 Richard Sandiford <richard.sandiford@arm.com> + + * Makefile.in (OBJS): Add function-abi.o. + (GTFILES): Add function-abi.h. + * function-abi.cc: New file. + * function-abi.h: Likewise. + * emit-rtl.h (rtl_data::abi): New field. + * function.c: Include function-abi.h. + (prepare_function_start): Initialize crtl->abi. + * read-rtl-function.c: Include regs.h and function-abi.h. + (read_rtl_function_body): Initialize crtl->abi. + (read_rtl_function_body_from_file_range): Likewise. + * reginfo.c: Include function-abi.h. + (init_reg_sets_1): Initialize default_function_abi. + (globalize_reg): Call add_full_reg_clobber for each predefined ABI + when making a register global. + * target-globals.h (this_target_function_abi_info): Declare. + (target_globals::function_abi_info): New field. + (restore_target_globals): Copy it. + * target-globals.c: Include function-abi.h. + (default_target_globals): Initialize the function_abi_info field. + (target_globals): Allocate it. + (save_target_globals): Free it. + +2019-09-30 Nick Clifton <nickc@redhat.com> + + PR target/85978 + * config/frv/frv.c (frv_register_move_cost): Add break statements + to avoid falling through to the wrong cases. Tidy code. + +2019-09-30 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/aarch64.c (aarch64_hard_regno_call_part_clobbered): + For multi-registers modes, test how big each register part is. + +2019-09-30 Nick Clifton <nickc@redhat.com> + + PR target/59205 + * config/iq2000/iq2000.c (iq2000_select_section): Delete. + (TARGET_ASM_SELECT_SECTION): Remove definition. + (TARGET_HAVE_SWITCHABLE_BSS_SECTIONS): Allow definition. + +2019-09-30 Ilya Leoshkevich <iii@linux.ibm.com> + + * emit-rtl.c (init_raw_REG): New function. + (gen_raw_REG): Use init_raw_REG. + * gengenrtl.c (gendef): Emit init_* functions and alloca_* + macros. + * rtl.c (rtx_alloc_stat_v): Use rtx_init. + * rtl.h (rtx_init): New function. + (rtx_alloca): New function. + (init_raw_REG): New function. + (alloca_raw_REG): New macro. + +2019-09-30 Michael Meissner <meissner@linux.ibm.com> + + * config/rs6000/predicates.md (pcrel_address): Delete predicate. + (pcrel_local_address): Replace pcrel_address predicate, use the + new function address_to_insn_form. + (pcrel_external_address): Replace with new implementation using + address_to_insn_form.. + (prefixed_mem_operand): Delete predicate which is now unused. + (pcrel_external_mem_operand): Delete predicate which is now + unused. + * config/rs6000/rs6000-protos.h (enum insn_form): New + enumeration. + (enum non_prefixed_form): New enumeration. + (address_to_insn_form): New declaration. + (prefixed_load_p): New declaration. + (prefixed_store_p): New declaration. + (prefixed_paddi_p): New declaration. + (rs6000_asm_output_opcode): New declaration. + (rs6000_final_prescan_insn): Move declaration and update calling + signature. + (address_is_prefixed): New helper inline function. + * config/rs6000/rs6000.c(print_operand_address): Check for either + PC-relative local symbols or PC-relative external symbols. + (rs6000_emit_move): Support loading PC-relative addresses. + (mode_supports_prefixed_address_p): Delete, no longer used. + (rs6000_prefixed_address_mode_p): Delete, no longer used. + (address_to_insn_form): New function to decode an address format. + (reg_to_non_prefixed): New function to identify what the + non-prefixed memory instruction format is for a register. + (prefixed_load_p): New function to identify prefixed loads. + (prefixed_store_p): New function to identify prefixed stores. + (prefixed_paddi_p): New function to identify prefixed load + immediates. + (next_insn_prefixed_p): New static state variable. + (rs6000_final_prescan_insn): New function to determine if an insn + uses a prefixed instruction. + (rs6000_asm_output_opcode): New function to emit 'p' in front of a + prefixed instruction. + * config/rs6000/rs6000.h (FINAL_PRESCAN_INSN): New target hook. + (ASM_OUTPUT_OPCODE): New target hook. + * config/rs6000/rs6000.md (prefixed): New insn attribute for + prefixed instructions. + (prefixed_length): New insn attribute for the size of prefixed + instructions. + (non_prefixed_length): New insn attribute for the size of + non-prefixed instructions. + (pcrel_local_addr): New insn to load up a local PC-relative + address. + (pcrel_extern_addr): New insn to load up an external PC-relative + address. + (mov<mode>_64bit_dm): Split the alternatives for loading 0.0 to a + GPR and loading a 128-bit floating point type to a GPR. + +2019-09-30 Richard Biener <rguenther@suse.de> + + * gimple.c (gimple_get_lhs): For PHIs return the result. + * tree-vectorizer.h (vectorizable_live_operation): Also get the + SLP instance as argument. + * tree-vect-loop.c (vect_analyze_loop_operations): Also handle + double-reduction PHIs with vectorizable_lc_phi. + (vect_analyze_loop_operations): Adjust. + (vect_create_epilog_for_reduction): Remove all code not dealing + with reduction LC PHI or epilogue generation. + (vectorizable_live_operation): Call vect_create_epilog_for_reduction + for live stmts of reductions. + * tree-vect-stmts.c (vectorizable_condition): When !for_reduction + do not handle defs that are not vect_internal_def. + (can_vectorize_live_stmts): Adjust. + (vect_analyze_stmt): When the vectorized stmt defined a value + used on backedges adjust the backedge uses of vectorized PHIs. + +2019-09-30 Martin Jambor <mjambor@suse.cz> + + PR ipa/91853 + * tree-inline.c (force_value_to_type): New function. + (setup_one_parameter): Use force_value_to_type to convert type. + * tree-inline.c (force_value_to_type): Declare. + * ipa-param-manipulation.c (ipa_param_adjustments::modify_call): Deal + with register type mismatches. + +2019-09-30 Andreas Tobler <andreast@gcc.gnu.org> + + * config.gcc: Use the secure-plt on FreeBSD 13 and upwards for + 32-bit PowerPC. + Define TARGET_FREEBSD32_SECURE_PLT for 64-bit PowerPC. + * config/rs6000/t-freebsd64: Make use of the above define and build + the 32-bit libraries with secure-plt. + +2019-09-30 Jakub Jelinek <jakub@redhat.com> + + PR target/91931 + * config/i386/i386-expand.c (ix86_expand_adjust_ufix_to_sfix_si): Use + gen_int_mode instead of GEN_INT. + +2019-09-29 Iain Sandoe <iain@sandoe.co.uk> + + * config/darwin.c (gen_macho_low): Amend to include the mode + argument. + (machopic_indirect_data_reference): Amend gen_macho_low call + to include mode argument + * config/rs6000/rs6000.c (emit_move): Likewise. Amend a comment. + * config/rs6000/darwin.md (@macho_low_<mode>): New, replaces + the macho_high expander and two define_insn entries. + +2019-09-29 Jakub Jelinek <jakub@redhat.com> + + PR bootstrap/90543 + * optc-save-gen.awk: Fix up printing string option differences. + +2019-09-29 Kewen Lin <linkw@gcc.gnu.org> + + * config/rs6000/rs6000.c (rs6000_builtin_vectorization_cost): Lower + vec_perm cost to 1 for non-Power7 VSX architectures. + +2019-09-29 Kewen Lin <linkw@gcc.gnu.org> + + * config/rs6000/vsx.md (vec_pack[su]_float_v2di): New define_expand. + (vec_unpack_[su]fix_trunc_hi_v4sf): Likewise. + (vec_unpack_[su]fix_trunc_lo_v4sf): Likewise. + +2019-09-28 Iain Sandoe <iain@sandoe.co.uk> + + * config/darwin.c (gen_macho_high): Amend to include the mode + argument. + (machopic_indirect_data_reference): Amend gen_macho_high call + to include mode argument. + (machopic_legitimize_pic_address): Likewise. + * config/rs6000/rs6000.c (rs6000_legitimize_address): + * config/rs6000/darwin.md (@macho_high_<mode>): New, replaces + the macho_high expander and two define_insn entries. + +2019-09-28 Oleg Endo <olegendo@gcc.gnu.org> + + PR target/86805 + * config/sh/sh.c (TARGET_HAVE_SPECULATION_SAFE_VALUE): Define. + +2019-09-28 Oleg Endo <olegendo@gcc.gnu.org> + + PR target/80672 + * config/sh/sh.c (parse_validate_atomic_model_option): Use + std::string::compare instead of std::string::find. + +2019-09-27 Maciej W. Rozycki <macro@wdc.com> + + * configure: Regenerate. + +2019-09-27 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/91920 + * gimplify.c (omp_default_clause): Predetermine DECL_IN_CONSTANT_POOL + variables as shared. + +2019-09-27 Iain Sandoe <iain@sandoe.co.uk> + + * config/rs6000/darwin.md (@macho_correct_pic_<mode>): New, + replaces the expander and two define_insn entries. + (@reload_macho_picbase_<mode>): Update gen_macho_correct_pic + call. + * config/rs6000/rs6000.md (builtin_setjmp_receiver): Likewise. + +2019-09-27 David Malcolm <dmalcolm@redhat.com> + + * fibonacci_heap.h (fibonacci_heap::empty): Make const. + (fibonacci_heap::nodes): Likewise. + (fibonacci_heap::min_key): Likewise. + (fibonacci_heap::min): Likewise. + +2019-09-27 David Malcolm <dmalcolm@redhat.com> + + * cgraph.c (cgraph_node::get_fun): Make const. + * cgraph.h (cgraph_node::get_fun): Likewise. + +2019-09-27 Jakub Jelinek <jakub@redhat.com> + + PR target/91919 + * config/arm/arm.md (<US>mlal): Remove SE wrappers around operands + of SImode MULT. + +2019-09-27 Richard Biener <rguenther@suse.de> + + * tree-vectorizer.h (_stmt_vec_info::reduc_fn): New. + (STMT_VINFO_REDUC_FN): Likewise. + * tree-vectorizer.c (vec_info::new_stmt_vec_info): Initialize + STMT_VINFO_REDUC_FN. + * tree-vect-loop.c (vect_is_simple_reduction): Fix STMT_VINFO_REDUC_IDX + for condition reductions. + (vect_create_epilog_for_reduction): Compute all required state + from the stmt to be vectorized. + (vectorizable_reduction): Simplify vect_create_epilog_for_reduction + invocation and remove then dead code. For single def-use chains + record only a single vector stmt. + +2019-09-27 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/aarch64-protos.h (aarch64_builtin_class): New enum. + (AARCH64_BUILTIN_SHIFT, AARCH64_BUILTIN_CLASS): New constants. + (aarch64_gimple_fold_builtin, aarch64_mangle_builtin_type) + (aarch64_fold_builtin, aarch64_init_builtins, aarch64_expand_builtin): + (aarch64_builtin_decl, aarch64_builtin_rsqrt): Delete. + (aarch64_general_mangle_builtin_type, aarch64_general_init_builtins): + (aarch64_general_fold_builtin, aarch64_general_gimple_fold_builtin): + (aarch64_general_expand_builtin, aarch64_general_builtin_decl): + (aarch64_general_builtin_rsqrt): Declare. + * config/aarch64/aarch64-builtins.c (aarch64_general_add_builtin): + New function. + (aarch64_mangle_builtin_type): Rename to... + (aarch64_general_mangle_builtin_type): ...this. + (aarch64_init_fcmla_laneq_builtins, aarch64_init_simd_builtins) + (aarch64_init_crc32_builtins, aarch64_init_builtin_rsqrt) + (aarch64_init_pauth_hint_builtins, aarch64_init_tme_builtins): Use + aarch64_general_add_builtin instead of add_builtin_function. + (aarch64_init_builtins): Rename to... + (aarch64_general_init_builtins): ...this. Use + aarch64_general_add_builtin instead of add_builtin_function. + (aarch64_builtin_decl): Rename to... + (aarch64_general_builtin_decl): ...this and remove the unused + arguments. + (aarch64_expand_builtin): Rename to... + (aarch64_general_expand_builtin): ...this and remove the unused + arguments. + (aarch64_builtin_rsqrt): Rename to... + (aarch64_general_builtin_rsqrt): ...this. + (aarch64_fold_builtin): Rename to... + (aarch64_general_fold_builtin): ...this. Take the function subcode + and return type as arguments. Remove the "ignored" argument. + (aarch64_gimple_fold_builtin): Rename to... + (aarch64_general_gimple_fold_builtin): ...this. Take the function + subcode and gcall as arguments, and return the new function call. + * config/aarch64/aarch64.c (aarch64_init_builtins) + (aarch64_fold_builtin, aarch64_gimple_fold_builtin) + (aarch64_expand_builtin, aarch64_builtin_decl): New functions. + (aarch64_builtin_reciprocal): Call aarch64_general_builtin_rsqrt + instead of aarch64_builtin_rsqrt. + (aarch64_mangle_type): Call aarch64_general_mangle_builtin_type + instead of aarch64_mangle_builtin_type. + +2019-09-27 Richard Sandiford <richard.sandiford@arm.com> + + * target.def (check_builtin_call): New target hook. + * doc/tm.texi.in (TARGET_CHECK_BUILTIN_CALL): New @hook. + * doc/tm.texi: Regenerate. + +2019-09-27 Richard Sandiford <richard.sandiford@arm.com> + + PR tree-optimization/91909 + * tree-vect-loop.c (vect_create_epilog_for_reduction): Take a + reduc_index parameter. When handling COND_REDUCTION, make sure + that the reduction phi operand is in the correct arm of the + VEC_COND_EXPR. + (vectorizable_reduction): Pass reduc_index to the above. + +2019-09-27 Yuliang Wang <yuliang.wang@arm.com> + + * config/aarch64/aarch64-sve2.md (aarch64_sve2_sra<mode>): + New combine pattern. + +2019-09-26 Max Filippov <jcmvbkbc@gmail.com> + + * config/xtensa/xtensa.c (hwloop_optimize): Insert zero overhead + loop instruction into new basic block before the loop when basic + block that precedes the loop is empty. + +2019-09-26 Jakub Jelinek <jakub@redhat.com> + + * function.c (gimplify_parameters): Use build_clobber function. + * tree-ssa.c (execute_update_addresses_taken): Likewise. + * tree-inline.c (expand_call_inline): Likewise. + * tree-sra.c (clobber_subtree): Likewise. + * tree-ssa-ccp.c (insert_clobber_before_stack_restore): Likewise. + * omp-low.c (lower_rec_simd_input_clauses, lower_rec_input_clauses, + lower_omp_single, lower_depend_clauses, lower_omp_taskreg, + lower_omp_target): Likewise. + * omp-expand.c (expand_omp_for_generic): Likewise. + * omp-offload.c (ompdevlow_adjust_simt_enter): Likewise. + +2019-09-26 Will Schmidt <will_schmidt@vnet.ibm.com> + + * config/rs6000/rs6000-builtin.def: (LVSL, LVSR, LVEBX, LVEHX, + LVEWX, LVXL, LVXL_V2DF, LVXL_V2DI, LVXL_V4SF, LVXL_V4SI, LVXL_V8HI, + LVXL_V16QI, LVX, LVX_V1TI, LVX_V2DF, LVX_V2DI, LVX_V4SF, LVX_V4SI, + LVX_V8HI, LVX_V16QI, LVLX, LVLXL, LVRX, LVRXL, LXSDX, LXVD2X_V1TI, + LXVD2X_V2DF, LXVD2X_V2DI, LXVDSX, LXVW4X_V4SF, LXVW4X_V4SI, + LXVW4X_V8HI, LXVW4X_V16QI, LD_ELEMREV_V1TI, LD_ELEMREV_V2DF, + LD_ELEMREV_V2DI, LD_ELEMREV_V4SF, LD_ELEMREV_V4SI, LD_ELEMREV_V8HI, + LD_ELEMREV_V16QI): Use the PURE attribute. + +2019-09-26 Iain Sandoe <iain@sandoe.co.uk> + + * config/rs6000/darwin.md: Replace the expanders for + load_macho_picbase and reload_macho_picbase with use of '@' + and <mode> in their respective define_insns. + (nonlocal_goto_receiver): Pass Pmode to gen_reload_macho_picbase. + * config/rs6000/rs6000-logue.c (rs6000_emit_prologue): Pass + Pmode to gen_load_macho_picbase. + * config/rs6000/rs6000.md: Likewise. + +2019-09-25 Richard Biener <rguenther@suse.de> + + PR tree-optimization/91896 + * tree-vect-loop.c (vectorizable_reduction): The single + def-use cycle optimization cannot apply when there's more + than one pattern stmt involved. + +2019-09-26 Richard Biener <rguenther@suse.de> + + * tree-vect-loop.c (vect_analyze_loop_operations): Analyze + loop-closed PHIs that are vect_internal_def. + (vect_create_epilog_for_reduction): Exit early for nested cycles. + Simplify. + (vectorizable_lc_phi): New. + * tree-vect-stmts.c (vect_analyze_stmt): Call vectorize_lc_phi. + (vect_transform_stmt): Likewise. + * tree-vectorizer.h (stmt_vec_info_type): Add lc_phi_info_type. + (vectorizable_lc_phi): Declare. + +2019-09-26 Richard Biener <rguenther@suse.de> + + * tree-vect-loop.c (vect_analyze_loop_operations): Also call + vectorizable_reduction for vect_double_reduction_def. + (vect_transform_loop): Likewise. + (vect_create_epilog_for_reduction): Move double-reduction + PHI creation and preheader argument setting of PHIs ... + (vectorizable_reduction): ... here. Also process + vect_double_reduction_def PHIs, creating the vectorized + PHI nodes, remembering the scalar adjustment computed for + the epilogue in STMT_VINFO_REDUC_EPILOGUE_ADJUSTMENT. + Remember the original reduction code in STMT_VINFO_REDUC_CODE. + * tree-vectorizer.c (vec_info::new_stmt_vec_info): + Initialize STMT_VINFO_REDUC_CODE. + * tree-vectorizer.h (_stmt_vec_info::reduc_epilogue_adjustment): New. + (_stmt_vec_info::reduc_code): Likewise. + (STMT_VINFO_REDUC_EPILOGUE_ADJUSTMENT): Likewise. + (STMT_VINFO_REDUC_CODE): Likewise. + +2019-09-26 Matt Turner <mattst88@gmail.com> + + PR driver/69471 + * config/aarch64/aarch64.opt (march=): Add Negative(march=). + (mtune=): Add Negative(mtune=). + (mcpu=): Add Negative(mcpu=). + * config/arm/arm.opt: Likewise. + +2019-09-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/arm.md (arm_<simd32_op>): New define_insn. + * config/arm/arm_acle.h (__smlald, __smlaldx, __smlsld, __smlsldx): + Define. + * config/arm/arm_acle.h: Define builtins for the above. + * config/arm/iterators.md (SIMD32_DIMODE): New int_iterator. + (simd32_op): Handle the above. + * config/arm/unspecs.md: Define unspecs for the above. + +2019-09-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/arm.md (arm_<simd32_op>): New define_insn. + (arm_<sup>xtb16): Likewise. + (arm_usada8): Likewise. + * config/arm/arm_acle.h (__qadd8, __qsub8, __shadd8, __shsub8, + __uhadd8, __uhsub8, __uqadd8, __uqsub8, __qadd16, __qasx, __qsax, + __qsub16, __shadd16, __shasx, __shsax, __shsub16, __uhadd16, __uhasx, + __uhsax, __uhsub16, __uqadd16, __uqasx, __uqsax, __uqsub16, __sxtab16, + __sxtb16, __uxtab16, __uxtb16): Define. + * config/arm/arm_acle_builtins.def: Define builtins for the above. + * config/arm/unspecs.md: Define unspecs for the above. + * config/arm/iterators.md (SIMD32_NOGE_BINOP): New int_iterator. + (USXTB16): Likewise. + (simd32_op): New int_attribute. + (sup): Handle UNSPEC_SXTB16, UNSPEC_UXTB16. + * doc/sourcebuild.exp (arm_simd32_ok): Document. + +2019-09-26 Martin Jambor <mjambor@suse.cz> + + * ipa-sra.c (verify_splitting_accesses): Fix quoting in a call to + internal_error. + +2019-09-26 Martin Jambor <mjambor@suse.cz> + + * ipa-sra.c (process_scan_results): Fix continue condition. + +2019-09-26 Martin Liska <mliska@suse.cz> + + PR tree-optimization/91885 + * tree-vectorizer.c (try_vectorize_loop_1): Add + TODO_update_ssa_only_virtuals similarly to what slp pass does. + +2019-09-26 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/aarch64.c (aarch64_rtx_costs): Use + aarch64_plus_immediate rather than aarch64_uimm12_shift + to test for valid PLUS immediates. + +2019-09-25 Martin Jambor <mjambor@suse.cz> + + * tree-sra.c (no_accesses_p): Remove. + (no_accesses_representant): Likewise. + +2019-09-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/aarch64/arm_neon.h (vaba_s8): Use __ in identifiers + consistenly. + (vaba_s16): Likewise. + (vaba_s32): Likewise. + (vaba_u8): Likewise. + (vaba_u16): Likewise. + (vaba_u32): Likewise. + (vabal_high_s8): Likewise. + (vabal_high_s16): Likewise. + (vabal_high_s32): Likewise. + (vabal_high_u8): Likewise. + (vabal_high_u16): Likewise. + (vabal_high_u32): Likewise. + (vabal_s8): Likewise. + (vabal_s16): Likewise. + (vabal_s32): Likewise. + (vabal_u8): Likewise. + (vabal_u16): Likewise. + (vabal_u32): Likewise. + (vabaq_s8): Likewise. + (vabaq_s16): Likewise. + (vabaq_s32): Likewise. + (vabaq_u8): Likewise. + (vabaq_u16): Likewise. + (vabaq_u32): Likewise. + (vabd_s8): Likewise. + (vabd_s16): Likewise. + (vabd_s32): Likewise. + (vabd_u8): Likewise. + (vabd_u16): Likewise. + (vabd_u32): Likewise. + (vabdl_high_s8): Likewise. + (vabdl_high_s16): Likewise. + (vabdl_high_s32): Likewise. + (vabdl_high_u8): Likewise. + (vabdl_high_u16): Likewise. + (vabdl_high_u32): Likewise. + (vabdl_s8): Likewise. + (vabdl_s16): Likewise. + (vabdl_s32): Likewise. + (vabdl_u8): Likewise. + (vabdl_u16): Likewise. + (vabdl_u32): Likewise. + (vabdq_s8): Likewise. + (vabdq_s16): Likewise. + (vabdq_s32): Likewise. + (vabdq_u8): Likewise. + (vabdq_u16): Likewise. + (vabdq_u32): Likewise. + (vaddlv_s8): Likewise. + (vaddlv_s16): Likewise. + (vaddlv_u8): Likewise. + (vaddlv_u16): Likewise. + (vaddlvq_s8): Likewise. + (vaddlvq_s16): Likewise. + (vaddlvq_s32): Likewise. + (vaddlvq_u8): Likewise. + (vaddlvq_u16): Likewise. + (vaddlvq_u32): Likewise. + (vcvtx_f32_f64): Likewise. + (vcvtx_high_f32_f64): Likewise. + (vcvtxd_f32_f64): Likewise. + (vmla_n_f32): Likewise. + (vmla_n_s16): Likewise. + (vmla_n_s32): Likewise. + (vmla_n_u16): Likewise. + (vmla_n_u32): Likewise. + (vmla_s8): Likewise. + (vmla_s16): Likewise. + (vmla_s32): Likewise. + (vmla_u8): Likewise. + (vmla_u16): Likewise. + (vmla_u32): Likewise. + (vmlal_high_n_s16): Likewise. + (vmlal_high_n_s32): Likewise. + (vmlal_high_n_u16): Likewise. + (vmlal_high_n_u32): Likewise. + (vmlal_high_s8): Likewise. + (vmlal_high_s16): Likewise. + (vmlal_high_s32): Likewise. + (vmlal_high_u8): Likewise. + (vmlal_high_u16): Likewise. + (vmlal_high_u32): Likewise. + (vmlal_n_s16): Likewise. + (vmlal_n_s32): Likewise. + (vmlal_n_u16): Likewise. + (vmlal_n_u32): Likewise. + (vmlal_s8): Likewise. + (vmlal_s16): Likewise. + (vmlal_s32): Likewise. + (vmlal_u8): Likewise. + (vmlal_u16): Likewise. + (vmlal_u32): Likewise. + (vmlaq_n_f32): Likewise. + (vmlaq_n_s16): Likewise. + (vmlaq_n_s32): Likewise. + (vmlaq_n_u16): Likewise. + (vmlaq_n_u32): Likewise. + (vmlaq_s8): Likewise. + (vmlaq_s16): Likewise. + (vmlaq_s32): Likewise. + (vmlaq_u8): Likewise. + (vmlaq_u16): Likewise. + (vmlaq_u32): Likewise. + (vmls_n_f32): Likewise. + (vmls_n_s16): Likewise. + (vmls_n_s32): Likewise. + (vmls_n_u16): Likewise. + (vmls_n_u32): Likewise. + (vmls_s8): Likewise. + (vmls_s16): Likewise. + (vmls_s32): Likewise. + (vmls_u8): Likewise. + (vmls_u16): Likewise. + (vmls_u32): Likewise. + (vmlsl_high_n_s16): Likewise. + (vmlsl_high_n_s32): Likewise. + (vmlsl_high_n_u16): Likewise. + (vmlsl_high_n_u32): Likewise. + (vmlsl_high_s8): Likewise. + (vmlsl_high_s16): Likewise. + (vmlsl_high_s32): Likewise. + (vmlsl_high_u8): Likewise. + (vmlsl_high_u16): Likewise. + (vmlsl_high_u32): Likewise. + (vmlsl_n_s16): Likewise. + (vmlsl_n_s32): Likewise. + (vmlsl_n_u16): Likewise. + (vmlsl_n_u32): Likewise. + (vmlsl_s8): Likewise. + (vmlsl_s16): Likewise. + (vmlsl_s32): Likewise. + (vmlsl_u8): Likewise. + (vmlsl_u16): Likewise. + (vmlsl_u32): Likewise. + (vmlsq_n_f32): Likewise. + (vmlsq_n_s16): Likewise. + (vmlsq_n_s32): Likewise. + (vmlsq_n_u16): Likewise. + (vmlsq_n_u32): Likewise. + (vmlsq_s8): Likewise. + (vmlsq_s16): Likewise. + (vmlsq_s32): Likewise. + (vmlsq_u8): Likewise. + (vmlsq_u16): Likewise. + (vmlsq_u32): Likewise. + (vmovl_high_s8): Likewise. + (vmovl_high_s16): Likewise. + (vmovl_high_s32): Likewise. + (vmovl_high_u8): Likewise. + (vmovl_high_u16): Likewise. + (vmovl_high_u32): Likewise. + (vmovl_s8): Likewise. + (vmovl_s16): Likewise. + (vmovl_s32): Likewise. + (vmovl_u8): Likewise. + (vmovl_u16): Likewise. + (vmovl_u32): Likewise. + (vmovn_high_s16): Likewise. + (vmovn_high_s32): Likewise. + (vmovn_high_s64): Likewise. + (vmovn_high_u16): Likewise. + (vmovn_high_u32): Likewise. + (vmovn_high_u64): Likewise. + (vmovn_s16): Likewise. + (vmovn_s32): Likewise. + (vmovn_s64): Likewise. + (vmovn_u16): Likewise. + (vmovn_u32): Likewise. + (vmovn_u64): Likewise. + (vmull_high_n_s16): Likewise. + (vmull_high_n_s32): Likewise. + (vmull_high_n_u16): Likewise. + (vmull_high_n_u32): Likewise. + (vmull_high_p8): Likewise. + (vmull_high_s8): Likewise. + (vmull_high_s16): Likewise. + (vmull_high_s32): Likewise. + (vmull_high_u8): Likewise. + (vmull_high_u16): Likewise. + (vmull_high_u32): Likewise. + (vmull_n_s16): Likewise. + (vmull_n_s32): Likewise. + (vmull_n_u16): Likewise. + (vmull_n_u32): Likewise. + (vmull_p8): Likewise. + (vmull_s8): Likewise. + (vmull_s16): Likewise. + (vmull_s32): Likewise. + (vmull_u8): Likewise. + (vmull_u16): Likewise. + (vmull_u32): Likewise. + (vpadal_s8): Likewise. + (vpadal_s16): Likewise. + (vpadal_s32): Likewise. + (vpadal_u8): Likewise. + (vpadal_u16): Likewise. + (vpadal_u32): Likewise. + (vpadalq_s8): Likewise. + (vpadalq_s16): Likewise. + (vpadalq_s32): Likewise. + (vpadalq_u8): Likewise. + (vpadalq_u16): Likewise. + (vpadalq_u32): Likewise. + (vpaddl_s8): Likewise. + (vpaddl_s16): Likewise. + (vpaddl_s32): Likewise. + (vpaddl_u8): Likewise. + (vpaddl_u16): Likewise. + (vpaddl_u32): Likewise. + (vpaddlq_s8): Likewise. + (vpaddlq_s16): Likewise. + (vpaddlq_s32): Likewise. + (vpaddlq_u8): Likewise. + (vpaddlq_u16): Likewise. + (vpaddlq_u32): Likewise. + (vpaddq_s8): Likewise. + (vpaddq_s16): Likewise. + (vpaddq_s32): Likewise. + (vpaddq_s64): Likewise. + (vpaddq_u8): Likewise. + (vpaddq_u16): Likewise. + (vpaddq_u32): Likewise. + (vpaddq_u64): Likewise. + (vqdmulh_n_s16): Likewise. + (vqdmulh_n_s32): Likewise. + (vqdmulhq_n_s16): Likewise. + (vqdmulhq_n_s32): Likewise. + (vqmovn_high_s16): Likewise. + (vqmovn_high_s32): Likewise. + (vqmovn_high_s64): Likewise. + (vqmovn_high_u16): Likewise. + (vqmovn_high_u32): Likewise. + (vqmovn_high_u64): Likewise. + (vqmovun_high_s16): Likewise. + (vqmovun_high_s32): Likewise. + (vqmovun_high_s64): Likewise. + (vqrdmulh_n_s16): Likewise. + (vqrdmulh_n_s32): Likewise. + (vqrdmulhq_n_s16): Likewise. + (vqrdmulhq_n_s32): Likewise. + (vrsqrte_u32): Likewise. + (vrsqrteq_u32): Likewise. + (vtst_p8): Likewise. + (vtst_p16): Likewise. + (vtst_p64): Likewise. + (vtstq_p8): Likewise. + (vtstq_p16): Likewise. + (vtstq_p64): Likewise. + (vaddlv_s32): Likewise. + (vaddlv_u32): Likewise. + (vqtbl1_p8): Likewise. + (vqtbl1_s8): Likewise. + (vqtbl1_u8): Likewise. + (vqtbl1q_p8): Likewise. + (vqtbl1q_s8): Likewise. + (vqtbl1q_u8): Likewise. + (vqtbx1_s8): Likewise. + (vqtbx1_u8): Likewise. + (vqtbx1_p8): Likewise. + (vqtbx1q_s8): Likewise. + (vqtbx1q_u8): Likewise. + (vqtbx1q_p8): Likewise. + (vtbl1_s8): Likewise. + (vtbl1_u8): Likewise. + (vtbl1_p8): Likewise. + (vtbl2_s8): Likewise. + (vtbl2_u8): Likewise. + (vtbl2_p8): Likewise. + (vtbl3_s8): Likewise. + (vtbl3_u8): Likewise. + (vtbl3_p8): Likewise. + (vtbl4_s8): Likewise. + (vtbl4_u8): Likewise. + (vtbl4_p8): Likewise. + (vtbx2_s8): Likewise. + (vtbx2_u8): Likewise. + (vtbx2_p8): Likewise. + (vld1_f32): Likewise. + (vld1_f64): Likewise. + (vld1_p8): Likewise. + (vld1_p16): Likewise. + (vld1_p64): Likewise. + (vld1_s8): Likewise. + (vld1_s16): Likewise. + (vld1_s32): Likewise. + (vld1_s64): Likewise. + (vld1_u8): Likewise. + (vld1_u16): Likewise. + (vld1_u32): Likewise. + (vld1_u64): Likewise. + (vld1q_f32): Likewise. + (vld1q_f64): Likewise. + (vld1q_p8): Likewise. + (vld1q_p16): Likewise. + (vld1q_p64): Likewise. + (vld1q_s8): Likewise. + (vld1q_s16): Likewise. + (vld1q_s32): Likewise. + (vld1q_s64): Likewise. + (vld1q_u8): Likewise. + (vld1q_u16): Likewise. + (vld1q_u32): Likewise. + (vld1q_u64): Likewise. + (vpmax_s8): Likewise. + (vpmax_s16): Likewise. + (vpmax_s32): Likewise. + (vpmax_u8): Likewise. + (vpmax_u16): Likewise. + (vpmax_u32): Likewise. + (vpmaxq_s8): Likewise. + (vpmaxq_s16): Likewise. + (vpmaxq_s32): Likewise. + (vpmaxq_u8): Likewise. + (vpmaxq_u16): Likewise. + (vpmaxq_u32): Likewise. + (vpmax_f32): Likewise. + (vpmaxq_f32): Likewise. + (vpmaxq_f64): Likewise. + (vpmaxqd_f64): Likewise. + (vpmaxs_f32): Likewise. + (vpmaxnm_f32): Likewise. + (vpmaxnmq_f32): Likewise. + (vpmaxnmq_f64): Likewise. + (vpmaxnmqd_f64): Likewise. + (vpmaxnms_f32): Likewise. + (vpmin_s8): Likewise. + (vpmin_s16): Likewise. + (vpmin_s32): Likewise. + (vpmin_u8): Likewise. + (vpmin_u16): Likewise. + (vpmin_u32): Likewise. + (vpminq_s8): Likewise. + (vpminq_s16): Likewise. + (vpminq_s32): Likewise. + (vpminq_u8): Likewise. + (vpminq_u16): Likewise. + (vpminq_u32): Likewise. + (vpmin_f32): Likewise. + (vpminq_f32): Likewise. + (vpminq_f64): Likewise. + (vpminqd_f64): Likewise. + (vpmins_f32): Likewise. + (vpminnm_f32): Likewise. + (vpminnmq_f32): Likewise. + (vpminnmq_f64): Likewise. + (vpminnmqd_f64): Likewise. + (vpminnms_f32): Likewise. + (vmla_f32): Likewise. + (vmlaq_f32): Likewise. + (vmlaq_f64): Likewise. + (vmls_f32): Likewise. + (vmlsq_f32): Likewise. + (vmlsq_f64): Likewise. + (vqtbl2_s8): Likewise. + (vqtbl2_u8): Likewise. + (vqtbl2_p8): Likewise. + (vqtbl2q_s8): Likewise. + (vqtbl2q_u8): Likewise. + (vqtbl2q_p8): Likewise. + (vqtbl3_s8): Likewise. + (vqtbl3_u8): Likewise. + (vqtbl3_p8): Likewise. + (vqtbl3q_s8): Likewise. + (vqtbl3q_u8): Likewise. + (vqtbl3q_p8): Likewise. + (vqtbl4_s8): Likewise. + (vqtbl4_u8): Likewise. + (vqtbl4_p8): Likewise. + (vqtbl4q_s8): Likewise. + (vqtbl4q_u8): Likewise. + (vqtbl4q_p8): Likewise. + (vqtbx2_s8): Likewise. + (vqtbx2_u8): Likewise. + (vqtbx2_p8): Likewise. + (vqtbx2q_s8): Likewise. + (vqtbx2q_u8): Likewise. + (vqtbx2q_p8): Likewise. + (vqtbx3_s8): Likewise. + (vqtbx3_u8): Likewise. + (vqtbx3_p8): Likewise. + (vqtbx3q_s8): Likewise. + (vqtbx3q_u8): Likewise. + (vqtbx3q_p8): Likewise. + (vqtbx4_s8): Likewise. + (vqtbx4_u8): Likewise. + (vqtbx4_p8): Likewise. + (vqtbx4q_s8): Likewise. + (vqtbx4q_u8): Likewise. + (vqtbx4q_p8): Likewise. + (vrev16_p8): Likewise. + (vrev16_s8): Likewise. + (vrev16_u8): Likewise. + (vrev16q_p8): Likewise. + (vrev16q_s8): Likewise. + (vrev16q_u8): Likewise. + (vrev32_p8): Likewise. + (vrev32_p16): Likewise. + (vrev32_s8): Likewise. + (vrev32_s16): Likewise. + (vrev32_u8): Likewise. + (vrev32_u16): Likewise. + (vrev32q_p8): Likewise. + (vrev32q_p16): Likewise. + (vrev32q_s8): Likewise. + (vrev32q_s16): Likewise. + (vrev32q_u8): Likewise. + (vrev32q_u16): Likewise. + (vrev64_f32): Likewise. + (vrev64_p8): Likewise. + (vrev64_p16): Likewise. + (vrev64_s8): Likewise. + (vrev64_s16): Likewise. + (vrev64_s32): Likewise. + (vrev64_u8): Likewise. + (vrev64_u16): Likewise. + (vrev64_u32): Likewise. + (vrev64q_f32): Likewise. + (vrev64q_p8): Likewise. + (vrev64q_p16): Likewise. + (vrev64q_s8): Likewise. + (vrev64q_s16): Likewise. + (vrev64q_s32): Likewise. + (vrev64q_u8): Likewise. + (vrev64q_u16): Likewise. + (vrev64q_u32): Likewise. + (vsha1cq_u32): Likewise. + (vsha1mq_u32): Likewise. + (vsha1pq_u32): Likewise. + (vsha1h_u32): Likewise. + (vsha1su0q_u32): Likewise. + (vsha1su1q_u32): Likewise. + (vsha256hq_u32): Likewise. + (vsha256h2q_u32): Likewise. + (vsha256su0q_u32): Likewise. + (vsha256su1q_u32): Likewise. + (vmull_p64): Likewise. + (vmull_high_p64): Likewise. + (vsqrt_f32): Likewise. + (vsqrtq_f32): Likewise. + (vsqrt_f64): Likewise. + (vsqrtq_f64): Likewise. + (vst1_f32): Likewise. + (vst1_f64): Likewise. + (vst1_p8): Likewise. + (vst1_p16): Likewise. + (vst1_p64): Likewise. + (vst1_s8): Likewise. + (vst1_s16): Likewise. + (vst1_s32): Likewise. + (vst1_s64): Likewise. + (vst1_u8): Likewise. + (vst1_u16): Likewise. + (vst1_u32): Likewise. + (vst1_u64): Likewise. + (vst1q_f32): Likewise. + (vst1q_f64): Likewise. + (vst1q_p8): Likewise. + (vst1q_p16): Likewise. + (vst1q_p64): Likewise. + (vst1q_s8): Likewise. + (vst1q_s16): Likewise. + (vst1q_s32): Likewise. + (vst1q_s64): Likewise. + (vst1q_u8): Likewise. + (vst1q_u16): Likewise. + (vst1q_u32): Likewise. + (vst1q_u64): Likewise. + (vst1_s64_x2): Likewise. + (vst1_u64_x2): Likewise. + (vst1_f64_x2): Likewise. + (vst1_s8_x2): Likewise. + (vst1_p8_x2): Likewise. + (vst1_s16_x2): Likewise. + (vst1_p16_x2): Likewise. + (vst1_s32_x2): Likewise. + (vst1_u8_x2): Likewise. + (vst1_u16_x2): Likewise. + (vst1_u32_x2): Likewise. + (vst1_f16_x2): Likewise. + (vst1_f32_x2): Likewise. + (vst1_p64_x2): Likewise. + (vst1q_s8_x2): Likewise. + (vst1q_p8_x2): Likewise. + (vst1q_s16_x2): Likewise. + (vst1q_p16_x2): Likewise. + (vst1q_s32_x2): Likewise. + (vst1q_s64_x2): Likewise. + (vst1q_u8_x2): Likewise. + (vst1q_u16_x2): Likewise. + (vst1q_u32_x2): Likewise. + (vst1q_u64_x2): Likewise. + (vst1q_f16_x2): Likewise. + (vst1q_f32_x2): Likewise. + (vst1q_f64_x2): Likewise. + (vst1q_p64_x2): Likewise. + (vst1_s64_x3): Likewise. + (vst1_u64_x3): Likewise. + (vst1_f64_x3): Likewise. + (vst1_s8_x3): Likewise. + (vst1_p8_x3): Likewise. + (vst1_s16_x3): Likewise. + (vst1_p16_x3): Likewise. + (vst1_s32_x3): Likewise. + (vst1_u8_x3): Likewise. + (vst1_u16_x3): Likewise. + (vst1_u32_x3): Likewise. + (vst1_f16_x3): Likewise. + (vst1_f32_x3): Likewise. + (vst1_p64_x3): Likewise. + (vst1q_s8_x3): Likewise. + (vst1q_p8_x3): Likewise. + (vst1q_s16_x3): Likewise. + (vst1q_p16_x3): Likewise. + (vst1q_s32_x3): Likewise. + (vst1q_s64_x3): Likewise. + (vst1q_u8_x3): Likewise. + (vst1q_u16_x3): Likewise. + (vst1q_u32_x3): Likewise. + (vst1q_u64_x3): Likewise. + (vst1q_f16_x3): Likewise. + (vst1q_f32_x3): Likewise. + (vst1q_f64_x3): Likewise. + (vst1q_p64_x3): Likewise. + (vst2_s64): Likewise. + (vst2_u64): Likewise. + (vst2_f64): Likewise. + (vst2_s8): Likewise. + (vst2_p8): Likewise. + (vst2_s16): Likewise. + (vst2_p16): Likewise. + (vst2_s32): Likewise. + (vst2_u8): Likewise. + (vst2_u16): Likewise. + (vst2_u32): Likewise. + (vst2_f16): Likewise. + (vst2_f32): Likewise. + (vst2_p64): Likewise. + (vst2q_s8): Likewise. + (vst2q_p8): Likewise. + (vst2q_s16): Likewise. + (vst2q_p16): Likewise. + (vst2q_s32): Likewise. + (vst2q_s64): Likewise. + (vst2q_u8): Likewise. + (vst2q_u16): Likewise. + (vst2q_u32): Likewise. + (vst2q_u64): Likewise. + (vst2q_f16): Likewise. + (vst2q_f32): Likewise. + (vst2q_f64): Likewise. + (vst2q_p64): Likewise. + (vst3_s64): Likewise. + (vst3_u64): Likewise. + (vst3_f64): Likewise. + (vst3_s8): Likewise. + (vst3_p8): Likewise. + (vst3_s16): Likewise. + (vst3_p16): Likewise. + (vst3_s32): Likewise. + (vst3_u8): Likewise. + (vst3_u16): Likewise. + (vst3_u32): Likewise. + (vst3_f16): Likewise. + (vst3_f32): Likewise. + (vst3_p64): Likewise. + (vst3q_s8): Likewise. + (vst3q_p8): Likewise. + (vst3q_s16): Likewise. + (vst3q_p16): Likewise. + (vst3q_s32): Likewise. + (vst3q_s64): Likewise. + (vst3q_u8): Likewise. + (vst3q_u16): Likewise. + (vst3q_u32): Likewise. + (vst3q_u64): Likewise. + (vst3q_f16): Likewise. + (vst3q_f32): Likewise. + (vst3q_f64): Likewise. + (vst3q_p64): Likewise. + (vst4_s64): Likewise. + (vst4_u64): Likewise. + (vst4_f64): Likewise. + (vst4_s8): Likewise. + (vst4_p8): Likewise. + (vst4_s16): Likewise. + (vst4_p16): Likewise. + (vst4_s32): Likewise. + (vst4_u8): Likewise. + (vst4_u16): Likewise. + (vst4_u32): Likewise. + (vst4_f16): Likewise. + (vst4_f32): Likewise. + (vst4_p64): Likewise. + (vst4q_s8): Likewise. + (vst4q_p8): Likewise. + (vst4q_s16): Likewise. + (vst4q_p16): Likewise. + (vst4q_s32): Likewise. + (vst4q_s64): Likewise. + (vst4q_u8): Likewise. + (vst4q_u16): Likewise. + (vst4q_u32): Likewise. + (vst4q_u64): Likewise. + (vst4q_f16): Likewise. + (vst4q_f32): Likewise. + (vst4q_f64): Likewise. + (vst4q_p64): Likewise. + (vtbx4_s8): Likewise. + (vtbx4_u8): Likewise. + (vtbx4_p8): Likewise. + (vtrn_f32): Likewise. + (vtrn_p8): Likewise. + (vtrn_p16): Likewise. + (vtrn_s8): Likewise. + (vtrn_s16): Likewise. + (vtrn_s32): Likewise. + (vtrn_u8): Likewise. + (vtrn_u16): Likewise. + (vtrn_u32): Likewise. + (vtrnq_f32): Likewise. + (vtrnq_p8): Likewise. + (vtrnq_p16): Likewise. + (vtrnq_s8): Likewise. + (vtrnq_s16): Likewise. + (vtrnq_s32): Likewise. + (vtrnq_u8): Likewise. + (vtrnq_u16): Likewise. + (vtrnq_u32): Likewise. + (vrsqrte_f16): Likewise. + (vrsqrteq_f16): Likewise. + (vsqrt_f16): Likewise. + (vsqrtq_f16): Likewise. + (vabd_f16): Likewise. + (vabdq_f16): Likewise. + (vpadd_f16): Likewise. + (vpaddq_f16): Likewise. + (vpmax_f16): Likewise. + (vpmaxq_f16): Likewise. + (vpmaxnm_f16): Likewise. + (vpmaxnmq_f16): Likewise. + (vpmin_f16): Likewise. + (vpminq_f16): Likewise. + (vpminnm_f16): Likewise. + (vpminnmq_f16): Likewise. + (vrsqrts_f16): Likewise. + (vrsqrtsq_f16): Likewise. + +2019-09-25 Richard Biener <rguenther@suse.de> + + PR tree-optimization/91896 + * tree-vect-loop.c (vectorizable_reduction): The single + def-use cycle optimization cannot apply when there's more + than one pattern stmt involved. + +2019-09-24 Iain Sandoe <iain@sandoe.co.uk> + + * config/rs6000/rs6000.md (load_macho_picbase_<mode>): New, using + the 'P' mode iterator, replacing the (removed) SI and DI variants. + (reload_macho_picbase_<mode>): Likewise. + +2019-09-24 Iain Sandoe <iain@sandoe.co.uk> + + * config/rs6000/rs6000.md: Move darwin.md include until + after the definition of the mode iterators. + +2019-09-23 Martin Sebor <msebor@redhat.com> + + PR tree-optimization/91570 + * tree-ssa-strlen.c (get_range_strlen_dynamic): Handle null and + non-constant minlen, maxlen and maxbound. + +2019-09-24 Richard Biener <rguenther@suse.de> + + * tree-vectorizer.h (_stmt_vec_info::const_cond_reduc_code): + Rename to... + (_stmt_vec_info::cond_reduc_code): ... this. + (_stmt_vec_info::induc_cond_initial_val): Add. + (STMT_VINFO_VEC_CONST_COND_REDUC_CODE): Rename to... + (STMT_VINFO_VEC_COND_REDUC_CODE): ... this. + (STMT_VINFO_VEC_INDUC_COND_INITIAL_VAL): Add. + * tree-vectorizer.c (vec_info::new_stmt_vec_info): Adjust. + * tree-vect-loop.c (get_initial_def_for_reduction): Pass in + the reduction code. + (vect_create_epilog_for_reduction): Drop special + induction condition reduction params, pass in reduction code + and simplify. + (vectorizable_reduction): Perform condition reduction kind + selection only at analysis time. Adjust passing on state. + +2019-09-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/aarch64/aarch64.md (mov<mode>): Don't call + aarch64_split_dimode_const_store on volatile MEM. + +2019-09-24 Stamatis Markianos-Wright <stam.markianos-wright@arm.com> + + * config/aarch64/aarch64-option-extensions.def (fp16fml): + Update hwcap string for fp16fml. + +2019-09-24 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/91866 + * match.pd (((T)(A)) + CST -> (T)(A + CST)): Formatting fix. + (((T)(A + CST1)) + CST2 -> (T)(A) + (T)CST1 + CST2): New optimization. + +2019-09-24 Martin Liska <mliska@suse.cz> + + * cfgexpand.c (gimple_assign_rhs_to_tree): Use switch statement + instead of if-elseif-elseif-... + * gimple-expr.c (extract_ops_from_tree): Likewise. + * gimple.c (get_gimple_rhs_num_ops): Likewise. + * tree-ssa-forwprop.c (rhs_to_tree): Likewise. + +2019-09-24 Martin Jambor <mjambor@suse.cz> + + PR ipa/91831 + * ipa-param-manipulation.c (carry_over_param): Make a method of + ipa_param_body_adjustments, remove now unnecessary argument. Also copy + in case of a context mismatch. + (ipa_param_body_adjustments::common_initialization): Adjust call to + carry_over_param. + * ipa-param-manipulation.h (class ipa_param_body_adjustments): Add + private method carry_over_param. + +2019-09-24 Martin Jambor <mjambor@suse.cz> + + PR ipa/91832 + * ipa-sra.c (scan_expr_access): Check that offset is non-negative. + +2019-09-24 Richard Biener <rguenther@suse.de> + + * tree-ssa-sccvn.c (vn_reference_lookup_3): Valueize MEM_REF + base. + +2019-09-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/t-arm (arm-builtins.o): Add dependency on + arm_acle_builtins.def. + +2019-09-23 Richard Sandiford <richard.sandiford@arm.com> + + PR target/91823 + * config/rs6000/altivec.md (altivec_copysign_v4sf3): Generate + canonical CONST_INTs. Use gen_rtvec. + +2019-09-23 Richard Biener <rguenther@suse.de> + + * tree-vect-loop.c (get_initial_def_for_reduction): Simplify, + avoid adjusting by + 0 or * 1. + (vect_create_epilog_for_reduction): Get reduction code only + when necessary. Deal with adjustment_def only when necessary. + +2019-09-23 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/atomics.md (aarch64_store_exclusive_pair): Fix + memmodel index. + +2019-09-23 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> + + PR ipa/91835 + * lto-section-in.c (lto_section_name): Use "ipa_sra" instead of + "ipa-sra". + +2019-09-22 Iain Sandoe <iain@sandoe.co.uk> + + * config/rs6000/rs6000.c (machopic_output_stub): Remove dead + code. Merge code blocks with common conditionals. Use declared + macro instead of a magic number for PIC level. + +2019-09-21 Martin Sebor <msebor@redhat.com> + + PR middle-end/91830 + * gimple-ssa-warn-restrict.c (builtin_memref::set_base_and_offset): + Simplify computation of the offset of the referenced subobject. + +2019-09-21 Iain Sandoe <iain@sandoe.co.uk> + + * config/darwin.c (machopic_legitimize_pic_address): Check + for lra not reload. + +2019-09-21 Richard Sandiford <richard.sandiford@arm.com> + + * ira-conflicts.c (can_use_same_reg_p): New function. + (process_reg_shuffles): Take an insn parameter. Ignore cases + in which input operand op_num could seemingly never be allocated + to the same register as the destination. + (add_insn_allocno_copies): Update call to process_reg_shuffles. + +2019-09-21 Richard Sandiford <richard.sandiford@arm.com> + + * simplify-rtx.c (neg_const_int): Replace with... + (neg_poly_int_rtx): ...this new function. + (simplify_binary_operation_1): Extend (minus x C) -> (plus X -C) + to all CONST_SCALAR_INTs and to CONST_POLY_INT. + (simplify_plus_minus): Likewise for constant terms here. + +2019-09-20 Jonas Pfeil <jonas.pfeil@uli-ulm.de> + + * config/microblaze/microblaze.h (ASM_OUTPUT_SKIP): Use + HOST_WIDE_PRINT_UNSIGNED. + +2019-09-20 John David Anglin <danglin@gcc.gnu.org> + + * config/pa/pa.c (pa_trampoline_init): Remove spurious extended + character. + +2019-09-20 Maya Rashish <coypu@sdf.org> + + PR target/86811 + * config/vax/vax.c (TARGET_HAVE_SPECULATION_SAFE_VALUE): + Define to speculation_safe_value_not_needed. + +2019-09-20 Richard Biener <rguenther@suse.de> + Uros Bizjak <ubizjak@gmail.com> + + PR target/91814 + * config/i386/i386-features.c (gen_gpr_to_xmm_move_src): Revert + previous change. + (general_scalar_chain::convert_op): Force not suitable memory + operands to a register. + +2019-09-20 Richard Biener <rguenther@suse.de> + + PR tree-optimization/91821 + * tree-vect-loop.c (check_reduction_path): Check we can compute + reduc_idx. + (vect_is_simple_reduction): Set STMT_VINFO_REDUC_IDX. + * tree-vect-patterns.c (vect_reassociating_reduction_p): Return + operands in canonical order. + * tree-vectorizer.c (vec_info::new_stmt_vec_info): Initialize + STMT_VINFO_REDUC_IDX. + * tree-vectorizer.h (_stmt_vec_info::reduc_idx): New. + (STMT_VINFO_REDUC_IDX): Likewise. + +2019-09-20 Eric Botcazou <ebotcazou@adacore.com> + + PR target/91269 + * config/sparc/sparc.h (HARD_REGNO_CALLER_SAVE_MODE): Define. + +2019-09-20 Richard Biener <rguenther@suse.de> + + PR tree-optimization/91822 + * tree-vectorizer.h (vectorizable_condition): Restore for_reduction + parameter. + * tree-vect-loop.c (vectorizable_reduction): Adjust asserts + for reduc_index in nested cycles, adjust vectorizable_condition + calls. + * tree-vect-stmts.c (vectorizable_condition): Restore for_reduction + parameter. + (vect_analyze_stmt): Adjust. + (vect_transform_stmt): Likewise. + +2019-09-20 Richard Biener <rguenther@suse.de> + + PR target/91767 + * config/i386/i386-features.c (general_scalar_chain::convert_registers): + Ensure there's a sequence point between allocating the new register + and passing a reference to a reg via regno_reg_rtx. + +2019-09-20 Martin Jambor <mjambor@suse.cz> + + * coretypes.h (cgraph_edge): Declare. + * ipa-param-manipulation.c: Rewrite. + * ipa-param-manipulation.h: Likewise. + * Makefile.in (GTFILES): Added ipa-param-manipulation.h and ipa-sra.c. + (OBJS): Added ipa-sra.o. + * cgraph.h (ipa_replace_map): Removed fields old_tree, replace_p + and ref_p, added fields param_adjustments and performed_splits. + (struct cgraph_clone_info): Remove ags_to_skip and + combined_args_to_skip, new field param_adjustments. + (cgraph_node::create_clone): Changed parameters to use + ipa_param_adjustments. + (cgraph_node::create_virtual_clone): Likewise. + (cgraph_node::create_virtual_clone_with_body): Likewise. + (tree_function_versioning): Likewise. + (cgraph_build_function_type_skip_args): Removed. + * cgraph.c (cgraph_edge::redirect_call_stmt_to_callee): Convert to + using ipa_param_adjustments. + (clone_of_p): Likewise. + * cgraphclones.c (cgraph_build_function_type_skip_args): Removed. + (build_function_decl_skip_args): Likewise. + (duplicate_thunk_for_node): Adjust parameters using + ipa_param_body_adjustments, copy param_adjustments instead of + args_to_skip. + (cgraph_node::create_clone): Convert to using ipa_param_adjustments. + (cgraph_node::create_virtual_clone): Likewise. + (cgraph_node::create_version_clone_with_body): Likewise. + (cgraph_materialize_clone): Likewise. + (symbol_table::materialize_all_clones): Likewise. + * ipa-fnsummary.c (ipa_fn_summary_t::duplicate): Simplify + ipa_replace_map check. + * ipa-cp.c (get_replacement_map): Do not initialize removed fields. + (initialize_node_lattices): Make aware that some parameters might have + already been removed. + (want_remove_some_param_p): New function. + (create_specialized_node): Convert to using ipa_param_adjustments and + deal with possibly pre-existing adjustments. + * lto-cgraph.c (output_cgraph_opt_summary_p): Likewise. + (output_node_opt_summary): Do not stream removed fields. Stream + parameter adjustments instead of argumetns to skip. + (input_node_opt_summary): Likewise. + (input_node_opt_summary): Likewise. + * lto-section-in.c (lto_section_name): Added ipa-sra section. + * lto-streamer.h (lto_section_type): Likewise. + * tree-inline.h (copy_body_data): New fields killed_new_ssa_names and + param_body_adjs. + (copy_decl_to_var): Declare. + * tree-inline.c (update_clone_info): Do not remap old_tree. + (remap_gimple_stmt): Use ipa_param_body_adjustments to modify gimple + statements, walk all extra generated statements and remap their + operands. + (redirect_all_calls): Add killed SSA names to a hash set. + (remap_ssa_name): Do not remap killed SSA names. + (copy_arguments_for_versioning): Renames to copy_arguments_nochange, + half of functionality moved to ipa_param_body_adjustments. + (copy_decl_to_var): Make exported. + (copy_body): Destroy killed_new_ssa_names hash set. + (expand_call_inline): Remap performed splits. + (update_clone_info): Likewise. + (tree_function_versioning): Simplify tree_map processing. Updated to + accept ipa_param_adjustments and use ipa_param_body_adjustments. + * omp-simd-clone.c (simd_clone_vector_of_formal_parm_types): Adjust + for the new interface. + (simd_clone_clauses_extract): Likewise, make args an auto_vec. + (simd_clone_compute_base_data_type): Likewise. + (simd_clone_init_simd_arrays): Adjust for the new interface. + (simd_clone_adjust_argument_types): Likewise. + (struct modify_stmt_info): Likewise. + (ipa_simd_modify_stmt_ops): Likewise. + (ipa_simd_modify_function_body): Likewise. + (simd_clone_adjust): Likewise. + * tree-sra.c: Removed IPA-SRA. Include tree-sra.h. + (type_internals_preclude_sra_p): Make public. + * tree-sra.h: New file. + * ipa-inline-transform.c (save_inline_function_body): Update to + refelct new tree_function_versioning signature. + * ipa-prop.c (adjust_agg_replacement_values): Use a helper from + ipa_param_adjustments to get current parameter indices. + (ipcp_modif_dom_walker::before_dom_children): Likewise. + (ipcp_update_bits): Likewise. + (ipcp_update_vr): Likewise. + * ipa-split.c (split_function): Convert to using ipa_param_adjustments. + * ipa-sra.c: New file. + * multiple_target.c (create_target_clone): Update to reflet new type + of create_version_clone_with_body. + * trans-mem.c (ipa_tm_create_version): Update to reflect new type of + tree_function_versioning. + (modify_function): Update to reflect new type of + tree_function_versioning. + * params.def (PARAM_IPA_SRA_MAX_REPLACEMENTS): New. + * passes.def: Remove old IPA-SRA and add new one. + * tree-pass.h (make_pass_early_ipa_sra): Remove declaration. + (make_pass_ipa_sra): Declare. + * dbgcnt.def: Remove eipa_sra. Added ipa_sra_params and + ipa_sra_retvalues. + * doc/invoke.texi (ipa-sra-max-replacements): New. + +2019-09-19 Martin Sebor <msebor@redhat.com> + + PR middle-end/91631 + * builtins.c (component_size): Correct trailing array computation, + rename to component_ref_size and move... + (compute_objsize): Adjust. + * gimple-ssa-warn-restrict.c (builtin_memref::refsize): New member. + (builtin_access::strict): Do not consider memmove. + (builtin_access::write_off): New function. + (builtin_memref::builtin_memref): Initialize refsize. + (builtin_memref::set_base_and_offset): Adjust refoff and compute + refsize. + (builtin_memref::offset_out_of_bounds): Use ooboff input values. + Handle refsize. + (builtin_access::builtin_access): Initialize dstoff to destination + refeence offset here instead of in maybe_diag_overlap. Adjust + referencess even to unrelated objects. Adjust sizrange of bounded + string functions to reflect bound. For strcat, adjust destination + sizrange by that of source. + (builtin_access::strcat_overlap): Adjust offsets and sizes + to reflect the increase in destination sizrange above. + (builtin_access::overlap): Do not set dstoff here but instead + in builtin_access::builtin_access. + (check_bounds_or_overlap): Use builtin_access::write_off. + (maybe_diag_access_bounds): Add argument. Add informational notes. + (dump_builtin_memref, dump_builtin_access): New functions. + * tree.c (component_ref_size): ...to here. + * tree.h (component_ref_size): Declare. + * tree-ssa-strlen (handle_builtin_strcat): Include the terminating + nul in the size of the source string. + +2019-09-19 Lewis Hyatt <lhyatt@gmail.com> + + PR c/67224 + * doc/cpp.texi: Document support for extended characters in + identifiers. + * doc/cppopts.texi: Likewise. + +2019-09-19 Richard Biener <rguenther@suse.de> + + * tree-vect-loop.c (vect_is_slp_reduction): Remove. + (check_reduction_path): New overload having the path as result. + (vect_is_simple_reduction): From the detected reduction + path build a SLP reduction chain if possible. + +2019-09-19 Richard Biener <rguenther@suse.de> + + PR target/91814 + * config/i386/i386-features.c (gen_gpr_to_xmm_move_src): + Force operand to a register if it isn't nonimmediate_operand. + +2019-09-19 Wilco Dijkstra <wdijkstr@arm.com> + + * config/arm/arm.md (<logical_op>di3): Use <optab> and <CODE>. + * config/arm/iterators.md (optab): Add and, ior, xor entries. + (logical_op): Remove code attribute. + (logical_OP): Likewise. + +2019-09-19 Martin Liska <mliska@suse.cz> + + * ipa-icf.c (sort_congruence_class_groups_by_decl_uid): + Use proper casting. + +2019-09-19 Richard Henderson <richard.henderson@linaro.org> + + * config/aarch64/aarch64.c (aarch64_print_operand): Allow integer + registers with %R. + + * config/aarch64/aarch64.c (aarch64_gen_compare_reg): Add support + for NE comparison of TImode values. + (aarch64_emit_load_exclusive): Add support for TImode. + (aarch64_emit_store_exclusive): Likewise. + (aarch64_split_compare_and_swap): Disable strong_zero_p for TImode. + * config/aarch64/atomics.md (@atomic_compare_and_swap<ALLI_TI>): + Change iterator from ALLI to ALLI_TI. + (@atomic_compare_and_swap<JUST_TI>): New. + (@atomic_compare_and_swap<JUST_TI>_lse): New. + (aarch64_load_exclusive_pair): New. + (aarch64_store_exclusive_pair): New. + * config/aarch64/iterators.md (JUST_TI): New. + + * config/aarch64/aarch64 (aarch64_split_compare_and_swap): Disable + strong_zero_p for aarch64_track_speculation; unify some code paths; + use aarch64_gen_compare_reg instead of open-coding. + + * config/aarch64/aarch64.opt (-moutline-atomics): New. + * config/aarch64/aarch64.c (aarch64_atomic_ool_func): New. + (aarch64_ool_cas_names, aarch64_ool_swp_names): New. + (aarch64_ool_ldadd_names, aarch64_ool_ldset_names): New. + (aarch64_ool_ldclr_names, aarch64_ool_ldeor_names): New. + (aarch64_expand_compare_and_swap): Honor TARGET_OUTLINE_ATOMICS. + * config/aarch64/atomics.md (atomic_exchange<ALLI>): Likewise. + (atomic_<atomic_op><ALLI>): Likewise. + (atomic_fetch_<atomic_op><ALLI>): Likewise. + (atomic_<atomic_op>_fetch<ALLI>): Likewise. + * doc/invoke.texi: Document -moutline-atomics. + +2019-09-19 Feng Xue <fxue@os.amperecomputing.com> + + * ipa-fnsummary.c (set_cond_stmt_execution_predicate): Do not compute + trivial predicate for condition branch. + (set_switch_stmt_execution_predicate): Do not compute trivial predicate + for switch case. + (compute_bb_predicates): Update predicate based on post-dominating + relationship. + (analyze_function_body): Calculate post-dominating information. + +2019-09-19 Richard Sandiford <richard.sandiford@arm.com> + + * tree-vectorizer.h (vectorizable_condition): Take an int + reduction index instead of a boolean flag. + * tree-vect-stmts.c (vectorizable_condition): Likewise. + Swap the "then" and "else" values for EXTRACT_LAST_REDUCTION + reductions if the reduction accumulator is the "then" rather + than the "else" value. + (vect_analyze_stmt): Update call accordingly. + (vect_transform_stmt): Likewise. + * tree-vect-loop.c (vectorizable_reduction): Likewise, + asserting that the index is > 0. + +2019-09-19 Martin Liska <mliska@suse.cz> + + * ipa-icf.c (sort_sem_items_by_decl_uid): Simplify comparator. + (sort_congruence_classes_by_decl_uid): Likewise. + (sort_congruence_class_groups_by_decl_uid): Use std::pair for + easier sorting. + (sem_item_optimizer::merge_classes): Likewise. + +2019-09-19 Richard Biener <rguenther@suse.de> + + PR tree-optimization/91812 + * tree-ssa-phiprop.c (propagate_with_phi): Do not replace + volatile loads. + +2019-09-19 Richard Sandiford <richard.sandiford@arm.com> + + * defaults.h (TARGET_UNIT): New macro. + (target_unit): New type. + * rtl.h (native_encode_rtx, native_decode_rtx) + (native_decode_vector_rtx, subreg_size_lsb): Declare. + (subreg_lsb_1): Turn into an inline wrapper around subreg_size_lsb. + * rtlanal.c (subreg_lsb_1): Delete. + (subreg_size_lsb): New function. + * simplify-rtx.c: Include rtx-vector-builder.h + (simplify_immed_subreg): Delete. + (native_encode_rtx, native_decode_vector_rtx, native_decode_rtx) + (simplify_const_vector_byte_offset, simplify_const_vector_subreg): New + functions. + (simplify_subreg): Use them. + (test_vector_subregs_modes, test_vector_subregs_repeating) + (test_vector_subregs_fore_back, test_vector_subregs_stepped) + (test_vector_subregs): New functions. + (test_vector_ops): Call test_vector_subregs for integer vector + modes with at least 2 elements. + +2019-09-19 Richard Biener <rguenther@suse.de> + + * tree-parloops.c (parloops_is_slp_reduction): Do not set + LOOP_VINFO_OPERANDS_SWAPPED. + (parloops_is_simple_reduction): Likewise. + * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Do not + initialize operands_swapped. + (_loop_vec_info::~_loop_vec_info): Do not re-canonicalize stmts. + (vect_is_slp_reduction): Do not swap operands. + * tree-vectorizer.h (_loop_vec_info::operands_swapped): Remove. + (LOOP_VINFO_OPERANDS_SWAPPED): Likewise. + +2019-09-19 Hongtao Liu <hongtao.liu@intel.com> + + PR target/87007 + * config/i386.md (*floatuns<SWI48:mode><MODEF:mode>2_avx512): + Add avx_partial_xmm_update. + +2019-09-18 Jim Wilson <jimw@sifive.com> + + PR target/91683 + * config/riscv/riscv-protos.h (riscv_split_symbol): New bool parameter. + (riscv_move_integer): Likewise. + * config/riscv/riscv.c (riscv_split_integer): Pass FALSE for new + riscv_move_integer arg. + (riscv_legitimize_move): Likewise. + (riscv_force_temporary): New parameter in_splitter. Don't call + force_reg if true. + (riscv_unspec_offset_high): Pass FALSE for new riscv_force_temporary + arg. + (riscv_add_offset): Likewise. + (riscv_split_symbol): New parameter in_splitter. Pass to + riscv_force_temporary. + (riscv_legitimize_address): Pass FALSE for new riscv_split_symbol + arg. + (riscv_move_integer): New parameter in_splitter. New local + can_create_psuedo. Don't call riscv_split_integer or force_reg when + in_splitter TRUE. + (riscv_legitimize_const_move): Pass FALSE for new riscv_move_integer, + riscv_split_symbol, and riscv_force_temporary args. + * config/riscv/riscv.md (low<mode>+1): Pass TRUE for new + riscv_move_integer arg. + (low<mode>+2): Pass TRUE for new riscv_split_symbol arg. + +2019-09-18 H.J. Lu <hongjiu.lu@intel.com> + + PR target/90878 + * config/i386/x86-tune-costs.h (skylake_cost): Restore SImode + hard register store cost to 6. + +2019-09-18 H.J. Lu <hongjiu.lu@intel.com> + + PR target/91446 + * config/i386/x86-tune-costs.h (skylake_cost): Increase SImode + pseudo register store cost from 3 to 6 to make it the same as + QImode and HImode. + +2019-09-18 Wilco Dijkstra <wdijkstr@arm.com> + + PR target/91738 + * config/arm/arm.md (<logical_op>di3): Expand explicitly. + (one_cmpldi2): Likewise. + * config/arm/arm.c (const_ok_for_dimode_op): Return true if one + of the constant parts is simple. + * config/arm/iterators.md (LOGICAL): Add new code iterator. + (logical_op): Add new code attribute. + (logical_OP): Likewise. + * config/arm/predicates.md (arm_anddi_operand): Add predicate. + (arm_iordi_operand): Add predicate. + (arm_xordi_operand): Add predicate. + +2019-09-18 Wilco Dijkstra <wdijkstr@arm.com> + + * config/arm/arm.md (maddsidi4): Remove expander. + (mulsidi3adddi): Remove pattern. + (mulsidi3adddi_v6): Likewise. + (mulsidi3_nov6): Likewise. + (mulsidi3_v6): Likewise. + (umulsidi3): Remove expander. + (umulsidi3_nov6): Remove pattern. + (umulsidi3_v6): Likewise. + (umulsidi3adddi): Likewise. + (umulsidi3adddi_v6): Likewise. + (<Us>mulsidi3): Add combined expander. + (<Us>maddsidi4): Likewise. + (<US>mull): Add combined umull and smull pattern. + (<US>mlal): Likewise. + * config/arm/iterators.md (Us): Add new iterator. + +2019-09-18 Richard Biener <rguenther@suse.de> + + * tree-vect-loop.c (vect_is_simple_reduction): Remove operand + swapping. + (vectorize_fold_left_reduction): Remove assert. + (vectorizable_reduction): Also expect COND_EXPR non-reduction + operand in position 2. Remove assert. + +2019-09-18 Wilco Dijkstra <wdijkstr@arm.com> + + * config/arm/arm.md (smulsi3_highpart): Use <US> and <SE> iterators. + (smulsi3_highpart_nov6): Remove pattern. + (smulsi3_highpart_v6): Likewise. + (umulsi3_highpart): Likewise. + (umulsi3_highpart_nov6): Likewise. + (umulsi3_highpart_v6): Likewise. + (<US>mull_high): Add new combined multiply pattern. + +2019-09-18 Wilco Dijkstra <wdijkstr@arm.com> + + * config/arm/arm.md (arm_mulsi3): Remove pattern. + (arm_mulsi3_v6): Likewise. + (mulsi3addsi_v6): Likewise. + (mulsi3subsi): Likewise. + (mul): Add new multiply pattern. + (mla): Likewise. + (mls): Likewise. + +2019-09-18 Richard Biener <rguenther@suse.de> + + * tree-parloops.c (report_ploop_op): Copy from report_vect_op. + (parloops_valid_reduction_input_p): Copy from + valid_reduction_input_p. + (parloops_is_slp_reduction): Copy from vect_is_slp_reduction. + (parloops_needs_fold_left_reduction_p): Copy from + needs_fold_left_reduction_p. + (parloops_is_simple_reduction): Copy from + vect_is_simple_reduction. + (parloops_force_simple_reduction): Copy from + vect_force_simple_reduction. + (gather_scalar_reductions): Adjust. + * tree-vect-loop.c (vect_force_simple_reduction): Make static. + * tree-vectorizer.h (vect_force_simple_reduction): Remove. + +2019-09-18 Richard Biener <rguenther@suse.de> + + * tree-vectorizer.h (get_initial_def_for_reduction): Remove. + * tree-vect-loop.c (get_initial_def_for_reduction): Make + static. + (vect_create_epilog_for_reduction): Remove dead code. + +2019-09-18 Richard Sandiford <richard.sandiford@arm.com> + + * varasm.c (assemble_real): Generate canonical const_ints. + +2019-09-18 Richard Biener <rguenther@suse.de> + + PR lto/91763 + * lto-streamer-in.c (input_eh_regions): Move EH init to + lto_materialize_function. + * tree-streamer-in.c (lto_input_ts_function_decl_tree_pointers): + Likewise. + +2019-09-18 Richard Sandiford <richard.sandiford@arm.com> + + * tree-ssa-ccp.c (get_value_for_expr): Check whether CONSTANTs + are INTEGER_CSTs. + +2019-09-18 Richard Sandiford <richard.sandiford@arm.com> + + * gimplify.c (gimplify_decl_expr): Use poly_int_tree_p instead + of checking specifically for INTEGER_CST. + +2019-09-18 Richard Sandiford <richard.sandiford@arm.com> + + * stor-layout.c (compute_record_mode): Operate on poly_uint64 + sizes instead of uhwi sizes. + +2019-09-18 Richard Sandiford <richard.sandiford@arm.com> + + * dwarf2out.c (loc_list_from_tree_1): Handle POLY_INT_CST. + (add_const_value_attribute): Handle CONST_POLY_INT. + +2019-09-18 Martin Liska <mliska@suse.cz> + + * dbgcnt.def (store_merging): New counter. + * gimple-ssa-store-merging.c (imm_store_chain_info::output_merged_stores): + Use it in store merging. + +2019-09-17 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/aarch64.c (aarch64_sched_variable_issue): New + function. + (TARGET_SCHED_VARIABLE_ISSUE): New macro. + * config/arm/arm.c (arm_sched_variable_issue): New function. + (TARGET_SCHED_VARIABLE_ISSUE): New macro. + +2019-09-17 Richard Sandiford <richard.sandiford@arm.com> + + * config/arm/types.md (no_reservation): New reservation. + * config/aarch64/falkor.md (falkor_other_0_nothing): Don't handle + no_insn here. + * config/aarch64/saphira.md (saphira_other_0_nothing): Likewise. + * config/aarch64/thunderx2t99.md (thunderx2t99_nothing): Likewise. + * config/aarch64/tsv110.md (tsv110_alu): Likewise. + * config/arm/arm1020e.md (1020alu_op): Likewise. + * config/arm/arm1026ejs.md (alu_op): Likewise. + * config/arm/arm1136jfs.md (11_alu_op): Likewise. + * config/arm/arm926ejs.md (9_alu_op): Likewise. + * config/arm/cortex-a15.md (cortex_a15_alu): Likewise. + * config/arm/cortex-a17.md (cortex_a17_alu): Likewise. + * config/arm/cortex-a5.md (cortex_a5_alu): Likewise. + * config/arm/cortex-a53.md (cortex_a53_alu): Likewise. + * config/arm/cortex-a57.md (cortex_a57_alu): Likewise. + * config/arm/cortex-a7.md (cortex_a7_alu_shift): Likewise. + * config/arm/cortex-a8.md (cortex_a8_alu): Likewise. + * config/arm/cortex-a9.md (cortex_a9_dp): Likewise. + * config/arm/cortex-m4.md (cortex_m4_alu): Likewise. + * config/arm/cortex-m7.md (cortex_m7_alu_simple): Likewise. + * config/arm/cortex-r4.md (cortex_r4_alu_shift_reg): Likewise. + * config/arm/fa526.md (526_alu_op): Likewise. + * config/arm/fa606te.md (606te_alu_op): Likewise. + * config/arm/fa626te.md (626te_alu_op): Likewise. + * config/arm/fa726te.md (726te_alu_op): Likewise. + * config/arm/xgene1.md (xgene1_nop): Likewise. + +2019-09-17 Richard Sandiford <richard.sandiford@arm.com> + + * config/arm/thumb1.md (*thumb1_tablejump): Change type from + "no_insn" to "branch". + +2019-09-17 Richard Sandiford <richard.sandiford@arm.com> + + * array-traits.h (array_traits<T[N]>::size): Remove parameter name. + +2019-09-17 Richard Biener <rguenther@suse.de> + + PR debug/91772 + * dwarf2out.c (dwarf2out_late_global_decl): If early dwarf + was missing generate locations only once. + +2019-09-17 Feng Xue <fxue@os.amperecomputing.com> + + PR ipa/91089 + * doc/invoke.texi (ipa-max-switch-predicate-bounds): Document new + option. + * params.def (PARAM_IPA_MAX_SWITCH_PREDICATE_BOUNDS): New. + * ipa-fnsummary.c (set_switch_stmt_execution_predicate): Add predicate + for switch default case using range analysis information. + +2019-09-17 Christophe Lyon <christophe.lyon@linaro.org> + + PR target/91749 + * config/arm/arm.c (arm_valid_target_attribute_rec): Make sure the + mode attributed is supported by FDPIC. + +2019-09-17 Richard Biener <rguenther@suse.de> + + PR tree-optimization/91790 + * tree-vect-stmts.c (vectorizable_load): For BB vectorization + use the correct DR for setting up realignment. + +2019-09-16 Uroš Bizjak <ubizjak@gmail.com> + + PR target/91719 + * config/i386/i386.h (TARGET_USE_XCHG_FOR_ATOMIC_STORE): New macro. + * config/i386/x86-tune.def (X86_TUNE_USE_XCHG_FOR_ATOMIC_STORE): New. + * config/i386/sync.md (atomic_store<mode>): emit XCHG for + TARGET_USE_XCHG_FOR_ATOMIC_STORE. + +2019-09-16 Jason Merrill <jason@redhat.com> + + * Makefile.in (build/genmatch.o): Depend on $(CPPLIB_H). + +2019-09-16 Martin Liska <mliska@suse.cz> + + * gimple-fold.c (or_comparisons_1): Remove rules moved + to ... + * match.pd: ... here. + +2019-09-16 Martin Liska <mliska@suse.cz> + + * gimple-fold.c (or_comparisons_1): Remove rules + moved to ... + * match.pd: ... here. + +2019-09-16 Martin Liska <mliska@suse.cz> + + * genmatch.c (dt_node::append_simplify): Do not print + warning when we have duplicate patterns belonging + to a same simplify rule. + * gimple-fold.c (and_comparisons_1): Remove matching moved to match.pd. + (maybe_fold_comparisons_from_match_pd): Handle + tcc_comparison as a results. + * match.pd: Handle (X == CST1) && (X OP2 CST2) conditions. + +2019-09-16 Li Jia He <helijia@linux.ibm.com> + Qi Feng <ffengqi@linux.ibm.com> + + PR middle-end/88784 + * match.pd (x > y && x != XXX_MIN): Optimize into 'x > y'. + (x > y && x == XXX_MIN): Optimize into 'false'. + (x <= y && x == XXX_MIN): Optimize into 'x == XXX_MIN'. + (x < y && x != XXX_MAX): Optimize into 'x < y'. + (x < y && x == XXX_MAX): Optimize into 'false'. + (x >= y && x == XXX_MAX): Optimize into 'x == XXX_MAX'. + (x > y || x != XXX_MIN): Optimize into 'x != XXX_MIN'. + (x <= y || x != XXX_MIN): Optimize into 'true'. + (x <= y || x == XXX_MIN): Optimize into 'x <= y'. + (x < y || x != XXX_MAX): Optimize into 'x != XXX_MAX'. + (x >= y || x != XXX_MAX): Optimize into 'true'. + (x >= y || x == XXX_MAX): Optimize into 'x >= y'. + +2019-09-16 Li Jia He <helijia@linux.ibm.com> + Martin Liska <mliska@suse.cz> + + * gimple-fold.c (and_comparisons_1): Add type as first + argument. + (and_var_with_comparison): Likewise. + (and_var_with_comparison_1): Likewise. + (or_comparisons_1): Likewise. + (or_var_with_comparison): Likewise. + (or_var_with_comparison_1): Likewise. + (maybe_fold_and_comparisons): Call maybe_fold_comparisons_from_match_pd. + (maybe_fold_or_comparisons): Likewise. + (maybe_fold_comparisons_from_match_pd): New. + * gimple-fold.h (maybe_fold_and_comparisons): Add type argument. + (maybe_fold_or_comparisons): Likewise. + * gimple.c (gimple_size): Make it public and add num_ops argument. + (gimple_init): New function. + (gimple_alloc): Call gimple_init. + * gimple.h (gimple_size): New. + (gimple_init): Likewise. + * tree-if-conv.c (fold_or_predicates): Pass type. + * tree-ssa-ifcombine.c (ifcombine_ifandif): Likewise. + * tree-ssa-reassoc.c (eliminate_redundant_comparison): Likewise. + (optimize_vec_cond_expr): Likewise. + (ovce_extract_ops): Return type of conditional expression. + * tree-ssanames.c (init_ssa_name_imm_use): New. + (make_ssa_name_fn): Use init_ssa_name_imm_use. + * tree-ssanames.h (init_ssa_name_imm_use): New. + +2019-09-16 Richard Biener <rguenther@suse.de> + + PR tree-optimization/91756 + PR tree-optimization/87132 + * tree-ssa-alias.h (enum translate_flags): New. + (get_continuation_for_phi): Use it instead of simple bool flag. + (walk_non_aliased_vuses): Likewise. + * tree-ssa-alias.c (maybe_skip_until): Adjust. + (get_continuation_for_phi): When looking across backedges only + disallow valueization. + (walk_non_aliased_vuses): Adjust. + * tree-ssa-sccvn.c (vn_reference_lookup_3): Avoid valueization + if requested. + +2019-09-14 Kewen Lin <linkw@gcc.gnu.org> + + PR middle-end/80791 + * config/rs6000/rs6000.c (TARGET_HAVE_COUNT_REG_DECR_P): New macro. + (TARGET_DOLOOP_COST_FOR_GENERIC): Likewise. + (TARGET_DOLOOP_COST_FOR_ADDRESS): Likewise. + * target.def (have_count_reg_decr_p): New hook. + (doloop_cost_for_generic): Likewise. + (doloop_cost_for_address): Likewise. + * doc/tm.texi.in (TARGET_HAVE_COUNT_REG_DECR_P): Likewise. + (TARGET_DOLOOP_COST_FOR_GENERIC): Likewise. + (TARGET_DOLOOP_COST_FOR_ADDRESS): Likewise. + * doc/tm.texi: Regenerate. + * tree-ssa-loop-ivopts.c (comp_cost::operator+=): Consider infinite cost + addend. + (record_group): Init doloop_p. + (add_candidate_1): Add optional argument doloop, change the handlings + accordingly. + (add_candidate): Likewise. + (generic_predict_doloop_p): Update attribute. + (force_expr_to_var_cost): Add costing for expressions COND_EXPR/LT_EXPR/ + LE_EXPR/GT_EXPR/GE_EXPR/EQ_EXPR/NE_EXPR/UNORDERED_EXPR/ORDERED_EXPR/ + UNLT_EXPR/UNLE_EXPR/UNGT_EXPR/UNGE_EXPR/UNEQ_EXPR/LTGT_EXPR/MAX_EXPR/ + MIN_EXPR. + (get_computation_cost): Update for doloop IV cand extra cost. + (determine_group_iv_cost_cond): Update for doloop IV cand. + (determine_iv_cost): Likewise. + (ivopts_estimate_reg_pressure): Likewise. + (may_eliminate_iv): Update handlings for doloop IV cand. + (add_iv_candidate_for_doloop): New function. + (find_iv_candidates): Call function add_iv_candidate_for_doloop. + (iv_ca_set_no_cp): Update for doloop IV cand. + (iv_ca_set_cp): Likewise. + (iv_ca_dump): Dump register cost. + (find_doloop_use): New function. + (analyze_and_mark_doloop_use): Likewise. + (tree_ssa_iv_optimize_loop): Call function analyze_and_mark_doloop_use. + +2019-09-13 Bernd Edlinger <bernd.edlinger@hotmail.de> + + PR middle-end/91708 + * cse.c (cse_insn): Do not replace anything with a + MEM. + +2019-09-13 Ian Lance Taylor <iant@golang.org> + + * doc/invoke.texi (Optimize Options): Fix typo. + +2019-09-12 Uroš Bizjak <ubizjak@gmail.com> + + PR tree-optimization/89386 + * config/i386/sse.md (smulhrs<mode>3): New expander. + (smulhrsv4hi3): Ditto. + +2019-09-12 Richard Biener <rguenther@suse.de> + + PR tree-optimization/91750 + * tree-vect-loop.c (vectorizable_induction): Compute IV increments + in the type of the evolution. + +2019-09-12 Yuliang Wang <yuliang.wang@arm.com> + + PR tree-optimization/89386 + * config/aarch64/aarch64-sve2.md (<su>mull<bt><Vwide>) + (<r>shrnb<mode>, <r>shrnt<mode>): New SVE2 patterns. + (<su>mulh<r>s<mode>3): New pattern for MULHRS. + * config/aarch64/iterators.md (UNSPEC_SMULLB, UNSPEC_SMULLT) + (UNSPEC_UMULLB, UNSPEC_UMULLT, UNSPEC_SHRNB, UNSPEC_SHRNT) + (UNSPEC_RSHRNB, UNSPEC_RSHRNT, UNSPEC_SMULHS, UNSPEC_SMULHRS) + UNSPEC_UMULHS, UNSPEC_UMULHRS): New unspecs. + (MULLBT, SHRNB, SHRNT, MULHRS): New int iterators. + (su, r): Handle the unspecs above. + (bt): New int attribute. + * internal-fn.def (IFN_MULHS, IFN_MULHRS): New internal functions. + * internal-fn.c (first_commutative_argument): Commutativity info for + above. + * optabs.def (smulhs_optab, smulhrs_optab, umulhs_optab) + (umulhrs_optab): New optabs. + * doc/md.texi (smulhs$var{m3}, umulhs$var{m3}) + (smulhrs$var{m3}, umulhrs$var{m3}): Documentation for the above. + * tree-vect-patterns.c (vect_recog_mulhs_pattern): New pattern + function. + (vect_vect_recog_func_ptrs): Add it. + +2019-09-11 Michael Meissner <meissner@linux.ibm.com> + + * config/rs6000/predicates.md (non_add_cint_operand): Simplify the + code. + +2019-09-11 Nathan Sidwell <nathan@acm.org> + + * tree.h (MARK_TS_TYPE_NON_COMMON): New. + * tree.c (tree_node_structure_for_code): Reformat and alphabetize. + +2019-09-11 Richard Biener <rguenther@suse.de> + + * lto-opts.c (lto_write_options): Stream -g when debug is enabled. + * lto-wrapper.c (merge_and_complain): Pick up -g. + (append_compiler_options): Likewise. + (run_gcc): Re-instantiate handling -g0 at link-time. + * doc/invoke.texi (flto): Document debug info generation. + +2019-09-11 Richard Biener <rguenther@suse.de> + + PR tree-optimization/90387 + * vr-values.c (vr_values::extract_range_basic): After inlining + simplify non-constant __builtin_constant_p to false. + +2019-09-11 Eric Botcazou <ebotcazou@adacore.com> + + PR rtl-optimization/89795 + * rtlanal.c (nonzero_bits1) <SUBREG>: Do not propagate results from + inner REGs to paradoxical SUBREGs if WORD_REGISTER_OPERATIONS is set. + +2019-09-11 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/91723 + * tree-vect-stmts.c (vectorizable_call): Use types_compatible_p check + instead of pointer equality when checking if argument vectypes are + the same. + + PR middle-end/91725 + * match.pd ((A / (1 << B)) -> (A >> B)): Call tree_nonzero_bits instead + of get_nonzero_bits, only call it for integral types. + +2019-09-11 Richard Biener <rguenther@suse.de> + + Revert + 2019-09-09 Barnaby Wilks <barnaby.wilks@arm.com> + + * match.pd: Add flag_unsafe_math_optimizations check + before deciding on the widest type in a binary math operation. + +2019-09-10 Richard Sandiford <richard.sandiford@arm.com> + + * doc/tm.texi.in: Document that exactly one of CALL_USED_REGISTERS + and CALL_REALLY_USED_REGISTERS must be defined, and that + CALL_REALLY_USED_REGISTERS is preferred. + * doc/tm.texi: Regenerate. + * hard-reg-set.h (target_hard_regs::x_call_really_used_regs): Delete. + (call_really_used_regs): Likewise. + * reginfo.c: Raise an #error if both CALL_USED_REGISTERS and + CALL_REALLY_USED_REGISTERS are defined. + (initial_call_used_regs): Use CALL_REALLY_USED_REGISTERS as the + initial value if defined. + (initial_call_really_used_regs): Delete. + (saved_call_really_used_regs): Likewise. + (CALL_REALLY_USED_REGNO_P): Likewise. + (init_reg_sets): Remove handling of call_really_used_regs. + (save_register_info, restore_register_info, globalize_reg): Likewise. + (init_reg_sets_1): Likewise. Use call_used_regs instead of + CALL_REALLY_USED_REGNO_P. Don't set call_used_regs for registers + outside operand_reg_set. + (fix_register): Don't change call_used_regs if + CALL_REALLY_USED_REGISTERS is defined. + * config/csky/csky.h (CALL_USED_REGISTERS): Delete. + * config/csky/csky.c (get_csky_live_regs): Use call_used_regs + instead of call_really_used_regs. + (csky_conditional_register_usage): Remove the old handling of + call_used_regs and change the handling of call_really_used_regs + to use call_used_regs instead. + * config/ia64/ia64.h (CALL_USED_REGISTERS): Delete. + * config/ia64/ia64.c (fix_range): Don't set call_used_regs when + making a register fixed. + * config/m32r/m32r.h (CALL_USED_REGISTERS): Delete. + * config/m32r/m32r.c (MUST_SAVE_REGISTER): Use call_used_regs + instead of call_really_used_regs. + (m32r_conditional_register_usage): Don't set call_used_regs when + making a register fixed. + * config/mips/mips.h (CALL_USED_REGISTERS): Delete. + * config/mips/mips.c (mips_global_pointer): Use call_used_regs + instead of call_really_used_regs. + (mips_interrupt_extra_call_saved_reg_p): Likewise. + (mips_cfun_call_saved_reg_p): Likewise. + (mips_swap_registers): Remove the old handling of call_used_regs + and change the handling of call_really_used_regs to use call_used_regs + instead. + (mips_conditional_register_usage): Likewise. + * config/mn10300/mn10300.h (CALL_USED_REGISTERS): Delete. + * config/mn10300/mn10300.c (fp_regs_to_save): Use call_used_regs + instead of call_really_used_regs. + (mn10300_get_live_callee_saved_regs): Likewise. + (mn10300_expand_prologue, mn10300_expand_epilogue): Likewise. + (mn10300_conditional_register_usage): Don't set call_used_regs when + making a register fixed. + * config/rs6000/rs6000.h (CALL_USED_REGISTERS): Delete. + * config/rs6000/rs6000.c (rs6000_conditional_register_usage): + Remove the old handling of call_used_regs and change the handling + of call_really_used_regs to use call_used_regs instead. + * config/s390/s390.h (CALL_USED_REGISTERS): Delete. + * config/s390/s390.c (s390_regs_ever_clobbered): Use call_used_regs + instead of call_really_used_regs. + (s390_register_info_gprtofpr, s390_register_info): Likewise. + (s390_hard_regno_rename_ok, s390_hard_regno_scratch_ok): Likewise. + (s390_emit_prologue, s300_set_up_by_prologue): Likewise. + (s390_can_use_return_insn, s390_optimize_prologue): Likewise. + (s390_conditional_register_usage): Remove the old handling of + call_used_regs and change the handling of call_really_used_regs + to use call_used_regs instead. + * config/sh/sh.h (CALL_USED_REGISTERS): Delete. + * config/sh/sh.c (output_stack_adjust, calc_live_regs): Likewise. + (sh_fix_range, reg_unused_after): Likewise. + (sh_conditional_register_usage): Remove the old handling of + call_used_regs and change the handling of call_really_used_regs + to use call_used_regs instead. + * config/sparc/sparc.h (CALL_USED_REGISTERS): Delete. + * config/sparc/sparc.c (sparc_conditional_register_usage): Don't set + call_used_regs when making a register fixed. + * config/tilegx/tilegx.h (CALL_USED_REGISTERS): Delete. + * config/tilegx/tilegx.c (tilegx_conditional_register_usage): Don't set + call_used_regs when making a register fixed. + * config/tilepro/tilepro.h (CALL_USED_REGISTERS): Delete. + * config/tilepro/tilepro.c (tilepro_conditional_register_usage): Don't + set call_used_regs when making a register fixed. + * config/visium/visium.h (CALL_USED_REGISTERS): Delete. + * config/visium/visium.c (visium_conditional_register_usage): Remove + the old handling of call_used_regs and change the handling of + call_really_used_regs to use call_used_regs instead. + +2019-09-10 Richard Sandiford <richard.sandiford@arm.com> + + * hard-reg-set.h (call_used_regs): Only define if IN_TARGET_CODE. + (call_used_or_fixed_reg_p): Expand definition of call_used_regs. + * reginfo.c (call_used_regs): New macro. + +2019-09-10 Richard Sandiford <richard.sandiford@arm.com> + + * config/alpha/alpha.c (alpha_compute_frame_layout): Remove redundant + fixed_regs test. + * config/bpf/bpf.c (bpf_compute_frame_layout, bpf_expand_prologue) + (bpf_expand_epilogue): Likewise. + * config/c6x/c6x.c (c6x_save_reg): Likewise. + * config/ft32/ft32.c (ft32_expand_prologue): Likewise. + (ft32_expand_epilogue): Likewise. + * config/i386/i386.c (ix86_save_reg): Likewise. + * config/moxie/moxie.c (moxie_expand_prologue): Likewise. + (moxie_expand_epilogue): Likewise. + * config/tilegx/tilegx.c (need_to_save_reg): Likewise. + * config/tilepro/tilepro.c (need_to_save_reg): Likewise. + * config/xtensa/xtensa.c (xtensa_call_save_reg): Likewise. + +2019-09-10 Richard Sandiford <richard.sandiford@arm.com> + + * hard-reg-set.h (call_used_or_fixed_reg_p): New macro. + * cfgloopanal.c (init_set_costs): Use call_used_or_fixed_reg_p + instead of testing call_used_regs directly. + * config/aarch64/aarch64.c (aarch64_layout_frame): Likewise. + (aarch64_components_for_bb): Likewise. + * config/alpha/alpha.c (alpha_compute_frame_layout): Likewise. + * config/arc/arc.c (arc_must_save_register): Likewise. + (arc_epilogue_uses): Likewise. + * config/arm/arm.c (arm_option_override, use_return_insn): Likewise. + (legitimize_pic_address, callee_saved_reg_p): Likewise. + (arm_compute_save_reg0_reg12_mask): Likewise. + (arm_compute_save_core_reg_mask): Likewise. + (arm_get_vfp_saved_size, arm_compute_frame_layout): Likewise. + (arm_save_coproc_regs, thumb1_extra_regs_pushed): Likewise. + (cmse_nonsecure_entry_clear_before_return): Likewise. + (thumb1_expand_epilogue, arm_expand_epilogue_apcs_frame): Likewise. + (arm_expand_epilogue): Likewise. + * config/avr/avr.c (avr_regs_to_save, sequent_regs_live): Likewise. + (avr_function_arg_advance, avr_find_unused_d_reg): Likewise. + (_reg_unused_after): Likewise. + * config/bfin/bfin.c (must_save_p, expand_prologue_reg_save): Likewise. + (expand_epilogue_reg_restore, n_regs_saved_by_prologue): Likewise. + (add_to_reg, hwloop_optimize): Likewise. + * config/bpf/bpf.c (bpf_compute_frame_layout, bpf_expand_prologue) + (bpf_expand_epilogue): Likewise. + * config/c6x/c6x.c (c6x_save_reg, c6x_regno_reg_class): Likewise. + * config/cr16/cr16.c (cr16_compute_save_regs): Likewise. + * config/cris/cris.c (cris_reg_saved_in_regsave_area): Likewise. + * config/epiphany/epiphany.c (epiphany_init_reg_tables): Likewise. + (epiphany_compute_function_type, MUST_SAVE_REGISTER): Likewise. + (epiphany_output_mi_thunk, epiphany_start_function): Likewise. + * config/fr30/fr30.c (fr30_num_arg_regs): Likewise. + * config/frv/frv.c (frv_stack_info): Likewise. + * config/ft32/ft32.c (ft32_compute_frame): Likewise. + (ft32_expand_prologue, ft32_expand_epilogue): Likewise. + * config/gcn/gcn.c (gcn_compute_frame_offsets): Likewise. + (move_callee_saved_registers): Likewise. + * config/h8300/h8300.c (byte_reg): Likewise. + * config/i386/i386-options.c (ix86_set_current_function): Likewise. + * config/i386/i386.c (ix86_save_reg, ix86_expand_prologue): Likewise. + (ix86_expand_epilogue, x86_order_regs_for_local_alloc): Likewise. + * config/i386/predicates.md (sibcall_memory_operand): Likewise. + * config/ia64/ia64.c (emit_safe_across_calls, find_gr_spill): Likewise. + (next_scratch_gr_reg, ia64_compute_frame_size): Likewise. + * config/iq2000/iq2000.h (MUST_SAVE_REGISTER): Likewise. + * config/lm32/lm32.c (lm32_compute_frame_size): Likewise. + * config/m32c/m32c.c (need_to_save): Likewise. + * config/m68k/m68k.c (m68k_save_reg): Likewise. + * config/mcore/mcore.c (calc_live_regs): Likewise. + * config/microblaze/microblaze.c (microblaze_must_save_register): + Likewise. + * config/mmix/mmix.c (mmix_local_regno): Likewise. + (mmix_initial_elimination_offset, mmix_reorg): Likewise. + (mmix_use_simple_return, mmix_expand_prologue): Likewise. + (mmix_expand_epilogue): Likewise. + * config/moxie/moxie.c (moxie_compute_frame): Likewise. + (moxie_expand_prologue, moxie_expand_epilogue): Likewise. + * config/msp430/msp430.c (msp430_preserve_reg_p): Likewise. + * config/nds32/nds32.h (nds32_16bit_address_type): Likewise. + (NDS32_REQUIRED_CALLEE_SAVED_P): Likewise. + * config/nios2/nios2.c (prologue_saved_reg_p): Likewise. + * config/or1k/or1k.c (callee_saved_regno_p): Likewise. + * config/pa/pa.c (pa_expand_prologue, pa_expand_epilogue): Likewise. + * config/pdp11/pdp11.c (pdp11_saved_regno): Likewise. + * config/pru/pru.c (prologue_saved_reg_p): Likewise. + * config/riscv/riscv.c (riscv_save_reg_p): Likewise. + (riscv_epilogue_uses, riscv_hard_regno_mode_ok): Likewise. + * config/rl78/rl78.c (need_to_save): Likewise. + * config/rs6000/rs6000-logue.c (save_reg_p): Likewise. + (rs6000_stack_info, generate_set_vrsave): Likewise. + (rs6000_emit_prologue, rs6000_emit_epilogue): Likewise. + * config/rs6000/rs6000.c (rs6000_debug_reg_print): Likewise. + * config/rx/rx.c (rx_get_stack_layout): Likewise. + * config/s390/s390.c (s390_call_saved_register_used): Likewise. + * config/sh/sh.c (calc_live_regs, sh_output_mi_thunk): Likewise. + * config/sparc/sparc.c (save_global_or_fp_reg_p): Likewise. + (save_local_or_in_reg_p): Likewise. + * config/stormy16/stormy16.c (REG_NEEDS_SAVE): Likewise. + (xstormy16_epilogue_uses): Likewise. + * config/tilegx/tilegx.c (need_to_save_reg): Likewise. + * config/tilepro/tilepro.c (need_to_save_reg): Likewise. + * config/v850/v850.c (compute_register_save_size): Likewise. + * config/vax/vax.c (vax_expand_prologue): Likewise. + * config/visium/visium.c (visium_save_reg_p): Likewise. + * config/xtensa/xtensa.c (xtensa_call_save_reg): Likewise. + * cselib.c (cselib_process_insn): Likewise. + * df-scan.c (df_get_entry_block_def_set): Likewise. + * function.c (aggregate_value_p): Likewise. + * haifa-sched.c (alloc_global_sched_pressure_data): Likewise. + * ira-lives.c (process_bb_node_lives): Likewise. + * ira.c (do_reload): Likewise. + * lra-lives.c (process_bb_lives): Likewise. + * lra-remat.c (lra_remat): Likewise. + * lra.c (lra): Likewise. + * postreload.c (reload_combine_recognize_pattern): Likewise. + (reload_cse_move2add): Likewise. + * recog.c (peep2_find_free_register): Likewise. + * regrename.c (check_new_reg_p): Likewise. + * reload.c (find_equiv_reg): Likewise. + * reload1.c (reload, find_reg): Likewise. + * sel-sched.c (init_hard_regs_data): Likewise. + +2019-09-10 Richard Sandiford <richard.sandiford@arm.com> + + * config/frv/frv.c (frv_ifcvt_modify_tests): Use + regs_invalidated_by_call & ~fixed_reg_set instead of + call_used_or_fixed_regs & ~fixed_reg_set. + * config/sh/sh.c (output_stack_adjust): Likewise. + +2019-09-10 Richard Sandiford <richard.sandiford@arm.com> + + * hard-reg-set.h (target_hard_regs::x_call_used_reg_set): Delete. + (call_used_reg_set): Delete. + (call_used_or_fixed_regs): New macro. + * reginfo.c (init_reg_sets_1, globalize_reg): Remove initialization + of call_used_reg_set. + * caller-save.c (setup_save_areas): Use call_used_or_fixed_regs + instead of call_used_regs. + (save_call_clobbered_regs): Likewise. + * cfgcleanup.c (old_insns_match_p): Likewise. + * config/c6x/c6x.c (c6x_call_saved_register_used): Likewise. + * config/epiphany/epiphany.c (epiphany_conditional_register_usage): + Likewise. + * config/frv/frv.c (frv_ifcvt_modify_tests): Likewise. + * config/sh/sh.c (output_stack_adjust): Likewise. + * final.c (collect_fn_hard_reg_usage): Likewise. + * ira-build.c (ira_build): Likewise. + * ira-color.c (calculate_saved_nregs): Likewise. + (allocno_reload_assign, calculate_spill_cost): Likewise. + * ira-conflicts.c (ira_build_conflicts): Likewise. + * ira-costs.c (ira_tune_allocno_costs): Likewise. + * ira-lives.c (process_bb_node_lives): Likewise. + * ira.c (setup_reg_renumber): Likewise. + * lra-assigns.c (find_hard_regno_for_1, lra_assign): Likewise. + * lra-constraints.c (need_for_call_save_p): Likewise. + (need_for_split_p, inherit_in_ebb): Likewise. + * lra-lives.c (process_bb_lives): Likewise. + * lra-remat.c (call_used_input_regno_present_p): Likewise. + * postreload.c (reload_combine): Likewise. + * regrename.c (find_rename_reg): Likewise. + * reload1.c (reload_as_needed): Likewise. + * rtlanal.c (find_all_hard_reg_sets): Likewise. + * sel-sched.c (mark_unavailable_hard_regs): Likewise. + * shrink-wrap.c (requires_stack_frame_p): Likewise. + +2019-09-10 Richard Sandiford <richard.sandiford@arm.com> + + * hard-reg-set.h (target_hard_regs::x_no_caller_save_reg_set): Delete. + (no_caller_save_reg_set): Delete. + * caller-save.c (init_caller_save): Don't initialize it. + * ira-conflicts.c (ira_build_conflicts): Calculate + no_caller_save_reg_set locally from call_used_reg_set and savable_regs. + +2019-09-10 Richard Sandiford <richard.sandiford@arm.com> + + * hard-reg-set.h (target_hard_regs::x_call_fixed_reg_set): Delete. + (target_hard_regs::x_savable_regs): New field. + (call_fixed_reg_set): Delete. + (savable_regs): New macro, + * reginfo.c (globalize_reg): Don't set call_fixed_reg_set. + (init_reg_sets_1): Likewise. Initialize savable_regs. + * caller-save.c (init_caller_save): Invoke HARD_REGNO_CALLER_SAVE_MODE + for all registers. Set savable_regs instead of call_fixed_reg_set. + (setup_save_areas, save_call_clobbered_regs): Replace uses of + ~call_fixed_reg_set with ~fixed_reg_set & savable_regs. + * config/sh/sh.c (output_stack_adjust): Likewise. + +2019-09-10 Richard Sandiford <richard.sandiford@arm.com> + + * config/c6x/c6x-protos.h (c6x_set_return_address): Declare. + * config/c6x/c6x.h (REGNO_REG_CLASS): Move implementation to + * config/c6x/c6x.c (c6x_regno_reg_class): ...this new function. + +2019-09-10 Richard Sandiford <richard.sandiford@arm.com> + + * rtl.h (get_call_rtx_from): Take a const rtx_insn * instead of an rtx. + * rtlanal.c (get_call_rtx_from): Likewise. + * dwarf2out.c (dwarf2out_var_location): Pass the insn rather + than the pattern to get_call_rtx_from. + * config/i386/i386-expand.h (ix86_notrack_prefixed_insn_p): Take + an rtx_insn * instead of an rtx. + * config/i386/i386-expand.c (ix86_notrack_prefixed_insn_p): Likewise. + +2019-09-10 Martin Liska <mliska@suse.cz> + + * common.opt: Use newly added WarnRemoved. + * config/aarch64/aarch64.opt: Likewise. + * config/arm/arm.opt: Likewise. + * config/i386/i386.opt: Likewise. + * config/ia64/ia64.opt: Likewise. + * config/rs6000/rs6000.opt: Likewise. + * doc/options.texi: Document WarnRemoved properly. + * dwarf2out.c (gen_producer_string): Handle renamed + OPT_SPECIAL_warn_removed. + * lto-opts.c (lto_write_options): Likewise. + * lto-wrapper.c (merge_and_complain): Likewise. + * opts-common.c (decode_cmdline_option): Likewise. + (prune_options): Likewise. + (read_cmdline_option): Likewise. + (control_warning_option): Likewise. + * opts.c (print_filtered_help): Likewise. + * optc-gen.awk: Parse for WarnRemoved and make usage + of Deprecated an error. + * opth-gen.awk: Generate new OPT_SPECIAL_warn_removed. + +2019-09-10 Arnaud Charlet <charlet@adacore.com> + + * doc/install.texi: Fix syntax for html generation. + +2019-09-10 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/91680 + * match.pd ((A / (1 << B)) -> (A >> B)): Allow widening cast from + the shift type to type. + +2019-09-10 Christophe Lyon <christophe.lyon@st.com> + + * config/arm/arm.md (stack_protect_combined_set_insn): Handle + FDPIC mode. + (stack_protect_combined_test_insn): Likewise. + +2019-09-10 Christophe Lyon <christophe.lyon@st.com> + Mickaël Guêné <mickael.guene@st.com> + + * config/arm/arm.c (arm_load_tp): Add FDPIC support. + * config/arm/arm.md (FDPIC_REGNUM): New constant. + (load_tp_soft_fdpic): New pattern. + (load_tp_soft): Disable in FDPIC mode. + +2019-09-10 Christophe Lyon <christophe.lyon@st.com> + Mickaël Guêné <mickael.guene@st.com> + + * config/arm/arm.c (tls_reloc): Add TLS_GD32_FDPIC, + TLS_LDM32_FDPIC and TLS_IE32_FDPIC. + (arm_call_tls_get_addr): Add FDPIC support. + (legitimize_tls_address): Likewise. + (arm_emit_tls_decoration): Likewise. + +2019-09-10 Christophe Lyon <christophe.lyon@st.com> + Mickaël Guêné <mickael.guene@st.com> + + * config/arm/arm.c (arm_asm_trampoline_template): Add FDPIC + support. + (arm_trampoline_init): Likewise. + (arm_trampoline_adjust_address): Likewise. + * config/arm/arm.h (TRAMPOLINE_SIZE): Likewise. + +2019-09-10 Christophe Lyon <christophe.lyon@st.com> + Mickaël Guêné <mickael.guene@st.com> + + * config/arm/arm.c (arm_fdpic_local_funcdesc_p): New function. + (legitimize_pic_address): Enforce binding rules on function + pointers in FDPIC mode. + (arm_assemble_integer): Likewise. + +2019-09-10 Christophe Lyon <christophe.lyon@st.com> + Mickaël Guêné <mickael.guene@st.com> + + * config/arm/arm.h (PIC_REGISTER_MAY_NEED_SAVING): New helper. + * config/arm/arm.c (arm_compute_save_reg0_reg12_mask): Handle + FDPIC. + +2019-09-10 Christophe Lyon <christophe.lyon@st.com> + Mickaël Guêné <mickael.guene@st.com> + + * ginclude/unwind-arm-common.h (unwinder_cache): Add reserved5 + field. + +2019-09-10 Christophe Lyon <christophe.lyon@st.com> + Mickaël Guêné <mickael.guene@st.com> + + * config/arm/arm-c.c (__FDPIC__): Define new pre-processor macro + in FDPIC mode. + * config/arm/arm-protos.h (arm_load_function_descriptor): Declare + new function. + * config/arm/arm.c (arm_option_override): Define pic register to + FDPIC_REGNUM. + (arm_function_ok_for_sibcall): Disable sibcall optimization if we + have no decl or go through PLT. + (calculate_pic_address_constant): New function. + (legitimize_pic_address): Call calculate_pic_address_constant. + (arm_load_pic_register): Handle TARGET_FDPIC. + (arm_is_segment_info_known): New function. + (arm_pic_static_addr): Add support for FDPIC. + (arm_load_function_descriptor): New function. + (arm_emit_call_insn): Add support for FDPIC. + (arm_assemble_integer): Add support for FDPIC. + * config/arm/arm.h (PIC_OFFSET_TABLE_REG_CALL_CLOBBERED): + Define. (FDPIC_REGNUM): New define. + * config/arm/arm.md (call): Add support for FDPIC. + (call_value): Likewise. + (restore_pic_register_after_call): New pattern. + (untyped_call): Disable if FDPIC. + (untyped_return): Likewise. + * config/arm/unspecs.md (UNSPEC_PIC_RESTORE): New. + +2019-09-10 Christophe Lyon <christophe.lyon@st.com> + Mickaël Guêné <mickael.guene@st.com> + + * config.gcc: Handle arm*-*-uclinuxfdpiceabi. + * config/arm/bpabi.h (TARGET_FDPIC_ASM_SPEC): New. + (SUBTARGET_EXTRA_ASM_SPEC): Use TARGET_FDPIC_ASM_SPEC. + * config/arm/linux-eabi.h (FDPIC_CC1_SPEC): New. + (CC1_SPEC): Use FDPIC_CC1_SPEC. + (MUSL_DYNAMIC_LINKER): Add -fdpic suffix when needed. + * config/arm/uclinuxfdpiceabi.h: New file. + +2019-09-10 Christophe Lyon <christophe.lyon@st.com> + + * config.gcc: Handle *-*-uclinuxfdpiceabi. + +2019-09-10 Christophe Lyon <christophe.lyon@st.com> + Mickaël Guêné <mickael.guene@st.com> + + * config/arm/arm.opt: Add -mfdpic option. + * doc/invoke.texi: Add documentation for -mfdpic. + +2019-09-09 Bernd Edlinger <bernd.edlinger@hotmail.de> + + * expmed.c (extract_bit_field): Update function comment + regarding alt_rtl. + * expr.c (expand_expr_real): Update function comment + regarding alt_rtl. + (expand_misaligned_mem_ref): New helper function. + (expand_expr_real_2): Use expand_misaligned_mem_ref. + Remove duplicate assignment to "base" at case MEM_REF. + Remove a shadowed variable "unsignedp" at case VCE. + +2019-09-09 Richard Sandiford <richard.sandiford@arm.com> + + * regset.h (regs_invalidated_by_call_regset): Delete. + (fixed_reg_set_regset): Likewise. + * reginfo.c (regs_invalidated_by_call_regset): Likewise. + (fixed_reg_set_regset, persistent_obstack): Likewise. + (init_reg_sets_1, globalize_reg): Update accordingly. + * df.h (df_print_regset, df_print_word_regset): Take a const_bitmap + instead of a bitmap. + * df-core.c (df_print_regset, df_print_word_regset): Likewise. + * df-problems.c (df_rd_local_compute): Use regs_invalidated_by_call + instead of regs_invalidated_by_call_regset. + (df_lr_confluence_n, df_md_confluence_n): Likewise. + * df-scan.c (df_scan_start_dump): Likewise. + * dse.c (copy_fixed_regs): Likewise. + * config/sh/sh.c (sh_find_equiv_gbr_addr): Likewise. + +2019-09-09 Richard Sandiford <richard.sandiford@arm.com> + + * array-traits.h: New file. + * coretypes.h (array_traits, bitmap_view): New types. + * bitmap.h: Include "array-traits.h" + (bitmap_bit_p): Take a const_bitmap instead of a bitmap. + (base_bitmap_view, bitmap_view): New classes. + * bitmap.c (bitmap_bit_p): Take a const_bitmap instead of a bitmap. + * hard-reg-set.h: Include array-traits.h. + (array_traits<HARD_REG_SET>): New struct. + * regset.h (IOR_REG_SET_HRS): New macro. + * loop-iv.c (simplify_using_initial_values): Use IOR_REG_SET_HRS + rather than iterating over each hard register. + * sched-deps.c (sched_analyze_insn): Likewise. + * sel-sched-ir.c (setup_id_implicit_regs): Likewise. + +2019-09-09 Richard Sandiford <richard.sandiford@arm.com> + + * ira-int.h (ior_hard_reg_conflicts): Take a const_hard_reg_set + instead of a HARD_REG_SET *. + * ira-build.c (ior_hard_reg_conflicts): Likewise. + (ira_build): Update call accordingly. + * ira-emit.c (add_range_and_copies_from_move_list): Likewise. + +2019-09-09 Richard Sandiford <richard.sandiford@arm.com> + + * hard-reg-set.h (HARD_REG_SET::operator==): New function. + (HARD_REG_SET::operator!=): Likewise. + (hard_reg_set_equal_p): Delete. + * cfgcleanup.c (old_insns_match_p): Use == instead of + hard_reg_set_equal_p and != instead of !hard_reg_set_equal_p. + * ira-color.c (allocno_hard_regs_hasher::equal): Likewise. + (add_allocno_hard_regs_to_forest): Likewise. + (setup_allocno_available_regs_num): Likewise. + * ira.c (setup_pressure_classes): Likewise. + (setup_allocno_and_important_classes): Likewise. + (setup_reg_class_relations): Likewise. + * lra-lives.c (process_bb_lives): Likewise. + * reg-stack.c (change_stack, convert_regs_1): Likewise. + +2019-09-09 Richard Sandiford <richard.sandiford@arm.com> + + * hard-reg-set.h (IOR_COMPL_HARD_REG_SET): Delete. + * config/aarch64/cortex-a57-fma-steering.c (rename_single_chain): + Use "|~" instead of IOR_COMPL_HARD_REG_SET. + * config/aarch64/falkor-tag-collision-avoidance.c (init_unavailable): + Likewise. + * ira-build.c (ira_create_object, ira_set_allocno_class): Likewise. + * ira.c (setup_reg_renumber): Likewise. + * lra-assigns.c (find_hard_regno_for_1): Likewise. + * regrename.c (regrename_find_superclass): Likewise. + * reload1.c (find_reg): Likewise. + +2019-09-09 Richard Sandiford <richard.sandiford@arm.com> + + * hard-reg-set.h (AND_COMPL_HARD_REG_SET): Delete. + * caller-save.c (setup_save_areas): Use "&~" instead of + AND_COMPL_HARD_REG_SET. + (save_call_clobbered_regs): Likewise. + * config/epiphany/epiphany.c (epiphany_conditional_register_usage): + Likewise. + * config/frv/frv.c (frv_ifcvt_modify_tests): Likewise. + * config/gcn/gcn.c (gcn_md_reorg): Likewise. + * config/i386/i386.c (ix86_conditional_register_usage): Likewise. + * config/mips/mips.c (mips_class_max_nregs): Likewise. + (mips_conditional_register_usage): Likewise. + * config/sh/sh.c (output_stack_adjust): Likewise. + * ira-color.c (form_allocno_hard_regs_nodes_forest): Likewise. + (setup_profitable_hard_regs): Likewise. + (get_conflict_and_start_profitable_regs): Likewise. + * ira-conflicts.c (print_allocno_conflicts): Likewise. + (ira_build_conflicts): Likewise. + * ira-costs.c (restrict_cost_classes): Likewise. + (setup_regno_cost_classes_by_aclass): Likewise. + * ira-lives.c (process_bb_node_lives): Likewise. + * ira.c (setup_class_hard_regs, setup_reg_subclasses): Likewise. + (setup_class_subset_and_memory_move_costs, setup_pressure_classes) + (setup_allocno_and_important_classes, setup_class_translate_array) + (setup_reg_class_relations, setup_prohibited_class_mode_regs): + Likewise. + * lra-assigns.c (find_hard_regno_for_1): Likewise. + * lra-constraints.c (prohibited_class_reg_set_mode_p): Likewise. + (process_alt_operands, inherit_in_ebb): Likewise. + * lra-eliminations.c (update_reg_eliminate): Likewise. + * lra-lives.c (process_bb_lives): Likewise. + * reload1.c (update_eliminables_and_spill, reload_as_needed): Likewise. + * resource.c (find_dead_or_set_registers): Likewise. + (mark_target_live_regs): Likewise. + * sched-deps.c (get_implicit_reg_pending_clobbers): Likewise. + * sel-sched.c (mark_unavailable_hard_regs): Likewise. + (implicit_clobber_conflict_p): Likewise. + * shrink-wrap.c (requires_stack_frame_p): Likewise. + (try_shrink_wrapping): Likewise. + +2019-09-09 Richard Sandiford <richard.sandiford@arm.com> + + * hard-reg-set.h (HARD_REG_SET::operator|): New function. + (HARD_REG_SET::operator|=): Likewise. + (IOR_HARD_REG_SET): Delete. + * config/gcn/gcn.c (gcn_md_reorg): Use "|" instead of + IOR_HARD_REG_SET. + * config/m32c/m32c.c (m32c_register_move_cost): Likewise. + * config/s390/s390.c (s390_adjust_loop_scan_osc): Likewise. + * final.c (collect_fn_hard_reg_usage): Likewise. + * hw-doloop.c (scan_loop, optimize_loop): Likewise. + * ira-build.c (merge_hard_reg_conflicts): Likewise. + (ior_hard_reg_conflicts, create_cap_allocno, propagate_allocno_info) + (propagate_some_info_from_allocno): Likewise. + (copy_info_to_removed_store_destinations): Likewise. + * ira-color.c (add_allocno_hard_regs_to_forest, assign_hard_reg) + (allocno_reload_assign, ira_reassign_pseudos): Likewise. + (fast_allocation): Likewise. + * ira-conflicts.c (ira_build_conflicts): Likewise. + * ira-lives.c (make_object_dead, process_single_reg_class_operands) + (process_bb_node_lives): Likewise. + * ira.c (setup_pressure_classes, setup_reg_class_relations): Likewise. + * lra-assigns.c (find_hard_regno_for_1): Likewise. + (setup_live_pseudos_and_spill_after_risky_transforms): Likewise. + * lra-constraints.c (process_alt_operands, inherit_in_ebb): Likewise. + * lra-eliminations.c (spill_pseudos, update_reg_eliminate): Likewise. + * lra-lives.c (mark_pseudo_dead, check_pseudos_live_through_calls) + (process_bb_lives): Likewise. + * lra-spills.c (assign_spill_hard_regs): Likewise. + * postreload.c (reload_combine): Likewise. + * reginfo.c (init_reg_sets_1): Likewise. + * regrename.c (merge_overlapping_regs, find_rename_reg) + (merge_chains): Likewise. + * reload1.c (maybe_fix_stack_asms, order_regs_for_reload, find_reg) + (find_reload_regs, finish_spills, choose_reload_regs_init) + (emit_reload_insns): Likewise. + * reorg.c (redundant_insn): Likewise. + * resource.c (find_dead_or_set_registers, mark_set_resources) + (mark_target_live_regs): Likewise. + * rtlanal.c (find_all_hard_reg_sets): Likewise. + * sched-deps.c (sched_analyze_insn): Likewise. + * sel-sched.c (mark_unavailable_hard_regs): Likewise. + (find_best_reg_for_expr): Likewise. + * shrink-wrap.c (try_shrink_wrapping): Likewise. + +2019-09-09 Richard Sandiford <richard.sandiford@arm.com> + + * hard-reg-set.h (HARD_REG_SET::operator&): New function. + (HARD_REG_SET::operator&): Likewise. + (AND_HARD_REG_SET): Delete. + * caller-save.c (setup_save_areas): Use "&" instead of + AND_HARD_REG_SET. + (save_call_clobbered_regs): Likewise. + * config/gcn/gcn.c (gcn_md_reorg): Likewise. + * config/m32c/m32c.c (reduce_class): Likewise. + * config/rs6000/rs6000.c (rs6000_register_move_cost): Likewise. + * final.c (get_call_reg_set_usage): Likewise. + * ira-color.c (add_allocno_hard_regs_to_forest): Likewise. + (setup_left_conflict_sizes_p): Likewise. + * ira-conflicts.c (print_allocno_conflicts): Likewise. + (ira_build_conflicts): Likewise. + * ira-costs.c (restrict_cost_classes): Likewise. + * ira.c (setup_stack_reg_pressure_class, setup_class_translate_array) + (setup_reg_class_relations): Likewise. + * reginfo.c (init_reg_sets_1, record_subregs_of_mode): Likewise. + * reload1.c (maybe_fix_stack_asms, finish_spills): Likewise. + * resource.c (find_dead_or_set_registers): Likewise. + * sel-sched.c (mark_unavailable_hard_regs): Likewise. + +2019-09-09 Richard Sandiford <richard.sandiford@arm.com> + + * hard-reg-set.h (HARD_REG_SET::operator~): New function. + (COMPL_HARD_REG_SET): Delete. + * config/c6x/c6x.c (c6x_call_saved_register_used): Use ~ instead + of COMPL_HARD_REG_SET. + (try_rename_operands): Likewise. + * config/sh/sh.c (push_regs): Likewise. + * lra-assigns.c (find_hard_regno_for_1): Likewise. + * lra-constraints.c (contains_reg_p): Likewise. + * reload1.c (finish_spills, choose_reload_regs_init): Likewise. + +2019-09-09 Richard Sandiford <richard.sandiford@arm.com> + + * hard-reg-set.h (COPY_HARD_REG_SET): Delete. + * caller-save.c (save_call_clobbered_regs): Use assignment instead + of COPY_HARD_REG_SET. + * config/epiphany/epiphany.c (epiphany_compute_frame_size): Likewise. + (epiphany_conditional_register_usage): Likewise. + * config/frv/frv.c (frv_ifcvt_modify_tests): Likewise. + * config/gcn/gcn.c (gcn_md_reorg): Likewise. + * config/ia64/ia64.c (ia64_compute_frame_size): Likewise. + * config/m32c/m32c.c (m32c_register_move_cost): Likewise. + * config/m68k/m68k.c (m68k_conditional_register_usage): Likewise. + * config/mips/mips.c (mips_class_max_nregs): Likewise. + * config/pdp11/pdp11.c (pdp11_conditional_register_usage): Likewise. + * config/rs6000/rs6000.c (rs6000_register_move_cost): Likewise. + * config/sh/sh.c (output_stack_adjust): Likewise. + * final.c (collect_fn_hard_reg_usage): Likewise. + (get_call_reg_set_usage): Likewise. + * ira-build.c (ira_create_object, remove_low_level_allocnos) + (ira_flattening): Likewise. + * ira-color.c (add_allocno_hard_regs, add_allocno_hard_regs_to_forest) + (setup_left_conflict_sizes_p, setup_profitable_hard_regs) + (get_conflict_and_start_profitable_regs, allocno_reload_assign) + (ira_reassign_pseudos): Likewise. + * ira-conflicts.c (print_allocno_conflicts): Likewise. + (ira_build_conflicts): Likewise. + * ira-costs.c (restrict_cost_classes): Likewise. + (setup_regno_cost_classes_by_aclass): Likewise. + * ira.c (setup_class_hard_regs, setup_alloc_regs): Likewise. + (setup_reg_subclasses, setup_class_subset_and_memory_move_costs) + (setup_stack_reg_pressure_class, setup_pressure_classes) + (setup_allocno_and_important_classes, setup_class_translate_array) + (setup_reg_class_relations, setup_prohibited_class_mode_regs) + (ira_setup_eliminable_regset): Likewise. + * lra-assigns.c (find_hard_regno_for_1): Likewise. + (setup_live_pseudos_and_spill_after_risky_transforms): Likewise. + * lra-constraints.c (prohibited_class_reg_set_mode_p): Likewise. + (process_alt_operands, inherit_in_ebb): Likewise. + * lra-lives.c (process_bb_lives): Likewise. + * lra-spills.c (assign_spill_hard_regs): Likewise. + * lra.c (lra): Likewise. + * mode-switching.c (new_seginfo): Likewise. + * postreload.c (reload_combine): Likewise. + * reg-stack.c (straighten_stack): Likewise. + * reginfo.c (save_register_info, restore_register_info): Likewise. + (init_reg_sets_1, record_subregs_of_mode): Likewise + * regrename.c (create_new_chain, rename_chains): Likewise. + * reload1.c (order_regs_for_reload, find_reg): Likewise. + (find_reload_regs): Likewise. + * resource.c (find_dead_or_set_registers): Likewise. + (mark_target_live_regs): Likewise. + * sel-sched.c (mark_unavailable_hard_regs): Likewise. + +2019-09-09 Richard Sandiford <richard.sandiford@arm.com> + + * rtl.h (CALL_INSN_FUNCTION_USAGE): Document what SETs mean. + (note_pattern_stores): Declare. + (note_stores): Take an rtx_insn *. + * rtlanal.c (set_of): Use note_pattern_stores instead of note_stores. + (find_all_hard_reg_sets): Pass the insn rather than its pattern to + note_stores. Remove explicit handling of CALL_INSN_FUNCTION_USAGE. + (note_stores): Take an rtx_insn * as argument and process + CALL_INSN_FUNCTION_USAGE. Rename old function to... + (note_pattern_stores): ...this. + (find_first_parameter_load): Pass the insn rather than + its pattern to note_stores. + * alias.c (memory_modified_in_insn_p, init_alias_analysis): Likewise. + * caller-save.c (setup_save_areas, save_call_clobbered_regs) + (insert_one_insn): Likewise. + * combine.c (combine_instructions): Likewise. + (likely_spilled_retval_p): Likewise. + (try_combine): Use note_pattern_stores instead of note_stores. + (record_dead_and_set_regs): Pass the insn rather than its pattern + to note_stores. + (reg_dead_at_p): Likewise. + * config/bfin/bfin.c (workaround_speculation): Likewise. + * config/c6x/c6x.c (maybe_clobber_cond): Likewise. Take an rtx_insn * + rather than an rtx. + * config/frv/frv.c (frv_registers_update): Use note_pattern_stores + instead of note_stores. + (frv_optimize_membar_local): Pass the insn rather than its pattern + to note_stores. + * config/gcn/gcn.c (gcn_md_reorg): Likewise. + * config/i386/i386.c (ix86_avx_u128_mode_after): Likewise. + * config/mips/mips.c (vr4130_true_reg_dependence_p): Likewise. + (r10k_needs_protection_p, mips_sim_issue_insn): Likewise. + (mips_reorg_process_insns): Likewise. + * config/s390/s390.c (s390_regs_ever_clobbered): Likewise. + * config/sh/sh.c (flow_dependent_p): Likewise. Take rtx_insn *s + rather than rtxes. + * cse.c (delete_trivially_dead_insns): Pass the insn rather than + its pattern to note_stores. + * cselib.c (cselib_record_sets): Use note_pattern_stores instead + of note_stores. + * dce.c (mark_nonreg_stores): Remove the "body" parameter and pass + the insn to note_stores. + (prescan_insns_for_dce): Update call accordingly. + * ddg.c (mem_write_insn_p): Pass the insn rather than its pattern + to note_stores. + * df-problems.c (can_move_insns_across): Likewise. + * dse.c (emit_inc_dec_insn_before, replace_read): Likewise. + * function.c (assign_parm_setup_reg): Likewise. + * gcse-common.c (record_last_mem_set_info_common): Likewise. + * gcse.c (load_killed_in_block_p, compute_hash_table_work): Likewise. + (single_set_gcse): Likewise. + * ira.c (validate_equiv_mem): Likewise. + (update_equiv_regs): Use note_pattern_stores rather than note_stores + for no_equiv. + * loop-doloop.c (doloop_optimize): Pass the insn rather than its + pattern to note_stores. + * loop-invariant.c (calculate_loop_reg_pressure): Likewise. + * loop-iv.c (simplify_using_initial_values): Likewise. + * mode-switching.c (optimize_mode_switching): Likewise. + * optabs.c (emit_libcall_block_1): Likewise. + (expand_atomic_compare_and_swap): Likewise. + * postreload-gcse.c (load_killed_in_block_p): Likewise. + (record_opr_changes): Likewise. Remove explicit handling of + CALL_INSN_FUNCTION_USAGE. + * postreload.c (reload_combine, reload_cse_move2add): Likewise. + * regcprop.c (kill_clobbered_values): Likewise. + (copyprop_hardreg_forward_1): Pass the insn rather than its pattern + to note_stores. + * regrename.c (build_def_use): Likewise. + * reload1.c (reload): Use note_pattern_stores instead of note_stores + for mark_not_eliminable. + (reload_as_needed): Pass the insn rather than its pattern + to note_stores. + (emit_output_reload_insns): Likewise. + * resource.c (mark_target_live_regs): Likewise. + * sched-deps.c (init_insn_reg_pressure_info): Likewise. + * sched-rgn.c (sets_likely_spilled): Use note_pattern_stores + instead of note_stores. + * shrink-wrap.c (try_shrink_wrapping): Pass the insn rather than + its pattern to note_stores. + * stack-ptr-mod.c (pass_stack_ptr_mod::execute): Likewise. + * var-tracking.c (adjust_insn, add_with_sets): Likewise. + +2019-09-09 Richard Sandiford <richard.sandiford@arm.com> + + * hard-reg-set.h (HARD_REG_SET): Define using a typedef rather + than a #define. Use a structure rather than an array as the + fallback definition. Remove special cases for low array sizes. + (const_hard_reg_set): New typedef. + (hard_reg_set_subset_p): Use it instead of "const HARD_REG_SET". + (hard_reg_set_equal_p, hard_reg_set_intersect_p): Likewise. + (hard_reg_set_empty_p): Likewise. + (SET_HARD_REG_BIT): Use a function rather than a macro to + handle the case in which HARD_REG_SET is a structure. + (CLEAR_HARD_REG_BIT, TEST_HARD_REG_BIT, CLEAR_HARD_REG_SET) + (SET_HARD_REG_SET, COPY_HARD_REG_SET, COMPL_HARD_REG_SET) + (AND_HARD_REG_SET, AND_COMPL_HARD_REG_SET, IOR_HARD_REG_SET) + (IOR_COMPL_HARD_REG_SET): Likewise. + (hard_reg_set_iterator::pset): Constify the pointer target. + (hard_reg_set_iter_init): Take a const_hard_reg_set instead + of a "const HARD_REG_SET". Update the handling of non-integer + HARD_REG_SETs. + * recog.h: Test HARD_CONST instead of CLEAR_HARD_REG_SET. + * reload.h: Likewise. + * rtl.h (choose_hard_reg_mode): Remove unnecessary line break. + * regs.h (in_hard_reg_set_p): Take a const_hard_reg_set instead + of a "const HARD_REG_SET". + (overlaps_hard_reg_set_p, range_overlaps_hard_reg_set_p): Likewise. + (range_in_hard_reg_set_p): Likewise. + * ira-costs.c (restrict_cost_classes): Likewise. + * shrink-wrap.c (move_insn_for_shrink_wrap): Likewise. + * config/epiphany/resolve-sw-modes.c (pass_resolve_sw_modes::execute): + Pass a NO_REGS HARD_REG_SET rather than NULL to emit_set_fp_mode. + * config/ia64/ia64.c (rws_insn): In the CHECKING_P version, + use unsigned HOST_WIDEST_FAST_INT rather than HARD_REG_ELT_TYPE. + (rws_insn_set, rws_insn_test): In the CHECKING_P version, + take an unsigned int and open-code the HARD_REG_SET operations. + +2019-09-09 Richard Sandiford <richard.sandiford@arm.com> + + * Makefile.in (OBJS): Remove bt-load.o. + * doc/invoke.texi (fbranch-target-load-optimize): Delete. + (fbranch-target-load-optimize2, fbtr-bb-exclusive): Likewise. + * common.opt (fbranch-target-load-optimize): Mark as Ignore and + document that the option no longer does anything. + (fbranch-target-load-optimize2, fbtr-bb-exclusive): Likewise. + * target.def (branch_target_register_class): Delete. + (branch_target_register_callee_saved): Likewise. + * doc/tm.texi.in (TARGET_BRANCH_TARGET_REGISTER_CLASS): Likewise. + (TARGET_BRANCH_TARGET_REGISTER_CALLEE_SAVED): Likewise. + * doc/tm.texi: Regenerate. + * tree-pass.h (make_pass_branch_target_load_optimize1): Delete. + (make_pass_branch_target_load_optimize2): Likewise. + * passes.def (pass_branch_target_load_optimize1): Likewise. + (pass_branch_target_load_optimize2): Likewise. + * targhooks.h (default_branch_target_register_class): Likewise. + * targhooks.c (default_branch_target_register_class): Likewise. + * opt-suggestions.c (test_completion_valid_options): Remove + -fbtr-bb-exclusive from the list of test options. + * bt-load.c: Remove. + +2019-09-09 Barnaby Wilks <barnaby.wilks@arm.com> + + * match.pd: Add flag_unsafe_math_optimizations check + before deciding on the widest type in a binary math operation. + +2019-09-09 Martin Liska <mliska@suse.cz> + + * config/i386/i386.opt: Update comment of removed + options that are preserved only for backward + compatibility. + +2019-09-09 Jakub Jelinek <jakub@redhat.com> + + PR target/87853 + * config/i386/emmintrin.h (_mm_cmpeq_epi8): Use casts to __v16qi + instead of __v16qs. + + PR target/91704 + * config/i386/avxintrin.h (__v32qs): New typedef. + * config/i386/avx2intrin.h (_mm256_cmpgt_epi8): Use casts to __v32qs + instead of __v32qi. + +2019-09-09 Jose E. Marchesi <jose.marchesi@oracle.com> + + * doc/invoke.texi (Option Summary): Cover eBPF. + (eBPF Options): New section. + * doc/extend.texi (BPF Built-in Functions): Likewise. + (BPF Kernel Helpers): Likewise. + +2019-09-09 Jose E. Marchesi <jose.marchesi@oracle.com> + + * config.gcc: Support for bpf-*-* targets. + * common/config/bpf/bpf-common.c: New file. + * config/bpf/t-bpf: Likewise. + * config/bpf/predicates.md: Likewise. + * config/bpf/constraints.md: Likewise. + * config/bpf/bpf.opt: Likewise. + * config/bpf/bpf.md: Likewise. + * config/bpf/bpf.h: Likewise. + * config/bpf/bpf.c: Likewise. + * config/bpf/bpf-protos.h: Likewise. + * config/bpf/bpf-opts.h: Likewise. + * config/bpf/bpf-helpers.h: Likewise. + * config/bpf/bpf-helpers.def: Likewise. + +2019-09-09 Jose E. Marchesi <jose.marchesi@oracle.com> + + * doc/sourcebuild.texi (Effective-Target Keywords): Document + indirect_calls. + +2019-09-09 Jose E. Marchesi <jose.marchesi@oracle.com> + + * opt-functions.awk (integer_range_info): Make sure values are in + numeric context before operating with them. + +2019-09-08 Segher Boessenkool <segher@kernel.crashing.org> + + * genemit.c (gen_split): Print the filename and line number where the + splitter (or peephole2) was defined, to the dump file. + +2019-09-07 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/91665 + * tree-vect-loop.c (vectorizable_reduction): Punt if base has type + incompatible with the type of PHI result. + +2019-09-07 Bernd Edlinger <bernd.edlinger@hotmail.de> + + PR target/91684 + * config/arm/arm.c (arm_block_set_aligned_non_vect): Use + gen_unaligned_storedi for 4-byte aligned addresses. + +2019-09-06 Jim Wilson <jimw@sifive.com> + + * config/riscv/riscv.c (riscv_option_override): Revert 2019-08-30 + change. + +2019-09-06 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/rs6000.md (unspec): Delete UNSPEC_MV_CR_OV. + +2019-09-06 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/rs6000.c (rs6000_rtx_costs) <case UNSPEC>: Delete. + * config/rs6000/rs6000.md (unspec): Delete UNSPEC_FRSP. + +2019-09-06 Uroš Bizjak <ubizjak@gmail.com> + + PR target/91654 + * config/i386/x86-tune-costs.h (skylake_cost): Raise the + cost of SSE->integer and integer->SSE moves from 2 to 6. + (core_cost): Ditto. + +2019-09-06 Jakub Jelinek <jakub@redhat.com> + + * function.c (assign_parm_find_data_types): Use RECORD_OR_UNION_TYPE_P + before testing TYPE_TRANSPARENT_AGGR. + * calls.c (initialize_argument_information, load_register_parameters): + Likewise. + +2019-09-06 Richard Earnshaw <rearnsha@arm.com> + + * config/arm/arm.md (cmp_and): Add short-it variant for thumb2 with + high regs. + (cmp_ior): Likewise. + +2019-09-06 Martin Liska <mliska@suse.cz> + + * doc/match-and-simplify.texi: Separate tuples with ;. + +2019-09-06 Martin Liska <mliska@suse.cz> + + PR c++/91125 + * Makefile.in: Remove tlink.o. + * collect2.c (do_link): New function isolated + from do_tlink. + (main): Use. + * collect2.h (do_tlink): Remove declaration of do_tlink. + * doc/extend.texi: Remove documentation of -frepo. + * doc/invoke.texi: Likewise. + * doc/sourcebuild.texi: Remove cleanup-repo-files. + * tlink.c: Remove. + +2019-09-05 Jakub Jelinek <jakub@redhat.com> + Jim Wilson <jimw@sifive.com> + + PR target/91635 + * config/riscv/riscv.md (zero_extendsidi2, zero_extendhi<GPR:mode>2, + extend<SHORT:mode><SUPERQI:mode>2): Don't split if + paradoxical_subreg_p (operands[0]). + (*lshrsi3_zero_extend_3+1, *lshrsi3_zero_extend_3+2): Add clobber and + use as intermediate value. + +2019-09-05 Andrew Stubbs <ams@codesourcery.com> + + * config/gcn/gcn.md (*movti_insn): Set delayeduse for global_store. + (sync_compare_and_swap<mode>_insn): Likewise. + +2019-09-05 Bernd Edlinger <bernd.edlinger@hotmail.de> + + PR middle-end/91615 + * expr.c (expand_expr_real_1): Handle misaligned TARGET_MEM_REF + without movmisalign optab. + +2019-09-05 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/91001 + PR middle-end/91105 + PR middle-end/91106 + * calls.c (load_register_parameters): For TYPE_TRANSPARENT_AGGR + types, use type of their first field instead of type of + args[i].tree_value. + +2019-09-05 Richard Biener <rguenther@suse.de> + + PR rtl-optimization/91656 + * postreload-gcse.c (record_last_mem_set_info): Revert addition + of early out. + +2019-09-05 Richard Biener <rguenther@suse.de> + + PR middle-end/90501 + * tree-inline.c (declare_return_variable): Mark the return + slot as addressable after building an address of it. + +2019-09-05 Arnaud Charlet <charlet@adacore.com> + + * doc/install.texi: Update and clarify requirements to build GNAT. + +2019-09-05 Richard Sandiford <richard.sandiford@arm.com> + + PR middle-end/91577 + * cfgexpand.c (discover_nonconstant_array_refs): Force the source + of an IFN_LOAD_LANES call and the destination of an IFN_STORE_LANES + call to be in memory. + (pass_expand::execute): Call discover_nonconstant_array_refs before + setting currently_expanding_to_rtl. + +2019-09-04 Caroline Tice <cmtice@google.com> + + * opts.c (finish_options): Disallow -fvtable-verify and -flto to be + specified together. + +2019-09-04 Marek Polacek <polacek@redhat.com> + + * doc/invoke.texi: Remove -fdeduce-init-list documentation. + +2019-09-04 Uroš Bizjak <ubizjak@gmail.com> + + PR target/32413 + * config/i386/i386.c (inline_secondary_memory_needed): Return true + for QI and HImode moves between SSE and general registers. + +2019-09-04 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org> + + PR c/78736 + * doc/invoke.texi: Document -Wenum-conversion. + +2019-09-04 Richard Biener <rguenther@suse.de> + + PR rtl-optimization/36262 + * postreload-gcse.c: Include intl.h and gcse.h. + (insert_expr_in_table): Insert at the head of cur_expr->avail_occr + to avoid linear list walk. + (record_last_mem_set_info): Gate off if not computing transparentness. + (get_bb_avail_insn): If transparentness isn't computed give up + early. + (gcse_after_reload_main): Skip compute_transp and extended PRE + if gcse_or_cprop_is_too_expensive says so. + +2019-09-03 Jozef Lawrynowicz <jozef.l@mittosystems.com> + + * config/msp430/msp430.c (msp430_init_sections): Remove handling of the + noinit section. + (msp430_select_section): Handle decls with the "noinit" attribute with + default_elf_select_section. + Handle SECCAT_RODATA_MERGE_* section types with + default_elf_select_section. + Add comments about handling of unsupported section types. + (msp430_section_type_flags): Remove handling of the noinit section. + +2019-09-03 Jozef Lawrynowicz <jozef.l@mittosystems.com> + + * config/msp430/msp430.c (msp430_attr): Remove warnings about + conflicting msp430-specific attributes. + (msp430_section_attr): Likewise. + Add warnings about conflicts with generic "noinit" and "section" + attributes. + Fix grammar in -mlarge error message. + (msp430_data_attr): Rename to msp430_persist_attr. + Add warnings about conflicts with generic "noinit" and "section" + attributes. + Add warning for when variable is not initialized. + Chain conditionals which prevent the attribute being added. + (ATTR_EXCL): New helper. + (attr_reent_exclusions): New exclusion table. + (attr_naked_exclusions): Likewise. + (attr_crit_exclusions): Likewise. + (attr_lower_exclusions): Likewise. + (attr_upper_exclusions): Likewise. + (attr_either_exclusions): Likewise. + (attr_persist_exclusions): Likewise. + (msp430_attribute_table): Update with exclusion rules. + (msp430_output_aligned_decl_common): Don't output common symbol if decl + has a section. + +2019-09-03 Jozef Lawrynowicz <jozef.l@mittosystems.com> + + * config/msp430/msp430.c (TARGET_HANDLE_GENERIC_ATTRIBUTE): Define. + (msp430_handle_generic_attribute): New function. + * doc/tm.texi: Regenerate. + * doc/tm.texi.in: Add TARGET_HANDLE_GENERIC_ATTRIBUTE. + * hooks.c (hook_tree_treeptr_tree_tree_int_boolptr_null): New. + * hooks.h (hook_tree_treeptr_tree_tree_int_boolptr_null): New. + * target.def: Define new hook TARGET_HANDLE_GENERIC_ATTRIBUTE. + +2019-09-03 Kamlesh Kumar <kamleshbhalui@gmail.com> + + PR tree-optimization/91504 + * match.pd: Add ((~a & b) ^a) --> (a | b). + +2019-09-03 Jakub Jelinek <jakub@redhat.com> + + PR target/91604 + * config/i386/i386-expand.c (split_double_mode): If there is more than + one MEM operand and they are rtx_equal_p, reuse lo_half/hi_half from + already split matching MEM operand instead of calling adjust_address + again. + +2019-09-03 Ulrich Weigand <uweigand@de.ibm.com> + + * config.gcc: Obsolete spu target. Remove references to spu. + * configure.ac: Remove references to spu. + * configure: Regenerate. + * config/spu/: Remove directory. + * common/config/spu/: Remove directory. + + * doc/extend.texi: Remove references to spu. + * doc/invoke.texi: Likewise. + * doc/md.texi: Likewise. + * doc/sourcebuild.texi: Likewise. + +2019-09-03 Bernd Edlinger <bernd.edlinger@hotmail.de> + + PR middle-end/91603 + PR middle-end/91612 + PR middle-end/91613 + * expr.c (expand_expr_real_1): Handle unaligned decl_rtl + and SSA_NAME referring to CONSTANT_P correctly. + +2019-09-03 Richard Biener <rguenther@suse.de> + + * tree-ssa-sccvn.h (vn_nary_op_lookup): Remove. + (vn_nary_op_insert): Likewise. + * tree-ssa-sccvn.c (init_vn_nary_op_from_op): Remove. + (vn_nary_op_lookup): Likewise. + (vn_nary_op_insert): Likewise. + +2019-09-03 Ilya Leoshkevich <iii@linux.ibm.com> + + * config/s390/s390.c (s390_canonicalize_comparison): Use XEXP + (*op0, 1) instead of XEXP (*op1, 0). + +2019-09-03 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/aarch64/aarch64.md (UNSPEC_FJCVTZS): Define. + (aarch64_fjcvtzs): New define_insn. + * config/aarch64/aarch64.h (TARGET_JSCVT): Define. + * config/aarch64/aarch64-builtins.c (aarch64_builtins): + Add AARCH64_JSCVT. + (aarch64_init_builtins): Initialize __builtin_aarch64_jcvtzs. + (aarch64_expand_builtin): Handle AARCH64_JSCVT. + * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define + __ARM_FEATURE_JCVT where appropriate. + * config/aarch64/arm_acle.h (__jcvt): Define. + +2019-09-03 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/aarch64/aarch64.md ("unspec"): Add UNSPEC_FRINT32Z, + UNSPEC_FRINT32X, UNSPEC_FRINT64Z, UNSPEC_FRINT64X. + (aarch64_<frintnzs_op><mode>): New define_insn. + * config/aarch64/aarch64.h (TARGET_FRINT): Define. + * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define + __ARM_FEATURE_FRINT when appropriate. + * config/aarch64/aarch64-simd-builtins.def: Add builtins for frint32z, + frint32x, frint64z, frint64x. + * config/aarch64/arm_acle.h (__rint32zf, __rint32z, __rint64zf, + __rint64z, __rint32xf, __rint32x, __rint64xf, __rint64x): Define. + * config/aarch64/arm_neon.h (vrnd32z_f32, vrnd32zq_f32, vrnd32z_f64, + vrnd32zq_f64, vrnd32x_f32, vrnd32xq_f32, vrnd32x_f64, vrnd32xq_f64, + vrnd64z_f32, vrnd64zq_f32, vrnd64z_f64, vrnd64zq_f64, vrnd64x_f32, + vrnd64xq_f32, vrnd64x_f64, vrnd64xq_f64): Define. + * config/aarch64/iterators.md (VSFDF): Define. + (FRINTNZX): Likewise. + (frintnzs_op): Likewise. + +2019-09-03 Dennis Zhang <dennis.zhang@arm.com> + + * config/aarch64/aarch64-cores.def (AARCH64_CORE): New entries + for Cortex-A77, Cortex-A76AE, Cortex-A65, Cortex-A65AE, and + Cortex-A34. + * config/aarch64/aarch64-tune.md: Regenerated. + * doc/invoke.texi: Document the new processors. + +2019-09-03 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/aarch64/aarch64-option-extensions.def (sb): Add feature + string. + (ssbs): Likewise. + (sve2): Likewise. + (sve2-sm4): Likewise. + (sveaes): Likewise. + (svesha3): Likewise. + (svebitperm): Likewise. + +2019-09-03 Jakub Jelinek <jakub@redhat.com> + Richard Biener <rguenther@suse.de> + + PR tree-optimization/91597 + * tree-vrp.c (extract_range_from_binary_expr): Remove unsafe + BIT_AND_EXPR optimization for pointers, even if both operand + ranges don't include NULL, the result can be NULL. + +2019-09-02 Bernd Edlinger <bernd.edlinger@hotmail.de> + + PR middle-end/91605 + * expr.c (addr_expr_of_non_mem_decl_p_1): Refactor into... + (non_mem_decl_p): ...this. + (mem_ref_refers_to_non_mem_p): Handle DECL_P as well as MEM_REF. + (expand_assignment): Call mem_ref_referes_to_non_mem_p + unconditionally as before. + +2019-09-02 Eric Botcazou <ebotcazou@adacore.com> + + PR target/91323 + * doc/generic.texi (LTGT_EXPR): Merge with other comparison operators. + * rtl.def (LTGT): Likewise. Add note about floating-point exceptions. + * tree.def (LTGT_EXPR): Likewise. + * config/sparc/sparc.c (select_cc_mode): Return CCFPEmode for LTGT. + +2019-09-02 Jakub Jelinek <jakub@redhat.com> + + PR go/91617 + * fold-const.c (range_check_type): For enumeral and boolean + type, pass 1 to type_for_size langhook instead of + TYPE_UNSIGNED (etype). Return unsigned_type_for result whenever + etype isn't TYPE_UNSIGNED INTEGER_TYPE. + (build_range_check): Don't call unsigned_type_for for pointer types. + * match.pd (X / C1 op C2): Don't call unsigned_type_for on + range_check_type result. + +2019-09-02 Eric Botcazou <ebotcazou@adacore.com> + + * gimple-ssa-strength-reduction.c (valid_mem_ref_cand_p): New function. + (replace_ref): Do not replace a chain of only two candidates which are + valid memory references. + +2019-09-02 Martin Liska <mliska@suse.cz> + + * tree-switch-conversion.c (jump_table_cluster::find_jump_tables): + Bail out when we'll end up with the same number of clusters as + at the beginning. + (bit_test_cluster::find_bit_tests): Likewise for bit tests. + (jump_table_cluster::can_be_handled): Remove the guard + as it's already handled in ::is_enabled. Allocate output + after early bail out. + +2019-09-02 Martin Liska <mliska@suse.cz> + + PR gcov-profile/91601 + * gcov.c (path_contains_zero_cycle_arc): Rename to ... + (path_contains_zero_or_negative_cycle_arc): ... this and handle + also negative edges. + (circuit): Handle also negative edges as they can happen + in some situations. + +2019-09-01 Eric Botcazou <ebotcazou@adacore.com> + + PR target/91472 + * config/sparc/sparc.c (sparc_cannot_force_const_mem): Return true + during LRA/reload in PIC mode if the PIC register hasn't been used yet. + (sparc_pic_register_p): Test reload_in_progress for consistency's sake. + +2019-09-01 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/91623 + * optabs.c (expand_vec_cond_expr): If op0 is a VECTOR_CST and only + EQ_EXPR/NE_EXPR is supported, verify that op0 only contains + zeros or negative elements and use NE_EXPR instead of LT_EXPR against + zero vector. + + PR lto/91572 + * tree.c (find_decls_types_in_node): Also walk TREE_PURPOSE of + GIMPLE_ASM TREE_LIST operands. + +2019-08-31 Gerald Pfeifer <gerald@pfeifer.com> + + * doc/generic.texi (Unary and Binary Expressions): Mark up + an instance of TYPE_MIN. + +2019-08-31 Stafford Horne <shorne@gmail.com> + + * config/or1k/constraints.md (t): New constraint. + * config/or1k/or1k.h (GOT_REGS): New register class. + * config/or1k/or1k.md (set_got_tmp, set_got): Use t contraint. + +2019-08-30 Jim Wilson <jimw@sifive.com> + + * config/riscv/riscv.c (riscv_option_override): If -msave-restore + and -fpic and -mplt then disable -msave-restore and warn. + +2019-08-30 Martin Sebor <msebor@redhat.com> + + PR middle-end/91599 + * tree-ssa-strlen.c (handle_store): Use a fallback location if + the statement doesn't have one. + * gimple-pretty-print.c (percent_G_format): Same. + + PR middle-end/91584 + * tree-vrp.c (vrp_prop::check_mem_ref): Normalize type domain bounds + before using them to validate MEM_REF offset. + +2019-08-30 Marek Polacek <polacek@redhat.com> + + * doc/invoke.texi (-Wvolatile): Use @code for volatile. + +2019-08-30 Bernd Edlinger <bernd.edlinger@hotmail.de> + + * config/arm/arm.md (unaligned_loaddi, + unaligned_storedi): New unspec insn patterns. + * config/arm/neon.md (unaligned_storev8qi): Likewise. + * config/arm/arm.c (gen_cpymem_ldrd_strd): Use unaligned_loaddi + and unaligned_storedi for 4-byte aligned memory. + (arm_block_set_aligned_vect): Use unaligned_storev8qi for + 4-byte aligned memory. + +2019-08-30 Martin Jambor <mjambor@suse.cz> + + tree-optimization/91579 + * tree-tailcall.c (tailr_arg_needs_copy): New variable. + (find_tail_calls): Allocate tailr_arg_needs_copy and set its bits as + appropriate. + (arg_needs_copy_p): Removed. + (eliminate_tail_call): Test tailr_arg_needs_copy instead of calling + arg_needs_copy_p. + (tree_optimize_tail_calls_1): Likewise. Free tailr_arg_needs_copy. + +2019-08-29 Uroš Bizjak <ubizjak@gmail.com> + + * config/i386/i386-features.c + (general_scalar_chain::compute_convert_gain): + Correct cost for double-word shifts. + (general_scalar_to_vector_candidate_p): Reject count operands + greater or equal to mode bitsize. + +2019-08-29 Uroš Bizjak <ubizjak@gmail.com> + + * config/i386/i386.c (inline_secondary_memory_needed): Return true + for moves between SSE and non-general registers and between + mask and non-general registers. + (ix86_register_move_cost): Remove stalled comment. + +2019-08-29 Richard Biener <rguenther@suse.de> + + * config/i386/i386-features.c (general_scalar_chain::convert_insn): + Guard debug work with MAY_HAVE_DEBUG_BIND_INSNS. + +2019-08-29 Richard Biener <rguenther@suse.de> + + PR bootstrap/91580 + * config/i386/i386-features.c (general_scalar_chain::convert_insn): + Do not emit scalar copies for debug-insns, instead replace + their uses with the reg copy used in the chain or reset them + if there is a reaching definition outside of the chain as well. + +2019-08-29 Jakub Jelinek <jakub@redhat.com> + + PR target/91560 + * config/i386/i386-expand.c (expand_vec_perm_movs, + expand_vec_perm_blend, expand_vec_perm_vpermil, + expand_vec_perm_pshufb, expand_vec_perm_1, + expand_vec_perm_pshuflw_pshufhw, expand_vec_perm_palignr, + expand_vec_perm_interleave2, expand_vec_perm_vpermq_perm_1, + expand_vec_perm_vperm2f128, expand_vec_perm_interleave3, + expand_vec_perm_vperm2f128_vblend, expand_vec_perm_2vperm2f128_vshuf, + expand_vec_perm_even_odd, expand_vec_perm_broadcast): Adjust function + comments - replace ix86_expand_vec_perm_builtin_1 with + ix86_expand_vec_perm_const_1. + (expand_vec_perm2_vperm2f128_vblend): New function. + (ix86_expand_vec_perm_const_1): New forward declaration. Call + expand_vec_perm2_vperm2f128_vblend as last resort. + (canonicalize_perm): Formatting fix. + + PR tree-optimization/91351 + * tree-cfg.c (generate_range_test): Use range_check_type instead of + unsigned_type_for. + * tree-cfgcleanup.c (convert_single_case_switch): Punt if + range_check_type returns NULL. + * tree-switch-conversion.c (switch_conversion::build_one_array): + Use range_check_type instead of unsigned_type_for, don't perform + linear opt if it returns NULL. + (bit_test_cluster::find_bit_tests): Formatting fix. + (bit_test_cluster::emit): Use range_check_type instead of + unsigned_type_for. + (switch_decision_tree::try_switch_expansion): Punt if range_check_type + returns NULL. + +2019-08-29 Richard Biener <rguenther@suse.de> + + PR tree-optimization/91568 + * tree-vectorizer.h (_slp_tree::max_nunits): Add. + (vect_update_max_nunits): Add overload for poly_uint64. + * tree-vect-slp.c (vect_create_new_slp_node): Initialize it. + (vect_build_slp_tree): Record max_nunits into the subtree + and merge it upwards. + (vect_print_slp_tree): Print max_nunits. + +2019-08-28 Marek Polacek <polacek@redhat.com> + + Implement P1152R4: Deprecating some uses of volatile. + PR c++/91361 + * doc/invoke.texi: Document -Wvolatile. + +2019-08-28 Marek Polacek <polacek@redhat.com> + + PR c++/91360 - Implement C++20 P1143R2: constinit. + * doc/invoke.texi: Document -Wc++20-compat. + +2019-08-28 Martin Sebor <msebor@redhat.com> + + PR tree-optimization/91457 + * builtins.c (component_size): New function. + (compute_objsize): Add argument. Handle ARRAY_REF and COMPONENT_REF. + * builtins.h (compute_objsize): Add argument. + * tree-ssa-strlen.c (handle_store): Handle no-warning bit. + * tree-vrp.c (vrp_prop::check_array_ref): Return warning result. + (vrp_prop::check_mem_ref): Same. + (vrp_prop::search_for_addr_array): Set no-warning bit. + (check_array_bounds): Same. + +2019-08-28 Martin Sebor <msebor@redhat.com> + + PR driver/80545 + * opts-common.c (option_enabled): Correct checking for language + options. + +2019-08-28 Uroš Bizjak <ubizjak@gmail.com> + + * config/i386/i386.c (ix86_register_move_cost): Do not + limit the cost of moves to/from XMM register to minimum 8. + +2019-08-28 Martin Jambor <mjambor@suse.cz> + + PR ipa/91468 + * ipa-cp.c (merge_agg_lats_step): Removed redundant test, made a + checking assert a normal assert to test it really is redundant. + * ipa-prop.c (compute_complex_assign_jump_func): Removed + redundant test. + (update_jump_functions_after_inlining): Removed combining unary + arithmetic operations with an ancestor jump function. + (ipcp_modif_dom_walker::before_dom_children): Fix wrong use of rhs + instead of t. + +2019-08-28 Richard Biener <rguenther@suse.de> + + * config/i386/i386-features.c (convert_scalars_to_vector): Do not + add the MD problem. + +2019-08-28 Bernd Edlinger <bernd.edlinger@hotmail.de> + Richard Biener <rguenther@suse.de> + + * expr.c (expand_assignment): Handle misaligned DECLs. + (expand_expr_real_1): Handle FUNCTION_DECL as unaligned. + * function.c (assign_parm_adjust_stack_rtl): Check movmisalign optab + too. + (assign_parm_setup_stack): Allocate properly aligned stack slots. + * varasm.c (build_constant_desc): Align constants of misaligned types. + * config/arm/predicates.md (aligned_operand): New predicate. + * config/arm/arm.md (movdi, movsi, movhi, movhf, movsf, movdf): Use + aligned_operand to check restrictions on memory addresses. + * config/arm/neon.md (movti, mov<VSTRUCT>, mov<VH>): Likewise. + * config/arm/vec-common.md (mov<VALL>): Likewise. + +2019-08-28 Jakub Jelinek <jakub@redhat.com> + + PR libgomp/91530 + * config/i386/sse.md (vec_shl_<mode>, vec_shr_<mode>): Use + V_128 iterator instead of VI_128. + +2019-08-28 Martin Liska <mliska@suse.cz> + + PR tree-optimization/90970 + * builtins.c (check_access): Remove assignment to maxread + as it hasn't been used since when it was introduced in r255755. + +2019-08-27 Martin Sebor <msebor@redhat.com> + + PR tree-optimization/91567 + * gimple-ssa-sprintf.c (get_string_length): Handle more forms of lengths + of unknown strings. + * vr-values.c (vr_values::extract_range_basic): Set strlen upper bound + to PTRDIFF_MAX - 2. + +2019-08-27 Jeff Law <law@redhat.com> + + * tree-ssa-strlen.c (printf_strlen_execute): Initialize + the loop optimizer and SCEV before sizing ssa_ver_to_stridx. + +2019-08-27 Uroš Bizjak <ubizjak@gmail.com> + + PR target/91528 + * config/i386/i386-features.c (convert_scalars_to_vector): + Update crtl->stack_realign_needed, crtl->stack_realign_tried and + crtl->stack_realign_processed. Update crtl->drap_reg by calling + targetm.calls.get_drap_rtx. If drap_rtx is non-null then + Update crtl->args.internal_arg_pointer and call fixup_tail_calls. + +2019-08-27 Richard Biener <rguenther@suse.de> + + * config/i386/i386-features.h + (general_scalar_chain::~general_scalar_chain): Add. + (general_scalar_chain::insns_conv): New bitmap. + (general_scalar_chain::n_sse_to_integer): New. + (general_scalar_chain::n_integer_to_sse): Likewise. + (general_scalar_chain::make_vector_copies): Adjust signature. + * config/i386/i386-features.c + (general_scalar_chain::general_scalar_chain): Outline, + initialize new members. + (general_scalar_chain::~general_scalar_chain): New. + (general_scalar_chain::mark_dual_mode_def): Record insns + we need to insert conversions at and count them. + (general_scalar_chain::compute_convert_gain): Account + for conversion instructions at chain boundary. + (general_scalar_chain::make_vector_copies): Generate a single + copy for a def by a specific insn. + (general_scalar_chain::convert_registers): First populate + defs_map, then make copies at out-of chain insns. + +2019-08-27 Richard Earnshaw <rearnsha@arm.com> + + * config/arm/arm.md (stack_protect_set_insn): Add security-related + comment. + * config/aarch64/aarch64.md (stack_protect_set_<mode>): Likewise. + +2019-08-27 Martin Liska <mliska@suse.cz> + + * cgraph.c (cgraph_node::remove): Remove dead assignment before + loop. + * config/i386/i386-features.c (scalar_chain::emit_conversion_insns): + Enclose in anonymous namespace. + * config/i386/x86-tune-costs.h (struct processor_costs): Wrap + hard_register initialization in braces. + * tree-vrp.h (value_range_base::supports_type_p): Return false + for function with boolean return type. + +2019-08-26 Uroš Bizjak <ubizjak@gmail.com> + + * config/i386/i386.c (emit_i387_cw_initialization) + <case I387_CW_ROUNDEVEN>: Fix masking operand value. + +2019-08-26 Martin Sebor <msebor@redhat.com> + + PR c++/83431 + * gimple-ssa-sprintf.c (pass_data_sprintf_length): Remove object. + (sprintf_dom_walker): Remove class. + (get_int_range): Make argument const. + (directive::fmtfunc, directive::set_precision): Same. + (format_none): Same. + (build_intmax_type_nodes): Same. + (adjust_range_for_overflow): Same. + (format_floating): Same. + (format_character): Same. + (format_string): Same. + (format_plain): Same. + (get_int_range): Cast away constness. + (format_integer): Same. + (get_string_length): Call get_range_strlen_dynamic. Handle + null lendata.maxbound. + (should_warn_p): Adjust argument scope qualifier. + (maybe_warn): Same. + (format_directive): Same. + (parse_directive): Same. + (is_call_safe): Same. + (try_substitute_return_value): Same. + (sprintf_dom_walker::handle_printf_call): Rename... + (handle_printf_call): ...to this. Initialize target to host charmap + here instead of in pass_sprintf_length::execute. + (struct call_info): Make global. + (sprintf_dom_walker::compute_format_length): Make global. + (sprintf_dom_walker::handle_gimple_call): Same. + * passes.def (pass_sprintf_length): Replace with pass_strlen. + * print-rtl.c (print_pattern): Reduce the number of spaces to + avoid -Wformat-truncation. + * tree-pass.h (make_pass_warn_printf): New function. + * tree-ssa-strlen.c (strlen_optimize): New variable. + (get_string_length): Add comments. + (get_range_strlen_dynamic): New function. + (check_and_optimize_call): New function. + (handle_integral_assign): New function. + (strlen_check_and_optimize_stmt): Factor code out into + strlen_check_and_optimize_call and handle_integral_assign. + (strlen_dom_walker::evrp): New member. + (strlen_dom_walker::before_dom_children): Use evrp member. + (strlen_dom_walker::after_dom_children): Use evrp member. + (printf_strlen_execute): New function. + (pass_strlen::gate): Update to handle printf calls. + (dump_strlen_info): New function. + (pass_data_warn_printf): New variable. + (pass_warn_printf): New class. + * tree-ssa-strlen.h (get_range_strlen_dynamic): Declare. + (handle_printf_call): Same. + * tree-vrp.c (value_range_base::type): Adjust assertion. + * vr-values.c (vr_values::update_value_range): Use type of the first + argument rather than the second. + +2019-08-26 Richard Biener <rguenther@suse.de> + + * config/i386/i386-features.c (general_remove_non_convertible_regs): + Remove. + (convert_scalars_to_vector): Do not call it. + +2019-08-26 Tejas Joshi <tejasjoshi9673@gmail.com> + Uros Bizjak <ubizjak@gmail.com> + + * builtins.c (mathfn_built_in_2): Change CASE_MATHFN to + CASE_MATHFN_FLOATN for roundeven. + * config/i386/i386.c (ix86_i387_mode_needed): Add case + I387_ROUNDEVEN. + (ix86_mode_needed): Likewise. + (ix86_mode_after): Likewise. + (ix86_mode_entry): Likewise. + (ix86_mode_exit): Likewise. + (ix86_emit_mode_set): Likewise. + (emit_i387_cw_initialization): Add case I387_CW_ROUNDEVEN. + * config/i386/i386.h (ix86_stack_slot): Add SLOT_CW_ROUNDEVEN. + (ix86_entity): Add I387_ROUNDEVEN. + (NUM_MODES_FOR_MODE_SWITCHING): Add I387_CW_ANY. + * config/i386/i386.md: Define UNSPEC_FRNDINT_ROUNDEVEN. + (define_int_iterator): Likewise. + (define_int_attr): Likewise for rounding_insn, rounding and ROUNDING. + (define_constant): Define ROUND_ROUNDEVEN mode. + (define_attr): Add roundeven mode for i387_cw. + (<rouding_insn><mode>2): Add condition for ROUND_ROUNDEVEN. + * internal-fn.def (ROUNDEVEN): New builtin function. + * optabs.def (roundeven_optab): New optab. + +2019-08-26 Tejas Joshi <tejasjoshi9673@gmail.com> + + * builtins.c (mathfn_built_in_2): Added CASE_MATHFN_FLOATN + for ROUNDEVEN. + * builtins.def: Added function definitions for roundeven function + variants. + * fold-const-call.c (fold_const_call_ss): Added case for roundeven + function call. Adjust condition for floor, ceil, trunc and round. + * fold-const.c (negate_mathfn_p): Added case for roundeven function. + (tree_call_nonnegative_warnv_p): Added case for roundeven function. + (integer_valued_real_call_p): Added case for roundeven function. + * real.c (is_even): New function. Returns true if real number is even, + otherwise returns false. + (is_halfway_below): New function. Returns true if real number is + halfway between two integers, else return false. + (real_roundeven): New function. Round real number to nearest integer, + rounding halfway cases towards even. + * real.h (real_value): Added descriptive comments. Added function + declaration for roundeven function. + * doc/extend.texi (Other Builtins): List roundeven variants among + functions which can be handled as builtins. + +2019-08-26 Richard Biener <rguenther@suse.de> + + PR target/91522 + PR target/91527 + * config/i386/i386-features.h (general_scalar_chain::defs_map): + New member. + (general_scalar_chain::replace_with_subreg): Remove. + (general_scalar_chain::replace_with_subreg_in_insn): Likewise. + (general_scalar_chain::convert_reg): Adjust signature. + * config/i386/i386-features.c (scalar_chain::add_insn): Do not + iterate over all defs of a reg. + (general_scalar_chain::replace_with_subreg): Remove. + (general_scalar_chain::replace_with_subreg_in_insn): Likewise. + (general_scalar_chain::make_vector_copies): Populate defs_map, + place copy only after defs that are used as vectors in the chain. + (general_scalar_chain::convert_reg): Emit a copy for a specific + def in a specific instruction. + (general_scalar_chain::convert_op): All reg uses are converted here. + (general_scalar_chain::convert_insn): Emit copies for scalar + uses of defs here. Replace uses with the copies we created. + Replace and convert the def. Adjust REG_DEAD notes, remove + REG_EQUIV/EQUAL notes. + (general_scalar_chain::convert_registers): Only handle copies + into the chain here. + +2019-08-26 Robin Dapp <rdapp@linux.ibm.com> + + * match.pd: Add (T)(A) + CST -> (T)(A + CST). + +2019-08-26 Robin Dapp <rdapp@linux.ibm.com> + + * gimple-loop-versioning.cc (loop_versioning::record_address_fragment): + Add nop_convert case. + * tree-ssa-propagate.c (substitute_and_fold_dom_walker::before_dom_children): + Fold all statements if requested. + * tree-ssa-propagate.h (class substitute_and_fold_engine): + Allow to fold all statements. + * tree-vrp.c (class vrp_folder): + Let substitute_and_fold_engine fold all statements. + +2019-08-26 Richard Biener <rguenther@suse.de> + + PR tree-optimization/91526 + * passes.def: Note that after late FRE we do TODO_update_address_taken. + * tree-ssa-sccvn.c (pass_fre::execute): In late mode schedule + TODO_update_address_taken. + +2019-08-26 Gerald Pfeifer <gerald@pfeifer.com> + + * config/i386/gmm_malloc.h: Only use <errno.h> and errno if + __STDC_HOSTED__. + +2019-08-23 Mihailo Stojanovic <mistojanovic@wavecomp.com> + + * config/mips/mips.md (mips_get_fcsr, *mips_get_fcsr): Use SI + machine mode for unspec_volatile operand. + +2019-08-23 Wilco Dijkstra <wdijkstr@arm.com> + + * doc/invoke.texi (mneon-for-64bits): Deprecate option. + * config/arm/arm.opt (mneon-for-64bits): Deprecate option. + * config/arm/arm.h (TARGET_PREFER_NEON_64BITS): Remove. + (prefer_neon_for_64bits): Remove. + * config/arm/arm.c (prefer_neon_for_64bits): Remove. + (tune_params): Remove PREF_NEON_64_FALSE uses. + (arm_option_override): Remove prefer_neon selection code. + (arm_print_tune_info): Remove prefer_neon_for_64bits. + * config/arm/arm-protos.h (tune_params): Remove + prefer_neon_for_64bits. + (prefer_neon_for_64bits): Remove. + +2019-08-23 Iain Sandoe <iain@sandoe.co.uk> + + PR pch/61250 + * ggc-page.c (ggc_pch_read): Read the ggc_pch_ondisk structure + and issue any diagnostics needed before collecting the pre-PCH + state. + +2019-08-23 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/91283 + * common.opt (fexcess-precision=): Add Optimization flag. Use + flag_excess_precision variable instead of + flag_excess_precision_cmdline. + * flags.h (class target_flag_state): Remove x_flag_excess_precision + member. + (flag_excess_precision): Don't define. + * langhooks.c (lhd_post_options): Set flag_excess_precision instead of + flag_excess_precision_cmdline. Remove comment. + * opts.c (set_fast_math_flags): Use frontend_set_flag_excess_precision + and x_flag_excess_precision instead of + frontend_set_flag_excess_precision_cmdline and + x_flag_excess_precision_cmdline. + (fast_math_flags_set_p): Use x_flag_excess_precision instead of + x_flag_excess_precision_cmdline. + * toplev.c (init_excess_precision): Remove. + (lang_dependent_init_target): Don't call it. + +2019-08-23 Martin Liska <mliska@suse.cz> + + * lto-wrapper.c (run_gcc): When setting jobserver + set also parallel to 1. This was done so before r273908. + +2019-08-23 Dennis Zhang <dennis.zhang@arm.com> + + * config/arm/arm-cpus.in (cortex-m35p): New entry. + (cortex-a76ae): Likewise. + (cortex-a77): Likewise + * config/arm/arm-tables.opt: Regenerate. + * config/arm/arm-tune.md: Likewise. + * doc/invoke.texi (ARM Options): Document cortex-m35p, cortx-a76ae, + cortex-a77 CPU options. + +2019-08-23 Martin Liska <mliska@suse.cz> + + * profile.c (instrument_values): Do not set + 0 as last argument. + * tree-profile.c (gimple_gen_interval_profiler): Remove + last argument. + (gimple_gen_pow2_profiler): Likewise. + (gimple_gen_topn_values_profiler): Likewise. + (gimple_gen_ic_profiler): Likewise. + (gimple_gen_time_profiler): Likewise. + (gimple_gen_average_profiler): Likewise. + (gimple_gen_ior_profiler): Likewise. + * value-prof.c (dump_histogram_value): Use default + in switch statement instead of HIST_TYPE_MAX. + (stream_in_histogram_value): Likewise. + (gimple_duplicate_stmt_histograms): Do not + use NULL for implicitly set arguments. + (gimple_divmod_values_to_profile): Do not use + reserve+quick_push. + (gimple_indirect_call_to_profile): Likewise. + (gimple_find_values_to_profile): Use implicit + function call arguments. + * value-prof.h (gimple_alloc_histogram_value): + Set default values. + (gimple_gen_interval_profiler): Remove last argument. + (gimple_gen_pow2_profiler): Likewise. + (gimple_gen_topn_values_profiler): Likewise. + (gimple_gen_ic_profiler): Likewise. + (gimple_gen_time_profiler): Likewise. + (gimple_gen_average_profiler): Likewise. + (gimple_gen_ior_profiler): Likewise. + +2019-08-22 Martin Sebor <msebor@redhat.com> + + PR middle-end/91490 + * builtins.c (c_strlen): Rename argument and introduce new local. + Set no-warning bit on original argument. + * expr.c (string_constant): Pass argument type to fold_ctor_reference. + Fold empty and zero constructors into empty strings. + * gimple-fold.c (fold_nonarray_ctor_reference): Return a STRING_CST + for missing initializers. + * tree.c (build_string_literal): Handle optional argument. + * tree.h (build_string_literal): Add defaulted argument. + * gimple-ssa-warn-restrict.c (maybe_diag_access_bounds): Check + no-warning bit on original expression. + +2019-08-22 Segher Boessenkool <segher@kernel.crashing.org> + + PR target/91481 + * config/rs6000/rs6000.md (unspec): Delete UNSPEC_DARN, UNSPEC_DARN_32, + and UNSPEC_DARN_RAW. + (unspecv): New enumerator values UNSPECV_DARN, UNSPECV_DARN_32, and + UNSPECV_DARN_RAW. + (darn_32): Use an unspec_volatile, and UNSPECV_DARN_32. + (darn_raw): Use an unspec_volatile, and UNSPECV_DARN_RAW. + (darn): Use an unspec_volatile, and UNSPECV_DARN. + +2019-08-22 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/altivec.md (unspec): Delete UNSPEC_DARN, UNSPEC_DARN_32, + UNSPEC_DARN_RAW, UNSPEC_CMPRB, UNSPEC_CMPRB2, UNSPEC_CMPEQB; move to... + * config/rs6000/rs6000.md (unspec): ... here. + * config/rs6000/altivec.md (darn_32, darn_raw, darn, cmprb, + *cmprb_internal, setb_signed, setb_unsigned, cmprb2, *cmprb2_internal, + cmpeqb, *cmpeqb_internal): Delete, move to... + * config/rs6000/rs6000.md (darn_32, darn_raw, darn, cmprb, + *cmprb_internal, setb_signed, setb_unsigned, cmprb2, *cmprb2_internal, + cmpeqb, *cmpeqb_internal): ... here. + +2019-08-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/arm_acle.h: Use arch=armv8-a+crc+simd pragma for CRC32 + intrinsics if __ARM_FP. + Use __ARM_FEATURE_CRC32 ifdef guard. + +2019-08-22 Wilco Dijkstra <wdijkstr@arm.com> + + * config/arm/arm.md (neon_for_64bits): Remove. + (avoid_neon_for_64bits): Remove. + (arm_adddi3): Always split early. + (arm_subdi3): Always split early. + (negdi2): Remove Neon expansion. + (split zero_extend): Split before reload. + (split sign_extend): Split before reload. + +2019-08-22 Wilco Dijkstra <wdijkstr@arm.com> + + * config/arm/iterators.md (qhs_extenddi_cstr): Update. + (qhs_extenddi_cstr): Likewise. + * config/arm/arm.md (ashldi3): Always expand early. + (ashlsi3): Likewise. + (ashrsi3): Likewise. + (zero_extend<mode>di2): Remove Neon variants. + (extend<mode>di2): Likewise. + * config/arm/neon.md (ashldi3_neon_noclobber): Remove. + (signed_shift_di3_neon): Likewise. + (unsigned_shift_di3_neon): Likewise. + (ashrdi3_neon_imm_noclobber): Likewise. + (lshrdi3_neon_imm_noclobber): Likewise. + (<shift>di3_neon): Likewise. + (split extend): Remove DI extend split patterns. + +2019-08-22 Wilco Dijkstra <wdijkstr@arm.com> + + * config/arm/arm.md (split and/eor/ior): Remove Neon check. + (split not): Add DImode not splitter. + (anddi3): Remove pattern. + (anddi3_insn): Likewise. + (anddi_zesidi_di): Likewise. + (anddi_sesdi_di): Likewise. + (anddi_notdi_di): Likewise. + (anddi_notzesidi_di): Likewise. + (anddi_notsesidi_di): Likewise. + (iordi3): Likewise. + (iordi3_insn): Likewise. + (iordi_zesidi_di): Likewise. + (iordi_sesidi_di): Likewise. + (xordi3): Likewise. + (xordi3_insn): Likewise. + (xordi_sesidi_di): Likewise. + (xordi_zesidi_di): Likewise. + (one_cmpldi2): Likewise. + (one_cmpldi2_insn): Likewise. + * config/arm/constraints.md: Remove De, Df, Dg constraints. + * config/arm/iwmmxt.md (iwmmxt_iordi3): Remove general register + alternative. + (iwmmxt_xordi3): Likewise. + (iwmmxt_anddi3): Likewise. + * config/arm/neon.md (orndi3_neon): Remove pattern. + (anddi_notdi_di): Likewise. + * config/arm/predicates.md (arm_anddi_operand_neon): Remove. + (arm_iordi_operand_neon): Likewise. + (arm_xordi_operand_neon): Likewise. + * config/arm/thumb2.md(iordi_notdi_di): Remove pattern. + (iordi_notzesidi_di): Likewise. + (iordi_notdi_zesidi): Likewise. + (iordi_notsesidi_di): Likewise. + +2019-08-22 Richard Earnshaw <rearnsha@arm.com> + + * config/arm/arm.md (iorsi3_compare0): Add alternative for 16-bit thumb + insn. + (iorsi3_compare0_scratch): Likewise. + +2019-08-22 Sylvia Taylor <sylvia.taylor@arm.com> + + * config/aarch64/aarch64-simd-builtins.def: + (ld1x4): New. + (st1x4): Likewise. + * config/aarch64/aarch64-simd.md: + (aarch64_ld1x4<VALLDIF:mode>): New pattern. + (aarch64_st1x4<VALLDIF:mode>): Likewise. + (aarch64_ld1_x4_<mode>): Likewise. + (aarch64_st1_x4_<mode>): Likewise. + * config/aarch64/arm_neon.h: + (vld1_s8_x4): New function. + (vld1q_s8_x4): Likewise. + (vld1_s16_x4): Likewise. + (vld1q_s16_x4): Likewise. + (vld1_s32_x4): Likewise. + (vld1q_s32_x4): Likewise. + (vld1_u8_x4): Likewise. + (vld1q_u8_x4): Likewise. + (vld1_u16_x4): Likewise. + (vld1q_u16_x4): Likewise. + (vld1_u32_x4): Likewise. + (vld1q_u32_x4): Likewise. + (vld1_f16_x4): Likewise. + (vld1q_f16_x4): Likewise. + (vld1_f32_x4): Likewise. + (vld1q_f32_x4): Likewise. + (vld1_p8_x4): Likewise. + (vld1q_p8_x4): Likewise. + (vld1_p16_x4): Likewise. + (vld1q_p16_x4): Likewise. + (vld1_s64_x4): Likewise. + (vld1_u64_x4): Likewise. + (vld1_p64_x4): Likewise. + (vld1q_s64_x4): Likewise. + (vld1q_u64_x4): Likewise. + (vld1q_p64_x4): Likewise. + (vld1_f64_x4): Likewise. + (vld1q_f64_x4): Likewise. + (vst1_s8_x4): Likewise. + (vst1q_s8_x4): Likewise. + (vst1_s16_x4): Likewise. + (vst1q_s16_x4): Likewise. + (vst1_s32_x4): Likewise. + (vst1q_s32_x4): Likewise. + (vst1_u8_x4): Likewise. + (vst1q_u8_x4): Likewise. + (vst1_u16_x4): Likewise. + (vst1q_u16_x4): Likewise. + (vst1_u32_x4): Likewise. + (vst1q_u32_x4): Likewise. + (vst1_f16_x4): Likewise. + (vst1q_f16_x4): Likewise. + (vst1_f32_x4): Likewise. + (vst1q_f32_x4): Likewise. + (vst1_p8_x4): Likewise. + (vst1q_p8_x4): Likewise. + (vst1_p16_x4): Likewise. + (vst1q_p16_x4): Likewise. + (vst1_s64_x4): Likewise. + (vst1_u64_x4): Likewise. + (vst1_p64_x4): Likewise. + (vst1q_s64_x4): Likewise. + (vst1q_u64_x4): Likewise. + (vst1q_p64_x4): Likewise. + (vst1_f64_x4): Likewise. + (vst1q_f64_x4): Likewise. + +2019-08-22 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org> + + * config/aarch64/aarch64-sve.md (vcond_mask): Add "@". + +2019-08-22 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org> + Richard Sandiford <richard.sandiford@arm.com> + + PR target/88839 + * config/aarch64/aarch64.c (aarch64_evpc_sel): New function. + (aarch64_expand_vec_perm_const_1): Call aarch64_evpc_sel. + +2019-08-21 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org> + + PR target/90724 + * config/aarch64/aarch64.c (aarch64_gen_compare_reg_maybe_ze): Force y + in reg if it fails aarch64_plus_operand predicate. + +2019-08-21 Richard Biener <rguenther@suse.de> + + PR tree-optimization/91482 + * tree-ssa-ccp.c (ccp_folder::fold_stmt): Remove useless + BUILT_IN_ASSUME_ALIGNED calls. + +2019-08-21 Richard Biener <rguenther@suse.de> + + PR target/91498 + PR target/91503 + * config/i386/i386-features.c + (general_scalar_chain::make_vector_copies): Copy stack temporary + rtx when using it multiple times. + (general_scalar_chain::convert_reg): Likewise. + +2019-08-20 Bernd Edlinger <bernd.edlinger@hotmail.de> + + * function.c (assign_parm_find_stack_rtl): Use known_eq instead of ==. + +2019-08-20 Matthew Beliveau <mbelivea@redhat.com> + + * tree-ssa-dse.c (dse_optimize_redundant_stores): Improved check to + catch more redundant zero initialization cases. + (dse_dom_walker::dse_optimize_stmt): Likewise. + +2019-08-20 Richard Biener <rguenther@suse.de> + + PR lto/91307 + * ipa.c (cgraph_build_static_cdtor_1): Use names not recognizable + by collect2 when targetm.have_ctors_dtors which avoids dragging + in temporary filenames from LTO input objects. + +2019-08-20 Richard Biener <rguenther@suse.de> + + PR tree-optimization/37242 + * tree-ssa-sccvn.c (visit_nary_op): Also CSE (T)(a + b) + to (T)a + (T)b if we know that a + b does not overflow. + +2019-08-20 Eric Botcazou <ebotcazou@adacore.com> + + PR rtl-optimization/91347 + * dse.c (scan_insn): Call add_wild_read for non-const/memset tail calls + before reload if HARD_FRAME_POINTER_IS_ARG_POINTER. + +2019-08-20 Richard Sandiford <richard.sandiford@arm.com> + + * calls.h (function_arg_info): Add a pass_by_reference field, + defaulting to false. + * calls.c (apply_pass_by_reference_rules): Set pass_by_reference + when applying pass-by-reference semantics. + (initialize_argument_information): Likewise. + (emit_library_call_value_1): Likewise. + * function.c (assign_parm_data_one): Remove passed_pointer field. + (assign_parm_find_data_types): Don't set it. + (assign_parm_find_stack_rtl, assign_parm_adjust_stack_rtl) + (assign_parm_setup_reg, assign_parms, gimplify_parameters): Use + arg.pass_by_reference instead of passed_pointer. + +2019-08-20 Richard Sandiford <richard.sandiford@arm.com> + + * calls.c (emit_library_call_value_1): Merge arg and orig_arg + into a single function_arg_info, updating its fields when we + apply pass-by-reference and promotion semantics. Use the + function_arg_info to track the mode rather than keeping it in + a separate local variable. + (initialize_argument_information): Likewise. Base the final + arg_to_skip on this new function_arg_info rather than creating + a new one from scratch. + +2019-08-20 Richard Sandiford <richard.sandiford@arm.com> + + * function.c (assign_parm_data_one): Replace passed_type, + promoted_mode and named_arg with a function_arg_info field. + (assign_parm_find_data_types): Remove local variables and + assign directly to "data". Make data->passed_mode shadow + data->arg.mode until promotion, then assign the promoted + mode to data->arg.mode. + (assign_parms_setup_varargs, assign_parm_find_entry_rtl) + (assign_parm_find_stack_rtl, assign_parm_adjust_entry_rtl) + (assign_parm_remove_parallels, assign_parm_setup_block_p) + (assign_parm_setup_block, assign_parm_setup_reg) + (assign_parm_setup_stack, assign_parms, gimplify_parameters): Use + arg.mode instead of promoted_mode, arg.type instead of passed_type + and arg.named instead of named_arg. Use data->arg for + function_arg_info structures that had the field values passed_type, + promoted_mode and named_arg. Base other function_arg_infos on + data->arg, changing the necessary properties. + +2019-08-20 Richard Sandiford <richard.sandiford@arm.com> + + * calls.h (apply_pass_by_reference_rules): Declare. + * calls.c (apply_pass_by_reference_rules): New function. + * config/c6x/c6x.c (c6x_call_saved_register_used): Use it. + * config/rs6000/rs6000-call.c (rs6000_parm_needs_stack): Likewise. + * config/s390/s390.c (s390_call_saved_register_used): Likewise. + * function.c (assign_parm_find_data_types): Likewise. + * var-tracking.c (prepare_call_arguments): Likewise. + +2019-08-20 Richard Sandiford <richard.sandiford@arm.com> + + * target.def (must_pass_in_stack): Take a function_arg_info instead + of a mode and a type. + * doc/tm.texi: Regenerate. + * calls.h (must_pass_in_stack_var_size): Take a function_arg_info + instead of a mode and a type. + (must_pass_in_stack_var_size_or_pad): Likewise. + * calls.c (must_pass_in_stack_var_size): Likewise. + (must_pass_in_stack_var_size_or_pad): Likewise. + (initialize_argument_information): Update call to + targetm.calls.must_pass_in_stack. + (must_pass_va_arg_on_stack): Likewise. + * function.c (assign_parm_find_entry_rtl): Likewise. + * targhooks.c (hook_pass_by_reference_must_pass_in_stack): Likewise. + * config/alpha/alpha.c (alpha_function_arg): Likewise. + (alpha_function_arg_advance): Likewise. + * config/cr16/cr16.c (cr16_function_arg): Likewise. + (cr16_function_arg_advance): Likewise. + * config/cris/cris.c (cris_pass_by_reference): Likewise. + (cris_arg_partial_bytes): Likewise. + * config/iq2000/iq2000.c (iq2000_pass_by_reference): Likewise. + * config/lm32/lm32.c (lm32_function_arg): Likewise. + * config/mcore/mcore.c (mcore_num_arg_regs): Likewise. + (mcore_function_arg, mcore_arg_partial_bytes): Likewise. + * config/mips/mips.c (mips_pass_by_reference): Likewise. + * config/mmix/mmix.c (mmix_function_arg_advance): Likewise. + (mmix_function_arg_1, mmix_pass_by_reference): Likewise. + * config/sh/sh.c (sh_pass_by_reference): Likewise. + * config/stormy16/stormy16.c (xstormy16_function_arg): Likewise. + * config/xtensa/xtensa.c (xtensa_function_arg_advance): Likewise. + * config/arm/arm.c (arm_must_pass_in_stack): Take a function_arg_info + instead of a mode and a type. + * config/fr30/fr30.c (fr30_must_pass_in_stack): Likewise. + (fr30_num_arg_regs): Likewise. + (fr30_setup_incoming_varargs): Update calls accordingly. + (fr30_arg_partial_bytes, fr30_function_arg): Likewise. + (fr30_function_arg_advance): Likewise. + * config/frv/frv.c (frv_must_pass_in_stack): Take a function_arg_info + instead of a mode and a type. + * config/gcn/gcn.c (num_arg_regs): Likewise. + (gcn_function_arg, gcn_function_arg_advance): Update calls to + num_arg_regs and targetm.calls.must_pass_in_stack. + (gcn_arg_partial_bytes): Likewise. + * config/i386/i386.c (ix86_must_pass_in_stack): Take a + function_arg_info instead of a mode and a type. + (classify_argument): Update call accordingly. + * config/nds32/nds32.c (nds32_must_pass_in_stack): Take a + function_arg_info instead of a mode and a type. + * config/rs6000/rs6000-internal.h (rs6000_must_pass_in_stack): + Likewise. + * config/rs6000/rs6000-call.c (rs6000_must_pass_in_stack): Likewise. + (rs6000_parm_needs_stack): Update call accordingly. + (setup_incoming_varargs): Likewise. + +2019-08-20 Richard Sandiford <richard.sandiford@arm.com> + + * target.def (callee_copies): Take a function_arg_info instead + of a mode, type and named flag. + * doc/tm.texi: Regenerate. + * targhooks.h (hook_callee_copies_named): Take a function_arg_info + instead of a mode, type and named flag. + (hook_bool_CUMULATIVE_ARGS_mode_tree_bool_false): Delete. + (hook_bool_CUMULATIVE_ARGS_mode_tree_bool_true): Likewise. + (hook_bool_CUMULATIVE_ARGS_arg_info_true): New function. + * targhooks.c (hook_callee_copies_named): Take a function_arg_info + instead of a mode, type and named flag. + (hook_bool_CUMULATIVE_ARGS_mode_tree_bool_false): Delete. + (hook_bool_CUMULATIVE_ARGS_mode_tree_bool_true): Likewise. + (hook_bool_CUMULATIVE_ARGS_arg_info_true): New function. + * calls.h (reference_callee_copied): Take a function_arg_info + instead of a mode, type and named flag. + * calls.c (reference_callee_copied): Likewise. + (initialize_argument_information): Update call accordingly. + (emit_library_call_value_1): Likewise. + * function.c (gimplify_parameters): Likewise. + * config/aarch64/aarch64.c (TARGET_CALLEE_COPIES): Define to + hook_bool_CUMULATIVE_ARGS_arg_info_false instead of + hook_bool_CUMULATIVE_ARGS_mode_tree_bool_false. + * config/c6x/c6x.c (c6x_callee_copies): Delete. + (TARGET_CALLEE_COPIES): Define to + hook_bool_CUMULATIVE_ARGS_arg_info_true instead. + * config/epiphany/epiphany.c (TARGET_CALLEE_COPIES): Define to + hook_bool_CUMULATIVE_ARGS_arg_info_true instead of + hook_bool_CUMULATIVE_ARGS_mode_tree_bool_true. + * config/mips/mips.c (mips_callee_copies): Take a function_arg_info + instead of a mode, type and named flag. + * config/mmix/mmix.c (TARGET_CALLEE_COPIES): Define to + hook_bool_CUMULATIVE_ARGS_arg_info_true instead of + hook_bool_CUMULATIVE_ARGS_mode_tree_bool_true. + * config/mn10300/mn10300.c (TARGET_CALLEE_COPIES): Likewise. + * config/msp430/msp430.c (msp430_callee_copies): Delete. + (TARGET_CALLEE_COPIES): Define to + hook_bool_CUMULATIVE_ARGS_arg_info_true instead. + * config/pa/pa.c (pa_callee_copies): Take a function_arg_info + instead of a mode, type and named flag. + * config/sh/sh.c (sh_callee_copies): Likewise. + * config/v850/v850.c (TARGET_CALLEE_COPIES): Define to + hook_bool_CUMULATIVE_ARGS_arg_info_true instead of + hook_bool_CUMULATIVE_ARGS_mode_tree_bool_true. + +2019-08-20 Richard Sandiford <richard.sandiford@arm.com> + + * target.def (function_arg_advance): Take a function_arg_info instead + of a mode, type and named flag. + * doc/tm.texi: Regenerate. + * targhooks.h (default_function_arg_advance): Take a function_arg_info + instead of a mode, type and named flag. + * targhooks.c (default_function_arg_advance): Likewise. + * calls.c (initialize_argument_information): Update call to + targetm.calls.function_arg_advance. + (emit_library_call_value_1): Likewise. + * dse.c (get_call_args): Likewise. + * expr.c (block_move_libcall_safe_for_call_parm): Likewise. + * function.c (assign_parms, gimplify_parameters): Likewise. + * var-tracking.c (prepare_call_arguments): Likewise. + * config/aarch64/aarch64.c (aarch64_function_arg_advance): Take a + function_arg_info instead of a mode, type and named flag. + (aarch64_setup_incoming_varargs): Update call accordingly. + * config/alpha/alpha.c (alpha_function_arg_advance): Take a + function_arg_info instead of a mode, type and named flag. + (alpha_setup_incoming_varargs): Update call accordingly. + * config/arc/arc.c (arc_function_arg_advance): Take a + function_arg_info instead of a mode, type and named flag. + (arc_setup_incoming_varargs): Update call accordingly. + * config/arm/arm.c (arm_function_arg_advance): Take a + function_arg_info instead of a mode, type and named flag. + (cmse_func_args_or_return_in_stack): Update call accordingly. + (arm_function_ok_for_sibcall): Likewise. + (cmse_nonsecure_call_clear_caller_saved): Likewise. + * config/avr/avr.c (avr_function_arg_advance): Take a + function_arg_info instead of a mode, type and named flag. + * config/bfin/bfin.c (bfin_function_arg_advance): Likewise. + * config/c6x/c6x.c (c6x_function_arg_advance): Likewise. + (c6x_call_saved_register_used): Update call accordingly. + * config/cr16/cr16.c (cr16_function_arg_advance): Take a + function_arg_info instead of a mode, type and named flag. + * config/cris/cris.c (cris_function_arg_advance): Likewise. + * config/csky/csky.c (csky_function_arg_advance): Likewise. + (csky_setup_incoming_varargs): Update call accordingly. + * config/epiphany/epiphany.c (epiphany_function_arg_advance): Take a + function_arg_info instead of a mode, type and named flag. + * config/fr30/fr30.c (fr30_function_arg_advance): Likewise. + * config/frv/frv.c (frv_function_arg_advance): Likewise. + * config/ft32/ft32.c (ft32_function_arg_advance): Likewise. + * config/gcn/gcn.c (gcn_function_arg_advance): Likewise. + * config/h8300/h8300.c (h8300_function_arg_advance): Likewise. + * config/i386/i386.c (ix86_function_arg_advance): Likewise. + (ix86_setup_incoming_varargs): Update call accordingly. + * config/ia64/ia64.c (ia64_function_arg_advance): Take a + function_arg_info instead of a mode, type and named flag. + (ia64_setup_incoming_varargs): Update call accordingly. + * config/iq2000/iq2000.c (iq2000_function_arg_advance): Take a + function_arg_info instead of a mode, type and named flag. + (iq2000_expand_prologue): Update call accordingly. + * config/lm32/lm32.c (lm32_function_arg_advance): Take a + function_arg_info instead of a mode, type and named flag. + * config/m32c/m32c.c (m32c_function_arg_advance): Likewise. + * config/m32r/m32r.c (m32r_function_arg_advance): Likewise. + * config/m68k/m68k.c (m68k_function_arg_advance): Likewise. + * config/mcore/mcore.c (mcore_function_arg_advance): Likewise. + * config/microblaze/microblaze.c (microblaze_function_arg_advance): + Likewise. + (microblaze_expand_prologue): Update call accordingly. + * config/mips/mips.c (mips_function_arg_advance): Take a + function_arg_info instead of a mode, type and named flag. + (mips_setup_incoming_varargs): Update call accordingly. + (mips_output_args_xfer): Likewise. + * config/mmix/mmix.c (mmix_function_arg_advance): Take a + function_arg_info instead of a mode, type and named flag. + * config/mn10300/mn10300.c (mn10300_function_arg_advance): Likewise. + * config/moxie/moxie.c (moxie_function_arg_advance): Likewise. + * config/msp430/msp430.c (msp430_function_arg_advance): Likewise. + * config/nds32/nds32.c (nds32_function_arg_advance): Likewise. + * config/nios2/nios2.c (nios2_function_arg_advance): Likewise. + (nios2_setup_incoming_varargs): Update call accordingly. + * config/nvptx/nvptx.c (nvptx_function_arg_advance): Take a + function_arg_info instead of a mode, type and named flag. + * config/or1k/or1k.c (or1k_function_arg_advance): Likewise. + * config/pa/pa.c (pa_function_arg_advance): Likewise. + * config/pdp11/pdp11.c (pdp11_function_arg_advance): Likewise. + * config/pru/pru.c (pru_function_arg_advance): Likewise. + * config/riscv/riscv.c (riscv_function_arg_advance): Likewise. + (riscv_setup_incoming_varargs): Update call accordingly. + * config/rl78/rl78.c (rl78_function_arg_advance): Take a + function_arg_info instead of a mode, type and named flag. + * config/rs6000/rs6000-internal.h (rs6000_function_arg_advance): + Likewise. + * config/rs6000/rs6000-call.c (rs6000_function_arg_advance): Likewise. + (rs6000_parm_needs_stack): Update call accordingly. + * config/rx/rx.c (rx_function_arg_advance): Take a function_arg_info + instead of a mode, type and named flag. + * config/s390/s390.c (s390_function_arg_advance): Likewise. + (s390_call_saved_register_used): Update call accordingly. + * config/sh/sh.c (sh_function_arg_advance): Take a function_arg_info + instead of a mode, type and named flag. + (sh_output_mi_thunk): Update call accordingly. + * config/sparc/sparc.c (sparc_function_arg_advance): Take a + function_arg_info instead of a mode, type and named flag. + * config/spu/spu.c (spu_function_arg_advance): Likewise. + (spu_setup_incoming_varargs): Update call accordingly. + * config/stormy16/stormy16.c (xstormy16_function_arg_advance): Take a + function_arg_info instead of a mode, type and named flag. + * config/tilegx/tilegx.c (tilegx_function_arg_advance): Likewise. + (tilegx_setup_incoming_varargs): Update call accordingly. + * config/tilepro/tilepro.c (tilepro_function_arg_advance): Take a + function_arg_info instead of a mode, type and named flag. + (tilegx_setup_incoming_varargs): Update call accordingly. + * config/v850/v850.c (v850_function_arg_advance): Take a + function_arg_info instead of a mode, type and named flag. + * config/vax/vax.c (vax_function_arg_advance): Likewise. + * config/visium/visium.c (visium_function_arg_advance): Likewise. + (visium_setup_incoming_varargs): Update call accordingly. + * config/xtensa/xtensa.c (xtensa_function_arg_advance): Take a + function_arg_info instead of a mode, type and named flag. + +2019-08-20 Richard Sandiford <richard.sandiford@arm.com> + + * target.def (function_arg, function_incoming_arg): Take a + function_arg_info instead of a mode, tree and named flag. + * doc/tm.texi: Regenerate. + * targhooks.h (default_function_arg): Take a function_arg_info + instead of a mode, tree and named flag. + (default_function_incoming_arg): Likewise. + * targhooks.c (default_function_arg): Likewise. + (default_function_incoming_arg): Likewise. + * calls.h (function_arg_info::end_marker_p): New function. + (function_arg_info::end_marker): Likewise. + * calls.c (prepare_call_address, initialize_argument_information) + (expand_call, emit_library_call_value_1): Update calls to + targetm.calls.function_arg and targetm.calls.function_incoming_arg. + * dse.c: Include calls.h. + (get_call_args): Update call to targetm.calls.function_arg. + * expr.c (block_move_libcall_safe_for_call_parm): Likewise. + * var-tracking.c (prepare_call_arguments): Likewise. + * function.c (assign_parm_find_entry_rtl): Update call to + targetm.calls.function_incoming_arg. + * config/aarch64/aarch64.c (aarch64_function_arg): Take a + function_arg_info instead of a mode, tree and named flag. + * config/alpha/alpha.c (alpha_function_arg): Likewise. + * config/arc/arc.c (arc_function_arg): Likewise. + * config/arm/arm.c (arm_function_arg): Likewise. + (cmse_func_args_or_return_in_stack): Update call accordingly. + (arm_function_ok_for_sibcall): Likewise. + (cmse_nonsecure_call_clear_caller_saved): Likewise. + * config/avr/avr.c (avr_function_arg): Take a function_arg_info + instead of a mode, tree and named flag. + * config/bfin/bfin.c (bfin_function_arg): Likewise. + * config/c6x/c6x.c (c6x_function_arg): Likewise. + (c6x_call_saved_register_used): Update call accordingly. + * config/cr16/cr16.c (cr16_function_arg): Take a function_arg_info + instead of a mode, tree and named flag. + * config/cris/cris.c (cris_function_arg, cris_function_incoming_arg) + (cris_function_arg_1): Likewise. + * config/csky/csky.c (csky_function_arg): Likewise. + * config/epiphany/epiphany.c (epiphany_function_arg): Likewise. + * config/fr30/fr30.c (fr30_function_arg): Likewise. + * config/frv/frv.c (frv_function_arg, frv_function_incoming_arg) + (frv_function_arg_1): Likewise. + * config/ft32/ft32.c (ft32_function_arg): Likewise. + * config/gcn/gcn.c (gcn_function_arg): Likewise. + * config/h8300/h8300.c (h8300_function_arg): Likewise. + * config/i386/i386.c (ix86_function_arg): Likewise. + * config/ia64/ia64.c (ia64_function_arg, ia64_function_incoming_arg) + (ia64_function_arg_1): Likewise. + * config/iq2000/iq2000.c (iq2000_function_arg): Likewise. + (iq2000_expand_prologue, iq2000_pass_by_reference): Update call + accordingly. + * config/lm32/lm32.c (lm32_function_arg): Take a function_arg_info + instead of a mode, tree and named flag. + * config/m32c/m32c.c (m32c_function_arg): Likewise. + * config/m32r/m32r.c (m32r_function_arg): Likewise. + * config/m68k/m68k.c (m68k_function_arg): Likewise. + * config/mcore/mcore.c (mcore_function_arg): Likewise. + * config/microblaze/microblaze.c (microblaze_function_arg): Likewise. + (microblaze_expand_prologue): Update call accordingly. + * config/mips/mips.c (mips_function_arg): Take a function_arg_info + instead of a mode, tree and named flag. + * config/mmix/mmix.c (mmix_function_incoming_arg, mmix_function_arg) + (mmix_function_arg_1): Likewise. + * config/mn10300/mn10300.c (mn10300_function_arg): Likewise. + * config/moxie/moxie.c (moxie_function_arg): Likewise. + * config/msp430/msp430.c (msp430_function_arg): Likewise. + * config/nds32/nds32.c (nds32_function_arg): Likewise. + * config/nios2/nios2.c (nios2_function_arg): Likewise. + * config/nvptx/nvptx.c (nvptx_function_arg): Likewise. + (nvptx_function_incoming_arg): Likewise. + * config/or1k/or1k.c (or1k_function_arg): Likewise. + * config/pa/pa.c (pa_function_arg): Likewise. + * config/pdp11/pdp11.c (pdp11_function_arg): Likewise. + * config/pru/pru.c (pru_function_arg): Likewise. + * config/riscv/riscv.c (riscv_function_arg): Likewise. + * config/rl78/rl78.c (rl78_function_arg): Likewise. + * config/rs6000/rs6000-internal.h (rs6000_function_arg): Likewise. + * config/rs6000/rs6000-call.c (rs6000_function_arg): Likewise. + (rs6000_parm_needs_stack): Update call accordingly. + * config/rx/rx.c (rx_function_arg): Take a function_arg_info + instead of a mode, tree and named flag. + * config/s390/s390.c (s390_function_arg): Likewise. + (s390_call_saved_register_used): Update call accordingly. + * config/sh/sh.c (sh_function_arg): Take a function_arg_info + instead of a mode, tree and named flag. + (sh_output_mi_thunk): Update call accordingly. + * config/sparc/sparc.c (sparc_function_arg_1, sparc_function_arg) + (sparc_function_incoming_arg): Take a function_arg_info instead of + a mode, tree and named flag. + * config/spu/spu.c (spu_function_arg): Likewise. + * config/stormy16/stormy16.c (xstormy16_function_arg): Likewise. + * config/tilegx/tilegx.c (tilegx_function_arg): Likewise. + * config/tilepro/tilepro.c (tilepro_function_arg): Likewise. + * config/v850/v850.c (v850_function_arg): Likewise. + * config/vax/vax.c (vax_function_arg): Likewise. + * config/visium/visium.c (visium_function_arg): Likewise. + * config/xtensa/xtensa.c (xtensa_function_arg_1, xtensa_function_arg) + (xtensa_function_incoming_arg): Likewise. + +2019-08-20 Richard Sandiford <richard.sandiford@arm.com> + + * target.def (setup_incoming_varargs): Take a function_arg_info + instead of a mode and tree. + * doc/tm.texi: Regenerate. + * targhooks.h (default_setup_incoming_varargs): Take a + function_arg_info instead of a mode and tree. + * targhooks.c (default_setup_incoming_varargs): Likewise. + * config/aarch64/aarch64.c (aarch64_setup_incoming_varargs): Likewise. + * config/alpha/alpha.c (alpha_setup_incoming_varargs): Likewise. + * config/arc/arc.c (arc_setup_incoming_varargs): Likewise. + * config/arm/arm.c (arm_setup_incoming_varargs): Likewise. + * config/bfin/bfin.c (setup_incoming_varargs): Likewise. + * config/cris/cris.c (cris_setup_incoming_varargs): Likewise. + * config/csky/csky.c (csky_setup_incoming_varargs): Likewise. + * config/epiphany/epiphany.c (epiphany_setup_incoming_varargs): + Likewise. + * config/fr30/fr30.c (fr30_setup_incoming_varargs): Likewise. + * config/frv/frv.c (frv_setup_incoming_varargs): Likewise. + * config/ft32/ft32.c (ft32_setup_incoming_varargs): Likewise. + * config/i386/i386.c (ix86_setup_incoming_varargs): Likewise. + * config/ia64/ia64.c (ia64_setup_incoming_varargs): Likewise. + * config/iq2000/iq2000.c (iq2000_setup_incoming_varargs): Likewise. + * config/lm32/lm32.c (lm32_setup_incoming_varargs): Likewise. + * config/m32r/m32r.c (m32r_setup_incoming_varargs): Likewise. + * config/mcore/mcore.c (mcore_setup_incoming_varargs): Likewise. + * config/mips/mips.c (mips_setup_incoming_varargs): Likewise. + * config/mmix/mmix.c (mmix_setup_incoming_varargs): Likewise. + * config/moxie/moxie.c (moxie_setup_incoming_varargs): Likewise. + * config/nds32/nds32.c (nds32_setup_incoming_varargs): Likewise. + * config/nios2/nios2.c (nios2_setup_incoming_varargs): Likewise. + * config/riscv/riscv.c (riscv_setup_incoming_varargs): Likewise. + * config/rs6000/rs6000-internal.h (setup_incoming_varargs): Likewise. + * config/rs6000/rs6000-call.c (setup_incoming_varargs): Likewise. + * config/sh/sh.c (sh_setup_incoming_varargs): Likewise. + * config/spu/spu.c (spu_setup_incoming_varargs): Likewise. + * config/tilegx/tilegx.c (tilegx_setup_incoming_varargs): Likewise. + * config/tilepro/tilepro.c (tilepro_setup_incoming_varargs): Likewise. + * config/visium/visium.c (visium_setup_incoming_varargs): Likewise. + * function.c (assign_parms_setup_varargs): Update call to + targetm.calls.setup_incoming_varargs. + +2019-08-20 Richard Sandiford <richard.sandiford@arm.com> + + * target.def (pass_by_reference): Take a function_arg_info instead + of a mode, type and named flag. + * doc/tm.texi: Regenerate. + * targhooks.h (hook_pass_by_reference_must_pass_in_stack): Update + accordingly. + (hook_bool_CUMULATIVE_ARGS_arg_info_false): Declare. + * targhooks.c (hook_pass_by_reference_must_pass_in_stack): Take a + function_arg_info instead of a mode, type and named flag. + (hook_bool_CUMULATIVE_ARGS_arg_info_false): New function. + * calls.h (pass_by_reference): Take a function_arg_info instead of a + mode, type and named flag. + * calls.c (pass_by_reference): Likewise. + (pass_va_arg_by_reference): Update call accordingly. + (initialize_argument_information): Likewise. + (emit_library_call_value_1): Likewise. + * function.c (assign_parm_find_data_types): Likewise. + * var-tracking.c (prepare_call_arguments): Likewise. + * stor-layout.c: Include calls.h. + (compute_record_mode): Update call to targetm.calls.pass_by_reference. + * config/aarch64/aarch64.c (aarch64_pass_by_reference): Take a + function_arg_info instead of a mode, type and named flag. + * config/alpha/alpha.c (alpha_pass_by_reference): Likewise. + * config/arc/arc.c (arc_pass_by_reference): Likewise. + * config/arm/arm.c (arm_pass_by_reference): Likewise. + * config/bfin/bfin.c (bfin_pass_by_reference): Likewise. + * config/c6x/c6x.c (c6x_pass_by_reference): Likewise. + (c6x_call_saved_register_used): Update call to pass_by_reference. + * config/cris/cris.c (cris_pass_by_reference): Take a + function_arg_info instead of a mode, type and named flag. + * config/epiphany/epiphany.c (epiphany_pass_by_reference): Take a + function_arg_info instead of a mode, type and named flag. + (epiphany_arg_partial_bytes): Update call accordingly. + * config/ft32/ft32.c (ft32_pass_by_reference): Take a + function_arg_info instead of a mode, type and named flag. + (ft32_arg_partial_bytes): Update call accordingly. + * config/i386/i386.c (ix86_pass_by_reference): Take a + function_arg_info instead of a mode, type and named flag. + * config/iq2000/iq2000.c (iq2000_pass_by_reference): Likewise. + * config/m32c/m32c.c (m32c_pass_by_reference): Likewise. + * config/m32r/m32r.c (m32r_pass_by_reference): Likewise. + (m32r_return_in_memory): Update call accordingly. + * config/mips/mips.c (mips_pass_by_reference): Take a + function_arg_info instead of a mode, type and named flag. + * config/mmix/mmix.c (mmix_pass_by_reference): Likewise. + * config/mn10300/mn10300.c (mn10300_pass_by_reference): Likewise. + * config/moxie/moxie.c (moxie_pass_by_reference): Likewise. + (moxie_arg_partial_bytes): Update call accordingly. + * config/msp430/msp430.c (msp430_pass_by_reference): Take a + function_arg_info instead of a mode, type and named flag. + * config/nvptx/nvptx.c (nvptx_pass_by_reference): Likewise. + * config/or1k/or1k.c (or1k_pass_by_reference): Likewise. + * config/pa/pa.c (pa_pass_by_reference): Likewise. + * config/riscv/riscv.c (riscv_pass_by_reference): Likewise. + (riscv_return_in_memory): Update call accordingly. + * config/rs6000/rs6000-internal.h (rs6000_pass_by_reference): Take a + function_arg_info instead of a mode, type and named flag. + * config/rs6000/rs6000-call.c (rs6000_pass_by_reference): Likewise. + (rs6000_parm_needs_stack): Update call to pass_by_reference. + * config/s390/s390.c (s390_pass_by_reference): Take a + function_arg_info instead of a mode, type and named flag. + (s390_call_saved_register_used): Update call accordingly. + * config/sh/sh.c (sh_pass_by_reference): Take a function_arg_info + instead of a mode, type and named flag. + * config/sparc/sparc.c (sparc_pass_by_reference): Likewise. + * config/spu/spu.c (spu_pass_by_reference): Likewise. + * config/tilegx/tilegx.c (tilegx_pass_by_reference): Likewise. + * config/tilepro/tilepro.c (tilepro_pass_by_reference): Likewise. + * config/v850/v850.c (v850_pass_by_reference): Likewise. + * config/visium/visium.c (visium_pass_by_reference): Likewise. + +2019-08-20 Richard Sandiford <richard.sandiford@arm.com> + + * target.def (arg_partial_bytes): Take a function_arg_info instead + of a mode, type and named flag. + * doc/tm.texi: Regenerate. + * target.h (function_arg_info): Declare. + * calls.h (function_arg_info): New class. + * targhooks.h (hook_int_CUMULATIVE_ARGS_mode_tree_bool_0): Delete. + (hook_int_CUMULATIVE_ARGS_arg_info_0): Declare. + * targhooks.c (hook_int_CUMULATIVE_ARGS_mode_tree_bool_0): Delete. + (hook_int_CUMULATIVE_ARGS_arg_info_0): New function. + * calls.c (initialize_argument_information): Update call to + targetm.calls.partial_bytes. + (emit_library_call_value_1): Likewise. + * expr.c (block_move_libcall_safe_for_call_parm): Likewise. + * function.c (assign_parm_find_entry_rtl): Likewise. + * config/alpha/alpha.c (alpha_arg_partial_bytes): Take a + function_arg_info instead of a mode, type and named flag. + * config/arc/arc.c (arc_arg_partial_bytes): Likewise. + * config/arm/arm.c (arm_arg_partial_bytes): Likewise. + (cmse_func_args_or_return_in_stack): Update accordingly. + * config/bfin/bfin.c (bfin_arg_partial_bytes): Take a + function_arg_info instead of a mode, type and named flag. + * config/cris/cris.c (cris_arg_partial_bytes): Likewise. + * config/csky/csky.c (csky_arg_partial_bytes): Likewise. + * config/epiphany/epiphany.c (epiphany_arg_partial_bytes): Likewise. + * config/fr30/fr30.c: Include calls.h. + (fr30_arg_partial_bytes): Take a function_arg_info instead of a mode, + type and named flag. + * config/frv/frv.c: Include calls.h. + (frv_arg_partial_bytes): Take a function_arg_info instead of a mode, + type and named flag. + * config/ft32/ft32.c (ft32_arg_partial_bytes): Likewise. + * config/gcn/gcn.c (gcn_arg_partial_bytes): Likewise. + * config/ia64/ia64.c (ia64_arg_partial_bytes): Likewise. + * config/iq2000/iq2000.c (iq2000_arg_partial_bytes): Likewise. + * config/m32r/m32r.c (m32r_arg_partial_bytes): Likewise. + * config/mcore/mcore.c (mcore_arg_partial_bytes): Likewise. + * config/microblaze/microblaze.c (function_arg_partial_bytes): + Likewise. + * config/mips/mips.c (mips_arg_partial_bytes): Likewise. + * config/mn10300/mn10300.c (mn10300_arg_partial_bytes): Likewise. + * config/moxie/moxie.c (moxie_arg_partial_bytes): Likewise. + * config/msp430/msp430.c (msp430_arg_partial_bytes): Likewise. + * config/nds32/nds32.c (nds32_arg_partial_bytes): Likewise. + * config/nios2/nios2.c (nios2_arg_partial_bytes): Likewise. + * config/pa/pa.c (pa_arg_partial_bytes): Likewise. + * config/pru/pru.c (pru_arg_partial_bytes): Likewise. + * config/riscv/riscv.c (riscv_arg_partial_bytes): Likewise. + * config/rs6000/rs6000-internal.h (rs6000_arg_partial_bytes): Likewise. + * config/rs6000/rs6000-call.c (rs6000_arg_partial_bytes): Likewise. + (rs6000_parm_needs_stack): Update call accordingly. + * config/sh/sh.c (sh_arg_partial_bytes): Take a + function_arg_info instead of a mode, type and named flag. + * config/sparc/sparc.c (sparc_arg_partial_bytes): Likewise. + * config/v850/v850.c (v850_arg_partial_bytes): Likewise. + +2019-08-20 Richard Sandiford <richard.sandiford@arm.com> + + * calls.h (must_pass_va_arg_in_stack): Declare. + * calls.c (must_pass_va_arg_in_stack): New function. + * config/alpha/alpha.c (alpha_gimplify_va_arg_1): Use it. + * config/sh/sh.c (sh_gimplify_va_arg_expr): Likewise. + * config/stormy16/stormy16.c (xstormy16_gimplify_va_arg_expr): + Likewise. + * config/xtensa/xtensa.c (xtensa_gimplify_va_arg_expr): Likewise. + +2019-08-20 Richard Sandiford <richard.sandiford@arm.com> + + * calls.h (pass_va_arg_by_reference): Declare. + * calls.c (pass_va_arg_by_reference): New function. + * config/aarch64/aarch64.c (aarch64_gimplify_va_arg_expr): Use it. + * config/alpha/alpha.c (alpha_gimplify_va_arg): Likewise. + * config/gcn/gcn.c (gcn_gimplify_va_arg_expr): Likewise. + * config/i386/i386.c (ix86_gimplify_va_arg): Likewise. + * config/ia64/ia64.c (ia64_gimplify_va_arg): Likewise. + * config/mips/mips.c (mips_std_gimplify_va_arg_expr): Likewise. + (mips_gimplify_va_arg_expr): Likewise. + * config/msp430/msp430.c (msp430_gimplify_va_arg_expr): Likewise. + * config/pa/pa.c (hppa_gimplify_va_arg_expr): Likewise. + * config/rs6000/rs6000-call.c (rs6000_gimplify_va_arg): Likewise. + * config/s390/s390.c (s390_gimplify_va_arg): Likewise. + * config/sparc/sparc.c (sparc_gimplify_va_arg): Likewise. + * config/spu/spu.c (spu_gimplify_va_arg_expr): Likewise. + * config/tilegx/tilegx.c (tilegx_gimplify_va_arg_expr): Likewise. + * config/tilepro/tilepro.c (tilepro_gimplify_va_arg_expr): Likewise. + * config/visium/visium.c (visium_gimplify_va_arg): Likewise. + * config/xtensa/xtensa.c (xtensa_gimplify_va_arg_expr): Likewise. + * targhooks.c (std_gimplify_va_arg_expr): Likewise. + +2019-08-20 Richard Biener <rguenther@suse.de> + + PR target/91498 + * config/i386/i386-features.c (general_scalar_chain::convert_op): + Use (vec_merge (vec_duplicate..)) style vector from scalar move. + (convert_scalars_to_vector): Add timode_p parameter and use it + to guard TImode-only operation. + (pass_stv::gate): Adjust so STV runs twice for TARGET_64BIT. + (pass_stv::execute): Pass down timode_p. + +2019-08-20 Lili Cui <lili.cui@intel.com> + + * common/config/i386/i386-common.c + (processor_names): Add tigerlake and cooperlake. + (processor_alias_table): Add tigerlake and cooperlake. + * config.gcc: Add -march=tigerlake and cooperlake. + * config/i386/driver-i386.c + (host_detect_local_cpu): Detect tigerlake and cooperlake. + Add "has_avx" to classify processor. + * config/i386/i386-builtins.c (processor_model) : + Add M_INTEL_COREI7_TIGERLAKE and M_INTEL_COREI7_COOPERLAKE. + (arch_names_table): Add tigerlake and cooperlake. + (get_builtin_code_for_version): Handle PROCESSOR_TIGERLAKE + and PROCESSOR_COOPERLAKE. + * config/i386/i386-c.c + (ix86_target_macros_internal): Handle tigerlake and cooperlake. + * config/i386/i386-options.c + (m_TIGERLAKE): Define. + (m_COOPERLAKE): Ditto. + (m_CORE_AVX512): Ditto. + (processor_cost_table): Add cascadelake. + (ix86_option_override_internal): Hadle PTA_MOVDIRI, PTA_MOVDIR64B. + * config/i386/i386.h + (ix86_size_cost): Define TARGET_TIGERLAKE and TARGET_COOPERLAKE. + (processor_type): Add PROCESSOR_TIGERLAKE and PROCESSOR_COOPERLAKE. + (PTA_MOVDIRI): Ditto. + (PTA_MOVDIR64B): Ditto. + (PTA_COOPERLAKE): Ditto. + (PTA_TIGERLAKE): Ditto. + (processor_type): Add PROCESSOR_TIGERLAKE and PROCESSOR_COOPERLAKE. + * doc/extend.texi: Add tigerlake and cooperlake. + * doc/invoke.texi: Add tigerlake and cooperlake. + +2019-08-20 Gerald Pfeifer <gerald@pfeifer.com> + + * doc/install.texi (Specific, alpha): Remove note to use + binutils 2.11.2 or later. + +2019-08-20 Bernd Edlinger <bernd.edlinger@hotmail.de> + + PR middle-end/89544 + * function.c (assign_parm_find_stack_rtl): Use larger alignment + when possible. + +2019-08-19 Joel Hutton <Joel.Hutton@arm.com> + + * config/aarch64/aarch64-protos.h (aarch64_fpconst_pow2_recip): New prototype + * config/aarch64/aarch64.c (aarch64_fpconst_pow2_recip): New function + * config/aarch64/aarch64.md (*aarch64_<su_optab>cvtf<fcvt_target><GPF:mode>2_mult): New pattern + (*aarch64_<su_optab>cvtf<fcvt_iesize><GPF:mode>2_mult): New pattern + * config/aarch64/constraints.md (Dt): New constraint + * config/aarch64/predicates.md (aarch64_fpconst_pow2_recip): New predicate + +2019-08-19 Richard Biener <rguenther@suse.de> + + PR tree-optimization/91403 + * tree-scalar-evolution.c (follow_ssa_edge_binary): Inline + cases we can handle with tail-recursion... + (follow_ssa_edge_expr): ... here. Do so. + +2019-08-19 Kito Cheng <kito.cheng@sifive.com> + + PR target/91441 + * toplev.c (process_options): Check TARGET_ASAN_SHADOW_OFFSET is + implemented for -fsanitize=kernel-address, and merge check logic + with -fsanitize=address. + +2019-08-18 Iain Sandoe <iain@sandoe.co.uk> + + * config/rs6000/darwin.h (TARGET_OS_CPP_BUILTINS): Add asserts + for cpu and machine. Factor 64/32b builtins. + +2019-08-18 Gerald Pfeifer <gerald@pfeifer.com> + + * doc/install.texi (Specific, bfin): blackfin.uclinux.org is + gone, point to sourceforge.net. + +2019-08-17 Gerald Pfeifer <gerald@pfeifer.com> + + * doc/ux.texi (User Experience Guidelines): Update reference. + +2019-08-17 Gerald Pfeifer <gerald@pfeifer.com> + + * doc/include/gpl_v3.texi (Copying): Adjust the link to "Why + not LGPL". + +2019-08-16 Eric Botcazou <ebotcazou@adacore.com> + + * tree-sra.c (build_reconstructed_reference): Return NULL_TREE instead + of NULL. Add guard for broken VIEW_CONVERT_EXPRs. + +2019-08-16 Martin Sebor <msebor@redhat.com> + + * tree.def (TYPE_SIZE): Clarify. + * tree.h (TYPE_SIZE, TYPE_SIZE_UNIT, DECL_SIZE): Add comments. + +2019-08-16 Bernd Edlinger <bernd.edlinger@hotmail.de> + + PR tree-optimization/91109 + * lra-int.h (lra_need_for_scratch_reg_p): Declare. + * lra.c (lra): Use lra_need_for_scratch_reg_p. + * lra-spills.c (lra_need_for_scratch_reg_p): New function. + +2019-08-16 Uroš Bizjak <ubizjak@gmail.com> + + * config/i386/mmx.md (mmxdoublemode): New mode attribute. + (mmx_uavg<mode>3): Macroize expaner from mmx_uavgv8qi3 and + mmx_uavgv4hi3 using MMXMODE12 mode iterator. + (uavg<mode>3_ceil): New expander. + * config/i386/sse.md (uavg<mode>3_ceil): Use ssedoublemode + mode iterator when creating CONST1_RTX. + (<sse2_avx2>_uavg<mode>3<mask_name>): Ditto. + (*<sse2_avx2>_uavg<mode>3<mask_name>): Use ssedoublemode + mode iterator for const1_operand predicate. + +2019-08-16 Richard Biener <rguenther@suse.de> + + * tree-scalar-evolution.c (follow_ssa_edge_expr): Declare. + (follow_ssa_edge_binary): Call follow_ssa_edge_expr instead of + follow_ssa_edge. + (follow_ssa_edge_in_condition_phi_branch): Likewise. + (analyze_evolution_in_loop): Likewise. + (follow_ssa_edge, follow_ssa_edge_in_rhs): Inline into ... + (follow_ssa_edge_expr): ... here. Refactor code. + +2019-08-16 Richard Biener <rguenther@suse.de> + + PR target/91469 + * config/i386/i386-features.c + (general_scalar_chain::replace_with_subreg): Stop at memory operands. + +2019-08-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + PR other/91255 + * gensupport.c (has_subst_attribute): Error out on set_attr_alternative + only if subst_name matches curr_attr string. + +2019-08-16 Richard Biener <rguenther@suse.de> + + * tree-ssa-forwprop.c (simplify_builtin_call): Do not remove + stmt at gsi_p, instead replace it with a NOP removed later. + (pass_forwprop::execute): Fully propagate lattice, DCE stmts + that became dead because of that. + +2019-08-16 Aldy Hernandez <aldyh@redhat.com> + + * gimple-ssa-evrp-analyze.c (record_ranges_from_phis): Skip PHIs + for which we can't represent a range. + * ipa-cp.c (ipcp_vr_lattice::set_to_bottom): Pass type to + set_varying. + * tree-ssa-threadedge.c (record_temporary_equivalences_from_phis): + Set VR_UNDEFINED if type is not supported. + * tree-ssanames.c (get_range_info): Pass type to set_varying. + * tree-vrp.c (value_range_base::check): Assert that a varying has + min/max set. + (value_range_base::equal_p): Early bail for undefines. + (value_range_base::set_varying): Accept a type. + (value_range::set_varying): Same. + (value_range_base::type): VARYING can have a type, while UNDEFINE + is typeless. + (value_range_base::dump): Print type for VARYING nodes. + (value_range_base::set): Add type to VARYING. + (extract_range_from_multiplicative_op): Pass type to set_varying. + (extract_range_from_binary_expr): Same. + (value_range_base::intersect_helper): Same. + (value_range_base::union_helper): Same. + (value_range_base::normalize_symbolics): Same. + (determine_value_range_1): Same. + * tree-vrp.h (class value_range_base): Add type to set_varying. + Add prototype for dump(void). + Add prototype for supports_type_p. + (class value_range): Add type to set_varying. + Add prototype for dump(void). + * vr-values.c (set_value_range_to_truthvalue): Pass type to + set_varying. + (vr_values::get_lattice_entry): Set varying even if propagation + finished. + Pass type to set_varying. + (vr_values::get_value_range): Remove vr_const_varying. + Reallocate the lattice if needed. + (vr_values::update_value_range): Pass type to set_varying. + (vr_values::extract_range_for_var_from_comparison_expr): Same. + (vr_values::extract_range_from_binary_expr): Same. + (vr_values::extract_range_from_unary_expr): Same. + (vr_values::extract_range_from_cond_expr): Same. + (vr_values::check_for_binary_op_overflow): Same. + (vr_values::extract_range_basic): Same. + (vr_values::extract_range_from_assignment): Same. + (vr_values::vr_values): Increase size of num_vr_values. + (vr_values::extract_range_from_phi_node): Pass type to + set_varying. + +2019-08-15 H.J. Lu <hongjiu.lu@intel.com> + + PR target/90878 + * config/i386/i386.c (inline_memory_move_cost): Use hard_register + for costs of hard register moves. + (ix86_register_move_cost): Likewise. + * config/i386/i386.h (processor_costs): Move costs of hard + register moves to hard_register. Add int_load, int_store, + xmm_move, ymm_move, zmm_move, sse_to_integer, integer_to_sse, + sse_load, sse_store, sse_unaligned_load and sse_unaligned_store + for costs of RTL expressions. + * config/i386/x86-tune-costs.h: Move costs of hard register + moves to hard_register. Duplicate int_load, int_store, + xmm_move, ymm_move, zmm_move, sse_to_integer, integer_to_sse, + sse_load, sse_store for costs of RTL expressions. + +2019-08-15 Richard Sandiford <richard.sandiford@arm.com> + + * target.def (setup_incoming_vararg_bounds): Remove. + * doc/tm.texi.in (TARGET_SETUP_INCOMING_VARARG_BOUNDS): Remove. + * doc/tm.texi: Regenerate. + * targhooks.c (default_setup_incoming_vararg_bounds): Delete. + * targhooks.h (default_setup_incoming_vararg_bounds): Likewise. + * config/i386/i386.c (ix86_setup_incoming_vararg_bounds): Likewise. + (TARGET_SETUP_INCOMING_VARARG_BOUNDS): Likewise. + +2019-08-15 Jozef Lawrynowicz <jozef.l@mittosystems.com> + + MSP430: Fix lines over 80 characters long in + config/msp430/*.{c,h} files + + * config/msp430/driver-msp430.c (msp430_select_cpu): Fix format + specifier in string. + (msp430_select_hwmult_lib): Split line more than 80 characters long. + * config/msp430/msp430-devices.c (msp430_extract_mcu_data): Remove + redundant old comment. + * config/msp430/msp430-protos.h (msp430_output_aligned_decl_common): + Split line more than 80 characters long. + * config/msp430/msp430.c (msp430_option_override): Likewise. + (msp430_return_in_memory): Likewise. + (msp430_gimplify_va_arg_expr): Likewise. + (TARGET_ADDR_SPACE_LEGITIMATE_ADDRESS_P): Likewise. + (msp430_legitimate_constant): Likewise. + (TARGET_ALLOCATE_STACK_SLOTS_FOR_ARGS): Likewise. + (msp430_attr): Likewise. + (msp430_data_attr): Likewise. + (msp430_start_function): Likewise. + (gen_prefix): Likewise. + (msp430_init_sections): Likewise. + (msp430_select_section): Likewise. + (msp430_function_section): Likewise. + (msp430_unique_section): Likewise. + (msp430_output_aligned_decl_common): Likewise. + (msp430_do_not_relax_short_jumps): Likewise. + (msp430_init_builtins): Likewise. + (msp430_expand_delay_cycles): Likewise. + (msp430_expand_prologue): Likewise. + (msp430_expand_epilogue): Likewise. + (msp430_expand_helper): Likewise. + (msp430_split_movsi): Likewise. + (msp430_print_operand): Likewise. + (msp430_return_addr_rtx): Likewise. + (msp430x_extendhisi): Likewise. + * config/msp430/msp430.h (STARTFILE_SPEC): Likewise. + (ASM_SPEC): Likewise. + Remove very obvious comments. + (LIB_SPEC): Split line more than 80 characters long. + (EH_RETURN_HANDLER_RTX): Likewise. + (HARD_REGNO_CALLER_SAVE_MODE): Likewise. + +2019-08-15 Jozef Lawrynowicz <jozef.l@mittosystems.com> + + MSP430: Fix whitespace errors and incorrect indentation in + config/msp430/*.{c,h} files + + * config/msp430/driver-msp430.c (msp430_select_cpu): Fix indentation. + (msp430_select_hwmult_lib): Likewise. + * config/msp430/msp430-devices.c (parse_devices_csv_1): Likewise. + (msp430_extract_mcu_data): Likewise. + (struct t_msp430_mcu_data): Likewise. + * config/msp430/msp430.c (struct machine_function): Remove whitespace + before left square bracket. + (msp430_option_override): Fix indentation. + (msp430_hard_regno_nregs_with_padding): Likewise. + (msp430_initial_elimination_offset): Likewise. + (msp430_special_register_convention_p): Remove whitespace before left + square bracket and after exclamation mark. + (msp430_evaluate_arg): Likewise. + (msp430_callee_copies): Fix indentation. + (msp430_gimplify_va_arg_expr): Likewise. + (msp430_function_arg_advance): Remove whitespace before left square + bracket. + (reg_ok_for_addr): Likewise. + (msp430_preserve_reg_p): Likewise. + (msp430_compute_frame_info): Likewise. + (msp430_asm_output_addr_const_extra): Add space between function name + and open parenthesis. + (has_section_name): Fix indentation. + (msp430_attr): Remove trailing whitespace. + (msp430_section_attr): Likewise. + (msp430_data_attr): Likewise. + (struct msp430_attribute_table): Fix comment and whitespace. + (msp430_start_function): Remove whitespace before left square bracket. + Add space between function name and open parenthesis. + (msp430_select_section): Remove trailing whitespace. + (msp430_section_type_flags): Remove trailing whitespace. + (msp430_unique_section): Remove space before closing parenthesis. + (msp430_output_aligned_decl_common): Change 8 spaces to a tab. + (msp430_builtins): Remove whitespace before left square bracket. + (msp430_init_builtins): Fix indentation. + (msp430_expand_prologue): Remove whitespace before left square bracket. + Remove space before closing parenthesis. + (msp430_expand_epilogue): Remove whitespace before left square bracket. + (msp430_split_movsi): Remove space before closing parenthesis. + (helper_function_name_mappings): Fix indentation. + (msp430_use_f5_series_hwmult): Fix whitespace. + (use_32bit_hwmult): Likewise. + (msp430_no_hwmult): Likewise. + (msp430_output_labelref): Remove whitespace before left square bracket. + (msp430_print_operand_raw): Likewise. + (msp430_print_operand_addr): Likewise. + (msp430_print_operand): Add two spaces after '.' in comment. + Fix trailing whitespace. + (msp430x_extendhisi): Fix indentation. + * config/msp430/msp430.h (TARGET_CPU_CPP_BUILTINS): Change 8 spaces to + tab. + (PC_REGNUM): Likewise. + (STACK_POINTER_REGNUM): Likewise. + (CC_REGNUM): Likewise. + +2019-08-15 Richard Biener <rguenther@suse.de> + + PR target/91454 + * config/i386/i386-features.c (gen_gpr_to_xmm_move_src): New + helper. + (general_scalar_chain::make_vector_copies): Use it. + +2019-08-15 Bernd Edlinger <bernd.edlinger@hotmail.de> + + * function.c (assign_parm_setup_reg): Handle misaligned stack arguments. + +2019-08-15 Martin Liska <mliska@suse.cz> + + * tree-ssa-dce.c (propagate_necessity): We can't reach now + operators with no arguments. + (eliminate_unnecessary_stmts): Likewise here. + +2019-08-15 Uroš Bizjak <ubizjak@gmail.com> + + * config/i386/i386-features.c (general_scalar_chain::convert_insn) + <case COMPARE>: Revert 2019-08-14 change. + (convertible_comparison_p): Revert 2019-08-14 change. Return false + for (TARGET_64BIT || mode != DImode). + +2019-08-15 Aldy Hernandez <aldyh@redhat.com> + + * tree-vrp.c (value_range_base::set): Merge in code from + value_range_base::set_and_canonicalize. + Enforce canonicalization at set time. + Normalize [MIN, MAX] into VARYING and ~[MIN, MAX] into UNDEFINED. + (value_range_base::set_undefined): Inline call to set(). + (value_range_base::set_varying): Same. + (value_range_base::singleton_p): Handle VR_ANTI_RANGEs. + (vrp_val_max): New argument handle_pointers. + (vrp_val_min): Same. + (ranges_from_anti_range): Same. + (extract_range_into_wide_ints): Use tree argument instead of sign + and precision. + (extract_range_from_multiplicative_op): Take in tree type instead + of precision and sign. Adapt function for canonicalized ranges. + (extract_range_from_binary_expr): Pass type to + extract_range_from_multiplicative_op. + Adapt for canonicalized ranges. + (extract_range_from_unary_expr): Same. + (value_range_base::intersect_helper): Adjust for canonicalized + ranges. + (value_range_base::union_helper): Same. + (value_range_base::normalize_symbolics): New. + * tree-vrp.h (class value_range_base): Remove + set_and_canonicalize. + New prototype for normalize_symbolics. + (class value_range): Remove set_and_canonicalize. + (vrp_val_min): Adjust prototype. + (vrp_val_max): Same. + * vr-values.c + (vr_values::extract_range_for_var_from_comparison_expr): Call set + instead of set_and_canonicalize. + +2019-08-15 Richard Sandiford <richard.sandiford@arm.com> + + PR middle-end/91444 + * tree-vect-stmts.c (vectorizable_call): Check that the function + is a BUILT_IN_MD function before passing it to + targetm.vectorize.builtin_md_vectorized_function. + +2019-08-15 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/aarch64-protos.h (aarch64_sve_mode_p): Declare. + * config/aarch64/aarch64.c (aarch64_sve_mode_p): New function. + (aarch64_select_early_remat_modes): Use it. + +2019-08-15 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/aarch64.c (aarch64_simd_vector_alignment): Return + 16 for SVE predicates even if they are fixed-length. + +2019-08-15 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/aarch64-sve.md (and<PRED_ALL:mode>3): Make the + operand order match the MOV /Z alias. + +2019-08-15 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/aarch64.c (aarch64_output_sve_cnt_immediate): Take + the vector pattern as an aarch64_svpattern argument. Update the + overloaded caller accordingly. + (aarch64_output_sve_scalar_inc_dec): Update call accordingly. + (aarch64_output_sve_vector_inc_dec): Likewise. + +2019-08-15 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/aarch64.c (aarch64_add_offset): In the fallback + multiplication case, try to compute VG * (lowest set bit) directly + rather than always basing the multiplication on VG. Use + expand_mult for the multiplication if we can. + +2019-08-15 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/aarch64-protos.h + (aarch64_sve_scalar_inc_dec_immediate_p): Declare. + (aarch64_sve_inc_dec_immediate_p): Rename to... + (aarch64_sve_vector_inc_dec_immediate_p): ...this. + (aarch64_output_sve_addvl_addpl): Take a single rtx argument. + (aarch64_output_sve_scalar_inc_dec): Declare. + (aarch64_output_sve_inc_dec_immediate): Rename to... + (aarch64_output_sve_vector_inc_dec): ...this. + * config/aarch64/aarch64.c (aarch64_sve_scalar_inc_dec_immediate_p) + (aarch64_output_sve_scalar_inc_dec): New functions. + (aarch64_output_sve_addvl_addpl): Remove the base and offset + arguments. Only handle true ADDVL and ADDPL instructions; + don't emit an INC or DEC. + (aarch64_sve_inc_dec_immediate_p): Rename to... + (aarch64_sve_vector_inc_dec_immediate_p): ...this. + (aarch64_output_sve_inc_dec_immediate): Rename to... + (aarch64_output_sve_vector_inc_dec): ...this. Update call to + aarch64_sve_vector_inc_dec_immediate_p. + * config/aarch64/predicates.md (aarch64_sve_scalar_inc_dec_immediate) + (aarch64_sve_plus_immediate): New predicates. + (aarch64_pluslong_operand): Accept aarch64_sve_plus_immediate + rather than aarch64_sve_addvl_addpl_immediate. + (aarch64_sve_inc_dec_immediate): Rename to... + (aarch64_sve_vector_inc_dec_immediate): ...this. Update call to + aarch64_sve_vector_inc_dec_immediate_p. + (aarch64_sve_add_operand): Update accordingly. + * config/aarch64/constraints.md (Uai): New constraint. + (vsi): Update call to aarch64_sve_vector_inc_dec_immediate_p. + * config/aarch64/aarch64.md (add<GPI:mode>3): Don't force the second + operand into a register if it satisfies aarch64_sve_plus_immediate. + (*add<GPI:mode>3_aarch64, *add<GPI:mode>3_poly_1): Add an alternative + for Uai. Update calls to aarch64_output_sve_addvl_addpl. + * config/aarch64/aarch64-sve.md (add<mode>3): Call + aarch64_output_sve_vector_inc_dec instead of + aarch64_output_sve_inc_dec_immediate. + +2019-08-15 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/iterators.md (UNSPEC_REVB, UNSPEC_REVH) + (UNSPEC_REVW): New constants. + (elem_bits): New mode attribute. + (SVE_INT_UNARY): New int iterator. + (optab): Handle UNSPEC_REV[BHW]. + (sve_int_op): New int attribute. + (min_elem_bits): Handle VNx16QI and the predicate modes. + * config/aarch64/aarch64-sve.md (*aarch64_sve_rev64<mode>) + (*aarch64_sve_rev32<mode>, *aarch64_sve_rev16vnx16qi): Delete. + (@aarch64_pred_<SVE_INT_UNARY:optab><SVE_I:mode>): New pattern. + * config/aarch64/aarch64.c (aarch64_sve_data_mode): New function. + (aarch64_sve_int_mode, aarch64_sve_rev_unspec): Likewise. + (aarch64_split_sve_subreg_move): Use UNSPEC_REV[BHW] instead of + unspecs based on the total width of the reversed data. + (aarch64_evpc_rev_local): Likewise (for SVE only). Use a + reinterpret followed by a subreg on big-endian targets. + +2019-08-15 Richard Sandiford <richard.sandiford@arm.com> + Kugan Vivekanandarajah <kugan.vivekanandarajah@linaro.org> + + * config/aarch64/aarch64-sve.md + (*cond_<SVE_COND_FP_TERNARY:optab><SVE_F:mode>_any): Add /z + alternatives in which one of the inputs is in the same register + as the output. + +2019-08-15 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/aarch64-sve.md (*vec_extract<mode><Vel>_ext) + (*aarch64_sve_ext<mode>): Add MOVPRFX alternatives. + +2019-08-15 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/aarch64-sve.md (*sub<SVE_F:mode>3): Remove immediate + FADD and FSUB alternatives. Add a MOVPRFX alternative for FSUBR. + +2019-08-15 Richard Sandiford <richard.sandiford@arm.com> + Kugan Vivekanandarajah <kugan.vivekanandarajah@linaro.org> + + * config/aarch64/aarch64-sve.md (add<SVE_I:mode>3, sub<SVE_I:mode>3) + (<LOGICAL:optab><SVE_I:mode>3, *add<SVE_F:mode>3, *mul<SVE_F:mode>3) + (*fabd<SVE_F:mode>3): Add more MOVPRFX alternatives. + +2019-08-15 Richard Sandiford <richard.sandiford@arm.com> + Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org> + + * config/aarch64/aarch64-sve.md (*v<ASHIFT:optab><SVE_I:mode>3): + Add an alternative that uses reversed shifts. + +2019-08-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/aarch64/aarch64-cores.def (cortex-a76): Use neoversen1 tuning + struct. + +2019-08-15 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/aarch64-sve.md (aarch64_<su>abd<mode>_3): Add + a commutativity marker. + +2019-08-15 Richard Sandiford <richard.sandiford@arm.com> + Kugan Vivekanandarajah <kugan.vivekanandarajah@linaro.org> + + * config/aarch64/aarch64-protos.h (aarch64_prepare_sve_int_fma) + (aarch64_prepare_sve_cond_int_fma): Declare. + * config/aarch64/aarch64.c (aarch64_convert_mult_to_shift) + (aarch64_prepare_sve_int_fma): New functions. + (aarch64_prepare_sve_cond_int_fma): Likewise. + * config/aarch64/aarch64-sve.md + (cond_<SVE_INT_BINARY:optab><SVE_I:mode>): Add a "@" marker. + (fma<SVE_I:mode>4, cond_fma<SVE_I:mode>, *cond_fma<SVE_I:mode>_2) + (*cond_fma<SVE_I:mode>_4, *cond_fma<SVE_I:mode>_any, fnma<SVE_I:mode>4) + (cond_fnma<SVE_I:mode>, *cond_fnma<SVE_I:mode>_2) + (*cond_fnma<SVE_I:mode>_4, *cond_fnma<SVE_I:mode>_any): New patterns. + (*madd<mode>): Rename to... + (*fma<mode>4): ...this. + (*msub<mode>): Rename to... + (*fnma<mode>4): ...this. + +2019-08-15 Richard Sandiford <richard.sandiford@arm.com> + Kugan Vivekanandarajah <kugan.vivekanandarajah@linaro.org> + + * config/aarch64/aarch64.c (aarch64_print_vector_float_operand): + Print 2.0 naturally. + (aarch64_sve_float_mul_immediate_p): Return true for 2.0. + * config/aarch64/predicates.md + (aarch64_sve_float_negated_arith_immediate): New predicate, + renamed from aarch64_sve_float_arith_with_sub_immediate. + (aarch64_sve_float_arith_with_sub_immediate): Test for both + positive and negative constants. + (aarch64_sve_float_arith_with_sub_operand): Redefine as a register + or an aarch64_sve_float_arith_with_sub_immediate. + * config/aarch64/constraints.md (vsN): Use + aarch64_sve_float_negated_arith_immediate. + * config/aarch64/iterators.md (SVE_COND_FP_BINARY_I1): New int + iterator. + (sve_pred_fp_rhs2_immediate): New int attribute. + * config/aarch64/aarch64-sve.md + (cond_<SVE_COND_FP_BINARY:optab><SVE_F:mode>): Use + sve_pred_fp_rhs1_operand and sve_pred_fp_rhs2_operand. + (*cond_<SVE_COND_FP_BINARY_I1:optab><SVE_F:mode>_2_const) + (*cond_<SVE_COND_FP_BINARY_I1:optab><SVE_F:mode>_any_const) + (*cond_add<SVE_F:mode>_2_const, *cond_add<SVE_F:mode>_any_const) + (*cond_sub<mode>_3_const, *cond_sub<mode>_any_const): New patterns. + +2019-08-15 Richard Sandiford <richard.sandiford@arm.com> + Kugan Vivekanandarajah <kugan.vivekanandarajah@linaro.org> + + * config/aarch64/aarch64-sve.md (*aarch64_cond_abd<SVE_F:mode>_2) + (*aarch64_cond_abd<SVE_F:mode>_3) + (*aarch64_cond_abd<SVE_F:mode>_any): New patterns. + +2019-08-15 Richard Sandiford <richard.sandiford@arm.com> + Kugan Vivekanandarajah <kugan.vivekanandarajah@linaro.org> + + * config/aarch64/aarch64-sve.md (*aarch64_cond_<su>abd<mode>_2) + (*aarch64_cond_<su>abd<mode>_any): New patterns. + +2019-08-15 Richard Sandiford <richard.sandiford@arm.com> + Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org> + + * internal-fn.def (IFN_COND_SHL, IFN_COND_SHR): New internal functions. + * internal-fn.c (FOR_EACH_CODE_MAPPING): Handle shifts. + * match.pd (UNCOND_BINARY, COND_BINARY): Likewise. + * optabs.def (cond_ashl_optab, cond_ashr_optab, cond_lshr_optab): New + optabs. + * optabs.h (create_convert_operand_from): Expand comment. + * optabs.c (maybe_legitimize_operand): Allow implicit broadcasts + when mapping scalar rtxes to vector operands. + * config/aarch64/iterators.md (SVE_INT_BINARY): Add ashift, + ashiftrt and lshiftrt. + (sve_int_op, sve_int_op_rev, sve_pred_int_rhs2_operand): Handle them. + * config/aarch64/aarch64-sve.md (*cond_<optab><mode>_2_const) + (*cond_<optab><mode>_any_const): New patterns. + +2019-08-15 Martin Liska <mliska@suse.cz> + + PR ipa/91438 + * cgraph.c (cgraph_node::remove): When setting + n->origin = NULL for all nested functions, reset + also next_nested. + +2019-08-15 Martin Liska <mliska@suse.cz> + + * cgraph.c (cgraph_node::verify_node): Verify origin, nested + and next_nested. + +2019-08-15 Martin Liska <mliska@suse.cz> + + PR ipa/91404 + * passes.c (order): Remove. + (uid_hash_t): Likewise). + (remove_cgraph_node_from_order): Remove from set + of pointers (cgraph_node *). + (insert_cgraph_node_to_order): New. + (duplicate_cgraph_node_to_order): New. + (do_per_function_toporder): Register all 3 cgraph hooks. + Skip removed_nodes now as we know about all of them. + +2019-08-14 Uroš Bizjak <ubizjak@gmail.com> + + * config/i386/i386-expand.c (ix86_expand_vector_init_one_nonzero) + <case E_V8QImode>: Use vector_set path for + TARGET_MMX_WITH_SSE && TARGET_SSE4_1. + (ix86_expand_vector_init_one_var) <case E_V8QImode>: + Do not widen for TARGET_MMX_WITH_SSE && TARGET_SSE4_1. + +2019-08-14 Bernd Edlinger <bernd.edlinger@hotmail.de> + + * builtins.c (expand_builtin_init_descriptor): Set memory alignment. + +2019-08-14 Martin Sebor <msebor@redhat.com> + + PR tree-optimization/91294 + * tree-ssa-strlen.c (handle_store): Avoid treating lower bound of + source length as exact. + +2019-08-14 Christophe Lyon <christophe.lyon@linaro.org> + + * doc/extend.texi: Add "noinit" attribute documentation. + * doc/sourcebuild.texi: Add noinit effective target documentation. + * varasm.c (default_section_type_flags): Add support for "noinit" + section. + (default_elf_select_section): Add support for "noinit" attribute. + * config/msp430/msp430.c (msp430_attribute_table): Remove + "noinit" entry. + +2019-08-14 Richard Biener <rguenther@suse.de> + Uroš Bizjak <ubizjak@gmail.com> + + PR target/91154 + * config/i386/i386-features.h (scalar_chain::scalar_chain): Add + mode arguments. + (scalar_chain::smode): New member. + (scalar_chain::vmode): Likewise. + (dimode_scalar_chain): Rename to... + (general_scalar_chain): ... this. + (general_scalar_chain::general_scalar_chain): Take mode arguments. + (timode_scalar_chain::timode_scalar_chain): Initialize scalar_chain + base with TImode and V1TImode. + * config/i386/i386-features.c (scalar_chain::scalar_chain): Adjust. + (general_scalar_chain::vector_const_cost): Adjust for SImode + chains. + (general_scalar_chain::compute_convert_gain): Likewise. Add + {S,U}{MIN,MAX} support. + (general_scalar_chain::replace_with_subreg): Use vmode/smode. + (general_scalar_chain::make_vector_copies): Likewise. Handle + non-DImode chains appropriately. + (general_scalar_chain::convert_reg): Likewise. + (general_scalar_chain::convert_op): Likewise. + (general_scalar_chain::convert_insn): Likewise. Add + fatal_insn_not_found if the result is not recognized. + (convertible_comparison_p): Pass in the scalar mode and use that. + (general_scalar_to_vector_candidate_p): Likewise. Rename from + dimode_scalar_to_vector_candidate_p. Add {S,U}{MIN,MAX} support. + (scalar_to_vector_candidate_p): Remove by inlining into single + caller. + (general_remove_non_convertible_regs): Rename from + dimode_remove_non_convertible_regs. + (remove_non_convertible_regs): Remove by inlining into single caller. + (convert_scalars_to_vector): Handle SImode and DImode chains + in addition to TImode chains. + * config/i386/i386.md (<maxmin><MAXMIN_IMODE>3): New expander. + (*<maxmin><MAXMIN_IMODE>3_1): New insn-and-split. + (*<maxmin>di3_doubleword): Likewise. + +2019-08-14 Richard Sandiford <richard.sandiford@arm.com> + Kugan Vivekanandarajah <kugan.vivekanandarajah@linaro.org> + + * config/aarch64/aarch64-sve.md (*cond_bic<mode>_2) + (*cond_bic<mode>_any): New patterns. + +2019-08-14 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/aarch64.c (aarch64_print_operand): Allow %e to + take the equivalent mask, as well as a bit count. + * config/aarch64/predicates.md (aarch64_sve_uxtb_immediate) + (aarch64_sve_uxth_immediate, aarch64_sve_uxt_immediate) + (aarch64_sve_pred_and_operand): New predicates. + * config/aarch64/iterators.md (sve_pred_int_rhs2_operand): New + code attribute. + * config/aarch64/aarch64-sve.md + (cond_<SVE_INT_BINARY:optab><SVE_I:mode>): Use it. + (*cond_uxt<mode>_2, *cond_uxt<mode>_any): New patterns. + +2019-08-14 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/aarch64-sve.md + (*cond_<SVE_COND_FCVTI:optab>_nontrunc<SVE_F:mode><SVE_HSDI:mode>) + (*cond_<SVE_COND_ICVTF:optab>_nonextend<SVE_HSDI:mode><SVE_F:mode>): + New patterns. + +2019-08-14 Richard Sandiford <richard.sandiford@arm.com> + Kugan Vivekanandarajah <kugan.vivekanandarajah@linaro.org> + + * config/aarch64/aarch64-sve.md + (*cond_<SVE_COND_FP_UNARY:optab><SVE_F:mode>_2): New pattern. + (*cond_<SVE_COND_FP_UNARY:optab><SVE_F:mode>_any): Likewise. + +2019-08-14 Richard Sandiford <richard.sandiford@arm.com> + Kugan Vivekanandarajah <kugan.vivekanandarajah@linaro.org> + + * config/aarch64/aarch64-sve.md + (*cond_<SVE_INT_UNARY:optab><SVE_I:mode>_2): New pattern. + (*cond_<SVE_INT_UNARY:optab><SVE_I:mode>_any): Likewise. + +2019-08-14 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/iterators.md (SVE_COND_FP_ABS_CMP): New iterator. + * config/aarch64/aarch64-sve.md (*aarch64_pred_fac<cmp_op><mode>): + New pattern. + +2019-08-14 Richard Sandiford <richard.sandiford@arm.com> + Kugan Vivekanandarajah <kugan.vivekanandarajah@linaro.org> + + * config/aarch64/aarch64-sve.md (*aarch64_sel_dup<mode>): New pattern. + +2019-08-14 Richard Sandiford <richard.sandiford@arm.com> + Kugan Vivekanandarajah <kugan.vivekanandarajah@linaro.org> + + * config/aarch64/aarch64.c (aarch64_bit_representation): New function. + (aarch64_print_vector_float_operand): Also handle 8-bit floats. + (aarch64_print_operand): Add support for %I. + (aarch64_sve_dup_immediate_p): Handle scalars as well as vectors. + Bitcast floating-point constants to the corresponding integer constant. + (aarch64_float_const_representable_p): Handle vectors as well + as scalars. + (aarch64_expand_sve_vcond): Make sure that the operands are valid + for the new vcond_mask_<mode><vpred> expander. + * config/aarch64/predicates.md (aarch64_sve_dup_immediate): Also + test aarch64_float_const_representable_p. + (aarch64_sve_reg_or_dup_imm): New predicate. + * config/aarch64/aarch64-sve.md (vec_extract<vpred><Vel>): Use + gen_vcond_mask_<mode><vpred> instead of + gen_aarch64_sve_dup<mode>_const. + (vcond_mask_<mode><vpred>): Turn into a define_expand that + accepts aarch64_sve_reg_or_dup_imm and aarch64_simd_reg_or_zero + for operands 1 and 2 respectively. Force operand 2 into a + register if operand 1 is a register. Fold old define_insn... + (aarch64_sve_dup<mode>_const): ...and this define_insn... + (*vcond_mask_<mode><vpred>): ...into this new pattern. Handle + floating-point constants that can be moved as integers. Add + alternatives for MOV /M and FMOV /M. + (vcond<mode><v_int_equiv>, vcondu<mode><v_int_equiv>) + (vcond<mode><v_fp_equiv>): Accept nonmemory_operand for operands + 1 and 2 respectively. + * config/aarch64/constraints.md (Ufc): Handle vectors as well + as scalars. + (vss): New constraint. + +2019-08-14 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/predicates.md (aarch64_sve_float_maxmin_immediate) + (aarch64_sve_float_maxmin_operand): New predicates. + * config/aarch64/constraints.md (vsB): New constraint. + (vsM): Fix typo. + * config/aarch64/iterators.md (sve_pred_fp_rhs2_operand): Use + aarch64_sve_float_maxmin_operand for UNSPEC_COND_FMAXNM and + UNSPEC_COND_FMINNM. + * config/aarch64/aarch64-sve.md (<maxmin_uns><SVE_F:mode>3): + Use aarch64_sve_float_maxmin_operand for operand 2. + (*<SVE_COND_FP_MAXMIN_PUBLIC:optab><SVE_F:mode>3): Likewise. + Add alternatives for the constant forms. + +2019-08-14 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/constraints.md (vsb): New constraint. + (vsm): Generalize description. + * config/aarch64/iterators.md (SVE_INT_BINARY_IMM): New code + iterator. + (sve_imm_con): Handle smax, smin, umax and umin. + (sve_imm_prefix): New code attribute. + * config/aarch64/predicates.md (aarch64_sve_vsb_immediate) + (aarch64_sve_vsb_operand): New predicates. + (aarch64_sve_mul_immediate): Rename to... + (aarch64_sve_vsm_immediate): ...this. + (aarch64_sve_mul_operand): Rename to... + (aarch64_sve_vsm_operand): ...this. + * config/aarch64/aarch64-sve.md (mul<mode>3): Generalize to... + (<SVE_INT_BINARY_IMM:optab><SVE_I:mode>3): ...this. + (*mul<mode>3, *post_ra_mul<mode>3): Generalize to... + (*<SVE_INT_BINARY_IMM:optab><SVE_I:mode>3) + (*post_ra_<SVE_INT_BINARY_IMM:optab><SVE_I:mode>3): ...these and + add movprfx support for the immediate alternatives. + (<su><maxmin><mode>3, *<su><maxmin><mode>3): Delete in favor + of the above. + (*<SVE_INT_BINARY_SD:optab><SVE_SDI:mode>3): Fix incorrect predicate + for operand 3. + +2019-08-14 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/predicates.md (aarch64_simd_imm_one): New predicate. + * config/aarch64/aarch64-sve.md (*cnot<mode>): New pattern. + (*cond_cnot<mode>_2, *cond_cnot<mode>_any): Likewise. + +2019-08-14 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/iterators.md (SVE_INT_UNARY): Add clrsb and clz. + (optab, sve_int_op): Handle them. + * config/aarch64/aarch64-sve.md: Expand comment. + +2019-08-14 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/predicates.md (const_1_to_3_operand): New predicate. + * config/aarch64/aarch64-sve.md (*aarch64_adr_uxtw) + (*aarch64_adr<mode>_shift, *aarch64_adr_shift_uxtw): New patterns. + +2019-08-14 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/aarch64.c (aarch64_expand_sve_const_pred_eor) + (aarch64_expand_sve_const_pred_trn): New functions. + (aarch64_expand_sve_const_pred_1): Add a recurse_p parameter and + use the above functions when the parameter is true. + (aarch64_expand_sve_const_pred): Update call accordingly. + * config/aarch64/aarch64-sve.md (*aarch64_sve_<perm_insn><mode>): + Rename to... + (@aarch64_sve_<perm_insn><mode>): ...this. + +2019-08-14 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/aarch64-protos.h (aarch64_sve_same_pred_for_ptest_p): + Declare. + * config/aarch64/aarch64.c (aarch64_sve_same_pred_for_ptest_p) + (aarch64_sve_emit_int_cmp): New functions. + (aarch64_convert_sve_data_to_pred): Use aarch64_sve_emit_int_cmp. + (aarch64_sve_cmp_operand_p, aarch64_emit_sve_ptrue_op_cc): Delete. + (aarch64_expand_sve_vec_cmp_int): Use aarch64_sve_emit_int_cmp. + * config/aarch64/aarch64.md (UNSPEC_MERGE_PTRUE): Delete. + (UNSPEC_PRED_Z): New unspec. + (set_clobber_cc_nzc): Delete. + * config/aarch64/aarch64-sve.md: Add a block comment about + UNSPEC_PRED_Z. + (*cmp<SVE_INT_CMP:cmp_op><mode>): Rename to... + (@aarch64_pred_cmp<SVE_INT_CMP:cmp_op><mode>): ...this, replacing + the old pattern with that name. Use UNSPEC_PRED_Z instead of + UNSPEC_MERGE_PTRUE. + (*cmp<SVE_INT_CMP:cmp_op><mode>_cc): Use UNSPEC_PRED_Z instead of + UNSPEC_MERGE_PTRUE. Use aarch64_sve_same_pred_for_ptest_p to + check for compatible predicates. + (*cmp<cmp_op><SVE_INT_CMP:mode>_ptest): Likewise. + (*cmp<cmp_op><mode>_and): Match a known-ptrue UNSPEC_PRED_Z instead + of UNSPEC_MERGE_PTRUE. Split into the new form of predicated + comparisons above. + +2019-08-14 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/aarch64.md (UNSPEC_PRED_X): New unspec. + * config/aarch64/aarch64-sve.md: Add a section describing it. + (@aarch64_pred_mov<mode>, @aarch64_pred_mov<mode>) + (<SVE_INT_UNARY:optab><mode>2, *<SVE_INT_UNARY:optab><mode>2) + (aarch64_<su>abd<mode>_3, mul<SVE_I:mode>3, *mul<SVE_I:mode>3) + (<su>mul<mode>3_highpart, *<su>mul<mode>3_highpart) + (<SVE_INT_BINARY:optab><mode>3, *<SVE_INT_BINARY:optab><mode>3) + (*bic<mode>3, v<ASHIFT:optab><mode>3, *v<ASHIFT:optab><mode>3) + (<su><maxmin><mode>3, *<su><maxmin><mode>3, *madd<SVE_I:mode>) + (*msub<SVE_I:mode>3, *aarch64_sve_rev64<mode>) + (*aarch64_sve_rev32<mode>, *aarch64_sve_rev16vnx16qi): Use + UNSPEC_PRED_X instead of UNSPEC_MERGE_PTRUE. + * config/aarch64/aarch64-sve2.md (<u>avg<mode>3_floor) + (<u>avg<mode>3_ceil, *<sur>h<addsub><mode>): Likewise. + * config/aarch64/aarch64.c (aarch64_split_sve_subreg_move) + (aarch64_evpc_rev_local): Update accordingly. + +2019-08-14 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/iterators.md (VNx4SI_ONLY, VNx2DF_ONLY): New mode + iterators. + (SVE_BHSI, SVE_SDI): Tweak comment. + (SVE_HSDI): Likewise. Fix definition. + (SVE_SDF): New mode iterator. + (elem_bits): New mode attribute. + (SVE_COND_FCVT): New int iterator. + * config/aarch64/aarch64-sve.md + (*<SVE_COND_ICVTF:optab>v16hsf<SVE_HSDI:mode>2) + (*<SVE_COND_ICVTF:optab>vnx4sf<SVE_SDI:mode>2) + (*<SVE_COND_ICVTF:optab>vnx2df<SVE_SDI:mode>2): Merge into... + (*aarch64_sve_<SVE_COND_ICVTF:optab>_nontrunc<SVE_F:mode><SVE_HSDI:mode>) + (*aarch64_sve_<SVE_COND_ICVTF:optab>_trunc<VNx2DF_ONLY:mode><VNx4SI_ONLY:mode>): + ...these new patterns. + (*<SVE_COND_FCVTI:optab><SVE_HSDI:mode>vnx8hf2) + (*<SVE_COND_FCVTI:optab><SVE_SDI:mode>vnx4sf2) + (aarch64_sve_<SVE_COND_FCVTI:optab><SVE_SDI:mode>vnx2df2): + Merge into... + (*aarch64_sve_<SVE_COND_FCVTI:optab>_nonextend<SVE_HSDI:mode><SVE_F:mode>) + (aarch64_sve_<SVE_COND_FCVTI:optab>_extend<VNx4SI_ONLY:mode><VNx2DF_ONLY:mode>): + ...these new patterns. + (vec_unpack<su_optab>_float_<perm_hilo>_vnx4si): Update accordingly. + (*trunc<Vwide><SVE_SDF:mode>2): Replace with... + (*aarch64_sve_<SVE_COND_FCVT:optab>_trunc<SVE_SDF:mode><SVE_HSF:mode>): + ...this new pattern. + (aarch64_sve_extend<SVE_HSDF:mode><Vwide>2): Replace with... + (aarch64_sve_<SVE_COND_FCVT:optab>_nontrunc<SVE_HSF:mode><SVE_SDF:mode>): + ...this new pattern. + (vec_unpacks_<perm_hilo>_<mode>): Update accordingly. + +2019-08-14 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/aarch64.md (UNSPEC_FLOAT_CONVERT): Delete. + * config/aarch64/iterators.md (UNSPEC_COND_FCVT, UNSPEC_COND_FCVTZS) + (UNSPEC_COND_FCVTZU, UNSPEC_COND_SCVTF, UNSPEC_COND_UCVTF): New + unspecs. + (optab, su): Handle them. + (SVE_COND_FCVTI, SVE_COND_ICVTF): New int iterators. + * config/aarch64/aarch64-sve.md + (<fix_trunc_optab><SVE_F:mode><v_int_equiv>2): Replace with... + (<SVE_COND_FCVTI:optab><SVE_F:mode><v_int_equiv>2): ...this. + (*<fix_trunc_optab>v16hsf<:SVE_HSDImode>2): Replace with... + (*<SVE_COND_FCVTI:optab>v16hsf<SVE_F:mode>2): ...this. + (*<fix_trunc_optab>vnx4sf<SVE_SDI:mode>2): Replace with... + (*<SVE_COND_FCVTI:optab>vnx4sf<SVE_SDI:mode>2): ...this. + (*<fix_trunc_optab>vnx2df<SVE_SDI:mode>2): Replace with... + (*<SVE_COND_FCVTI:optab>vnx2df<SVE_SDI:mode>2): ...this. + (vec_pack_<su>fix_trunc_vnx2df): Use SVE_COND_FCVTI instead of + FIXUORS. + (<FLOATUORS:optab><v_int_equiv><SVE_F:mode>2): Replace with... + (<SVE_COND_ICVTF:optab><v_int_equiv><SVE_F:mode>2): ...this. + (*<FLOATUORS:optab><SVE_HSDI:mode>vnx8hf2): Replace with... + (*<SVE_COND_ICVTF:optab><SVE_HSDI:mode>vnx8hf2): ...this. + (*<FLOATUORS:optab><SVE_SDI:mode>vnx4sf2): Replace with... + (*<SVE_COND_ICVTF:optab><SVE_SDI:mode>vnx4sf2): ...this. + (aarch64_sve_<FLOATUORS:optab><SVE_SDI:mode>vnx2df2): Replace with... + (aarch64_sve_<SVE_COND_ICVTF:optab><SVE_SDI:mode>vnx2df2): ...this. + (vec_unpack<su_optab>_float_<perm_hilo>_vnx4si): Pass a GP strictness + operand to aarch64_sve_<SVE_COND_ICVTF:optab><SVE_SDI:mode>vnx2df2. + (vec_pack_trunc_<SVE_HSF:Vwide>, *trunc<Vwide><SVE_HSF:mode>2) + (aarch64_sve_extend<mode><Vwide>2): Use UNSPEC_COND_FCVT instead + of UNSPEC_FLOAT_CONVERT. + (vec_unpacks_<perm_hilo>_<mode>): Pass a GP strictness operand to + aarch64_sve_extend<mode><Vwide>2. + +2019-08-14 Richard Biener <rguenther@suse.de> + + PR target/91154 + * config/i386/i386-features.c + (dimode_scalar_chain::compute_convert_gain): Compute and dump + individual instruction gain. Fix reg-reg copy GRP cost. Use + ix86_cost->sse_op for vector instruction costs. + +2019-08-14 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/iterators.md (UNSPEC_COND_FCMUO): New unspec. + (cmp_op): Handle it. + (SVE_COND_FP_CMP): Rename to... + (SVE_COND_FP_CMP_I0): ...this. + (SVE_FP_CMP): Remove. + * config/aarch64/aarch64-sve.md + (*fcm<SVE_FP_CMP:cmp_op><SVE_F:mode>): Replace with... + (*fcm<SVE_COND_FP_CMP_I0:cmp_op><SVE_F:mode>): ...this new pattern, + using unspecs to represent the comparison. + (*fcmuo<SVE_F:mode>): Use UNSPEC_COND_FCMUO. + (*fcm<cmp_op><mode>_and_combine, *fcmuo<mode>_and_combine): Update + accordingly. + * config/aarch64/aarch64.c (aarch64_emit_sve_ptrue_op): Delete. + (aarch64_unspec_cond_code): Move after integer code. Handle + UNORDERED. + (aarch64_emit_sve_predicated_cond): Replace with... + (aarch64_emit_sve_fp_cond): ...this new function. + (aarch64_emit_sve_or_conds): Replace with... + (aarch64_emit_sve_or_fp_conds): ...this new function. + (aarch64_emit_sve_inverted_cond): Replace with... + (aarch64_emit_sve_invert_fp_cond): ...this new function. + (aarch64_expand_sve_vec_cmp_float): Update accordingly. + +2019-08-14 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/iterators.md (SVE_HSD): New mode iterator. + (V_FP_EQUIV, v_fp_equiv): Handle VNx8HI and VNx8HF. + * config/aarch64/aarch64-sve.md (vcond<mode><v_fp_equiv>): Use + SVE_HSD instead of SVE_SD. + +2019-08-14 Richard Sandiford <richard.sandiford@arm.com> + Kugan Vivekanandarajah <kugan.vivekanandarajah@linaro.org> + + * config/aarch64/iterators.md (SVE_COND_FP_BINARY_REG): New int + iterator. + (sve_pred_fp_rhs1_operand, sve_pred_fp_rhs1_operand): New int + attributes. + * config/aarch64/aarch64-sve.md (add<SVE_F:mode>3, sub<SVE_F:mode>3) + (mul<SVE_F:mode>3, div<SVE_F:mode>3) + (<SVE_COND_FP_MAXMIN_PUBLIC:optab><SVE_F:mode>3): Merge into... + (<SVE_COND_FP_BINARY:optab><SVE_F:mode>3): ...this new expander. + (*div<SVE_F:mode>3): Generalize to... + (*<SVE_COND_FP_BINARY:optab><SVE_F:mode>3): ...this. + +2019-08-14 Richard Sandiford <richard.sandiford@arm.com> + Kugan Vivekanandarajah <kugan.vivekanandarajah@linaro.org> + + * config/aarch64/aarch64.md (SVE_RELAXED_GP, SVE_STRICT_GP): New + constants. + * config/aarch64/predicates.md (aarch64_sve_gp_strictness): New + predicate. + * config/aarch64/aarch64-protos.h (aarch64_sve_pred_dominates_p): + Declare. + * config/aarch64/aarch64.c (aarch64_sve_pred_dominates_p): New + function. + * config/aarch64/aarch64-sve.md: Add a block comment about the + handling of predicated FP operations. + (<SVE_COND_FP_UNARY:optab><SVE_F:mode>2, add<SVE_F:mode>3) + (sub<SVE_F:mode>3, mul<SVE_F:mode>3, div<SVE_F:mode>3) + (<SVE_COND_FP_MAXMIN_PUBLIC:optab><SVE_F:mode>3) + (<SVE_COND_FP_MAXMIN_PUBLIC:maxmin_uns><SVE_F:mode>3) + (<SVE_COND_FP_TERNARY:optab><SVE_F:mode>4): Add an SVE_RELAXED_GP + operand. + (cond_<SVE_COND_FP_BINARY:optab><SVE_F:mode>) + (cond_<SVE_COND_FP_TERNARY:optab><SVE_F:mode>): Add an SVE_STRICT_GP + operand. + (*<SVE_COND_FP_UNARY:optab><SVE_F:mode>2) + (*cond_<SVE_COND_FP_BINARY:optab><SVE_F:mode>_2) + (*cond_<SVE_COND_FP_BINARY:optab><SVE_F:mode>_3) + (*cond_<SVE_COND_FP_BINARY:optab><SVE_F:mode>_any) + (*fabd<SVE_F:mode>3, *div<SVE_F:mode>3) + (*<SVE_COND_FP_MAXMIN_PUBLIC:optab><SVE_F:mode>3) + (*<SVE_COND_FP_TERNARY:optab><SVE_F:mode>4) + (*cond_<SVE_COND_FP_TERNARY:optab><SVE_F:mode>_2) + (*cond_<SVE_COND_FP_TERNARY:optab><SVE_F:mode>_4) + (*cond_<SVE_COND_FP_TERNARY:optab><SVE_F:mode>_any): Match the + strictness operands. Use aarch64_sve_pred_dominates_p to check + whether the predicate on the conditional operation is suitable + for merging. Split patterns into the canonical equal-predicate form. + (*add<SVE_F:mode>3, *sub<SVE_F:mode>3, *mul<SVE_F:mode>3): Likewise. + Restrict the unpredicated alternatives to SVE_RELAXED_GP. + +2019-08-14 Richard Sandiford <richard.sandiford@arm.com> + Kugan Vivekanandarajah <kugan.vivekanandarajah@linaro.org> + + * config/aarch64/aarch64-sve.md (add<mode>3, *add<mode>3) + (sub<mode>3, *sub<mode>3, *fabd<mode>3, mul<mode>3, *mul<mode>3) + (div<mode>3, *div<mode>3): Use SVE_COND_FP_* unspecs instead of + rtx codes. + (cond_<optab><mode>, *cond_<optab><mode>_2, *cond_<optab><mode>_3) + (*cond_<optab><mode>_any): Add the predicate to the SVE_COND_FP_* + unspecs. + +2019-08-14 Richard Sandiford <richard.sandiford@arm.com> + Kugan Vivekanandarajah <kugan.vivekanandarajah@linaro.org> + + * config/aarch64/aarch64-sve.md (bic<mode>3): Rename to... + (*bic<SVE_I:mode>3): ...this. Match the form that an SVE inverse + actually has, rather than relying on REG_EQUAL notes. + Make the insn operand order match the SVE operand order. + (*<nlogical><PRED_ALL:mode>3): Make the insn operand order match + the SVE operand order. + +2019-08-14 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/aarch64.c (aarch64_target_reg): New function. + (aarch64_emit_set_immediate): Likewise. + (aarch64_ptrue_reg): Build a VNx16BI constant and then bitcast it. + (aarch64_pfalse_reg): Likewise. + (aarch64_convert_sve_data_to_pred): New function. + (aarch64_sve_move_pred_via_while): Take an optional target register + and the required register mode. + (aarch64_expand_sve_const_pred_1): New function. + (aarch64_expand_sve_const_pred): Likewise. + (aarch64_expand_mov_immediate): Build an all-true predicate + if the significant bits of the immediate are all true. Use + aarch64_expand_sve_const_pred for all compile-time predicate constants. + (aarch64_mov_operand_p): Force predicate constants to be VNx16BI + before register allocation. + * config/aarch64/aarch64-sve.md (*vec_duplicate<mode>_reg): Use + a VNx16BI PTRUE when splitting the memory alternative. + (vec_duplicate<mode>): Update accordingly. + (*pred_cmp<cmp_op><mode>): Rename to... + (@aarch64_pred_cmp<cmp_op><mode>): ...this. + +2019-08-14 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/aarch64-protos.h (aarch64_ptrue_all): Declare. + * config/aarch64/aarch64.c (aarch64_ptrue_all): New function. + * config/aarch64/aarch64.md (UNSPEC_PTEST_PTRUE): Delete. + (UNSPEC_PTEST): New unspec. + (SVE_MAYBE_NOT_PTRUE, SVE_KNOWN_PTRUE): New constants. + * config/aarch64/iterators.md (data_bytes): New mode attribute. + * config/aarch64/predicates.md (aarch64_sve_ptrue_flag): New predicate. + * config/aarch64/aarch64-sve.md: Add a new section describing the + handling of UNSPEC_PTEST. + (pred_<LOGICAL:optab><PRED_ALL:mode>3): Rename to... + (@aarch64_pred_<LOGICAL:optab><PRED_ALL:mode>_z): ...this. + (ptest_ptrue<mode>): Replace with... + (aarch64_ptest<mode>): ...this new pattern. + (cbranch<mode>4): Update after above changes. + (*<LOGICAL:optab><PRED_ALL:mode>3_cc): Use UNSPEC_PTEST instead of + UNSPEC_PTEST_PTRUE. + (*cmp<SVE_INT_CMP:cmp_op><SVE_I:mode>_cc): Likewise. + (*cmp<SVE_INT_CMP:cmp_op><SVE_I:mode>_ptest): Likewise. + (*while_ult<GPI:mode><PRED_ALL:mode>_cc): Likewise. + +2019-08-14 Xiong Hu Luo <luoxhu@linux.ibm.com> + + PR lto/91287 + * builtins.c (builtin_with_linkage_p): New function. + * builtins.h (builtin_with_linkage_p): New function. + * symtab.c (write_symbol): Remove redundant assert. + * lto-streamer-out.c (symtab_node::output_to_lto_symbol_table_p): + Remove FIXME and use builtin_with_linkage_p. + +2019-08-13 Richard Sandiford <richard.sandiford@arm.com> + + PR middle-end/91421 + * tree-core.h (function_decl::function_code): Change type to + unsigned int. + * tree.h (DECL_FUNCTION_CODE): Rename old definition to... + (DECL_UNCHECKED_FUNCTION_CODE): ...this. + (DECL_BUILT_IN_CLASS): Make an rvalue macro only. + (DECL_FUNCTION_CODE): New function. Assert that the built-in class + is BUILT_IN_NORMAL. + (DECL_MD_FUNCTION_CODE, DECL_FE_FUNCTION_CODE): New functions. + (set_decl_built_in_function, copy_decl_built_in_function): Likewise. + (fndecl_built_in_p): Change the type of the "name" argument to + unsigned int. + * builtins.c (expand_builtin): Move DECL_FUNCTION_CODE use + after check for DECL_BUILT_IN_CLASS. + * cgraphclones.c (build_function_decl_skip_args): Use + set_decl_built_in_function. + * ipa-param-manipulation.c (ipa_modify_formal_parameters): Likewise. + * ipa-split.c (split_function): Likewise. + * langhooks.c (add_builtin_function_common): Likewise. + * omp-simd-clone.c (simd_clone_create): Likewise. + * tree-streamer-in.c (unpack_ts_function_decl_value_fields): Likewise. + * config/darwin.c (darwin_init_cfstring_builtins): Likewise. + (darwin_fold_builtin): Use DECL_MD_FUNCTION_CODE instead of + DECL_FUNCTION_CODE. + * fold-const.c (operand_equal_p): Compare DECL_UNCHECKED_FUNCTION_CODE + instead of DECL_FUNCTION_CODE. + * lto-streamer-out.c (hash_tree): Use DECL_UNCHECKED_FUNCTION_CODE + instead of DECL_FUNCTION_CODE. + * tree-streamer-out.c (pack_ts_function_decl_value_fields): Likewise. + * print-tree.c (print_node): Use DECL_MD_FUNCTION_CODE when + printing DECL_BUILT_IN_MD. Handle DECL_BUILT_IN_FRONTEND. + * config/aarch64/aarch64-builtins.c (aarch64_expand_builtin) + (aarch64_fold_builtin, aarch64_gimple_fold_builtin): Use + DECL_MD_FUNCTION_CODE instead of DECL_FUNCTION_CODE. + * config/aarch64/aarch64.c (aarch64_builtin_reciprocal): Likewise. + * config/alpha/alpha.c (alpha_expand_builtin, alpha_fold_builtin): + (alpha_gimple_fold_builtin): Likewise. + * config/arc/arc.c (arc_expand_builtin): Likewise. + * config/arm/arm-builtins.c (arm_expand_builtin): Likewise. + * config/avr/avr-c.c (avr_resolve_overloaded_builtin): Likewise. + * config/avr/avr.c (avr_expand_builtin, avr_fold_builtin): Likewise. + * config/bfin/bfin.c (bfin_expand_builtin): Likewise. + * config/c6x/c6x.c (c6x_expand_builtin): Likewise. + * config/frv/frv.c (frv_expand_builtin): Likewise. + * config/gcn/gcn.c (gcn_expand_builtin_1): Likewise. + (gcn_expand_builtin): Likewise. + * config/i386/i386-builtins.c (ix86_builtin_reciprocal): Likewise. + (fold_builtin_cpu): Likewise. + * config/i386/i386-expand.c (ix86_expand_builtin): Likewise. + * config/i386/i386.c (ix86_fold_builtin): Likewise. + (ix86_gimple_fold_builtin): Likewise. + * config/ia64/ia64.c (ia64_fold_builtin): Likewise. + (ia64_expand_builtin): Likewise. + * config/iq2000/iq2000.c (iq2000_expand_builtin): Likewise. + * config/mips/mips.c (mips_expand_builtin): Likewise. + * config/msp430/msp430.c (msp430_expand_builtin): Likewise. + * config/nds32/nds32-intrinsic.c (nds32_expand_builtin_impl): Likewise. + * config/nios2/nios2.c (nios2_expand_builtin): Likewise. + * config/nvptx/nvptx.c (nvptx_expand_builtin): Likewise. + * config/pa/pa.c (pa_expand_builtin): Likewise. + * config/pru/pru.c (pru_expand_builtin): Likewise. + * config/riscv/riscv-builtins.c (riscv_expand_builtin): Likewise. + * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): + Likewise. + * config/rs6000/rs6000-call.c (htm_expand_builtin): Likewise. + (altivec_expand_dst_builtin, altivec_expand_builtin): Likewise. + (rs6000_gimple_fold_builtin, rs6000_expand_builtin): Likewise. + * config/rs6000/rs6000.c (rs6000_builtin_md_vectorized_function) + (rs6000_builtin_reciprocal): Likewise. + * config/rx/rx.c (rx_expand_builtin): Likewise. + * config/s390/s390-c.c (s390_resolve_overloaded_builtin): Likewise. + * config/s390/s390.c (s390_expand_builtin): Likewise. + * config/sh/sh.c (sh_expand_builtin): Likewise. + * config/sparc/sparc.c (sparc_expand_builtin): Likewise. + (sparc_fold_builtin): Likewise. + * config/spu/spu-c.c (spu_resolve_overloaded_builtin): Likewise. + * config/spu/spu.c (spu_expand_builtin): Likewise. + * config/stormy16/stormy16.c (xstormy16_expand_builtin): Likewise. + * config/tilegx/tilegx.c (tilegx_expand_builtin): Likewise. + * config/tilepro/tilepro.c (tilepro_expand_builtin): Likewise. + * config/xtensa/xtensa.c (xtensa_fold_builtin): Likewise. + (xtensa_expand_builtin): Likewise. + +2019-08-13 Richard Sandiford <richard.sandiford@arm.com> + + PR middle-end/91421 + * attribs.c (decl_attributes): Check the DECL_BUILT_IN_CLASS + before the DECL_FUNCTION_CODE. + * calls.c (maybe_warn_alloc_args_overflow): Use fndecl_built_in_p + to check for a BUILT_IN_ALLOCA call. + * ipa-cp.c (ipa_get_indirect_edge_target_1): Likewise for + BUILT_IN_UNREACHABLE. Don't check for a FUNCTION_TYPE. + * ipa-devirt.c (possible_polymorphic_call_target_p): Likewise. + * ipa-prop.c (try_make_edge_direct_virtual_call): Likewise. + * gimple-ssa-isolate-paths.c (is_addr_local): Check specifically + for BUILT_IN_NORMAL functions. + * trans-mem.c (expand_block_edges): Use gimple_call_builtin_p to + test for BUILT_IN_TM_ABORT. + * tree-ssa-ccp.c (optimize_stack_restore): Use fndecl_built_in_p + to check for a BUILT_IN_STACK_RESTORE call. + (optimize_stdarg_builtin): Remove redundant check for GIMPLE_CALL. + * tree-ssa-threadedge.c + (record_temporary_equivalences_from_stmts_at_dest): Check for a + BUILT_IN_NORMAL decl before checking its DECL_FUNCTION_CODE. + * tree-vect-patterns.c (vect_recog_pow_pattern): Use a positive + test for a BUILT_IN_NORMAL call instead of a negative test for + an internal function call. + +2019-08-13 Richard Sandiford <richard.sandiford@arm.com> + + * tree.h (build_vector_a_then_b): Declare. + * tree.c (build_vector_a_then_b): New function. + * fold-const-call.c (fold_while_ult): Likewise. + (fold_const_call): Use it to handle IFN_WHILE_ULT. + * config/aarch64/aarch64-protos.h (AARCH64_FOR_SVPATTERN): New macro. + (aarch64_svpattern): New enum. + * config/aarch64/aarch64-sve.md (mov<PRED_ALL:mode>): Pass + constants through aarch64_expand_mov_immediate. + (*aarch64_sve_mov<PRED_ALL:mode>): Use aarch64_mov_operand rather + than general_operand as the predicate for operand 1. + (while_ult<GPI:mode><PRED_ALL:mode>): Add a '@' marker. + * config/aarch64/aarch64.c (simd_immediate_info::PTRUE): New + insn_type. + (simd_immediate_info::simd_immediate_info): New overload that + takes a scalar_int_mode and an svpattern. + (simd_immediate_info::u): Add a "pattern" field. + (svpattern_token): New function. + (aarch64_get_sve_pred_bits, aarch64_widest_sve_pred_elt_size) + (aarch64_partial_ptrue_length, aarch64_svpattern_for_vl) + (aarch64_sve_move_pred_via_while): New functions. + (aarch64_expand_mov_immediate): Try using + aarch64_sve_move_pred_via_while for predicates that contain N ones + followed by M zeros but that do not correspond to a VLnnn pattern. + (aarch64_sve_pred_valid_immediate): New function. + (aarch64_simd_valid_immediate): Use it instead of dealing directly + with PTRUE and PFALSE. + (aarch64_output_sve_mov_immediate): Handle new simd_immediate_info + forms. + +2019-08-13 Iain Sandoe <iain@sandoe.co.uk> + + * config/darwin.c (machopic_indirect_call_target): Rename symbol stub + flag. + (darwin_override_options): Likewise. + * config/darwin.h: Likewise. + * config/darwin.opt: Likewise. + * config/i386/i386.c (output_pic_addr_const): Likewise. + * config/rs6000/darwin.h: Likewise. + * config/rs6000/rs6000.c (rs6000_call_darwin_1): Likewise. + * config/i386/darwin.h (TARGET_MACHO_PICSYM_STUBS): Rename to ... + ... this TARGET_MACHO_SYMBOL_STUBS. + (FUNCTION_PROFILER):Likewise. + * config/i386/i386.h: Likewise. + +2019-08-13 Uroš Bizjak <ubizjak@gmail.com> + + * config/i386/i386-expand.c (ix86_expand_vector_extract) + <case E_V2SImode>: Use vec_extr path for + TARGET_MMX_WITH_SSE && TARGET_SSE4_1. + <case E_V8QImode>: Ditto. + * config/i386/mmx.md (*mmx_pextrw_zext): Rename from mmx_pextrw. + Use SWI48 mode iterator. Use %k to output operand 0. + (*mmx_pextrw): New insn pattern. + (*mmx_pextrb): Ditto. + (*mmx_pextrb_zext): Ditto. + +2019-08-13 Jonathan Wakely <jwakely@redhat.com> + + * target.def (libc_has_function, libc_has_fast_function): Improve + documentation strings. + * doc/tm.texi: Regenerate. + +2019-08-13 Caroline Tice <cmtice@google.com> + + PR other/91396 + * config/gnu-user.h (GNU_USER_TARGET_ENDFILE_SPEC): Only add the + vtv_end.o or vtv_end_preinit.o files if !static. + +2019-08-13 Olivier Hainque <hainque@adacore.com> + + * rtl.h (tablejump_casesi_pattern): Move declaration to proper spot. + +2019-08-13 Olivier Hainque <hainque@adacore.com> + + * rtlanal.c (tablejump_casesi_pattern): New function, to + determine if a tablejump insn is a casesi dispatcher. Extracted + from patch_jump_insn. + * rtl.h (tablejump_casesi_pattern): Declare. + * cfgrtl.c (patch_jump_insn): Use it. + * dwarf2cfi.c (create_trace_edges): Use it. + +2019-08-13 Wilco Dijkstra <wdijkstr@arm.com> + + PR target/81800 + * config/aarch64/aarch64.md (lrint): Disable lrint pattern if GPF + operand is larger than a long int. + +2019-08-13 Richard Sandiford <richard.sandiford@arm.com> + + * machmode.h (opt_mode::else_mode): New function. + (opt_mode::else_blk): Use it. + * config/aarch64/aarch64-protos.h (aarch64_vq_mode): Declare. + (aarch64_full_sve_mode, aarch64_sve_ld1rq_operand_p): Likewise. + (aarch64_gen_stepped_int_parallel): Likewise. + (aarch64_stepped_int_parallel_p): Likewise. + (aarch64_expand_mov_immediate): Remove the optional gen_vec_duplicate + argument. + * config/aarch64/aarch64.c + (aarch64_expand_sve_widened_duplicate): Delete. + (aarch64_expand_sve_dupq, aarch64_expand_sve_ld1rq): New functions. + (aarch64_expand_sve_const_vector): Rewrite to handle more cases. + (aarch64_expand_mov_immediate): Remove the optional gen_vec_duplicate + argument. Use early returns in the !CONST_INT_P handling. + Pass all SVE data vectors to aarch64_expand_sve_const_vector rather + than handling some inline. + (aarch64_full_sve_mode, aarch64_vq_mode): New functions, split out + from... + (aarch64_simd_container_mode): ...here. + (aarch64_gen_stepped_int_parallel, aarch64_stepped_int_parallel_p) + (aarch64_sve_ld1rq_operand_p): New functions. + * config/aarch64/predicates.md (descending_int_parallel) + (aarch64_sve_ld1rq_operand): New predicates. + * config/aarch64/constraints.md (UtQ): New constraint. + * config/aarch64/aarch64.md (UNSPEC_REINTERPRET): New unspec. + * config/aarch64/aarch64-sve.md (mov<SVE_ALL:mode>): Remove the + gen_vec_duplicate from call to aarch64_expand_mov_immediate. + (@aarch64_sve_reinterpret<mode>): New expander. + (*aarch64_sve_reinterpret<mode>): New pattern. + (@aarch64_vec_duplicate_vq<mode>_le): New pattern. + (@aarch64_vec_duplicate_vq<mode>_be): Likewise. + (*sve_ld1rq<Vesize>): Replace with... + (@aarch64_sve_ld1rq<mode>): ...this new pattern. + +2019-08-13 Wilco Dijkstra <wdijkstr@arm.com> + + * config/aarch64/aarch64.c (generic_tunings): Set function alignment to + 16:12. + +2019-08-13 Jozef Lawrynowicz <jozef.l@mittosystems.com> + + * config/msp430/driver-msp430.c (msp430_set_driver_var): New. + * config/msp430/msp430-devices.c (canonicalize_path_dirsep): New. + (msp430_check_path_for_devices): New. + (parse_devices_csv_1): New. + (parse_devices_csv): New. + (msp430_extract_mcu_data): Try to find devices.csv and search for the + MCU data in devices.csv before using the hard-coded data. + Warn if devices.csv isn't found and the MCU wasn't found in the + hard-coded data either. + * config/msp430/msp430.h (DRIVER_SELF_SPECS): Call + msp430_set_driver_var for -mno-warn-devices-csv and -mdevices-csv-loc. + Search for devices.csv on -I and -L paths. + (EXTRA_SPEC_FUNCTIONS): Add msp430_check_path_for_devices and + msp430_set_driver_var. + * config/msp430/msp430.opt: Add -mwarn-devices-csv and + -mdevices-csv-loc=. + * doc/invoke.texi (-mmcu): Document that -I and -L paths are + searched for devices.csv. + (mwarn-devices-csv): Document option. + +2019-08-13 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/aarch64-protos.h (aarch64_output_ptrue): Delete. + * config/aarch64/aarch64-sve.md (*aarch64_sve_mov<PRED_ALL:mode>): + Use a single Dn alternative instead of separate Dz and Dm + alternatives. Use aarch64_output_sve_move_immediate. + * config/aarch64/aarch64.c (aarch64_sve_element_int_mode): New + function. + (aarch64_simd_valid_immediate): Fill in the simd_immediate_info + for predicates too. + (aarch64_output_sve_mov_immediate): Handle predicate modes. + (aarch64_output_ptrue): Delete. + +2019-08-13 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/aarch64.c (simd_immediate_info::insn_type): Add + INDEX. + (simd_immediate_info::value, simd_immediate_info::step) + (simd_immediate_info::modifier, simd_immediate_info::shift): Replace + with... + (simd_immediate_info::u): ...this new union. + (simd_immediate_info::simd_immediate_info): Update accordingly. + (aarch64_output_simd_mov_immediate): Likewise. + (aarch64_output_sve_mov_immediate): Likewise. + +2019-08-13 Jozef Lawrynowicz <jozef.l@mittosystems.com> + + * config.gcc (msp430*-*-*): Add msp430-devices.o to extra_objs and + extra_gcc_objs. + * config/msp430/driver-msp430.c: Remove msp430_mcu_data. + (msp430_select_cpu): New spec function. + (msp430_select_hwmult_lib): Use msp430_extract_mcu_data to extract + MCU data. + * config/msp430/msp430-devices.c: New file. + * config/msp430/msp430-devices.h: New file. + * config/msp430/msp430.c: Remove msp430_mcu_data. + (msp430_option_override): Use msp430_extract_mcu_data to extract + MCU data. + (msp430_use_f5_series_hwmult): Likewise. + (use_32bit_hwmult): Likewise. + (msp430_no_hwmult): Likewise. + * config/msp430/msp430.h (ASM_SPEC): Don't pass -mmcu to the + assembler. + (DRIVER_SELF_SPECS): Call msp430_select_cpu if -mmcu is used without + and -mcpu option. + (EXTRA_SPEC_FUNCTIONS): Add msp430_select_cpu. + * config/msp430/t-msp430: Add rule to build msp430-devices.o. + Remove hard-coded MCU multilib data. + +2019-08-13 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/aarch64.c (aarch64_classify_vector_mode): Switch + based on the mode instead of testing properties of it. + +2019-08-13 Richard Sandiford <richard.sandiford@arm.com> + + * doc/md.texi: Document the x and y constraints for AArch64. + * config/aarch64/aarch64.h (FP_LO8_REGNUM_P): New macro. + (FP_LO8_REGS): New reg_class. + (REG_CLASS_NAMES, REG_CLASS_CONTENTS): Add an entry for FP_LO8_REGS. + * config/aarch64/aarch64.c (aarch64_hard_regno_nregs) + (aarch64_regno_regclass, aarch64_class_max_nregs): Handle FP_LO8_REGS. + * config/aarch64/predicates.md (aarch64_simd_register): Use + FP_REGNUM_P instead of checking the classes manually. + * config/aarch64/constraints.md (y): New constraint. + +2019-08-13 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/iterators.md (perm_insn): Include the "1"/"2" suffix. + (perm_hilo): Remove UNSPEC_ZIP*, UNSEPC_TRN* and UNSPEC_UZP*. + * config/aarch64/aarch64-simd.md + (aarch64_<PERMUTE:perm_insn><PERMUTE:perm_hilo><mode>): Rename to.. + (aarch64_<PERMUTE:perm_insn><mode>): ...this and remove perm_hilo + from the asm template. + * config/aarch64/aarch64-sve.md + (aarch64_<perm_insn><perm_hilo><PRED_ALL:mode>): Rename to.. + (aarch64_<perm_insn><PRED_ALL:mode>): ...this and remove perm_hilo + from the asm template. + (aarch64_<perm_insn><perm_hilo><SVE_ALL:mode>): Rename to.. + (aarch64_<perm_insn><SVE_ALL:mode>): ...this and remove perm_hilo + from the asm template. + * config/aarch64/aarch64-simd-builtins.def: Update comment. + +2019-08-13 Martin Liska <mliska@suse.cz> + + * value-prof.c (gimple_ic_transform): Add new line. + Print details with MSG_NOTE. + +2019-08-13 Martin Liska <mliska@suse.cz> + + * doc/invoke.texi: Document automatic detection of jobserver. + * lto-wrapper.c (run_gcc): Detect jobserver always. + +2019-08-13 Uroš Bizjak <ubizjak@gmail.com> + + * config/i386/i386-expand.c (ix86_expand_vector_set) + <case E_V2SImode>: Use vec_merge path for + TARGET_MMX_WITH_SSE && TARGET_SSE4_1. + <case E_V8QImode>: Ditto. + * config/i386/mmx.md (*mmx_pinsrd): New insn pattern. + (*mmx_pinsrb): Ditto. + +2019-08-12 Jakub Jelinek <jakub@redhat.com> + + PR target/83250 + PR target/91340 + * config/i386/avxintrin.h (_mm256_zextpd128_pd256, + _mm256_zextps128_ps256, _mm256_zextsi128_si256): New intrinsics. + * config/i386/avx512fintrin.h (_mm512_zextpd128_pd512, + _mm512_zextps128_ps512, _mm512_zextsi128_si512, _mm512_zextpd256_pd512, + _mm512_zextps256_ps512, _mm512_zextsi256_si512): Likewise. + +2019-08-12 Richard Biener <rguenther@suse.de> + + PR lto/91375 + * tree.c (free_lang_data_in_type): Do not free TYPE_BINFO dependent on + flag_devirtualize. + +2019-08-12 Richard Biener <rguenther@suse.de> + + PR driver/91130 + * lto-wrapper.c (get_options_from_collect_gcc_options): Remove + lang_mask option, always use CL_DRIVER. + (get_options_from_collect_gcc_options): Adjust. + (find_and_merge_options): Likewise. + (run_gcc): Likewise. + +2019-08-12 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> + + * ipa-predicate.c (add_condition): Restore inverted test. + +2019-08-10 Jakub Jelinek <jakub@redhat.com> + + * tree-core.h (enum omp_clause_code): Add OMP_CLAUSE_DEVICE_TYPE. + (enum omp_clause_device_type_kind): New enum. + (struct tree_omp_clause): Add subcode.device_type_kind. + * tree.h (OMP_CLAUSE_DEVICE_TYPE_KIND): Define. + * tree.c (omp_clause_num_ops, omp_clause_code_name): Add entries + for device_type clause. + (walk_tree_1): Handle OMP_CLAUSE_DEVICE_TYPE. + * tree-pretty-print.c (dump_omp_clause): Likewise. + + PR target/91408 + * config/i386/mmx.md (usadv8qi): Use register_operand instead of + vector_operand. + +2019-08-09 Vladimir Makarov <vmakarov@redhat.com> + + * reload1.c (finish_spills): Do not check ira_conflicts_p when + handling spilled pseudos. + +2019-08-09 Richard Earnshaw <rearnsha@arm.com> + + PR target/91386 + * config/aarch64/aarch64.c (aarch64_gen_adjusted_ldpstp): Use copy_rtx + to preserve the contents of the original insns. + +2019-08-09 Richard Earnshaw <rearnsha@arm.com> + + * config/arm/arm.md (addsi3_compare_op1): Add 16-bit thumb-2 variants. + (addsi3_compare_op2): Likewise. + +2019-08-09 Martin Liska <mliska@suse.cz> + + * alias.c (alias_ptr_types_compatible_p): Strengten + type comparison in LTO mode. + +2019-08-09 Richard Sandiford <richard.sandiford@arm.com> + + PR middle-end/90313 + * tree-tailcall.c (find_tail_calls): Reject calls that might + read from an escaped RESULT_DECL. + +2019-08-09 Martin Liska <mliska@suse.cz> + + * doc/invoke.texi: Document the option value. + * lto-wrapper.c (run_gcc): Set auto_parallel + only with -flto=auto. + +2019-08-09 Martin Liska <mliska@suse.cz> + + * opts.c (common_handle_option): Error for an invalid argument + to -flto=. + +2019-08-09 Martin Liska <mliska@suse.cz> + + * ipa-icf.c (sem_function::merge): Define AUTO_DUMP_SCOPE and + use dump_printf to report optimization. + (sem_variable::merge): Likwise. + (sem_item_optimizer::merge_classes): Use dump_printf to report + ICF hits. + +2019-08-09 Martin Liska <mliska@suse.cz> + + * value-prof.c (gimple_divmod_fixed_value_transform): + Use dump_printf_loc. + (gimple_mod_pow2_value_transform): Likewise. + (gimple_mod_subtract_transform): Likewise. + (init_node_map): Likewise. + (gimple_ic_transform): Likewise. + (gimple_stringops_transform): Likewise. + +2019-08-08 Mihailo Stojanovic <mistojanovic@wavecomp.com> + + * doc/extend.texi: Add const qualifier to ld intrinsics. + +2019-08-08 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/dfp.md (D64_D128): Rename to ... + (DDTD): ... this, throughout. + (dfp_suffix): Rename to ... + (q): ... this, throughout. + +2019-08-08 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/dfp.md (D64_D128): Move earlier in the file. + (dfp_suffix): Ditto. + (adddd3, addtd3): Merge to ... + (add<mode>3 for D64_D128): ... this. + (subdd3, subtd3): Merge to ... + (sub<mode>3 for D64_D128): ... this. + (muldd3, multd3): Merge to ... + (mul<mode>3 for D64_D128): ... this. + (divdd3, divtd3): Merge to ... + (div<mode>3 for D64_D128): ... this. + (*cmpdd_internal1, *cmptd_internal1): Merge to ... + (*cmp<mode>_internal1 for D64_D128): ... this. + (ftruncdd2, ftrunctd2): Merge to ... + (ftrunc<mode>2 for D64_D128): ... this. + (fixdddi2, fixtddi2): Merge to ... + (fix<mode>di2 for D64_D128): ... this. + +2019-08-08 Jim Wilson <jimw@sifive.com> + + PR target/91229 + * config/riscv/riscv.c (riscv_flatten_aggregate_field): New arg + ignore_zero_width_bit_field_p. Skip zero size bitfields when true. + Pass into recursive call. + (riscv_flatten_aggregate_argument): New arg. Pass to + riscv_flatten_aggregate_field. + (riscv_pass_aggregate_in_fpr_pair_p): New local warned. Call + riscv_flatten_aggregate_argument twice, with false and true as last + arg. Process result twice. Compare results and warn if different. + (riscv_pass_aggregate_in_fpr_and_gpr_p): Likewise. + +2019-08-08 Martin Liska <mliska@suse.cz> + + PR bootstrap/91352 + * gcc.c (driver::detect_jobserver): Use is_valid_fd. + * lto-wrapper.c (jobserver_active_p): Likewise. + +2019-08-08 Martin Liska <mliska@suse.cz> + + * cgraphclones.c (set_new_clone_decl_and_node_flags): Drop + IS_OPERATOR_NEW and IS_OPERATOR_DELETE. + (create_version_clone_with_body): Likewise. + +2019-08-08 Jakub Jelinek <jakub@redhat.com> + + * gimplify.c (omp_add_variable): Use GOVD_PRIVATE | GOVD_EXPLICIT + for VLA helper variables on target data even if not GOVD_FIRSTPRIVATE. + (gimplify_scan_omp_clauses): For OMP_CLAUSE_USE_DEVICE_* use just + GOVD_EXPLICIT flags. + (gimplify_omp_workshare): For OMP_TARGET_DATA move all + OMP_CLAUSE_USE_DEVICE_* clauses to the end of clauses chain. + * omp-low.c (scan_sharing_clauses): For OMP_CLAUSE_USE_DEVICE_* + call install_var_field with mask 11 instead of 3. + (lower_omp_target): For OMP_CLAUSE_USE_DEVICE_* use pass + (splay_tree_key) &DECL_UID (var) to build_sender_ref instead of var. + +2019-08-07 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/constraints.md (Z): Handle floating-point zeros too. + * config/aarch64/predicates.md (aarch64_reg_or_zero): Likewise. + +2019-08-07 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/aarch64-sve.md (vec_shl_insert_<mode>): Add + MOVPRFX alternatives. Make the GPR alternatives more expensive + than the FPR ones. + +2019-08-07 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/aarch64-sve.md (fold_extract_last_<mode>): + Disparage the GPR alternative relative to the FPR one. + Fix handling of 8-bit and 16-bit FPR values. + +2019-08-07 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/iterators.md (BITWISEV): Delete. + (SVE_INT_REDUCTION, SVE_FP_REDUCTION): New int iterators. + (optab): Handle UNSPEC_UMAXV, UNSPEC_UMINV, UNSPEC_SMAXV, + UNSPEC_SMINV, UNSPEC_FADDV, UNSPEC_FMAXNMV, UNSPEC_FMAXV, + UNSPEC_FMINNMV, UNSPEC_FMINV. + (bit_reduc_op): Delete. + (sve_int_op): New int attribute. + (sve_fp_op): Handle UNSPEC_FADDV, UNSPEC_FMAXNMV, UNSPEC_FMAXV, + UNSPEC_FMINNMV, UNSPEC_FMINV. + * config/aarch64/aarch64-sve.md + (reduc_<MAXMINV:maxmin_uns>_scal_<SVE_I:mode>) + (*reduc_<MAXMINV:maxmin_uns>_scal_<SVE_I:mode>) + (reduc_<BITWISEV:optab>_scal_<SVE_I:mode>) + (*reduc_<BITWISEV:optab>_scal_<SVE_I:mode>): Merge into... + (reduc_<SVE_INT_REDUCTION:optab>_scal_<SVE_I:mode>) + (*reduc_<SVE_INT_REDUCTION:optab>_scal_<SVE_I:mode>): ...these + new patterns. + (reduc_plus_scal_<SVE_F:mode>, *reduc_plus_scal_<SVE_I:mode>) + (reduc_<FMAXMINV:optab>_scal_<SVE_F:mode>) + (*reduc_<FMAXMINV:optab>_scal_<SVE_F:mode>): Merge into... + (reduc_<SVE_FP_REDUCTION:optab>_scal_<SVE_F:mode>) + (*reduc_<SVE_FP_REDUCTION:optab>_scal_<SVE_F:mode>): ...these + new patterns. + +2019-08-07 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/aarch64-sve.md (fma<mode>4, *fma<mode>4) + (fnma<mode>4, *fnma<mode>4, fnms<mode>4, *fnms<mode>4) + (fms<mode>4, *fms<mode>4): Replace with... + (<SVE_COND_FP_TERNARY:optab><SVE_F:mode>4) + (*<SVE_COND_FP_TERNARY:optab><SVE_F:mode>4): ...these new patterns. + Use unspecs instead of rtx codes. + (cond_<optab><mode>, *cond_<optab><mode>_2, *cond_<optab><mode>_4) + (*cond_<optab><mode>_any): Add the predicate to SVE_COND_FP_TERNARY. + +2019-08-07 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/iterators.md (SVE_COND_FP_MAXMIN_PUBLIC): New + int iterator. + (maxmin_uns_op): Handle UNSPEC_COND_FMAXNM and UNSPEC_COND_FMINNM. + * config/aarch64/aarch64-sve.md + (<FMAXMIN:su><FMAXMIN:maxmin><SVE_F:mode>3): Rename to... + (<SVE_COND_FP_MAXMIN_PUBLIC:optab><SVE_F:mode>3): ...this and + use a single unspec for the rhs. + (*<su><maxmin><mode>3): Delete. + (<maxmin_uns><SVE_F:mode>3): Use a single unspec for the rhs. + +2019-08-07 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/iterators.md (UNSPEC_COND_FABS, UNSPEC_COND_FNEG) + (UNSPEC_COND_FRINTA, UNSPEC_COND_FRINTI, UNSPEC_COND_FRINTM) + (UNSPEC_COND_FRINTN, UNSPEC_COND_FRINTP, UNSPEC_COND_FRINTX) + (UNSPEC_COND_FRINTZ, UNSPEC_COND_FSQRT): New unspecs. + (optab, sve_fp_op): Handle them. + (SVE_FP_UNARY): Delete. + (optab): Remove sqrt entry. + (sve_fp_op): Remove neg, abs and sqrt entries. + (SVE_COND_FP_UNARY): New int iterator. + * config/aarch64/aarch64-sve.md (<frint_pattern><mode>2) + (*<frint_pattern><mode>2): Delete. + (<SVE_FP_UNARY:optab><SVE_F:mode>2): Replace with... + (<SVE_COND_FP_UNARY:optab><SVE_F:mode>2): ...this. + (*<SVE_FP_UNARY:optab><SVE_F:mode>2): Replace with... + (*<SVE_COND_FP_UNARY:optab><SVE_F:mode>2): ...this. + +2019-08-07 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/aarch64-sve.md (*pred_fold_left_plus_<mode>): Delete. + +2019-08-07 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/iterators.md (UNSPEC_COND_ADD): Rename to... + (UNSPEC_COND_FADD): ...this. + (UNSPEC_COND_SUB): Rename to... + (UNSPEC_COND_FSUB): ...this. + (UNSPEC_COND_MUL): Rename to... + (UNSPEC_COND_FMUL): ...this. + (UNSPEC_COND_DIV): Rename to... + (UNSPEC_COND_FDIV): ...this. + (UNSPEC_COND_MAX): Rename to... + (UNSPEC_COND_FMAXNM): ...this. + (UNSPEC_COND_MIN): Rename to... + (UNSPEC_COND_FMINNM): ...this. + (UNSPEC_COND_LT): Rename to... + (UNSPEC_COND_FCMLT): ...this. + (UNSPEC_COND_LE): Rename to... + (UNSPEC_COND_FCMLE): ...this. + (UNSPEC_COND_EQ): Rename to... + (UNSPEC_COND_FCMEQ): ...this. + (UNSPEC_COND_NE): Rename to... + (UNSPEC_COND_FCMNE): ...this. + (UNSPEC_COND_GE): Rename to... + (UNSPEC_COND_FCMGE): ...this. + (UNSPEC_COND_GT): Rename to... + (UNSPEC_COND_FCMGT): ...this. + (SVE_COND_FP_BINARY, SVE_COND_FP_CMP, optab, cmp_op, sve_fp_op) + (sve_fp_op_rev): Update accordingly. + * config/aarch64/aarch64.c (aarch64_unspec_cond_code): Likewise. + +2019-08-07 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/aarch64-sve.md: Reorganize contents and add + banner comments. + * config/aarch64/check-sve-md.awk: New file. + * config/aarch64/t-aarch64 (s-check-sve-md): New rule. + (insn-conditions.md): Depend on it. + +2019-08-07 Uroš Bizjak <ubizjak@gmail.com> + + PR target/91385 + * config/i386/sse.md (*negsi2_1_zext): Simplify insn pattern. + (*negsi2_cmpz_zext): Ditto. + +2019-08-07 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/iterators.md (commutative): Remove. + +2019-08-07 Richard Earnshaw <rearnsha@arm.com> + + PR driver/91130 + * lto-wrapper.c (find_and_merge_options): Use CL_DRIVER when + processing COLLECT_GCC_OPTIONS. + (run_gcc): Likewise. + +2019-08-07 Bernd Edlinger <bernd.edlinger@hotmail.de> + + PR tree-optimization/91109 + * lra-remat.c (update_scratch_ops): Remove assignment of the + hard register. + +2019-08-07 Richard Sandiford <richard.sandiford@arm.com> + + * data-streamer.h (streamer_write_poly_uint64): Declare. + (streamer_read_poly_uint64): Likewise. + * data-streamer-in.c (streamer_read_poly_uint64): New function. + * data-streamer-out.c (streamer_write_poly_uint64): Likewise. + * ipa-predicate.h (condition::size): Turn into a poly_int64. + (add_condition): Take a poly_int64 size. + * ipa-predicate.c (add_condition): Likewise. + * ipa-prop.h (ipa_load_from_parm_agg): Take a poly_int64 size pointer. + * ipa-prop.c (ipa_load_from_parm_agg): Likewise. + (ipcp_modif_dom_walker::before_dom_children): Update accordingly. + * ipa-fnsummary.c (evaluate_conditions_for_known_args): Handle + condition::size as a poly_int64. + (unmodified_parm_1): Take a poly_int64 size pointer. + (unmodified_parm): Likewise. + (unmodified_parm_or_parm_agg_item): Likewise. + (set_cond_stmt_execution_predicate): Update accordingly. + (set_switch_stmt_execution_predicate): Likewise. + (will_be_nonconstant_expr_predicate): Likewise. + (will_be_nonconstant_predicate): Likewise. + (inline_read_section): Stream condition::size as a poly_int. + (ipa_fn_summary_write): Likewise. + +2019-08-07 Martin Liska <mliska@suse.cz> + + * fold-const.c (twoval_comparison_p): Replace int + with bool as a return type. + (simple_operand_p): Likewise. + (operand_equal_p): Replace int with bool as a return type. + * fold-const.h (operand_equal_p): Likewise. + +2019-08-07 Jakub Jelinek <jakub@redhat.com> + + * tree-core.h (enum omp_clause_code): Adjust OMP_CLAUSE_USE_DEVICE_PTR + OpenMP description. Add OMP_CLAUSE_USE_DEVICE_ADDR clause. + * tree.c (omp_clause_num_ops, omp_clause_code_name): Add entries + for OMP_CLAUSE_USE_DEVICE_ADDR clause. + (walk_tree_1): Handle OMP_CLAUSE_USE_DEVICE_ADDR. + * tree-pretty-print.c (dump_omp_clause): Likewise. + * tree-nested.c (convert_nonlocal_omp_clauses, + convert_local_omp_clauses): Likewise. + * gimplify.c (gimplify_scan_omp_clauses, gimplify_adjust_omp_clauses): + Likewise. + * omp-low.c (scan_sharing_clauses, lower_omp_target): Likewise. + Treat OMP_CLAUSE_USE_DEVICE_ADDR like OMP_CLAUSE_USE_DEVICE_PTR + clause with array or reference to array types, no matter what type + except for reference it has. + +2019-08-07 Kewen Lin <linkw@gcc.gnu.org> + + * config/rs6000/vector.md (vrotr<mode>3): New define_expand. + +2019-08-07 Kito Cheng <kito.cheng@sifive.com> + + * config/riscv/multilib-generator: (canonical_order): Add 'g'. + (arch_canonicalize): Support rv32g and rv64g and fix error + handling. + +2019-08-06 Martin Liska <mliska@suse.cz> + + * cgraph.c (cgraph_node::dump): Dump DECL_IS_OPERATOR_NEW_P + and DECL_IS_OPERATOR_DELETE_P. + +2019-08-06 Jakub Jelinek <jakub@redhat.com> + + * tree.h (OMP_CLAUSE_LASTPRIVATE_TASKLOOP_IV): Rename to ... + (OMP_CLAUSE_LASTPRIVATE_LOOP_IV): ... this. Adjust comment. + * gimplify.c (gimple_add_tmp_var): In SIMD contexts, turn addressable + new vars into GOVD_PRIVATE rather than GOVD_LOCAL. + (gimplify_omp_for): Don't do C++ random access iterator clause + adjustments on combined constructs from OMP_LOOP. For OMP_LOOP, + don't predetermine the artificial iterator in case of C++ random + access iterators as lastprivate, but private. For OMP_LOOP, force + bind expr around simd body and force for_pre_body before the + construct. Use OMP_CLAUSE_LASTPRIVATE_LOOP_IV instead of + OMP_CLAUSE_LASTPRIVATE_TASKLOOP_IV. + (gimplify_omp_loop): Add firstprivate clauses on OMP_PARALLEL for + diff var of C++ random access iterators. Handle + OMP_CLAUSE_FIRSTPRIVATE. For OMP_CLAUSE_LASTPRIVATE_LOOP_IV, if + not outermost also add OMP_CLAUSE_FIRSTPRIVATE, and in both cases + clear OMP_CLAUSE_LASTPRIVATE_LOOP_IV on the lastprivate clause + on the OMP_FOR and OMP_DISTRIBUTE constructs if any. + * omp-low.c (lower_rec_input_clauses): For + OMP_CLAUSE_LASTPRIVATE_LOOP_IV on simd copy construct the private + variables instead of default constructing them. + (lower_lastprivate_clauses): Use OMP_CLAUSE_LASTPRIVATE_LOOP_IV + instead of OMP_CLAUSE_LASTPRIVATE_TASKLOOP_IV and move the + is_taskloop_ctx check from the assert to the guarding condition. + +2019-08-06 Kito Cheng <kito.cheng@sifive.com> + + * config/riscv/multilib-generator: (canonical_order): New. + (arch_canonicalize): Dito. + Apply arch_canonicalize for alts. + +2019-08-05 Martin Sebor <msebor@redhat.com> + + * doc/extend.texi (Common Variable Attributes): Document alias + attribute. + +2019-08-05 Marek Polacek <polacek@redhat.com> + + PR c++/91338 - Implement P1161R3: Deprecate a[b,c]. + * doc/invoke.texi: Document -Wcomma-subscript. + +2019-08-05 Richard Sandiford <richard.sandiford@arm.com> + + * tree-core.h (tree_function_decl): Make function_code an + independent field. Group the remaining bitfields into bytes + and move decl_type so that it contines to be at a byte boundary. + Leave 12 bits for future expansion. + +2019-08-05 Richard Sandiford <richard.sandiford@arm.com> + + * gimple-fold.c (gimple_fold_mask_load_store_mem_ref) + (gimple_fold_mask_load, gimple_fold_mask_store): New functions. + (gimple_fold_call): Use them to fold IFN_MASK_LOAD and + IFN_MASK_STORE. + +2019-08-05 Richard Sandiford <richard.sandiford@arm.com> + + * gimple.h (gimple_move_vops): Declare. + * gimple.c (gimple_move_vops): New function + * gimple-fold.c (replace_call_with_call_and_fold) + (gimple_fold_builtin_memory_op, gimple_fold_builtin_memset) + (gimple_fold_builtin_stpcpy, fold_builtin_atomic_compare_exchange) + (gimple_fold_call): Use it. + * ipa-param-manipulation.c (ipa_modify_call_arguments): Likewise. + * tree-call-cdce.c (use_internal_fn): Likewise. + * tree-if-conv.c (predicate_load_or_store): Likewise. + * tree-ssa-ccp.c (optimize_atomic_bit_test_and): Likewise. + * tree-ssa-math-opts.c (pass_cse_reciprocals::execute): Likewise. + * tree-ssa-propagate.c (finish_update_gimple_call): Likewise. + (update_call_from_tree): Likewise. + * tree-vect-stmts.c (vectorizable_load): Likewise. + * tree-vectorizer.c (adjust_simduid_builtins): Likewise. + +2019-08-05 Martin Liska <mliska@suse.cz> + + PR c++/91334 + * tree-ssa-dce.c (propagate_necessity): Handle new operators + with not arguments. + (eliminate_unnecessary_stmts): Likewise. + +2019-08-05 Richard Biener <rguenther@suse.de> + + PR middle-end/91169 + * fold-const.c (get_array_ctor_element_at_index): Create + offset_ints according to the sign of the index type and treat + that as signed if it is obviously so. + +2019-08-05 Jakub Jelinek <jakub@redhat.com> + + PR target/91341 + * config/i386/avxintrin.h (_mm256_loadu2_m128, _mm256_storeu2_m128, + _mm256_loadu2_m128d, _mm256_storeu2_m128d, _mm256_loadu2_m128i, + _mm256_storeu2_m128i): New function. + +2019-08-05 Kito Cheng <kito.cheng@sifive.com> + + * config/riscv/riscv.c (riscv_promote_function_mode): New. + (TARGET_PROMOTE_FUNCTION_MODE): Use riscv_promote_function_mode. + +2019-08-05 Alan Modra <amodra@gmail.com> + + PR target/91349 + * config/rs6000/freebsd64.h (CPLUSPLUS_CPP_SPEC), + (LINK_GCC_C_SEQUENCE_SPEC): Undef. + +2019-08-04 Gerald Pfeifer <gerald@pfeifer.com> + + * doc/install.texi (Prerequisites): Remove reference to Tcl 8.6 + bug that was fixed in Tcl 8.6.1. + +2019-08-02 Michael Meissner <meissner@linux.ibm.com> + + * config/rs6000/future.md: New file. + * config/rs6000/rs6000.md: Include future.md. + * config/rs6000/t-rs6000 (MD_INCLUDES): Add future.md. + +2019-08-02 Bernd Edlinger <bernd.edlinger@hotmail.de> + + * function.c (assign_parm_adjust_stack_rtl): Revise STRICT_ALIGNMENT + check to use targetm.slow_unaligned_access instead. + + * function.c (assign_param_data_one): Remove unused data members. + +2019-08-02 Steve Ellcey <sellcey@marvell.com> + + * omp-simd-clone.c (simd_clone_adjust_return_type): Remove call to + build_distinct_type_copy. + (simd_clone_adjust_argument_types): Ditto. + (simd_clone_adjust): Call build_distinct_type_copy here. + (expand_simd_clones): Ditto. + +2019-08-02 Uroš Bizjak <ubizjak@gmail.com> + + PR target/91201 + * config/i386/sse.md (*vec_extractv16qi_zext): New insn pattern. + +2019-08-02 Alexander Monakov <amonakov@ispras.ru> + + * tree-ssa-loop-im.c (sort_bbs_in_loop_postorder_cmp): Simplify casts + from 'const void *'. + (sort_locs_in_loop_postorder_cmp): Likewise. + +2019-08-02 Eric Botcazou <ebotcazou@adacore.com> + + * doc/invoke.texi (hot-bb-count-fraction): Rework description. + (hot-bb-count-ws-permille): Likewise. + (hot-bb-frequency-fraction): Likewise. + (unlikely-bb-count-fraction): Likewise. + * params.def (hot-bb-count-fraction): Rework description. + (hot-bb-count-ws-permille): Likewise. + (hot-bb-frequency-fraction): Likewise. + (unlikely-bb-count-fraction): Likewise. Remove min and max values. + * predict.c (get_hot_bb_threshold): Deal with 0 HOT_BB_COUNT_FRACTION. + +2019-08-02 Uroš Bizjak <ubizjak@gmail.com> + + PR target/91323 + * config/i386/i386-expand.c (ix86_unordered_fp_compare) <case LTGT>: + Return false. + +2019-08-02 Richard Biener <rguenther@suse.de> + + * vec.h (vec::sort): Add gcc_qsort_r support. + (vec::bsearch): Add an overload with gcc_qsort_r style callbacks. + * tree-ssa-loop-im.c (sort_bbs_in_loop_postorder_cmp): Adjust + to gcc_qsort_r style callback. + (sort_locs_in_loop_postorder_cmp): Likewise. + (analyze_memory_references): Use gcc_sort_r interfaces. + (find_ref_loc_in_loop_cmp): Use new bsearch overload. + +2019-08-02 Martin Liska <mliska@suse.cz> + + PR lto/91313 + * gcc.c (driver::maybe_run_linker): Call detect_jobserver + to detect working job server. + (driver::detect_jobserver): Test whether jobserver + is active from GCC driver. That will prevent situation where + GCC is invoked from a LD plugin and the linker already uses + file descriptors suggested by make. That leads to a wrong + detection. + * gcc.h (driver): Add detect_jobserver. + * lto-wrapper.c (jobserver_active_p): Simplify sscanf by + not scanning for --jobserver-auth prefix. + +2019-08-02 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/91201 + * config/i386/i386-expand.c (ix86_expand_vector_extract): For elt == 0 + V16QImode extraction without sse4.1 try to use V4SImode lowpart + extraction. + +2019-08-01 Martin Sebor <msebor@redhat.com> + + PR c++/90947 + * tree.c (type_initializer_zero_p): Define. + * tree.h (type_initializer_zero_p): New function. + +2019-08-01 Eric Botcazou <ebotcazou@adacore.com> + + * cfgrtl.c (relink_block_chain): Add line returns in dump file. + +2019-08-01 Eric Botcazou <ebotcazou@adacore.com> + + * cgraph.h (cgraph_edge::maybe_hot_p): Tweak comment. + * cgraph.c (cgraph_edge::maybe_hot_p): Likewise. Remove useless test. + * predict.c (maybe_hot_count_p): Likewise. + (maybe_hot_bb_p): Tweak comment. + (maybe_hot_edge_p): Likewise. + (probably_never_executed): Likewise. Minor tweak. + (probably_never_executed_bb_p): Likewise. + (unlikely_executed_edge_p): Likewise. + (probably_never_executed_edge_p): Likewise. + (optimize_function_for_size_p): Likewise. + (optimize_function_for_speed_p): Likewise. + (function_optimization_type): Likewise. + (optimize_bb_for_size_p): Likewise. + (optimize_bb_for_speed_p): Likewise. + (bb_optimization_type): Likewise. + (optimize_edge_for_size_p): Likewise. + (optimize_edge_for_speed_p): Likewise. + (optimize_insn_for_size_p): Likewise. + (optimize_insn_for_speed_p): Likewise. + (optimize_loop_for_size_p): Likewise. + (optimize_loop_for_speed_p): Likewise. + (optimize_loop_nest_for_speed_p): Likewise. + (optimize_loop_nest_for_size_p): Likewise. + (predictable_edge_p): Likewise. + (handle_missing_profiles): Minor tweak. + +2019-08-01 Michael Meissner <meissner@linux.ibm.com> + + * config/rs6000/predicates.md (pcrel_external_address): Update + comment. + +2019-08-01 Uroš Bizjak <ubizjak@gmail.com> + + PR target/85693 + * config/i386/mmx.md (usadv8qi): New expander. + +2019-08-01 Matthew Beliveau <mbelivea@redhat.com> + + PR c++/90590 + * c-warn.c (c_do_switch_warnings): Suppress warning for enumerators + with reserved names that are in a system header. + +2019-08-01 Uroš Bizjak <ubizjak@gmail.com> + + * config/i386/mmx.md (vec_extractv2si_0): Add (r,x) alternative. + (*vec_extractv2si_0_zext_sse4): New insn pattern. + (*vec_extractv2si_0_zext): Ditto. + (*vec_extractv2si_1): Add (rm,x) alternative. + (*vec_extractv2si_1_zext): New insn pattern. + (*vec_extractv2si_zext_mem): Add "TARGET_MMX || TARGET_MMX_WITH_SSE" + insn constraint. + +2019-08-01 Richard Biener <rguenther@suse.de> + + * domwalk.c (bb_postorder): Remove static variable. + (cmp_bb_postorder): Adjust. + (sort_bbs_postorder): Adjust and use gcc_sort_r. + (dom_walker::walk): Adjust. + +2019-08-01 Alexander Monakov <amonakov@ispras.ru> + + * sort.cc (sort_r_ctx): New struct. + (reorder23): Make templated on context type. + (reorder45): Ditto. + (cmp1): Ditto. Adjust signature. + (netsort): Ditto. + (mergesort): Ditto. + [CHECKING_P] (cmp2to3): New static function. Use it... + (gcc_qsort) [CHECKING_P]: ...here. + (gcc_sort_r): New function. + * system.h (sort_r_cmp_fn): New function typedef. + (qsort_chk): Adjust signature. + (gcc_sort_r): Declare. + * vec.c (qsort_chk_error): Adjust. + (qsort_chk): Adjust. + +2019-08-01 Richard Biener <rguenther@suse.de> + + * tree-ssa-pre.c (has_abnormal_preds): Remove global var. + (compute_antic): Localize it here. + +2019-07-31 Maxim Blinov <maxim.blinov@embecosm.com> + + * common/config/riscv/riscv-common.c: Check -march string ends + with null. + +2019-07-31 Alexander Monakov <amonakov@ispras.ru> + + * ipa-devirt.c (type_warning_cmp): Make static. + (decl_warning_cmp): Ditto. + +2019-07-31 Peter Bergner <bergner@linux.ibm.com> + + PR target/91050 + * config/rs6000/rs6000.opt (mdejagnu-cpu=): Delete option. + * config/rs6000/rs6000.c (rs6000_option_override_internal): Remove + use of deleted rs6000_dejagnu_cpu_index variable. + * config/rs6000/rs6000.h (DRIVER_SELF_SPECS): Define. + (SUBTARGET_DRIVER_SELF_SPECS): Likewise. + * config/darwin.h (DRIVER_SELF_SPECS): Rename from this ... + (SUBTARGET_DRIVER_SELF_SPECS): ...to this. + * config/i386/i386.h (DRIVER_SELF_SPECS): Define. + (SUBTARGET_DRIVER_SELF_SPECS): Likewise. + +2019-07-31 Richard Biener <rguenther@suse.de> + + PR tree-optimization/91280 + * tree-ssa-structalias.c (get_constraint_for_component_ref): + Decompose MEM_REF manually for offset handling. + +2019-07-31 Richard Biener <rguenther@suse.de> + + PR tree-optimization/91293 + * tree-vect-slp.c (vect_build_slp_tree_2): Do not swap operands + of reduction stmts. + +2019-07-31 Matt Thomas <matt@3am-software.com> + Nick Hudson <nick@nthcliff.demon.co.uk> + Matthew Green <mrg@eterna.com.au> + Maya Rashish <coypu@sdf.org> + + * config.gcc (hppa*-*-netbsd*): New target. + * config/pa/pa-netbsd.h: New file. + * config/pa/pa32-netbsd.h: New file. + +2019-07-31 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/91201 + * config/i386/mmx.md (reduc_plus_scal_v8qi): New expander. + +2019-07-31 Andrew Stubbs <ams@codesourcery.com> + + * config/gcn/gcn-valu.md + (scatter<mode>_insn_1offset<exec_scatter>): Remove s_waitcnt. + (scatter<mode>_insn_1offset_ds<exec_scatter>): Likewise. + (scatter<mode>_insn_2offsets<exec_scatter>): Likewise. + * config/gcn/gcn.c (gcn_md_reorg): Add delayeduse and reads to + struct ilist. Add nops for delayeduse insns. + * config/gcn/gcn.md (delayeduse): New attribute. + (*movbi): Remove s_waitcnt from stores. + (*mov<mode>_insn): Likewise. + (*movti_insn): Likewise. Add delayeduse attribute. + (sync_compare_and_swap<mode>_insn): Add delayeduse attribute. + (atomic_store<mode>): Remove or adjust s_waitcnt. + +2019-07-31 Richard Biener <rguenther@suse.de> + + * vr-values.h (vr_values::swap_vr_value): New. + (vr_values::free_value_range): likewise. + * vr-values.c (vr_values::swap_vr_value): Implement. + * gimple-ssa-evrp-analyze.h (evrp_range_analyzer::pop_value_range): + Do not return a range or take a var. + (evrp_range_analyzer::stack): Change back to recording a non-const + value_range *. + * gimple-ssa-evrp-analyze.c + (evrp_range_analyzer::record_ranges_from_stmt): Free unused + value-range. + (evrp_range_analyzer::pop_to_marker): Adjust. + (evrp_range_analyzer::push_value_range): Use new swap_vr_value. + (evrp_range_analyzer::pop_value_range): Likewise. Free the + no longer needed value-range. + +2019-07-31 Martin Liska <mliska@suse.cz> + + * tree-ssa-dce.c (propagate_necessity): Delete operator can + have size and (or) alignment as 2nd and later arguments. + Mark all of them as necessary. + +2019-07-31 Richard Biener <rguenther@suse.de> + + PR tree-optimization/91178 + * tree-ssa-sccvn.c (vn_reference_maybe_forwprop_address): + Use tail-recursion. + +2019-07-31 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/91201 + * config/i386/sse.md (reduc_plus_scal_v16qi): New expander. + (REDUC_PLUS_MODE): Add V32QImode for TARGET_AVX and V64QImode for + TARGET_AVX512F. + (reduc_plus_scal_<mode>): Improve formatting by introducing + a temporary. + +2019-07-31 Sudakshina Das <sudi.das@arm.com> + + * config/aarch64/aarch64-builtins.c (enum aarch64_builtins): Add + AARCH64_TME_BUILTIN_TSTART, AARCH64_TME_BUILTIN_TCOMMIT, + AARCH64_TME_BUILTIN_TTEST and AARCH64_TME_BUILTIN_TCANCEL. + (aarch64_init_tme_builtins): New. + (aarch64_init_builtins): Call aarch64_init_tme_builtins. + (aarch64_expand_builtin_tme): New. + (aarch64_expand_builtin): Handle TME builtins. + * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define + __ARM_FEATURE_TME when enabled. + * config/aarch64/aarch64-option-extensions.def: Add "tme". + * config/aarch64/aarch64.h (AARCH64_FL_TME, AARCH64_ISA_TME): New. + (TARGET_TME): New. + * config/aarch64/aarch64.md (define_c_enum "unspec"): Add UNSPEC_TTEST. + (define_c_enum "unspecv"): Add UNSPECV_TSTART, UNSPECV_TCOMMIT and + UNSPECV_TCANCEL. + (tstart, ttest, tcommit, tcancel): New instructions. + * config/aarch64/arm_acle.h (__tstart, __tcommit): New. + (__tcancel, __ttest): New. + (_TMFAILURE_REASON, _TMFAILURE_RTRY, _TMFAILURE_CNCL): New macro. + (_TMFAILURE_MEM, _TMFAILURE_IMP, _TMFAILURE_ERR): Likewise. + (_TMFAILURE_SIZE, _TMFAILURE_NEST, _TMFAILURE_DBG): Likewise. + (_TMFAILURE_INT, _TMFAILURE_TRIVIAL): Likewise. + * config/arm/types.md: Add new tme type attr. + * doc/invoke.texi: Document "tme". + +2019-07-31 Joel Hutton <Joel.Hutton@arm.com> + + * config/arm/arm_cmse.h (cmse_nonsecure_caller): Add + warn_unused_result attribute. + (cmse_check_address_range): Add warn_unused_result attribute. + +2019-07-31 Richard Biener <rguenther@suse.de> + + PR tree-optimization/91257 + * tree-vrp.c (union_ranges): Unify equality and less tests + by using compare_values. Re-order cheap tests first. + +2019-07-31 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/91301 + * gimplify.c (gimplify_omp_for): If for class iterator on + distribute parallel for there is no data sharing clause + on inner_for_stmt, look for private clause on combined + parallel too and if found, move it to inner_for_stmt. + +2019-07-31 Richard Sandiford <richard.sandiford@arm.com> + + * lra-int.h (lra_operand_data): Remove early_clobber field. + (lra_insn_reg): Likewise. + * lra.c (debug_operand_data): Update accordingly. + (setup_operand_alternative): Likewise. + (new_insn_reg): Likewise. Remove early_clobber parameter. + (collect_non_operand_hard_regs): Update call accordingly. + Don't assign to lra_insn_reg::early_clobber. + (add_regs_to_insn_regno_info): Remove early_clobber parameter + and update calls to new_insn_reg. + (lra_update_insn_regno_info): Update calls accordingly. + * lra-constraints.c (update_and_check_small_class_inputs): Take the + alternative number as a parameter and test whether the operand + is earlyclobbered in that particular alternative. + (process_alt_operands): Update call accordingly. Use per-alternative + checks for earyclobber here too. + * lra-lives.c (reg_early_clobber_p): Check early_clobber_alts + against zero for IRA_UNKNOWN_ALT. + +2019-07-30 Uroš Bizjak <ubizjak@gmail.com> + + * config/alpha/alpha.c (alpha_option_override): Quote a C type. + +2019-07-30 Wilco Dijkstra <wdijkstr@arm.com> + + * config/arm/thumb2.md (thumb2_movsi_insn): Adjust literal offset. + * config/arm/vfp.md (thumb2_movsi_vfp): Likewise. + +2019-07-30 Martin Liska <mliska@suse.cz> + + PR ipa/89330 + * cgraph.c (cgraph_edge::make_direct): Use + edge->indirect_unknown_callee as edge->resolve_speculation can + deallocate edge which is this pointer. + +2019-07-30 Richard Biener <rguenther@suse.de> + + PR tree-optimization/91257 + * bitmap.c (bitmap_ior_and_compl_into): Open-code. + +2019-07-30 Martin Liska <mliska@suse.cz> + + * doc/invoke.texi: Document new behavior. + * lto-wrapper.c (cpuset_popcount): New function + is a copy of libgomp/config/linux/proc.c. + (init_num_threads): Likewise. + (run_gcc): Automatically detect core count for -flto. + (jobserver_active_p): New function. + +2019-07-30 Richard Biener <rguenther@suse.de> + + PR tree-optimization/91257 + * bitmap.h (bitmap_ior_into_and_free): Declare. + * bitmap.c (bitmap_list_unlink_element): Add defaulted param + whether to add the unliked element to the freelist. + (bitmap_list_insert_element_after): Add defaulted param for + an already allocated element. + (bitmap_ior_into_and_free): New function. + * tree-ssa-structalias.c (condense_visit): Reduce the + ponts-to and edge bitmaps of the SCC members in a + logarithmic fashion rather than all to one. + +2019-07-30 Richard Sandiford <richard.sandiford@arm.com> + + * tree-ssa-math-opts.c (convert_mult_to_fma): Add a mul_cond + parameter. When nonnull, make sure that the addition or subtraction + has the same condition. + (math_opts_dom_walker::after_dom_children): Try convert_mult_to_fma + for CFN_COND_MUL too. + +2019-07-30 Richard Biener <rguenther@suse.de> + + PR tree-optimization/91291 + * tree-ssa-sccvn.c (rpo_elim::eliminate_push_avail): Ignore + constant values. + +2019-07-30 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/91216 + * omp-low.c (global_nonaddressable_vars): New variable. + (use_pointer_for_field): For global decls, if they are non-addressable, + remember it in the global_nonaddressable_vars bitmap, if they are + addressable and in the global_nonaddressable_vars bitmap, ignore their + TREE_ADDRESSABLE bit. + (omp_copy_decl_2): Clear TREE_ADDRESSABLE also on private copies of + vars in global_nonaddressable_vars bitmap. + (execute_lower_omp): Free global_nonaddressable_vars bitmap. + + PR target/91150 + * config/i386/i386-expand.c (expand_vec_perm_blend): Change mask type + from unsigned to unsigned HOST_WIDE_INT. For E_V64QImode cast + comparison to unsigned HOST_WIDE_INT before shifting it left. + +2019-07-30 Uroš Bizjak <ubizjak@gmail.com> + + * config/i386/i386.md (movstrict<mode>): Use register_operand + predicate for operand 0. Add expander condition. Assert that + operand 0 is a SUBREG RTX. + (*movstrict<mode>_1): Use register_operand predicate for operand 0. + Update operand constraints and insn condition. + (zero_extend<mode>si2_and): Do not call gen_movstrict<mode>. + (zero_extendqihi2_and): Do not call gen_movstrictqi. + (*setcc_qi_slp): Use register_operand predicate for operand 0. + Update operand 0 constraints. + (setcc_qi_slp splitters): Use register_operand predicate for operand 0. + +2019-07-29 Jozef Lawrynowicz <jozef.l@mittosystems.com> + + * config/msp430/msp430.h (DRIVER_SELF_SPECS): Define and emit errors + when -m{code,data}-region are used without -mlarge. + * config/msp430/msp430.c (msp430_option_override): Error when a + non-default code or data region is used without -mlarge. + (msp430_section_attr): Emit a warning and do not add upper/lower/either + attributes when they are used without -mlarge. + +2019-07-29 Jozef Lawrynowicz <jozef.l@mittosystems.com> + + PR target/70320 + * config/msp430/msp430.h: Define ADDITIONAL_REGISTER_NAMES. + +2019-07-29 Richard Sandiford <richard.sandiford@arm.com> + + PR middle-end/91242 + * wide-int.h (generic_wide_int::sext_elt): New function. + * inchash.h (hash::add_wide_int): Use it instead of elt. + +2019-07-29 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/arm-builtins.c (acle_builtin_data): Expand VAR1 to + CODE_FOR_arm_##. + * config/arm/arm.md (<crc_variant>): Rename to... + (arm_<crc_variant>): ... This. + (<cdp>): Rename to... + (arm_<cdp>): ... This. + (<ldc>): Rename to... + (arm_<ldc>): ... This. + (<stc>): Rename to... + (arm_<stc>): ... This. + (<mcr>): Rename to... + (arm_<mcr>): ... This. + (<mrc>): Rename to... + (arm_<mrc>): ... This. + (<mcrr>): Rename to... + (arm_<mcrr>): ... This. + (<mrrc>): Rename to... + (arm_<mrrc>): ... This. + +2019-07-29 Richard Biener <rguenther@suse.de> + + PR tree-optimization/91257 + * tree-ssa-sccvn.h (struct vn_avail): New. + (struct vn_ssa_aux): Add avail member. + * tree-ssa-sccvn.c (class rpo_elim): Remove m_rpo_avail + member, add m_avail_freelist one. + (rpo_elim::~rpo_elim): Remove. + (rpo_elim::eliminate_avail): Adjust to new avail tracking + data structure. + (rpo_elim::eliminate_push_avail): Likewise. + (do_unwind): Likewise. + (do_rpo_vn): Likewise. + +2019-07-29 Richard Biener <rguenther@suse.de> + + PR tree-optimization/91257 + * tree-vrp.c (operand_less_p): Avoid dispatching to fold for + most cases, instead call compare_values which handles the + symbolic ranges we handle specially. + (compare_values_warnv): Do not call operand_less_p but open-code + the effective fold calls. Avoid converting so much. + +2019-07-29 Martin Liska <mliska@suse.cz> + + * tree-ssa-dce.c (eliminate_unnecessary_stmts): Do not + remove LHS of operator new call. It's handled latter. + +2019-07-29 Richard Biener <rguenther@suse.de> + + PR tree-optimization/91267 + * vr-values.c (vr_values::update_value_range): Add early return + for effectively VARYING lattice entry. + +2019-07-29 Richard Sandiford <richard.sandiford@arm.com> + + PR debug/86638 + * tree-ssa-dce.c (keep_all_vdefs_p): New function. + (mark_stmt_if_obviously_necessary): Mark all stmts with vdefs as + necessary if keep_all_vdefs_p is true. + (mark_aliased_reaching_defs_necessary): Add a gcc_checking_assert + that keep_all_vdefs_p is false. + (mark_all_reaching_defs_necessary): Likewise. + (propagate_necessity): Skip the vuse scan if keep_all_vdefs_p is true. + +2019-07-29 Richard Sandiford <richard.sandiford@arm.com> + + * common.opt (Og): Change the initial value of flag_dse to 0. + * opts.c (default_options_table): Move OPT_ftree_dse from + OPT_LEVELS_1_PLUS to OPT_LEVELS_1_PLUS_NOT_DEBUG. Also add + OPT_fdse to OPT_LEVELS_1_PLUS_NOT_DEBUG. Put the OPT_ftree_pta + entry before the OPT_ftree_sra entry. + * doc/invoke.texi (Og): Add -fdse and -ftree-dse to the list + of flags disabled by Og. + +2019-07-29 Richard Sandiford <richard.sandiford@arm.com> + + * tree-cfg.c (execute_fixup_cfg): Don't delete stores to write-only + variables for -Og. + +2019-07-29 Richard Sandiford <richard.sandiford@arm.com> + + * doc/sourcebuild.texi (check-function-bodies): Document. + +2019-07-29 Richard Sandiford <richard.sandiford@arm.com> + + * simplify-rtx.c (simplify_const_unary_operation): Fold a + VEC_DUPLICATE of a fixed-length vector even if the result + is variable-length. Likewise fold a duplicate of a + variable-length vector if the variable-length vector is + itself a duplicate of a fixed-length sequence. + (test_vector_ops_duplicate): Test more cases. + +2019-07-29 Richard Sandiford <richard.sandiford@arm.com> + + * vector-builder.h (vector_builder): Add a shape template parameter. + (vector_builder::new_unary_operation): New function, generalizing + the old tree_vector_builder function. + (vector_builder::new_binary_operation): Likewise. + (vector_builder::binary_encoded_nelts): Likewise. + * int-vector-builder.h (int_vector_builder): Update template + parameters to vector_builder. + (int_vector_builder::shape_nelts): New function. + * rtx-vector-builder.h (rtx_vector_builder): Update template + parameters to vector_builder. + (rtx_vector_builder::shape_nelts): New function. + (rtx_vector_builder::nelts_of): Likewise. + (rtx_vector_builder::npatterns_of): Likewise. + (rtx_vector_builder::nelts_per_pattern_of): Likewise. + * tree-vector-builder.h (tree_vector_builder): Update template + parameters to vector_builder. + (tree_vector_builder::shape_nelts): New function. + (tree_vector_builder::nelts_of): Likewise. + (tree_vector_builder::npatterns_of): Likewise. + (tree_vector_builder::nelts_per_pattern_of): Likewise. + * tree-vector-builder.c (tree_vector_builder::new_unary_operation) + (tree_vector_builder::new_binary_operation): Delete. + (tree_vector_builder::binary_encoded_nelts): Likewise. + * simplify-rtx.c: Include rtx-vector-builder.h. + (distributes_over_addition_p): New function. + (simplify_const_unary_operation) + (simplify_const_binary_operation): Generalize handling of vector + constants to include variable-length vectors. + (test_vector_ops_series): Add more tests. + +2019-07-28 Jan Hubicka <hubicka@ucw.cz> + + PR lto/91222 + * ipa-devirt.c (warn_types_mismatch): Compare indentifiers + than INDENTIFIER_POINTER. + +2019-07-28 Martin Liska <mliska@suse.cz> + + PR ipa/89330 + * cgraph.c (symbol_table::create_edge): Always allocate + a cgraph_edge. + (symbol_table::free_edge): Store summary_id to + edge_released_summary_ids if != -1; + * cgraph.h (NEXT_FREE_NODE): Remove. + (SET_NEXT_FREE_NODE): Likewise. + (NEXT_FREE_EDGE): Likewise. + (symbol_table::release_symbol): Store summary_id to + cgraph_released_summary_ids if != -1; + (symbol_table::allocate_cgraph_symbol): Always allocate + a cgraph_node. + +2019-07-28 Alan Modra <amodra@gmail.com> + + * config/rs6000/rs6000-call.c (rs6000_output_mi_thunk): Use + gen_sibcall. + +2019-07-28 Alan Modra <amodra@gmail.com> + + PR target/91135 + * config/rs6000/linux.h (GNU_USER_TARGET_D_OS_VERSIONS): Don't + define. + * config/rs6000/linux64.h (TARGET_OS_CPP_BUILTINS): Invoke + GNU_USER_TARGET_OS_CPP_BUILTINS for aixdesc abi. + (GNU_USER_TARGET_D_OS_VERSIONS): Don't define. + +2019-07-28 Alan Modra <amodra@gmail.com> + + PR target/91050 + * config/rs6000/sysv4.h (ASM_DEFAULT_SPEC): Modify if -m64. + * config/rs6000/default64.h (ASM_DEFAULT_SPEC): Define. + * config/rs6000/freebsd64.h (ASM_DEFAULT_SPEC): Don't define. + * config/rs6000/linux64.h (ASM_DEFAULT_SPEC): Likewise. + * config/rs6000/rtems.h (ASM_DEFAULT_SPEC): Likewise. + * config/rs6000/rs6000.h (ASM_DEFAULT_EXTRA): Define and use + in asm_default spec. + * config/rs6000/eabialtivec.h (ASM_DEFAULT_EXTRA): Redefine. + * config/rs6000/linuxaltivec.h (ASM_DEFAULT_EXTRA): Redefine. + +2019-07-28 Gerald Pfeifer <gerald@pfeifer.com> + + * doc/include/gpl_v3.texi (Copying): Use https for www.gnu.org. + +2019-07-26 Tamar Christina <tamar.christina@arm.com> + + PR target/89517 + * config.gcc: Relax parsing of AARCH64_OPT_EXTENSION. + * config/aarch64/aarch64-option-extensions.def: Add new comments + and restore easier to read options. + +2019-07-26 Tamar Christina <tamar.christina@arm.com> + + * convert.c (convert_to_real_1): Move part of conversion code... + * match.pd: ...To here. + +2019-07-26 Martin Jambor <mjambor@suse.cz> + + PR ipa/89330 + * ipa-inline-transform.c (check_speculations_1): New function. + (push_all_edges_in_set_to_vec): Likewise. + (check_speculations): Use check_speculations_1, new parameter + new_edges. + (inline_call): Pass new_edges to check_speculations. + * ipa-inline.c (add_new_edges_to_heap): Assert edge_callee is not + NULL. + (speculation_useful_p): Early return true if edge is inlined, remove + later checks for inline_failed. + +2019-07-25 Vladimir Makarov <vmakarov@redhat.com> + + PR rtl-optimization/91223 + * lra-constraints.c (process_alt_operands): Fail for unsuccessful + matching with INOUT operand. + +2019-07-25 Eric Botcazou <ebotcazou@adacore.com> + + * stmt.c (expand_case): Try to narrow the index type if it's larger + than a word. Tidy up. + +2019-07-25 Eric Botcazou <ebotcazou@adacore.com> + + * cif-code.def (NEVER_CALL): New code. + * ipa-inline.c (want_inline_small_function_p): Fix formatting issues. + Set the failure to CIF_NEVER_CALL if the IPA count is zero. + +2019-07-25 Wilco Dijkstra <wdijkstr@arm.com> + + * config/arm/thumb2.md (thumb2_movsi_insn): Fix load/store low reg. + * config/arm/vfp.md (thumb2_movsi_vfp): Likewise. + +2019-07-23 Jan Hubicka <hubicka@ucw.cz> + + * ipa-devirt.c (add_type_duplicate): Fix return value. + +2019-07-25 Richard Biener <rguenther@suse.de> + + * tree-vrp.c (extract_range_from_multiplicative_op): Add + type parameter and use it instead of guessing expression + type from the first operand. + (extract_range_from_binary_expr): Pass expr_type down. + +2019-07-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/arm.md (SATrev): Change to code attribute. + (*satsi_<SAT:code>): Adjust for the above. + (*satsi_<SAT:code>_shift): Likewise. + +2019-07-25 Richard Biener <rguenther@suse.de> + + * gimple-loop-versioning.cc (loop_versioning::prune_loop_conditions): + Make value_range * temporary const. + * gimple-ssa-evrp-analyze.c (evrp_range_analyzer::try_find_new_range): + Likewise. + (evrp_range_analyzer::record_ranges_from_): Likewise. + (evrp_range_analyzer::pop_value_range): Return a const value_range *, + deal with having recorded a const one. + * gimple-ssa-evrp-analyze.h (evrp_range_analyzer::get_value_range): + Return a const value_range *. + (evrp_range_analyzer::pop_value_range): Likewise. + (evrp_range_analyzer::stack): Record const value_range *s. + * gimple-ssa-evrp.c (evrp_dom_walker::before_dom_children): + Adjust. + * gimple-ssa-sprintf.c (get_int_range): Likewise. + (format_integer): Likewise. + (sprintf_dom_walker::handle_gimple_call): Likewise. + * tree-ssa-dom.c (simplify_stmt_for_jump_threading): Likewise. + * tree-vrp.c (vrp_prop::set_def_to_varying): Add. + (vrp_prop::get_value_range): Adjust. + (vrp_prop::vrp_initialize): Use set_def_to_varying instead of + modifying the lattice in-place. + (vrp_prop::visit_stmt): Likewise. + * vr-values.c (vr_values::get_lattice_entry): New private method. + (vr_values::get_value_range): Wrap it and return a const + value_range *. + (vr_values::set_def_to_varying): New. + (vr_values::set_defs_to_varying): Use it. + (vr_values::update_value_range): Likewise. + (vr_values::vrp_stmt_computes_nonzero): Adjust. + (values::op_with_constant_singleton_va): Likewise. + (vr_values::extract_range_for_var_from_co): Likewise. + (vr_values::extract_range_from_ssa_name): Likewise. + (vr_values::extract_range_from_cond_expr): Likewise. + (vr_values::extract_range_basic): Likewise. + (compare_ranges): Take const value_range *, adjust. + (compare_range_with_value): Likewise. + (vrp_valueize): Adjust. + (vrp_valueize_1): Likewise. + (vr_values::get_vr_for_comparison): Return a const value_range *. + (vr_values::compare_name_with_value): Adjust. + (vr_values::compare_names): Likewise. + (vr_values::vrp_evaluate_conditional_warnv_with_ops_using_ranges): + Likewise. + (vr_values::vrp_evaluate_conditional): Likewise. + (find_case_label_ranges): Take a const value_range *. + (vr_values::vrp_visit_switch_stmt): Adjust. + (vr_values::extract_range_from_phi_node): Likewise. + (vr_values::simplify_div_or_mod_using_ran): Likewise. + (vr_values::simplify_abs_using_ranges): Likewise. + (test_for_singularity): Take a const value_range *. + (range_fits_type_p): Likewise. + (vr_values::simplify_cond_using_ranges_1): Adjust. + (vr_values::simplify_cond_using_ranges_2): Likewise. + (vr_values::simplify_switch_using_ranges): Likewise. + (vr_values::simplify_float_conversion_usi): Likewise. + (vr_values::two_valued_val_range_p): Likewise. + * vr-values.h (vr_values::get_value_range): Return a const + value_range *. + (vr_values::set_def_to_varying): New. + (vr_values::get_lattice_entry): New private method. + (vr_values::get_vr_for_comparison): Return a const value_range *. + +2019-07-25 Martin Liska <mliska@suse.cz> + Dominik Infuhr <dominik.infuehr@theobroma-systems.com> + + PR c++/23383 + * common.opt: Add -fallocation-dce + * gimple.c (gimple_call_operator_delete_p): New. + * gimple.h (gimple_call_operator_delete_p): Likewise. + * tree-core.h (enum function_decl_type): Add OPERATOR_DELETE. + * tree-ssa-dce.c (mark_stmt_if_obviously_necessary): Handle + DECL_IS_OPERATOR_DELETE_P. + (mark_all_reaching_defs_necessary_1): Likewise. + (propagate_necessity): Likewise. + (eliminate_unnecessary_stmts): Handle + gimple_call_operator_delete_p. + * tree-streamer-in.c (unpack_ts_function_decl_value_fields): + Add packing of OPERATOR_DELETE. + * tree-streamer-out.c (pack_ts_function_decl_value_fields): + Similarly here. + * tree.h (DECL_IS_OPERATOR_DELETE_P): New. + (DECL_SET_IS_OPERATOR_DELETE): New. + (DECL_IS_REPLACEABLE_OPERATOR_NEW_P): Likewise. + +2019-07-25 Martin Liska <mliska@suse.cz> + + * calls.c (maybe_warn_alloc_args_overflow): Use new macros + (e.g. DECL_SET_LAMBDA_FUNCTION and DECL_LAMBDA_FUNCTION_P). + * coverage.c (coverage_begin_function): Likewise. + * fold-const.c (tree_expr_nonzero_warnv_p): Likewise. + * gimple.c (gimple_call_nonnull_result_p): Likewise. + * ipa-icf.c (sem_item::compare_referenced_symbol_properties): Likewise. + (sem_item::hash_referenced_symbol_properties): Likewise. + * lto-streamer-out.c (hash_tree): Likewise. + * predict.c (expr_expected_value_1): Likewise. + * tree-inline.c (expand_call_inline): Likewise. + * tree-streamer-in.c (unpack_ts_function_decl_value_fields): Likewise. + * tree-streamer-out.c (pack_ts_function_decl_value_fields): Likewise. + * tree-core.h (enum function_decl_type): New enum. + (struct tree_function_decl): Remove operator_new_flag and lambda_function. + * tree.h (FUNCTION_DECL_DECL_TYPE): New. + (set_function_decl_type): Likewise. + (DECL_IS_OPERATOR_NEW_P): New. + (DECL_SET_IS_OPERATOR_NEW): Likewise. + (DECL_LAMBDA_FUNCTION): Likewise. + (DECL_LAMBDA_FUNCTION_P): Likewise. + (DECL_IS_OPERATOR_NEW): Remove. + (DECL_SET_LAMBDA_FUNCTION): Likewise. + +2019-07-25 Xiong Hu Luo <luoxhu@linux.ibm.com> + + * ipa-profile.c (get_most_common_single_value): Use + get_nth_most_common_value. + * profile.c (sort_hist_value): New function. + (compute_value_histograms): Call sort_hist_value to sort the + values after loading from disk. + * value-prof.c (get_most_common_single_value): Rename to ... + get_nth_most_common_value. Add input params n, return + the n_th value and count. + (gimple_divmod_fixed_value_transform): Use + get_nth_most_common_value. + (gimple_ic_transform): Likewise. + (gimple_stringops_transform): Likewise. + * value-prof.h (get_most_common_single_value): Add input params + n, default to 0. + +2019-07-25 Richard Biener <rguenther@suse.de> + + PR tree-optimization/91236 + * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Fix + size of CONSTRUCTOR write. Fix buffer size we pass to + native_encode_expr. + +2019-07-24 Jozef Lawrynowicz <jozef.l@mittosystems.com> + + * config.gcc (msp430*-*-*): Fix non-GNU style in r273774. + * config/msp430/msp430.h (ENDFILE_SPEC): Fix non-GNU style in + r273773. + +2019-07-24 Jozef Lawrynowicz <jozef.l@mittosystems.com> + + * config.gcc (msp430*-*-*): Enable initfini_array by default unless + explicitly disabled with --disable-initfini-array. + +2019-07-24 Jozef Lawrynowicz <jozef.l@mittosystems.com> + + * config/msp430/msp430.h (ENDFILE_SPEC): Wrap uses of crtn*.o in + if-exists. + +2019-07-24 Martin Sebor <msebor@redhat.com> + + PR tree-optimization/91183 + PR tree-optimization/86688 + * builtins.c (compute_objsize): Handle MEM_REF. + * tree-ssa-strlen.c (class ssa_name_limit_t): New. + (get_min_string_length): Remove. + (count_nonzero_bytes): New function. + (handle_char_store): Rename... + (handle_store): to this. Handle multibyte stores via integer types. + (strlen_check_and_optimize_stmt): Adjust conditional and the called + function name. + +2019-07-24 Martin Sebor <msebor@redhat.com> + + PR driver/80545 + * diagnostic.c (diagnostic_classify_diagnostic): Use lang_mask. + (diagnostic_report_diagnostic): Same. + * diagnostic.h (diagnostic_context::option_enabled): Add an argument. + (diagnostic_context::lang_mask): New data member. + * ipa-pure-const.c (suggest_attribute): Use + lang_hooks.option_lang_mask (). + * opts-common.c (option_enabled): Handle new argument. + (get_option_state): Pass an additional argument. + * opts.c (print_filtered_help): Print supported languages for + unsupported options. Adjust printing of current state. + * opts.h (option_enabled): Add argument. + * toplev.c (print_switch_values): Use lang_mask. + (general_init): Set global_dc->lang_mask. + +2019-07-24 Iain Sandoe <iain@sandoe.co.uk> + + PR bootstrap/87030 + * config/i386/darwin.h (REAL_LIBGCC_SPEC): Revert change from r273749. + +2019-07-24 Giuliano Belinassi <giuliano.belinassi@usp.br> + + * cgraphunit.c (symbol_table::compile): Start and stop + TV_CGRAPH_IPA_PASSES and TV_CGRAPH_FUNC_EXPANSION timers. + * timevar.def (TV_CGRAPH_IPA_PASSES, TV_CGRAPH_FUNC_EXPANSION): New. + +2019-07-24 Oliver Browne <oliverbrowne62@gmail.com> + + * gimplify.c (flag_instrument_functions_exclude_p): Include + namespace/class information in the printable name. + * opts.c (add_comma_separated_to_vector): Add NUL terminator + to tokens entered into the vector. + +2019-07-24 Eric Botcazou <ebotcazou@adacore.com> + + * tree-nested.c (build_simple_mem_ref_notrap): New function. + (get_static_chain): Call it instead of build_simple_mem_ref. + (get_frame_field): Likewise. + (get_nonlocal_debug_decl): Likewise. + (convert_nonlocal_reference_op): Likewise. + +2019-07-24 Claudiu Zissulescu <claziss@synopsys.com> + + * config/arc/arc-protos.h (arc_output_function_epilogue): Delete + declaration. + (arc_compute_frame_size): Millicode is disabled when compiling + ISR. + (arc_return_address_register): Likewise. + (arc_compute_function_type): Likewise. + (arc_compute_frame_size): Likewise. + (secondary_reload_info): Likewise. + (arc_get_unalign): Likewise. + (arc_can_use_return_insn): Declare. + * config/arc/arc.c (AUX_LP_START): Define + (AUX_LP_END): Likewise. + (arc_frame_info): Update gmask member to 64-bit datum. + (GMASK_LEN): Update. + (arc_compute_function_type): Make it static, move it forward. + (arc_must_save_register): Update, consider the extra regs. + (arc_compute_millicode_save_restore_regs): Update to use the 64 + bit gmask. + (arc_compute_frame_size): Likewise. + (arc_enter_leave_p): Likewise. + (arc_save_callee_saves): Likewise. + (arc_restore_callee_saves): Likewise. + (arc_save_callee_enter): Likewise. + (arc_restore_callee_leave): Likewise. + (arc_save_callee_milli): Likewise. + (arc_restore_callee_milli): Likewise. + (arc_expand_prologue): Add new interrupt handling. + (arc_return_address_register): Make it static, move it forward. + (arc_expand_epilogue): Add new interrupt handling. + (arc_get_unalign): Delete. + (arc_epilogue_uses): Make sure we do not remove the extra + saved/restored registers when interrupt. + (arc_can_use_return_insn): New function. + (push_reg): Likewise. + (pop_reg): Likewise. + (arc_save_callee_saves): Add ZOL and FPX aux registers saving + procedures. + (arc_restore_callee_saves): Likewise, but restoring. + * config/arc/arc.md (VUNSPEC_ARC_ARC600_RTIE): Define. + (R33_REG): Likewise. + (R34_REG): Likewise. + (R35_REG): Likewise. + (R36_REG): Likewise. + (R37_REG): Likewise. + (R38_REG): Likewise. + (R39_REG): Likewise. + (R45_REG): Likewise. + (R46_REG): Likewise. + (R47_REG): Likewise. + (R48_REG): Likewise. + (R49_REG): Likewise. + (R50_REG): Likewise. + (R51_REG): Likewise. + (R52_REG): Likewise. + (R53_REG): Likewise. + (R54_REG): Likewise. + (R55_REG): Likewise. + (R56_REG): Likewise. + (R58_REG): Likewise. + (type): Add rtie attribute. + (in_call_delay_slot): Use RETURN_ADDR_REGNUM. + (movsi_insn): Accept moves to lp_count. + (rtie): Update pattern. + (simple_return): Simplify it, don't use this pattern as a return + from an interrupt. + (arc600_rtie): New pattern. + (p_return_i): Clean up. + (return): Likewise. + * config/arc/builtins.def (rtie): Only available for non ARC6xx + family CPUs. + * config/arc/predicates.md (move_src_operand): Consider lp_count + as a register. + +2019-07-24 Andreas Krebbel <krebbel@linux.ibm.com> + + * config/s390/predicates.md (addv_const_operand): New predicate. + * config/s390/s390-modes.def (CCO): New condition code mode. + * config/s390/s390.c (s390_match_ccmode_set): Handle E_CCOmode. + (s390_branch_condition_mask): Likewise. + * config/s390/s390.md ("addv<mode>4", "subv<mode>4") + ("mulv<mode>4"): New expanders. + ("*addv<mode>3_ccoverflow", "*addv<mode>3_ccoverflow_const") + ("*subv<mode>3_ccoverflow", "*mulv<mode>3_ccoverflow"): New + pattern definitions. + +2019-07-24 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org> + + PR middle-end/91166 + * match.pd (vec_perm_expr(v, v, mask) -> v): New pattern. + (define_predicates): Add entry for uniform_vector_p. + (vec_same_elem_p): New match pattern. + +2019-07-24 Iain Sandoe <iain@sandoe.co.uk> + + PR bootstrap/87030 + * config/i386/darwin.h (REAL_LIBGCC_SPEC): Move from here... + * config/i386/darwin32-biarch.h .. to here. + * config/i386/darwin64-biarch.h: Adjust comments. + * config/rs6000/darwin32-biarch.h: Likewise. + * config/rs6000/darwin64-biarch.h: Likewise. + * config.gcc: Missed commit from r273746 + (*-*-darwin*): Don't include CPU t-darwin here. + (i[34567]86-*-darwin*): Adjust to use biarch files. Produce + an error message if i686-darwin configuration is attempted for + Darwin >= 18. + +2019-07-23 Iain Sandoe <iain@sandoe.co.uk> + + PR bootstrap/87030 + * config.gcc (*-*-darwin*): Don't include CPU t-darwin here. + (i[34567]86-*-darwin*): Adjust to use biarch files. Produce + an error message if i686-darwin configuration is attempted for + Darwin >= 18. + (x86_64-*-darwin*): Switch to single multilib for Darwin >= 18. + (powerpc-*-darwin*): Use biarch files where needed. + (powerpc64-*-darwin*): Likewise. + * config/i386/darwin.h (REAL_LIBGCC_SPEC): Move to new biarch file. + (DARWIN_ARCH_SPEC, DARWIN_SUBARCH_SPEC): Revise for default single + arch case. + * config/i386/darwin32-biarch.h: New. + * config/i386/darwin64.h: Rename. + * config/i386/darwin64-biarch.h: To this. + * config/i386/t-darwin: Rename. + * config/i386/t-darwin32-biarch: To this. + * config/i386/t-darwin64: Rename. + * config/i386/t-darwin64-biarch: To this. + * config/rs6000/darwin32-biarch.h: New. + * config/rs6000/darwin64.h: Rename. + * config/rs6000/darwin64-biarch.h: To this. + (DARWIN_ARCH_SPEC, DARWIN_SUBARCH_SPEC): Revise for default single + arch case. + * config/rs6000/t-darwin8: Rename. + * config/rs6000/t-darwin32-biarch: To this. + * config/rs6000/t-darwin64 Rename. + * config/rs6000/t-darwin64-biarch: To this. + +2019-07-23 Martin Sebor <msebor@redhat.com> + + * configure.ac (ACX_PROG_CXX_WARNING_OPTS): Revert r273311. + +2019-07-23 Vladislav Ivanishin <vlad@ispras.ru> + + * gdbinit.in (reload-gdbhooks): New command with an attached doc string. + (rh): New alias for it. + +2019-07-23 Vladislav Ivanishin <vlad@ispras.ru> + + * gdbhooks.py: Pass replace=True to + gdb.printing.register_pretty_printer. + +2019-07-23 Richard Biener <rguenther@suse.de> + + PR debug/91231 + * lto-streamer-in.c (input_function): Drop inline-entry markers + that ended up with an unknown location block. + +2019-07-23 Richard Biener <rguenther@suse.de> + + PR tree-optimization/83518 + * tree-ssa-sccvn.c (vn_reference_lookup_3): Handle aggregate + init from a constant even when partial defs are already recorded. + +2019-07-23 Jan Hubicka <hubicka@ucw.cz> + + * i386-common.c: Use PROCESSOR_ZNVER2 scheduler for znver2. + * config/i386/znver1.md: Enable patterns for znver2 and add store + variants which use extra AGU unit. + +2019-07-23 Jan Hubicka <hubicka@ucw.cz> + + * config/i386/i386-options.c (ix86_option_override_internal): Default + PARAM_AVOID_FMA_MAX_BITS to 256 for znver2. + * config/i386/x86-tune.def (X86_TUNE_AVOID_256FMA_CHAINS): Set + for ZNVER2. + +2019-07-23 Jan Hubicka <hubicka@ucw.cz> + + * config/i386/x86-tune-costs.h (znver2_memcpy): Update. + (znver2_costs): Update 256 bit SSE costs and multiplication. + +2019-07-23 Jan Beulich <jbeulich@suse.com> + + * config/i386/sse.md (<avx512>_cvtmask2<ssemodesuffix><mode>): + Require only AVX512F. + (*<avx512>_cvtmask2<ssemodesuffix><mode>): Likewise. Add + alternative expanding to vpternlog. + +2019-07-23 Martin Liska <mliska@suse.cz> + + * dwarf2out.c (gen_producer_string): Canonize -flto=N + to -flto in dwarf producer string. + +2019-07-23 Richard Biener <rguenther@suse.de> + + * tree-cfg.c (label_for_bb): Remove global var. + (main_block_label): Take label_for_bb as argument. + (cleanup_dead_labels_eh): Likewise, adjust. + (cleanup_dead_labels): Adjust. + +2019-07-22 Paul A. Clarke <pc@us.ibm.com> + + * doc/extend.texi (Basic PowerPC Built-in Functions Available on all + Configurations): Add documentation for __builtin_mtfsf. + +2019-07-22 Ilia Diachkov <ilia.diachkov@optimitech.com> + + * config/riscv/riscv-opts.h (struct riscv_align_data): New. + * config/riscv/riscv.c (riscv_constant_alignment): Use + riscv_align_data_type. + * config/riscv/riscv.h (RISCV_EXPAND_ALIGNMENT): New. + (DATA_ALIGNMENT): Use RISCV_EXPAND_ALIGNMENT. + (LOCAL_ALIGNMENT): Use RISCV_EXPAND_ALIGNMENT. + * config/riscv/riscv.opt (malign-data): New. + * doc/invoke.texi (RISC-V Options): Document -malign-data=. + +2019-07-02 Giuliano Belinassi <giuliano.belinassi@usp.br> + + * cgraph.c (dump_graphviz): New function. + * cgraph.h (dump_graphviz): New function. + * symtab.c (dump_graphviz): New function. + +2019-07-22 Sylvia Taylor <sylvia.taylor@arm.com> + + * config/aarch64/aarch64-simd.md + (*aarch64_simd_sra<mode>): New. + * config/aarch64/iterators.md + (SHIFTRT): New iterator. + (sra_op): New attribute. + +2019-07-22 Jozef Lawrynowicz <jozef.l@mittosystems.com> + + * config/msp430/msp430.c (msp430_preserve_reg_p): Don't save + callee-saved regs R4->R10 in an interrupt function that calls another + function. + +2019-07-22 Paul A. Clarke <pc@us.ibm.com> + + * config/rs6000/smmintrin.h (_mm_blend_epi16): New. + (_mm_blendv_epi8): New. + +2019-07-22 Richard Biener <rguenther@suse.de> + + PR tree-optimization/91221 + * tree-ssa-sccvn.c (vn_reference_lookup_3): Appropriately + restrict partial-def handling of empty constructors and + memset to refs with known offset. + +2019-07-22 Jan Beulich <jbeulich@suse.com> + + * config/i386/sse.md (ternlogsuffix): New. + (one_cmpl<mode>2): Don't force CONSTM1_RTX into a register when + AVX512F is in use. + (<mask_codefor>one_cmpl<mode>2<mask_name>): New. + +2019-07-22 Martin Liska <mliska@suse.cz> + + * config/avr/avr.c (avr_asm_output_aligned_decl_common): Update + comment. + * toplev.c (compile_file): Do not emit __gnu_lto_v1 symbol. + +2019-07-22 Martin Liska <mliska@suse.cz> + + * lto-section-in.c (lto_get_section_data): + Use new function get_compression. + * lto-streamer-out.c (produce_lto_section): Use + set_compression to encode compression algorithm. + * lto-streamer.h (struct lto_section): Do not + use bitfields in the format. + +2019-07-22 Martin Liska <mliska@suse.cz> + + PR driver/91172 + * opts-common.c (decode_cmdline_option): Decode + argument of -Werror and check it for a wrong language. + * opts-global.c (complain_wrong_lang): Remove such case. + +2019-07-22 Claudiu Zissulescu <claziss@synopsys.com> + + * config/arc/arc.c (prepare_move_operands): Always use an + intermediate register when storing a TLS symbols. + +2019-07-22 Stafford Horne <shorne@gmail.com> + + * config/or1k/or1k.c (or1k_expand_compare): Check for int before + force_reg. + +2019-07-22 Stafford Horne <shorne@gmail.com> + + * config.gcc (or1k*-*-*): Add mhard-float, mdouble-float, msoft-float + and munordered-float validations. + * config/or1k/constraints.md (d): New register constraint. + * config/or1k/predicates.md (fp_comparison_operator): New. + * config/or1k/or1k.c (or1k_print_operand): Add support for printing 'd' + operands. + (or1k_expand_compare): Normalize unordered comparisons. + * config/or1k/or1k.h (reg_class): Define DOUBLE_REGS. + (REG_CLASS_NAMES): Add "DOUBLE_REGS". + (REG_CLASS_CONTENTS): Add contents for DOUBLE_REGS. + * config/or1k/or1k.md (type): Add fpu. + (fpu): New instruction reservation. + (F, f, fr, fi, FI, FOP, fop): New. + (<fop><F:mode>3): New ALU instruction definition. + (float<fi><F:mode>2): New conversion instruction definition. + (fix_trunc<F:mode><fi>2): New conversion instruction definition. + (fpcmpcc): New code iterator. + (*sf_fp_insn): New instruction definition. + (cstore<F:mode>4): New expand definition. + (cbranch<F:mode>4): New expand definition. + * config/or1k/or1k.opt (msoft-float, mhard-float, mdouble-float, + munordered-float): New options. + * doc/invoke.texi: Document msoft-float, mhard-float, mdouble-float and + munordered-float. + +2019-07-22 Stafford Horne <shorne@gmail.com> + + * config.gcc (or1k*-*-*): Add mrori and mror to validation. + * doc/invoke.texi (OpenRISC Options): Add mrori option, rewrite all + documenation to be more clear. + * config/or1k/elf.opt (mboard=, mnewlib): Rewrite documentation to be + more clear. + * config/or1k/or1k.opt (mrori): New option. + (mhard-div, msoft-div, mhard-mul, msoft-mul, mcmov, mror, msext, + msfimm, mshftimm): Rewrite documentation to be more clear. + * config/or1k/or1k.md (insn_support): Add ror and rori. + (enabled): Add conditions for ror and rori. + (rotrsi3): Replace condition for shftimm with ror and rori. + +2019-07-22 Stafford Horne <shorne@gmail.com> + + PR target/90363 + * config/or1k/or1k.md (zero_extend<mode>si2): Update predicate. + (extend<mode>si2): Update predicate. + * config/or1k/predicates.md (volatile_mem_operand): New. + (reg_or_mem_operand): New. + +2019-07-21 Iain Sandoe <iain@sandoe.co.uk> + + * config/rs6000/rs6000.c (TARGET_NO_PROTOTYPE): Move from here... + * config/rs6000/rs6000-call.c: ... to here. + +2019-07-20 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/predicates.md (offsettable_mem_operand): Allow volatile + memory. + +2019-07-20 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/predicates.md (input_operand): Allow volatile memory. + +2019-07-20 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/predicates.md (lwa_operand): Allow volatile memory. + +2019-07-20 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/predicates.md (volatile_mem_operand): Modernize syntax. + (any_memory_operand): New predicate. + (reg_or_mem_operand): Use it. + +2019-07-20 Jakub Jelinek <jakub@redhat.com> + + PR target/91204 + * optabs.c (expand_unop): As fallback, expand ~op0 as op0 ^ -1. + +2019-07-20 John David Anglin <danglin@gcc.gnu.org> + + * config/pa/pa.h (hppa_profile_hook): Delete declaration. + * config/pa/pa-protos.h (hppa_profile_hook): Add declaration. + +2019-07-20 Jakub Jelinek <jakub@redhat.com> + + * tree.def (OMP_LOOP): New tree code. + * tree-core.h (enum omp_clause_code): Add OMP_CLAUSE_BIND. + (enum omp_clause_bind_kind): New enum. + (struct tree_omp_clause): Add subcode.bind_kind. + * tree.h (OMP_LOOP_CHECK): Rename to ... + (OMP_LOOPING_CHECK): ... this. + (OMP_FOR_BODY, OMP_FOR_CLAUSES, OMP_FOR_INIT, OMP_FOR_COND, + OMP_FOR_INCR, OMP_FOR_PRE_BODY, OMP_FOR_ORIG_DECLS): Use + OMP_LOOPING_CHECK instead of OMP_LOOP_CHECK. + (OMP_CLAUSE_BIND_KIND): Define. + * tree.c (omp_clause_num_ops, omp_clause_code_name): Add + bind clause entries. + (walk_tree_1): Handle OMP_CLAUSE_BIND. + * tree-pretty-print.c (dump_omp_clause): Likewise. + (dump_generic_node): Handle OMP_LOOP. + * gimplify.c (enum omp_region_type): Add ORT_IMPLICIT_TARGET. + (in_omp_construct): New variable. + (is_gimple_stmt): Handle OMP_LOOP. + (gimplify_scan_omp_clauses): For lastprivate don't set + check_non_private if code == OMP_LOOP. For reduction clause + on OMP_LOOP combined with parallel or teams propagate as shared + on the combined construct. Handle OMP_CLAUSE_BIND. + (gimplify_adjust_omp_clauses): Handle OMP_CLAUSE_BIND. + (gimplify_omp_for): Pass OMP_LOOP instead of OMP_{FOR,DISTRIBUTE} + for constructs from a loop construct to gimplify_scan_omp_clauses. + Don't predetermine iterator linear on OMP_SIMD from loop construct. + (replace_reduction_placeholders, gimplify_omp_loop): New functions. + (gimplify_omp_workshare): Use ORT_IMPLICIT_TARGET instead of trying + to match the implicit ORT_TARGET construct around whole body. + Temporarily clear in_omp_construct when processing body. + (gimplify_expr): Handle OMP_LOOP. For OMP_MASTER, OMP_TASKGROUP + etc. temporarily set in_omp_construct when processing body. + (gimplify_body): Create ORT_IMPLICIT_TARGET instead of ORT_TARGET. + * omp-low.c (struct omp_context): Add loop_p. + (build_outer_var_ref): Treat ctx->loop_p similarly to simd construct + in that the original var might be private. + (scan_sharing_clauses): Handle OMP_CLAUSE_BIND. + (check_omp_nesting_restrictions): Adjust nesting restrictions for + addition of loop construct. + (scan_omp_1_stmt): Allow setjmp inside of loop construct. + + * omp-low.c (lower_rec_input_clauses): Don't force simd arrays for + lastprivate non-addressable iterator of a collapse(1) simd. + +2019-07-17 Bill Seurer <seurer@linux.vnet.ibm.com> + + * config/rs6000/rs6000-call.c (HAVE_AS_GNU_ATTRIBUTE): define value + as in rs6000.c. + +2019-07-19 Iain Sandoe <iain@sandoe.co.uk> + + * config/darwin.h (DRIVER_SELF_SPECS): Ignore X and Mach specs which + refer to default conditions. Warn for the 'y' spec which is ignored + by current linkers. + +2019-07-19 Bill Seurer <seurer@linux.vnet.ibm.com> + + * config/rs6000/rs6000.c (builtin_description, cpu_is_info, + cpu_supports_info, builtin_hash_struct, builtin_hasher, + builtin_hash_table, rs6000_builtin_info_type, rs6000_builtin_info, + rs6000_aggregate_candidate, rs6000_discover_homogeneous_aggregate, + rs6000_return_in_memory, rs6000_return_in_msb, call_ABI_of_interest, + init_cumulative_args, rs6000_promote_function_mode, + rs6000_must_pass_in_stack, is_complex_IBM_long_double, + abi_v4_pass_in_fpr, rs6000_function_arg_padding, + rs6000_function_arg_boundary, rs6000_parm_offset, + rs6000_parm_start, rs6000_arg_size, + rs6000_darwin64_record_arg_advance_flush, + rs6000_darwin64_record_arg_advance_recurse, + rs6000_darwin64_struct_check_p, rs6000_function_arg_advance_1, + rs6000_function_arg_advance, rs6000_darwin64_record_arg_flush, + rs6000_darwin64_record_arg_recurse, rs6000_darwin64_record_arg, + rs6000_mixed_function_arg, rs6000_psave_function_arg, + rs6000_finish_function_arg, rs6000_function_arg, + rs6000_arg_partial_bytes, rs6000_pass_by_reference, + rs6000_parm_needs_stack, rs6000_function_parms_need_stack, + rs6000_reg_parm_stack_space, rs6000_move_block_from_reg, + setup_incoming_varargs, rs6000_build_builtin_va_list, rs6000_va_start, + rs6000_gimplify_va_arg, def_builtin, bdesc_3arg, bdesc_dst, + bdesc_2arg, bdesc_altivec_preds, bdesc_abs, bdesc_1arg, bdesc_0arg, + bdesc_htm, rs6000_overloaded_builtin_p, rs6000_overloaded_builtin_name, + rs6000_expand_zeroop_builtin, rs6000_expand_mtfsf_builtin, + rs6000_expand_mtfsb_builtin, rs6000_expand_set_fpscr_rn_builtin, + rs6000_expand_set_fpscr_drn_builtin, rs6000_expand_unop_builtin, + altivec_expand_abs_builtin, rs6000_expand_binop_builtin, + altivec_expand_predicate_builtin, swap_endian_selector_for_mode, + altivec_expand_lv_builtin, altivec_expand_stxvl_builtin, + altivec_expand_stv_builtin, htm_spr_num, rs6000_htm_spr_icode, + htm_expand_builtin, cpu_expand_builtin, rs6000_expand_ternop_builtin, + altivec_expand_dst_builtin, altivec_expand_vec_init_builtin, + get_element_number, altivec_expand_vec_set_builtin, + altivec_expand_vec_ext_builtin, altivec_expand_builtin, + rs6000_builtin_is_supported_p, rs6000_invalid_builtin, + rs6000_fold_builtin, rs6000_builtin_valid_without_lhs, + fold_build_vec_cmp, fold_compare_helper, fold_mergehl_helper, + fold_mergeeo_helper, rs6000_gimple_fold_builtin, + rs6000_expand_builtin, rs6000_vector_type, + rs6000_init_builtins, rs6000_builtin_decl, altivec_init_builtins, + htm_init_builtins, builtin_function_type, rs6000_common_init_builtins, + rs6000_internal_arg_pointer, rs6000_output_mi_thunk): Move + to rs6000-call.c. + * config/rs6000/rs6000-call.c (builtin_description, cpu_is_info, + cpu_supports_info, builtin_hash_struct, builtin_hasher, + builtin_hash_table, rs6000_builtin_info_type, rs6000_builtin_info, + rs6000_aggregate_candidate, rs6000_discover_homogeneous_aggregate, + rs6000_return_in_memory, rs6000_return_in_msb, call_ABI_of_interest, + init_cumulative_args, rs6000_promote_function_mode, + rs6000_must_pass_in_stack, is_complex_IBM_long_double, + abi_v4_pass_in_fpr, rs6000_function_arg_padding, + rs6000_function_arg_boundary, rs6000_parm_offset, + rs6000_parm_start, rs6000_arg_size, + rs6000_darwin64_record_arg_advance_flush, + rs6000_darwin64_record_arg_advance_recurse, + rs6000_darwin64_struct_check_p, rs6000_function_arg_advance_1, + rs6000_function_arg_advance, rs6000_darwin64_record_arg_flush, + rs6000_darwin64_record_arg_recurse, rs6000_darwin64_record_arg, + rs6000_mixed_function_arg, rs6000_psave_function_arg, + rs6000_finish_function_arg, rs6000_function_arg, + rs6000_arg_partial_bytes, rs6000_pass_by_reference, + rs6000_parm_needs_stack, rs6000_function_parms_need_stack, + rs6000_reg_parm_stack_space, rs6000_move_block_from_reg, + setup_incoming_varargs, rs6000_build_builtin_va_list, rs6000_va_start, + rs6000_gimplify_va_arg, def_builtin, bdesc_3arg, bdesc_dst, + bdesc_2arg, bdesc_altivec_preds, bdesc_abs, bdesc_1arg, bdesc_0arg, + bdesc_htm, rs6000_overloaded_builtin_p, rs6000_overloaded_builtin_name, + rs6000_expand_zeroop_builtin, rs6000_expand_mtfsf_builtin, + rs6000_expand_mtfsb_builtin, rs6000_expand_set_fpscr_rn_builtin, + rs6000_expand_set_fpscr_drn_builtin, rs6000_expand_unop_builtin, + altivec_expand_abs_builtin, rs6000_expand_binop_builtin, + altivec_expand_predicate_builtin, swap_endian_selector_for_mode, + altivec_expand_lv_builtin, altivec_expand_stxvl_builtin, + altivec_expand_stv_builtin, htm_spr_num, rs6000_htm_spr_icode, + htm_expand_builtin, cpu_expand_builtin, rs6000_expand_ternop_builtin, + altivec_expand_dst_builtin, altivec_expand_vec_init_builtin, + get_element_number, altivec_expand_vec_set_builtin, + altivec_expand_vec_ext_builtin, altivec_expand_builtin, + rs6000_builtin_is_supported_p, rs6000_invalid_builtin, + rs6000_fold_builtin, rs6000_builtin_valid_without_lhs, + fold_build_vec_cmp, fold_compare_helper, fold_mergehl_helper, + fold_mergeeo_helper, rs6000_gimple_fold_builtin, + rs6000_expand_builtin, rs6000_vector_type, + rs6000_init_builtins, rs6000_builtin_decl, altivec_init_builtins, + htm_init_builtins, builtin_function_type, rs6000_common_init_builtins, + rs6000_internal_arg_pointer, rs6000_output_mi_thunk: Move + to here from rs6000.c. + * config/rs6000/rs6000-internal.h: (rs6000_darwin64_struct_check_p, + rs6000_discover_homogeneous_aggregate, rs6000_output_mi_thunk, + rs6000_output_addr_const_extra, rs6000_gimple_fold_builtin, + rs6000_invalid_builtin, rs6000_build_builtin_va_list, rs6000_va_start, + rs6000_gimplify_va_arg, rs6000_promote_function_mode, + rs6000_return_in_memory, rs6000_return_in_msb, + rs6000_pass_by_reference, setup_incoming_varargs, + rs6000_function_arg_boundary, rs6000_must_pass_in_stack, + rs6000_arg_partial_bytes, rs6000_function_arg_advance, + rs6000_function_arg_padding, rs6000_function_arg, + rs6000_darwin64_record_arg, rs6000_internal_arg_pointer, + rs6000_init_builtins, rs6000_builtin_decl, rs6000_expand_builtin, + rs6000_fold_builtin, rs6000_passes_ieee128, rs6000_passes_float, + rs6000_passes_long_double, rs6000_passes_vector, + rs6000_returns_struct, cpu_builtin_p, tree builtin_mode_to_type, + altivec_builtin_mask_for_load) Add declarations. + * config/rs6000/t-rs6000: Add new source file rs6000-call.c. + * config/config.gcc: Add new source file rs6000-call.c to garbage + collector and extra_objs. + +2019-07-19 Jeff Law <law@redhat.com> + + PR tree-optimization/86061 + * tree-ssa-dse.c (initialize_ao_ref_for_dse): Handle + strncpy. Drop some trivial dead code. + (maybe_trim_memstar_call): Handle strncpy. + +2019-07-19 Richard Biener <rguenther@suse.de> + + PR tree-optimization/91211 + * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Fix + memset encoding size. + +2019-07-19 Uroš Bizjak <ubizjak@gmail.com> + + PR target/91204 + * config/i386/mmx.md (one_cmpl<mode>2): New expander. + +2019-07-19 Jan Hubicka <hubicka@ucw.cz> + + PR ipa/91194 + * ipa-inline.c (recursive_inlining): Fix limits check. + +2019-07-19 Richard Biener <rguenther@suse.de> + + PR tree-optimization/91200 + * tree-ssa-phiopt.c (cond_store_replacement): Check we have + no PHI nodes in middle-bb. + +2019-07-19 Richard Sandiford <richard.sandiford@arm.com> + + * doc/invoke.texi: Rename the AArch64 +bitperm extension flag + to +sve-bitperm. + * config/aarch64/aarch64-option-extensions.def: Likewise. + +2019-07-19 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/91190 + * function.c (insert_temp_slot_address): Store into the hash table + a copy of address to avoid RTL sharing issues. + +2019-07-19 Richard Biener <rguenther@suse.de> + + PR tree-optimization/91207 + Revert + 2019-07-17 Richard Biener <rguenther@suse.de> + + PR tree-optimization/91178 + * tree-vect-stmts.c (get_group_load_store_type): For SLP + loads with a gap larger than the vector size always use + VMAT_STRIDED_SLP. + (vectorizable_load): For VMAT_STRIDED_SLP with a permutation + avoid loading vectors that are only contained in the gap + and thus are not needed. + +2019-07-18 Uroš Bizjak <ubizjak@gmail.com> + + * config/i386/i386.md (*addqi_2_slp): Remove. + (*<code>qi_2_slp): Ditto. + +2019-07-18 Michael Meissner <meissner@linux.ibm.com> + + * config/rs6000/predicates.md (prefixed_mem_operand): Call + rs6000_prefixed_address_mode_p instead of rs6000_prefixed_address. + * config/rs6000/rs6000-protos.h (rs6000_prefixed_address_mode_p): + Rename function from rs6000_prefixed_address. + * config/rs6000/aix.h (TARGET_HAS_TOC): Rename TARGET_TOC to + TARGET_HAS_TOC. + (TARGET_TOC): Likewise. + (TARGET_NO_TOC): Delete here, define TARGET_NO_TOC_OR_PCREL in + rs6000.h. + * config/rs6000/darwin.h (TARGET_HAS_TOC): Rename TARGET_TOC to + TARGET_HAS_TOC. + (TARGET_TOC): Likewise. + (TARGET_NO_TOC): Delete here, define TARGET_NO_TOC_OR_PCREL in + rs6000.h. + * config/rs6000/linux64.h (TARGET_HAS_TOC): Rename TARGET_TOC to + TARGET_HAS_TOC. + (TARGET_TOC): Likewise. + * config/rs6000/rs6000.c (rs6000_option_override_internal): Add + check to require -mcmodel=medium for pc-relative addressing. + (create_TOC_reference): Add assertion for TARGET_TOC. + (rs6000_legitimize_address): Use TARGET_NO_TOC_OR_PCREL instead of + TARGET_NO_TOC. + (rs6000_emit_move): Likewise. + (TOC_alias_set): Rename TOC alias set static variable from 'set' + to 'TOC_alias_set'. + (get_TOC_alias_set): Likewise. + (output_toc): Use TARGET_NO_TOC_OR_PCREL instead of + TARGET_NO_TOC. + (rs6000_can_eliminate): Likewise. + (rs6000_prefixed_address_mode_p): Rename function from + rs6000_prefixed_address. + * config/rs6000/rs6000.h (TARGET_TOC): Define in terms of + TARGET_HAS_TOC and not pc-relative. + (TARGET_NO_TOC_OR_PCREL): New macro to replace TARGET_NO_TOC. + * config/rs6000/sysv4.h (TARGET_HAS_TOC): Rename TARGET_TOC to + TARGET_HAS_TOC. + (TARGET_TOC): Likewise. + (TARGET_NO_TOC): Delete here, define TARGET_NO_TOC_OR_PCREL in + rs6000.h. + +2019-07-18 Uroš Bizjak <ubizjak@gmail.com> + + PR target/91188 + * config/i386/i386.md (*addqi_1_slp): Use register_operand predicate + for operand 0. Do not use (match_dup) to match operand 1 with + operand 0. Add check in insn constraint that either input operand + matches operand 0. Use SWI12 mode iterator to also handle + HImode operands. + (*and<mode>_1_slp): Ditto. + (*<code>qi_1_slp): Ditto. + (*sub<mode>_1_slp): Use register_operand predicate for operand 0. + Do not use (match_dup) to match operand 1 with operand 0. Add + check in insn constraint that operand 1 matches operand 0. + Use SWI12 mode iterator to also handle HImode operands. + (*ashl<mode>3_1_slp): Ditto. + (*<shift_insn><mode>3_1_slp): Ditto. + (*<rotate_insn><mode>3_1_slp): Ditto. + +2019-07-18 Sylvia Taylor <sylvia.taylor@arm.com> + + * config/arm/arm-builtins.c + (arm_expand_ternop_builtin): Remove explicit sha1 builtin handling. + (arm_expand_unop_builtin): Likewise. + * config/arm/crypto.md + (crypto_sha1h): Convert from define_insn to define_expand. + (crypto_<crypto_pattern>): Likewise. + (crypto_sha1h_lb): New define_insn. + (crypto_<crypto_pattern>_lb): Likewise. + +2019-07-18 Sylvia Taylor <sylvia.taylor@arm.com> + + PR target/90317 + * config/arm/arm_neon.h (vsha1h_u32): Refactor. + (vsha1cq_u32): Likewise. + (vsha1pq_u32): Likewise. + (vsha1mq_u32): Likewise. + * config/arm/crypto.md (crypto_sha1h): Remove zero extend, correct + vec select. + (crypto_sha1c): Correct vec select. + (crypto_sha1m): Likewise. + (crypto_sha1p): Likewise. + +2019-07-18 Richard Earnshaw <rearnsha@arm.com> + + * config/arm/predicates.md (arm_borrow_operation): New predicate. + * config/arm/arm.c (subdi3_compare1): Use CCmode for the split. + (arm_subdi3, subdi_di_zesidi, subdi_di_sesidi): Likewise. + (subdi_zesidi_zesidi): Likewise. + (negdi2_compare, negdi2_insn): Likewise. + (negdi_extensidi): Likewise. + (negdi_zero_extendsidi): Likewise. + (arm_cmpdi_insn): Likewise. + (subsi3_carryin): Use arm_borrow_operation. + (subsi3_carryin_const): Likewise. + (subsi3_carryin_const0): Likewise. + (subsi3_carryin_compare): Likewise. + (subsi3_carryin_compare_const): Likewise. + (subsi3_carryin_compare_const0): Likewise. + (subsi3_carryin_shift): Likewise. + (rsbsi3_carryin_shift): Likewise. + (negsi2_carryin_compare): Likewise. + +2019-07-18 Bin Cheng <bin.cheng@linux.alibaba.com> + + PR tree-optimization/91137 + * tree-ssa-loop-ivopts.c (struct ivopts_data): New field. + (tree_ssa_iv_optimize_init, alloc_iv, tree_ssa_iv_optimize_finalize): + Init, use and fini the above new field. + (determine_base_object_1): New function. + (determine_base_object): Reimplement using walk_tree. + +2019-07-18 Richard Sandiford <richard.sandiford@arm.com> + + * basic-block.h (CLEANUP_FORCE_FAST_DCE): New macro. + * cfgcleanup.c (cleanup_cfg): Call run_fast_dce if + CLEANUP_FORCE_FAST_DCE is set. + * ifcvt.c (rest_of_handle_if_conversion): Pass + CLEANUP_FORCE_FAST_DCE to the final cleanup_cfg call if + if-conversion succeeded. + +2019-07-18 Richard Biener <rguenther@suse.de> + + * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Refactor + branches to make code less indented. + +2019-07-17 Alexandre Oliva <oliva@adacore.com> + + PR middle-end/81824 + * attribs.c (decls_mismatched_attributes): Simplify the logic + that avoids duplicates and false positives. + +2019-07-17 John David Anglin <danglin@gcc.gnu.org> + + * config/pa/pa.c (pa_som_asm_init_sections): Don't force all constant + data into data section when generating PIC code. + (pa_select_section): Use pa_reloc_rw_mask() to qualify relocs. + (pa_reloc_rw_mask): Return 3 when generating PIC code and when + generating code for SOM targets earlier than HP-UX 11. Otherwise, + return 2 for SOM and 0 for other targets. + +2019-07-17 Jeff Law <law@redhat.com> + + * tree-ssa-dse.c (initialize_ao_ref_for_dse): Fix formatting. + (dse_walker::dse_optimize_stmt): Likewise. Add missing return to + avoid unexpected switch statement fallthru. + +2019-07-17 Uroš Bizjak <ubizjak@gmail.com> + + * config/i386/i386.md (*add<dwi>3_doubleword): + Remove redundant constraints. + (*add<mode>_1): Ditto. + (*addhi_1): Ditto. + (*addqi_1): Ditto. + (*addqi_1_slp): Ditto. + (*add<mode>_2): Ditto. + (*addv<mode>4): Ditto. + (*sub<dwi>3_doubleword): Ditto. + (*sub<mode>_1): Ditto. + (*subqi_1_slp): Ditto. + (*sub<mode>_2): Ditto. + (*subv<mode>4): Ditto. + (*sub<mode>_3): Ditto. + (@add<mode>3_carry): Ditto. + (@sub<mode>3_carry): Ditto. + (*add<mode>3_cc_overflow_1): Ditto. + (*add<mode>3_zext_cc_overflow_2): Ditto. + (*anddi_1): Ditto. + (*and<mode>_1): Ditto. + (*andqi_1): Ditto. + (*andqi_1_slp): Ditto. + (*anddi_2): Ditto. + (*andqi_2_maybe_si): Ditto. + (*and<mode>_2): Ditto. + (*andqi_2_slp): Ditto. + (*<code><mode>_1): Ditto. + (*<code>qi_1): Ditto. + (*<code>qi_1_slp): Ditto. + (*<code><mode>_2): Ditto. + (*<code>qi_2_slp): Ditto. + +2019-07-17 Jan Hubicka <hubicka@ucw.cz> + + * alias.c (record_component_aliases): Do not simplify pointed-to + types of ODR types. + +2019-07-17 Uroš Bizjak <ubizjak@gmail.com> + + * config/i386/i386.md (*andqi_2_maybe_si): Handle potential + partial reg stall on alternative 2. + +2019-07-17 Richard Biener <rguenther@suse.de> + + PR tree-optimization/91178 + * tree-ssa.c (release_defs_bitset): Iterate from higher to + lower SSA names to avoid quadratic behavior in the common case. + * tree-data-ref.c (split_constant_offset): Add limit argument + and pass it down. Initialize it from PARAM_SSA_NAME_DEF_CHAIN_LIMIT. + (split_constant_offset_1): Add limit argument and use it to + limit SSA def walking. Optimize the common plus/minus case. + +2019-07-17 Richard Biener <rguenther@suse.de> + + PR tree-optimization/91178 + * tree-vect-stmts.c (get_group_load_store_type): For SLP + loads with a gap larger than the vector size always use + VMAT_STRIDED_SLP. + (vectorizable_load): For VMAT_STRIDED_SLP with a permutation + avoid loading vectors that are only contained in the gap + and thus are not needed. + +2019-07-17 Richard Biener <rguenther@suse.de> + + PR tree-optimization/91180 + * tree-ssa-sccvn.c (vn_reference_lookup_3): Fix offset + computation for memset partial defs. + +2019-07-17 Jakub Jelinek <jakub@redhat.com> + + * gimple.h (enum gf_mask): Remove GF_OMP_FOR_SIMD, change + GF_OMP_FOR_KIND_SIMD to a value serially after other kinds, + divide GF_OMP_FOR_KIND_MASK, GF_OMP_FOR_COMBINED, + GF_OMP_FOR_COMBINED_INTO, GF_OMP_FOR_GRID_PHONY, + GF_OMP_FOR_GRID_INTRA_GROUP and GF_OMP_FOR_GRID_GROUP_ITER by two. + * omp-grid.c (grid_process_grid_body, + grid_eliminate_combined_simd_part): Use GF_OMP_FOR_KIND_SIMD instead + of GF_OMP_FOR_SIMD, don't test & GF_OMP_FOR_SIMD but + == GF_OMP_FOR_KIND_SIMD. + * omp-low.c (build_outer_var_ref, scan_sharing_clauses, + check_omp_nesting_restrictions, scan_omp_1_stmt, + lower_rec_input_clauses, lower_lastprivate_conditional_clauses, + lower_lastprivate_clauses, lower_reduction_clauses, lower_omp_scan, + omp_find_scan): Likewise. + * omp-expand.c (expand_omp_for): Likewise. + * omp-general.c (omp_extract_for_data): Likewise. + + PR tree-optimization/91157 + * tree-vect-generic.c (expand_vector_comparison): Handle lhs being + a vector boolean with scalar mode. + (expand_vector_condition): Handle first operand being a vector boolean + with scalar mode. + (expand_vector_operations_1): For comparisons, don't bail out early + if the return type is vector boolean with scalar mode, but comparison + operand type is not. + +2019-07-17 Richard Biener <rguenther@suse.de> + + PR tree-optimization/91181 + * tree-vect-slp.c (vect_build_slp_tree_1): Do not compare + IFN_LOADs as calls. + +2019-07-16 Uroš Bizjak <ubizjak@gmail.com> + + * config/i386/i386.md (*testdi_1): Match CCZmode for + constants that might have the SImode sign bit set. + (*testqi_1_maybe_si): Remove "!" constraint modifier. + Use correct constraints for pentium pairing. + (*test<mode>_1): Ditto. + +2019-07-16 Jeff Law <law@redhat.com> + + PR rtl-optimization/91173 + * tree-ssa-address.c (addr_for_mem_ref): If the base is an + SSA_NAME with a constant value, fold its value into the offset + and clear the base before calling gen_addr_rtx. + +2019-07-16 Jakub Jelinek <jakub@redhat.com> + + PR rtl-optimization/91164 + * dse.c (rest_of_handle_dse): If dead edges have been purged, + invalidate dominance info. + +2019-07-16 Richard Sandiford <richard.sandiford@arm.com> + + * read-md.h (md_reader::record_potential_iterator_use): Add a + file_location parameter. + * read-rtl.c (attribute_use::loc): New field. + (map_attr_string): Take a file_location parameter. Report cases + in which attributes map to multiple distinct values. + (apply_attribute_uses): Update call accordingly. + (md_reader::handle_overloaded_name): Likewise. + (md_reader::apply_iterator_to_string): Likewise. Skip empty + nonnull strings. + (record_attribute_use): Take a file_location parameter. + Initialize attribute_use::loc. + (md_reader::record_potential_iterator_use): Take a file_location + parameter. Update call to record_attribute_use. + (rtx_reader::rtx_alloc_for_name): Update call accordingly. + (rtx_reader::read_rtx_code): Likewise. + (rtx_reader::read_rtx_operand): Likewise. Record a location + for implicitly-expanded empty strings. + +2019-07-16 Richard Sandiford <richard.sandiford@arm.com> + + * read-md.h (md_reader::ptr_loc): Moved from read-md.c. + Use file_location instead of separate fields. + (md_reader::set_md_ptr_loc): Take a file_location instead of a + separate filename and line number. + * read-md.c (ptr_loc): As above. + (md_reader::copy_md_ptr_loc): Update for new ptr_loc layout. + (md_reader::fprint_md_ptr_loc): Likewise. + (md_reader::set_md_ptr_loc): Likewise. Take a file_location + instead of a separate filename and line number. + (md_reader::read_string): Update call accordingly. + +2019-07-16 Richard Sandiford <richard.sandiford@arm.com> + + * config/rs6000/rs6000.md (*mov<mode>_update1): Explicitly + use <SFDF:mode>, <SFDF:MODE>, <SFDF:Ff> and <SFDF:bits> rather than + leaving the choice between SFDF and P implicit. + (*mov<mode>_update2): Likewise. + (*cmp<IBM128:mode>_internal2): Explicitly use <IBM128:MODE> + rather than leaving the choice betweem IBM128 and GPR implicit. + (*fix<uns>_trunc<IEEE128:mode><QHSI:mode>2_mem): Explicitly use + <IEEE128:MODE> rather than leaving the choice between IEEE128 and + QHSI implicit. + (AltiVec define_peephole2s): Explicitly use <ALTIVEC_DFORM:MODE> + rather than leaving the choice between ALTIVEC_DFORM and P implicit. + * config/rs6000/vsx.md + (*vsx_ext_<VSX_EXTRACT_I:VS_scalar>_fl_<FL_CONV:mode>) + (*vsx_ext_<VSX_EXTRACT_I:VS_scalar>_ufl_<FL_CONV:mode>): Explicitly + use <FL_CONV:VSisa> rather than leaving the choice between FL_CONV + and VSX_EXTRACT_I implicit. + +2019-07-16 Richard Sandiford <richard.sandiford@arm.com> + + * config/mips/micromips.md (*movep<MOVEP1:mode><MOVEP2:mode>): + Explicitly use <MOVEP1:MODE> for the mode attribute. + +2019-07-16 Jan Hubicka <hubicka@ucw.cz> + + PR bootstrap/91176 + * ipa-fnsummary.c (analyze_function_body): Skip debug stmts + +2019-07-15 Segher Boessenkool <segher@kernel.crashing.org> + + PR target/91050 + * config/rs6000/rs6000.c (rs6000_file_start): Never skip emitting a + .machine directive. + +2019-07-15 Uroš Bizjak <ubizjak@gmail.com> + + * config/i386/i386.md (@test<mode>_ccno_1): + Rename from test<mode>_ccno_1. + (*testdi_1): Remove redundant alternatives. Remove modrm attribute. + (*testqi_1_maybe_si): Remove modrm attribute. + (*test<mode>_1): Ditto. + * config/i386/i386-expand.c (ix86_split_idivmod): Use + gen_test_ccno_1 and gen_extend_insn. + +2019-07-15 Jan Hubicka <hubicka@ucw.cz> + + * tree-ssa-alias.c (aliasing_component_refs_walk): Initialize same_p + to 0. + +2019-07-15 Richard Biener <rguenther@suse.de> + + PR middle-end/91162 + * tree-cfg.c (move_block_to_fn): When releasing a virtual PHI + node make sure to replace all uses with something valid. + +2019-07-15 Kewen Lin <linkw@gcc.gnu.org> + + PR tree-optimization/88497 + * tree-ssa-reassoc.c (reassociate_bb): Swap the positions of + GIMPLE_BINARY_RHS check and gimple_visited_p check, call new + function undistribute_bitref_for_vector. + (undistribute_bitref_for_vector): New function. + (cleanup_vinfo_map): Likewise. + (sort_by_mach_mode): Likewise. + +2019-07-14 Uroš Bizjak <ubizjak@gmail.com> + + * config/i386/i386.md (nonmemory_szext_operand): New mode attribute. + (test<mode>_ccno_1): Macroize insn pattern from testsi_ccno_1 + and testdi_ccno_1 using SWI48 mode attribute. + (*testdi_1): Use x86_64_szext_nonmemory_operand instead of + x86_64_szext_general_operand. + (*testqi_1_maybe_si): Use nonmemory_operand instead of general_operand. + (*test<mode>_1): Use nonmemory_szext_operand mode attribute + instead of genera_operand mode attribute. + +2019-07-14 Vladislav Ivanishin <vlad@ispras.ru> + + * gdbhooks.py (DumpFn.invoke): Add explicit casts of return values of + fopen and fclose to their respective types. + (DotFn.invoke): Ditto. + +2019-07-14 Jan Hubicka <hubicka@ucw.cz> + + * ipa-fnsummary.c (ipa_dump_hints): Do not dump array_index. + (ipa_fn_summary::~ipa_fn_summary): Do not destroy array_index. + (ipa_fn_summary_t::duplicate): Do not duplicate array_index. + (array_index_predicate): Remove. + (analyze_function_body): Account cost for variable ofsetted array + indexing. + (estimate_node_size_and_time): Do not compute array index hint. + (ipa_merge_fn_summary_after_inlining): Do not merge array index hint. + (inline_read_section): Do not read array index hint. + (ipa_fn_summary_write): Do not write array index hint. + * doc/invoke.texi (ipa-cp-array-index-hint-bonus): Remove. + * ipa-cp.c (hint_time_bonus): Remove. + * ipa-fnsummary.h (ipa_hints_vals): Remove array_index. + (ipa_fnsummary): Remove array_index. + * ipa-inline.c (want_inline_small_function_p): Do not use + array_index. + (edge_badness): Likewise. + * params.def (PARAM_IPA_CP_ARRAY_INDEX_HINT_BONUS): Remove. + +2019-07-14 Segher Boessenkool <segher@kernel.crashing.org> + + PR target/91148 + * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Remove + superfluous "builtin function" phrasing. + +2019-07-13 Jan Hubicka <hubicka@ucw.cz> + + * tree-ssa-alias.c (component_ref_to_zero_sized_trailing_array_p): + Break out from ... + (aliasing_component_refs_walk): Break out from ... + (aliasing_component_refs_p): ... here. + +2019-07-13 Segher Boessenkool <segher@kernel.crashing.org> + + PR target/91148 + * config/rs6000/rs6000.c (rs6000_invalid_builtin): Remove superfluous + "builtin function" phrasing. + +2019-07-13 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org> + + PR target/90723 + * recog.h (temporary_volatile_ok): New class. + * config/aarch64/aarch64.c (aarch64_emit_sve_pred_move): Set + volatile_ok temporarily to true using temporary_volatile_ok. + * expr.c (emit_block_move_via_cpymem): Likewise. + * optabs.c (maybe_legitimize_operand): Likewise. + +2019-07-13 Jakub Jelinek <jakub@redhat.com> + + * gimplify.c (struct gimplify_omp_ctx): Add order_concurrent member. + (omp_notice_threadprivate_variable): Diagnose threadprivate variable + uses inside of order(concurrent) constructs. + (gimplify_scan_omp_clauses): Set ctx->order_concurrent if + OMP_CLAUSE_ORDER is seen. + * omp-low.c (struct omp_context): Add order_concurrent member. + (scan_sharing_clauses): Set ctx->order_concurrent if + OMP_CLAUSE_ORDER is seen. + (check_omp_nesting_restrictions): Diagnose ordered or atomic inside + of simd order(concurrent). Diagnose constructs not allowed inside of + for order(concurrent). + (setjmp_or_longjmp_p): Add a context and TREE_PUBLIC check to avoid + complaining about static double setjmp (double); or class static + methods or non-global namespace setjmps. + (omp_runtime_api_call): New function. + (scan_omp_1_stmt): Diagnose OpenMP runtime API calls inside of + order(concurrent) loops. + +2019-07-12 Martin Sebor <msebor@redhat.com> + + * doc/invoke.texi (ssa-name-def-chain-limit): Document new --param. + * params.def (PARAM_SSA_NAME_DEF_CHAIN_LIMIT): Add new --param. + * tree-vrp.c (vrp_prop::check_mem_ref): Use + PARAM_SSA_NAME_DEF_CHAIN_LIMIT. + +2019-07-12 Jan Hubicka <jh@suse.cz> + + * tree-ssa-alias.c (same_tmr_indexing_p): Break out from ... + (indirect_refs_may_alias_p): ... here. + (nonoverlapping_component_refs_since_match_p): Support also non-trivial + mem refs in the access paths. + +2019-07-12 Jiangning Liu <jiangning.liu@amperecomputing.com> + + PR tree-optimization/89430 + * tree-ssa-phiopt.c (cond_store_replacement): Support conditional + store elimination for local variable without address escape. + +2019-07-12 Jeff Law <law@redhat.com> + + * config/c6x/c6x.c (c6x_section_type): Clear SECTION_NOTYPE + for the ".far" section. + +2019-07-12 Richard Biener <rguenther@suse.de> + + PR tree-optimization/91145 + * tree-vect-slp.c (vect_build_slp_tree_2): Fix reduction + chain check. + +2019-07-12 Alexandre Oliva <oliva@adacore.com> + + * tree-eh.c (honor_protect_cleanup_actions): Use outer_ + rather than this_state as the lowering context for the ELSE + seq in a GIMPLE_EH_ELSE. + +2019-07-12 Richard Sandiford <richard.sandiford@arm.com> + + * vector-builder.h (vector_builder::elt): Allow already-supplied + elements to be read back before building is complete. + +2019-07-12 Eric Botcazou <ebotcazou@adacore.com> + + PR rtl-optimization/91136 + * df-core.c (ACCESSING REFS): Fix typos in comment. + * resource.c (mark_target_live_reg): Add artificial defs that occur at + the beginning of the block to the initial set of live registers. + +2019-07-12 Richard Biener <rguenther@suse.de> + + * fold-const.h (get_array_ctor_element_at_index): Adjust. + * fold-const.c (get_array_ctor_element_at_index): Add + ctor_idx output parameter informing the caller where in + the constructor the element was (not) found. Add early exit + for when the ctor is sorted. + * gimple-fold.c (fold_array_ctor_reference): Support constant + folding across multiple array elements. + +2019-07-12 Eric Botcazou <ebotcazou@adacore.com> + + * cfgexpand.c (expand_gimple_stmt_1) <GIMPLE_RETURN>: If the statement + doesn't have location, set the current location to the function's end. + +2019-07-12 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/aarch64.md (*compare_condjump<mode>) + (loadwb_pair<GPI:mode>_<P:mode>, loadwb_pair<GPF:mode>_<P:mode>) + (storewb_pair<GPI:mode>_<P:mode>, storewb_pair<GPF:mode>_<P:mode>) + (*ands<mode>_compare0): Fix ambiguous uses of .md attributes. + * config/aarch64/aarch64-simd.md + (*aarch64_get_lane_extend<GPI:mode><VDQQH:mode>): Likewise. + (*aarch64_get_lane_zero_extend<GPI:mode><VDQQH:mode>): Likewise. + * config/aarch64/aarch64-sve.md + (while_ult<GPI:mode><PRED_ALL:mode>): Likewise. + (*cond_<optab><mode>_any): Fix SVE_I/SVE_SDI typo. + +2019-07-12 Richard Sandiford <richard.sandiford@arm.com> + + * doc/md.texi: Document that @ patterns can have different + numbers of operands. + * genemit.c (handle_overloaded_gen): Handle this case. + * genopinit.c (handle_overloaded_gen): Likewise. + * gensupport.c (replace_operands_with_dups): Iterate over + the new rtx's format rather than the old one's. + +2019-07-12 Jakub Jelinek <jakub@redhat.com> + + * tree-core.h (enum omp_clause_code): Add OMP_CLAUSE_ORDER. + * tree.c (omp_clause_num_ops, omp_clause_code_name): Add + order clause entries. + (walk_tree_1): Handle OMP_CLAUSE_ORDER. + * tree-pretty-print.c (dump_omp_clause): Likewise. + * gimplify.c (gimplify_scan_omp_clauses, gimplify_adjust_omp_clauses): + Likewise. + * omp-low.c (scan_sharing_clauses): Likewise. + * tree-nested.c (convert_nonlocal_omp_clauses, + convert_local_omp_clauses): Likewise. + +2019-07-12 Kewen Lin <linkw@gcc.gnu.org> + + * cfgrtl.c (print_rtl_with_bb): Emit a hint if the + fallthrough target of current basic block isn't the placed + right next. + +2019-07-11 Sunil K Pandey <sunil.k.pandey@intel.com> + + PR target/90980 + * config/i386/avx512fintrin.h (_mm512_loadu_epi64): New. + (_mm512_storeu_epi64): Likewise. + (_mm512_loadu_epi32): Likewise. + (_mm512_storeu_epi32): Likewise. + * config/i386/avx512vlintrin.h (_mm256_storeu_epi64): New. + (_mm_storeu_epi64): Likewise. + (_mm256_storeu_epi32): Likewise. + (_mm_storeu_epi32): Likewise. + +2019-07-11 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/rs6000-logue.c: Add Modula-2 to comment. + +2019-07-11 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/rs6000-logue.c (rs6000_output_function_epilogue): + Handle Modula-2. + +2019-07-11 Jakub Jelinek <jakub@redhat.com> + + PR target/91124 + * config/i386/sse.md (sse2_cvtpd2dq<mask_name>): Change into ... + (sse2_cvtpd2dq): ... this. Remove mask substitution macros. + (sse2_cvtpd2dq_mask, sse2_cvtpd2dq_mask_1): New define_insns. + (ufix_notruncv2dfv2si2<mask_name>): Change into ... + (ufix_notruncv2dfv2si2): ... this. Remove mask substitution macros. + (ufix_notruncv2dfv2si2_mask, ufix_notruncv2dfv2si2_mask_1): New + define_insns. + (ufix_truncv2dfv2si2<mask_name>): Change into ... + (ufix_truncv2dfv2si2): ... this. Remove mask substitution macros. + (ufix_truncv2dfv2si2_mask, ufix_truncv2dfv2si2_mask_1): New + define_insns. + (sse2_cvttpd2dq<mask_name>): Change into ... + (sse2_cvttpd2dq): ... this. Remove mask substitution macros. + (sse2_cvttpd2dq_mask, sse2_cvttpd2dq_mask_1): New define_insns. + (*sse2_cvtpd2dq<mask_name>): Change into ... + (*sse2_cvtpd2dq): ... this. Remove mask substitution macros. + Add "C" constraint to const0_operand. + (*sse2_cvtpd2dq_mask, *sse2_cvtpd2dq_mask_1): New define_insns. + (sse2_cvtpd2ps_mask): Adjust expand to match *sse2_cvtpd2ps_mask + changes. + + PR target/91124 + * config/i386/i386-builtin-types.def + (V32HI_FTYPE_V32HI_V32HI_V32HI_INT, + V16HI_FTYPE_V16HI_V16HI_V16HI_INT, V8HI_FTYPE_V8HI_V8HI_V8HI_INT, + V8SI_FTYPE_V8SI_V8SI_V8SI_INT, V4DI_FTYPE_V4DI_V4DI_V4DI_INT, + V8DI_FTYPE_V8DI_V8DI_V8DI_INT, V16SI_FTYPE_V16SI_V16SI_V16SI_INT, + V2DI_FTYPE_V2DI_V2DI_V2DI_INT, V4SI_FTYPE_V4SI_V4SI_V4SI_INT): Remove. + * config/i386/i386-builtin.def (__builtin_ia32_vpshrdv_v32hi_mask, + __builtin_ia32_vpshrdv_v32hi_maskz, __builtin_ia32_vpshrdv_v16hi_mask, + __builtin_ia32_vpshrdv_v16hi_maskz, __builtin_ia32_vpshrdv_v8hi_mask, + __builtin_ia32_vpshrdv_v8hi_maskz, __builtin_ia32_vpshrdv_v16si_mask, + __builtin_ia32_vpshrdv_v16si_maskz, __builtin_ia32_vpshrdv_v8si_mask, + __builtin_ia32_vpshrdv_v8si_maskz, __builtin_ia32_vpshrdv_v4si_mask, + __builtin_ia32_vpshrdv_v4si_maskz, __builtin_ia32_vpshrdv_v8di_mask, + __builtin_ia32_vpshrdv_v8di_maskz, __builtin_ia32_vpshrdv_v4di_mask, + __builtin_ia32_vpshrdv_v4di_maskz, __builtin_ia32_vpshrdv_v2di_mask, + __builtin_ia32_vpshrdv_v2di_maskz, __builtin_ia32_vpshldv_v32hi_mask, + __builtin_ia32_vpshldv_v32hi_maskz, __builtin_ia32_vpshldv_v16hi_mask, + __builtin_ia32_vpshldv_v16hi_maskz, __builtin_ia32_vpshldv_v8hi_mask, + __builtin_ia32_vpshldv_v8hi_maskz, __builtin_ia32_vpshldv_v16si_mask, + __builtin_ia32_vpshldv_v16si_maskz, __builtin_ia32_vpshldv_v8si_mask, + __builtin_ia32_vpshldv_v8si_maskz, __builtin_ia32_vpshldv_v4si_mask, + __builtin_ia32_vpshldv_v4si_maskz, __builtin_ia32_vpshldv_v8di_mask, + __builtin_ia32_vpshldv_v8di_maskz, __builtin_ia32_vpshldv_v4di_mask, + __builtin_ia32_vpshldv_v4di_maskz, __builtin_ia32_vpshldv_v2di_mask, + __builtin_ia32_vpshldv_v2di_maskz, __builtin_ia32_vpdpbusd_v16si_mask, + __builtin_ia32_vpdpbusd_v16si_maskz, __builtin_ia32_vpdpbusd_v8si_mask, + __builtin_ia32_vpdpbusd_v8si_maskz, __builtin_ia32_vpdpbusd_v4si_mask, + __builtin_ia32_vpdpbusd_v4si_maskz, + __builtin_ia32_vpdpbusds_v16si_mask, + __builtin_ia32_vpdpbusds_v16si_maskz, + __builtin_ia32_vpdpbusds_v8si_mask, + __builtin_ia32_vpdpbusds_v8si_maskz, + __builtin_ia32_vpdpbusds_v4si_mask, + __builtin_ia32_vpdpbusds_v4si_maskz, + __builtin_ia32_vpdpwssd_v16si_mask, + __builtin_ia32_vpdpwssd_v16si_maskz, __builtin_ia32_vpdpwssd_v8si_mask, + __builtin_ia32_vpdpwssd_v8si_maskz, __builtin_ia32_vpdpwssd_v4si_mask, + __builtin_ia32_vpdpwssd_v4si_maskz, + __builtin_ia32_vpdpwssds_v16si_mask, + __builtin_ia32_vpdpwssds_v16si_maskz, + __builtin_ia32_vpdpwssds_v8si_mask, + __builtin_ia32_vpdpwssds_v8si_maskz, + __builtin_ia32_vpdpwssds_v4si_mask, + __builtin_ia32_vpdpwssds_v4si_maskz): Use *_USI, *_UHI or *_UQI + suffixed types rather than *_INT. + * config/i386/i386-expand.c (ix86_expand_args_builtin): Don't handle + V32HI_FTYPE_V32HI_V32HI_V32HI_INT, V16HI_FTYPE_V16HI_V16HI_V16HI_INT, + V8HI_FTYPE_V8HI_V8HI_V8HI_INT, V8SI_FTYPE_V8SI_V8SI_V8SI_INT, + V4DI_FTYPE_V4DI_V4DI_V4DI_INT, V8DI_FTYPE_V8DI_V8DI_V8DI_INT, + V16SI_FTYPE_V16SI_V16SI_V16SI_INT, V2DI_FTYPE_V2DI_V2DI_V2DI_INT + and V4SI_FTYPE_V4SI_V4SI_V4SI_INT. + +2019-07-11 Aldy Hernandez <aldyh@redhat.com> + + * tree-vrp.c (intersect_ranges): If we know the intersection is + empty, there is no need to conservatively add anything else to + the set. + +2019-07-11 Richard Biener <rguenther@suse.de> + + PR middle-end/91131 + * gimplify.c (gimplify_compound_literal_expr): Force a temporary + when the object is volatile and we have not cleared it even though + there are no nonzero elements. + +2019-07-10 Michael Meissner <meissner@linux.ibm.com> + + * config/rs6000/predicates.md (cint34_operand): Update + SIGNED_34BIT_OFFSET_P call. + (pcrel_address): Update SIGNED_34BIT_OFFSET_P call. + (pcrel_external_address): Update SIGNED_34BIT_OFFSET_P call. + * config/rs6000/rs6000.c (rs6000_prefixed_address): Update + SIGNED_16BIT_OFFSET_P and SIGNED_34BIT_OFFSET_P calls. + * config/rs6000/rs6000.h (SIGNED_16BIT_OFFSET_P): Remove EXTRA + argument. + (SIGNED_34BIT_OFFSET_P): Remove EXTRA argument. + (SIGNED_16BIT_OFFSET_EXTRA_P): New macro, like + SIGNED_16BIT_OFFSET_P with an EXTRA argument. + (SIGNED_34BIT_OFFSET_EXTRA_P): New macro, like + SIGNED_34BIT_OFFSET_P with an EXTRA argument. + +2019-07-10 Iain Sandoe <iain@sandoe.co.uk> + + * config/rs6000/darwin.h (LIB_SPEC): Collate this spec here. + * config/rs6000/darwin7.h (LIB_SPEC): Remove. + * config/rs6000/darwin8.h (LIB_SPEC): Remove. + (DEF_MIN_OSX_VERSION): New. + +2019-07-10 Richard Sandiford <richard.sandiford@arm.com> + + * fold-const.c (fold_relational_const): Fix folding of + vector-to-scalar NE_EXPRs. + (test_vector_folding): Add more tests. + +2019-07-10 Richard Sandiford <richard.sandiford@arm.com> + + PR target/91060 + * config/arm/iterators.md (V2DI_ONLY): New mode iterator. + * config/arm/neon.md (vec_set<mode>_internal): Add a '@' prefix. + (vec_setv2di_internal): Reexpress as... + (@vec_set<V2DI_ONLY:mode>_internal): ...this. + * config/arm/arm.c (neon_expand_vector_init): Use gen_vec_set_internal + rather than gen_neon_vset_lane<mode>. + +2019-07-10 Vladimir Makarov <vmakarov@redhat.com> + + PR target/91102 + * lra-constraints.c (process_alt_operands): Don't match user + defined regs only if they are early clobbers. + +2019-07-10 Marc Glisse <marc.glisse@inria.fr> + + * wide-int.h (wi::lshift): Reject negative values for the fast path. + +2019-07-10 Richard Biener <rguenther@suse.de> + + PR tree-optimization/91126 + * tree-ssa-sccvn.c (n_walk_cb_data::push_partial_def): Adjust + native encoding offset for BYTES_BIG_ENDIAN. + (vn_reference_lookup_3): Likewise. + +2019-07-10 Richard Biener <rguenther@suse.de> + + * tree-ssa-sccvn.c (vn_reference_lookup_3): Look at valueized + LHS whenever possible. + +2019-07-09 Jan Hubicka <hubicka@ucw.cz> + + * tree-ssa-alias.c (nonoverlapping_component_refs_p_1): Break out + from ...; work also on duplicated types. + (nonoverlapping_component_refs_since_match): ... here + (ncr_type_uid): Break out from ... + (ncr_compar): ... here; look for TYPE_UID of canonical type if + available. + (nonoverlapping_component_refs_p): Use same_type_for_tbaa to match + the types and nonoverlapping_component_refs_p_1 to disambiguate. + +2019-07-09 Martin Sebor <msebor@redhat.com> + + PR tree-optimization/90989 + * tree-ssa-strlen.c (handle_char_store): Constrain a single character + optimization to just single character stores. + +2019-07-09 Joern Rennecke <joern.rennecke@riscy-ip.com> + + * tree-vect-stmts.c (vectorizable_comparison) <!slp_node>: + Swap operands only once. + +2019-07-09 Dragan Mladjenovic <dmladjenovic@wavecomp.com> + + * cfgcleanup.c (old_insns_match_p): Check if used hard regs set is equal + for both call instructions. + +2019-07-09 John Darrington <john@darrington.wattle.id.au> + + * simplify-rtx.c (simplify_unary_operation_1): Use GET_MODE_PRECISION + rather than GET_MODE_BITSIZE to better handle partial integer modes. + +2019-07-09 Michael Meissner <meissner@linux.ibm.com> + + * config/rs6000/rs6000-internal.h (create_TOC_reference): Delete. + * config/rs6000/rs6000-logue.c (create_TOC_reference): Move + function from rs6000-logue.c back to rs6000.c. + * config/rs6000/rs6000.c (create_TOC_reference): Likewise. + +2019-07-09 Martin Sebor <msebor@redhat.com> + + PR c++/61339 + * auto-profile.c: Change class-key of PODs to struct and others + to class. + * basic-block.h: Same. + * bitmap.c (bitmap_alloc): Same. + * bitmap.h: Same. + * builtins.c (expand_builtin_prefetch): Same. + (expand_builtin_interclass_mathfn): Same. + (expand_builtin_strlen): Same. + (expand_builtin_mempcpy_args): Same. + (expand_cmpstr): Same. + (expand_builtin___clear_cache): Same. + (expand_ifn_atomic_bit_test_and): Same. + (expand_builtin_thread_pointer): Same. + (expand_builtin_set_thread_pointer): Same. + * caller-save.c (setup_save_areas): Same. + (replace_reg_with_saved_mem): Same. + (insert_restore): Same. + (insert_save): Same. + (add_used_regs): Same. + * cfg.c (get_bb_copy): Same. + (set_loop_copy): Same. + * cfg.h: Same. + * cfganal.h: Same. + * cfgexpand.c (alloc_stack_frame_space): Same. + (add_stack_var): Same. + (add_stack_var_conflict): Same. + (add_scope_conflicts_1): Same. + (update_alias_info_with_stack_vars): Same. + (expand_used_vars): Same. + * cfghooks.c (redirect_edge_and_branch_force): Same. + (delete_basic_block): Same. + (split_edge): Same. + (make_forwarder_block): Same. + (force_nonfallthru): Same. + (duplicate_block): Same. + (lv_flush_pending_stmts): Same. + * cfghooks.h: Same. + * cfgloop.c (flow_loops_cfg_dump): Same. + (flow_loop_nested_p): Same. + (superloop_at_depth): Same. + (get_loop_latch_edges): Same. + (flow_loop_dump): Same. + (flow_loops_dump): Same. + (flow_loops_free): Same. + (flow_loop_nodes_find): Same. + (establish_preds): Same. + (flow_loop_tree_node_add): Same. + (flow_loop_tree_node_remove): Same. + (flow_loops_find): Same. + (find_subloop_latch_edge_by_profile): Same. + (find_subloop_latch_edge_by_ivs): Same. + (mfb_redirect_edges_in_set): Same. + (form_subloop): Same. + (merge_latch_edges): Same. + (disambiguate_multiple_latches): Same. + (disambiguate_loops_with_multiple_latches): Same. + (flow_bb_inside_loop_p): Same. + (glb_enum_p): Same. + (get_loop_body_with_size): Same. + (get_loop_body): Same. + (fill_sons_in_loop): Same. + (get_loop_body_in_dom_order): Same. + (get_loop_body_in_custom_order): Same. + (release_recorded_exits): Same. + (get_loop_exit_edges): Same. + (num_loop_branches): Same. + (remove_bb_from_loops): Same. + (find_common_loop): Same. + (delete_loop): Same. + (cancel_loop): Same. + (verify_loop_structure): Same. + (loop_preheader_edge): Same. + (loop_exit_edge_p): Same. + (single_exit): Same. + (loop_exits_to_bb_p): Same. + (loop_exits_from_bb_p): Same. + (get_loop_location): Same. + (record_niter_bound): Same. + (get_estimated_loop_iterations_int): Same. + (max_stmt_executions_int): Same. + (likely_max_stmt_executions_int): Same. + (get_estimated_loop_iterations): Same. + (get_max_loop_iterations): Same. + (get_max_loop_iterations_int): Same. + (get_likely_max_loop_iterations): Same. + * cfgloop.h (simple_loop_desc): Same. + (get_loop): Same. + (loop_depth): Same. + (loop_outer): Same. + (loop_iterator::next): Same. + (loop_outermost): Same. + * cfgloopanal.c (mark_irreducible_loops): Same. + (num_loop_insns): Same. + (average_num_loop_insns): Same. + (expected_loop_iterations_unbounded): Same. + (expected_loop_iterations): Same. + (mark_loop_exit_edges): Same. + (single_likely_exit): Same. + * cfgloopmanip.c (fix_bb_placement): Same. + (fix_bb_placements): Same. + (remove_path): Same. + (place_new_loop): Same. + (add_loop): Same. + (scale_loop_frequencies): Same. + (scale_loop_profile): Same. + (create_empty_if_region_on_edge): Same. + (create_empty_loop_on_edge): Same. + (loopify): Same. + (unloop): Same. + (fix_loop_placements): Same. + (copy_loop_info): Same. + (duplicate_loop): Same. + (duplicate_subloops): Same. + (loop_redirect_edge): Same. + (can_duplicate_loop_p): Same. + (duplicate_loop_to_header_edge): Same. + (mfb_keep_just): Same. + (has_preds_from_loop): Same. + (create_preheader): Same. + (create_preheaders): Same. + (lv_adjust_loop_entry_edge): Same. + (loop_version): Same. + * cfgloopmanip.h: Same. + * cgraph.h: Same. + * cgraphbuild.c: Same. + * combine.c (make_extraction): Same. + * config/i386/i386-features.c: Same. + * config/i386/i386-features.h: Same. + * config/i386/i386.c (ix86_emit_outlined_ms2sysv_save): Same. + (ix86_emit_outlined_ms2sysv_restore): Same. + (ix86_noce_conversion_profitable_p): Same. + (ix86_init_cost): Same. + (ix86_simd_clone_usable): Same. + * configure.ac (ACX_PROG_CXX_WARNING_OPTS): Add -Wclass-is-pod and + Wstruct-not-pod. + * coretypes.h: Same. + * data-streamer-in.c (string_for_index): Change class-key of PODs + to struct and others to class. + (streamer_read_indexed_string): Same. + (streamer_read_string): Same. + (bp_unpack_indexed_string): Same. + (bp_unpack_string): Same. + (streamer_read_uhwi): Same. + (streamer_read_hwi): Same. + (streamer_read_gcov_count): Same. + (streamer_read_wide_int): Same. + * data-streamer.h (streamer_write_bitpack): Same. + (bp_unpack_value): Same. + (streamer_write_char_stream): Same. + (streamer_write_hwi_in_range): Same. + (streamer_write_record_start): Same. + * ddg.c (create_ddg_dep_from_intra_loop_link): Same. + (add_cross_iteration_register_deps): Same. + (build_intra_loop_deps): Same. + * df-core.c (df_analyze): Same. + (loop_post_order_compute): Same. + (loop_inverted_post_order_compute): Same. + * df-problems.c (df_rd_alloc): Same. + (df_rd_simulate_one_insn): Same. + (df_rd_local_compute): Same. + (df_rd_init_solution): Same. + (df_rd_confluence_n): Same. + (df_rd_transfer_function): Same. + (df_rd_free): Same. + (df_rd_dump_defs_set): Same. + (df_rd_top_dump): Same. + (df_lr_alloc): Same. + (df_lr_reset): Same. + (df_lr_local_compute): Same. + (df_lr_init): Same. + (df_lr_confluence_n): Same. + (df_lr_free): Same. + (df_lr_top_dump): Same. + (df_lr_verify_transfer_functions): Same. + (df_live_alloc): Same. + (df_live_reset): Same. + (df_live_init): Same. + (df_live_confluence_n): Same. + (df_live_finalize): Same. + (df_live_free): Same. + (df_live_top_dump): Same. + (df_live_verify_transfer_functions): Same. + (df_mir_alloc): Same. + (df_mir_reset): Same. + (df_mir_init): Same. + (df_mir_confluence_n): Same. + (df_mir_free): Same. + (df_mir_top_dump): Same. + (df_word_lr_alloc): Same. + (df_word_lr_reset): Same. + (df_word_lr_init): Same. + (df_word_lr_confluence_n): Same. + (df_word_lr_free): Same. + (df_word_lr_top_dump): Same. + (df_md_alloc): Same. + (df_md_simulate_one_insn): Same. + (df_md_reset): Same. + (df_md_init): Same. + (df_md_free): Same. + (df_md_top_dump): Same. + * df-scan.c (df_insn_delete): Same. + (df_insn_rescan): Same. + (df_notes_rescan): Same. + (df_sort_and_compress_mws): Same. + (df_install_mws): Same. + (df_refs_add_to_chains): Same. + (df_ref_create_structure): Same. + (df_ref_record): Same. + (df_def_record_1): Same. + (df_find_hard_reg_defs): Same. + (df_uses_record): Same. + (df_get_conditional_uses): Same. + (df_get_call_refs): Same. + (df_recompute_luids): Same. + (df_get_entry_block_def_set): Same. + (df_entry_block_defs_collect): Same. + (df_get_exit_block_use_set): Same. + (df_exit_block_uses_collect): Same. + (df_mws_verify): Same. + (df_bb_verify): Same. + * df.h (df_scan_get_bb_info): Same. + * doc/tm.texi: Same. + * dse.c (record_store): Same. + * dumpfile.h: Same. + * emit-rtl.c (const_fixed_hasher::equal): Same. + (set_mem_attributes_minus_bitpos): Same. + (change_address): Same. + (adjust_address_1): Same. + (offset_address): Same. + * emit-rtl.h: Same. + * except.c (dw2_build_landing_pads): Same. + (sjlj_emit_dispatch_table): Same. + * explow.c (allocate_dynamic_stack_space): Same. + (emit_stack_probe): Same. + (probe_stack_range): Same. + * expmed.c (store_bit_field_using_insv): Same. + (store_bit_field_1): Same. + (store_integral_bit_field): Same. + (extract_bit_field_using_extv): Same. + (extract_bit_field_1): Same. + (emit_cstore): Same. + * expr.c (emit_block_move_via_cpymem): Same. + (expand_cmpstrn_or_cmpmem): Same. + (set_storage_via_setmem): Same. + (emit_single_push_insn_1): Same. + (expand_assignment): Same. + (store_constructor): Same. + (expand_expr_real_2): Same. + (expand_expr_real_1): Same. + (try_casesi): Same. + * flags.h: Same. + * function.c (try_fit_stack_local): Same. + (assign_stack_local_1): Same. + (assign_stack_local): Same. + (cut_slot_from_list): Same. + (insert_slot_to_list): Same. + (max_slot_level): Same. + (move_slot_to_level): Same. + (temp_address_hasher::equal): Same. + (remove_unused_temp_slot_addresses): Same. + (assign_temp): Same. + (combine_temp_slots): Same. + (update_temp_slot_address): Same. + (preserve_temp_slots): Same. + * function.h: Same. + * fwprop.c: Same. + * gcc-rich-location.h: Same. + * gcov.c: Same. + * genattrtab.c (check_attr_test): Same. + (check_attr_value): Same. + (convert_set_attr_alternative): Same. + (convert_set_attr): Same. + (check_defs): Same. + (copy_boolean): Same. + (get_attr_value): Same. + (expand_delays): Same. + (make_length_attrs): Same. + (min_fn): Same. + (make_alternative_compare): Same. + (simplify_test_exp): Same. + (tests_attr_p): Same. + (get_attr_order): Same. + (clear_struct_flag): Same. + (gen_attr): Same. + (compares_alternatives_p): Same. + (gen_insn): Same. + (gen_delay): Same. + (find_attrs_to_cache): Same. + (write_test_expr): Same. + (walk_attr_value): Same. + (write_attr_get): Same. + (eliminate_known_true): Same. + (write_insn_cases): Same. + (write_attr_case): Same. + (write_attr_valueq): Same. + (write_attr_value): Same. + (write_dummy_eligible_delay): Same. + (next_comma_elt): Same. + (find_attr): Same. + (make_internal_attr): Same. + (copy_rtx_unchanging): Same. + (gen_insn_reserv): Same. + (check_tune_attr): Same. + (make_automaton_attrs): Same. + (handle_arg): Same. + * genextract.c (gen_insn): Same. + (VEC_char_to_string): Same. + * genmatch.c (print_operand): Same. + (lower): Same. + (parser::parse_operation): Same. + (parser::parse_capture): Same. + (parser::parse_c_expr): Same. + (parser::parse_simplify): Same. + (main): Same. + * genoutput.c (output_operand_data): Same. + (output_get_insn_name): Same. + (compare_operands): Same. + (place_operands): Same. + (process_template): Same. + (validate_insn_alternatives): Same. + (validate_insn_operands): Same. + (gen_expand): Same. + (note_constraint): Same. + * genpreds.c (write_one_predicate_function): Same. + (add_constraint): Same. + (process_define_register_constraint): Same. + (write_lookup_constraint_1): Same. + (write_lookup_constraint_array): Same. + (write_insn_constraint_len): Same. + (write_reg_class_for_constraint_1): Same. + (write_constraint_satisfied_p_array): Same. + * genrecog.c (optimize_subroutine_group): Same. + * gensupport.c (process_define_predicate): Same. + (queue_pattern): Same. + (remove_from_queue): Same. + (process_rtx): Same. + (is_predicable): Same. + (change_subst_attribute): Same. + (subst_pattern_match): Same. + (alter_constraints): Same. + (alter_attrs_for_insn): Same. + (shift_output_template): Same. + (alter_output_for_subst_insn): Same. + (process_one_cond_exec): Same. + (subst_dup): Same. + (process_define_cond_exec): Same. + (mnemonic_htab_callback): Same. + (gen_mnemonic_attr): Same. + (read_md_rtx): Same. + * ggc-page.c: Same. + * gimple-loop-interchange.cc (dump_reduction): Same. + (dump_induction): Same. + (loop_cand::~loop_cand): Same. + (free_data_refs_with_aux): Same. + (tree_loop_interchange::interchange_loops): Same. + (tree_loop_interchange::map_inductions_to_loop): Same. + (tree_loop_interchange::move_code_to_inner_loop): Same. + (compute_access_stride): Same. + (compute_access_strides): Same. + (proper_loop_form_for_interchange): Same. + (tree_loop_interchange_compute_ddrs): Same. + (prune_datarefs_not_in_loop): Same. + (prepare_data_references): Same. + (pass_linterchange::execute): Same. + * gimple-loop-jam.c (bb_prevents_fusion_p): Same. + (unroll_jam_possible_p): Same. + (fuse_loops): Same. + (adjust_unroll_factor): Same. + (tree_loop_unroll_and_jam): Same. + * gimple-loop-versioning.cc (loop_versioning::~loop_versioning): Same. + (loop_versioning::expensive_stmt_p): Same. + (loop_versioning::version_for_unity): Same. + (loop_versioning::dump_inner_likelihood): Same. + (loop_versioning::find_per_loop_multiplication): Same. + (loop_versioning::analyze_term_using_scevs): Same. + (loop_versioning::record_address_fragment): Same. + (loop_versioning::analyze_expr): Same. + (loop_versioning::analyze_blocks): Same. + (loop_versioning::prune_conditions): Same. + (loop_versioning::merge_loop_info): Same. + (loop_versioning::add_loop_to_queue): Same. + (loop_versioning::decide_whether_loop_is_versionable): Same. + (loop_versioning::make_versioning_decisions): Same. + (loop_versioning::implement_versioning_decisions): Same. + * gimple-ssa-evrp-analyze.c + (evrp_range_analyzer::record_ranges_from_phis): Same. + * gimple-ssa-store-merging.c (split_store::split_store): Same. + (count_multiple_uses): Same. + (split_group): Same. + (imm_store_chain_info::output_merged_store): Same. + (pass_store_merging::process_store): Same. + * gimple-ssa-strength-reduction.c (slsr_process_phi): Same. + * gimple-ssa-warn-alloca.c (adjusted_warn_limit): Same. + (is_max): Same. + (alloca_call_type): Same. + (pass_walloca::execute): Same. + * gimple-streamer-in.c (input_phi): Same. + (input_gimple_stmt): Same. + * gimple-streamer.h: Same. + * godump.c (go_force_record_alignment): Same. + (go_format_type): Same. + (go_output_type): Same. + (go_output_fndecl): Same. + (go_output_typedef): Same. + (keyword_hash_init): Same. + (find_dummy_types): Same. + * graph.c (draw_cfg_nodes_no_loops): Same. + (draw_cfg_nodes_for_loop): Same. + * hard-reg-set.h (hard_reg_set_iter_next): Same. + * hsa-brig.c: Same. + * hsa-common.h (hsa_internal_fn_hasher::equal): Same. + * hsa-dump.c (dump_hsa_cfun): Same. + * hsa-gen.c (gen_function_def_parameters): Same. + * hsa-regalloc.c (dump_hsa_cfun_regalloc): Same. + * input.c (dump_line_table_statistics): Same. + (test_lexer): Same. + * input.h: Same. + * internal-fn.c (get_multi_vector_move): Same. + (expand_load_lanes_optab_fn): Same. + (expand_GOMP_SIMT_ENTER_ALLOC): Same. + (expand_GOMP_SIMT_EXIT): Same. + (expand_GOMP_SIMT_LAST_LANE): Same. + (expand_GOMP_SIMT_ORDERED_PRED): Same. + (expand_GOMP_SIMT_VOTE_ANY): Same. + (expand_GOMP_SIMT_XCHG_BFLY): Same. + (expand_GOMP_SIMT_XCHG_IDX): Same. + (expand_addsub_overflow): Same. + (expand_neg_overflow): Same. + (expand_mul_overflow): Same. + (expand_call_mem_ref): Same. + (expand_mask_load_optab_fn): Same. + (expand_scatter_store_optab_fn): Same. + (expand_gather_load_optab_fn): Same. + * ipa-cp.c (ipa_get_parm_lattices): Same. + (print_all_lattices): Same. + (ignore_edge_p): Same. + (build_toporder_info): Same. + (free_toporder_info): Same. + (push_node_to_stack): Same. + (ipcp_lattice<valtype>::set_contains_variable): Same. + (set_agg_lats_to_bottom): Same. + (ipcp_bits_lattice::meet_with): Same. + (set_single_call_flag): Same. + (initialize_node_lattices): Same. + (ipa_get_jf_ancestor_result): Same. + (ipcp_verify_propagated_values): Same. + (propagate_scalar_across_jump_function): Same. + (propagate_context_across_jump_function): Same. + (propagate_bits_across_jump_function): Same. + (ipa_vr_operation_and_type_effects): Same. + (propagate_vr_across_jump_function): Same. + (set_check_aggs_by_ref): Same. + (set_chain_of_aglats_contains_variable): Same. + (merge_aggregate_lattices): Same. + (agg_pass_through_permissible_p): Same. + (propagate_aggs_across_jump_function): Same. + (call_passes_through_thunk_p): Same. + (propagate_constants_across_call): Same. + (devirtualization_time_bonus): Same. + (good_cloning_opportunity_p): Same. + (context_independent_aggregate_values): Same. + (gather_context_independent_values): Same. + (perform_estimation_of_a_value): Same. + (estimate_local_effects): Same. + (value_topo_info<valtype>::add_val): Same. + (add_all_node_vals_to_toposort): Same. + (value_topo_info<valtype>::propagate_effects): Same. + (ipcp_propagate_stage): Same. + (ipcp_discover_new_direct_edges): Same. + (same_node_or_its_all_contexts_clone_p): Same. + (cgraph_edge_brings_value_p): Same. + (gather_edges_for_value): Same. + (create_specialized_node): Same. + (find_more_scalar_values_for_callers_subset): Same. + (find_more_contexts_for_caller_subset): Same. + (copy_plats_to_inter): Same. + (intersect_aggregates_with_edge): Same. + (find_aggregate_values_for_callers_subset): Same. + (cgraph_edge_brings_all_agg_vals_for_node): Same. + (decide_about_value): Same. + (decide_whether_version_node): Same. + (spread_undeadness): Same. + (identify_dead_nodes): Same. + (ipcp_store_vr_results): Same. + * ipa-devirt.c (final_warning_record::grow_type_warnings): Same. + * ipa-fnsummary.c (ipa_fn_summary::account_size_time): Same. + (redirect_to_unreachable): Same. + (edge_set_predicate): Same. + (evaluate_conditions_for_known_args): Same. + (evaluate_properties_for_edge): Same. + (ipa_fn_summary_t::duplicate): Same. + (ipa_call_summary_t::duplicate): Same. + (dump_ipa_call_summary): Same. + (ipa_dump_fn_summary): Same. + (eliminated_by_inlining_prob): Same. + (set_cond_stmt_execution_predicate): Same. + (set_switch_stmt_execution_predicate): Same. + (compute_bb_predicates): Same. + (will_be_nonconstant_expr_predicate): Same. + (phi_result_unknown_predicate): Same. + (analyze_function_body): Same. + (compute_fn_summary): Same. + (estimate_edge_devirt_benefit): Same. + (estimate_edge_size_and_time): Same. + (estimate_calls_size_and_time): Same. + (estimate_node_size_and_time): Same. + (remap_edge_change_prob): Same. + (remap_edge_summaries): Same. + (ipa_merge_fn_summary_after_inlining): Same. + (ipa_fn_summary_generate): Same. + (inline_read_section): Same. + (ipa_fn_summary_read): Same. + (ipa_fn_summary_write): Same. + * ipa-fnsummary.h: Same. + * ipa-hsa.c (ipa_hsa_read_section): Same. + * ipa-icf-gimple.c (func_checker::compare_loops): Same. + * ipa-icf.c (sem_function::param_used_p): Same. + * ipa-inline-analysis.c (do_estimate_edge_time): Same. + * ipa-inline.c (edge_badness): Same. + (inline_small_functions): Same. + * ipa-polymorphic-call.c + (ipa_polymorphic_call_context::stream_out): Same. + * ipa-predicate.c (predicate::remap_after_duplication): Same. + (predicate::remap_after_inlining): Same. + (predicate::stream_out): Same. + * ipa-predicate.h: Same. + * ipa-profile.c (ipa_profile_read_summary): Same. + * ipa-prop.c (ipa_get_param_decl_index_1): Same. + (count_formal_params): Same. + (ipa_dump_param): Same. + (ipa_alloc_node_params): Same. + (ipa_print_node_jump_functions_for_edge): Same. + (ipa_print_node_jump_functions): Same. + (ipa_load_from_parm_agg): Same. + (get_ancestor_addr_info): Same. + (ipa_compute_jump_functions_for_edge): Same. + (ipa_analyze_virtual_call_uses): Same. + (ipa_analyze_stmt_uses): Same. + (ipa_analyze_params_uses_in_bb): Same. + (update_jump_functions_after_inlining): Same. + (try_decrement_rdesc_refcount): Same. + (ipa_impossible_devirt_target): Same. + (update_indirect_edges_after_inlining): Same. + (combine_controlled_uses_counters): Same. + (ipa_edge_args_sum_t::duplicate): Same. + (ipa_write_jump_function): Same. + (ipa_write_indirect_edge_info): Same. + (ipa_write_node_info): Same. + (ipa_read_edge_info): Same. + (ipa_prop_read_section): Same. + (read_replacements_section): Same. + * ipa-prop.h (ipa_get_param_count): Same. + (ipa_get_param): Same. + (ipa_get_type): Same. + (ipa_get_param_move_cost): Same. + (ipa_set_param_used): Same. + (ipa_get_controlled_uses): Same. + (ipa_set_controlled_uses): Same. + (ipa_get_cs_argument_count): Same. + * ipa-pure-const.c (analyze_function): Same. + (pure_const_read_summary): Same. + * ipa-ref.h: Same. + * ipa-reference.c (ipa_reference_read_optimization_summary): Same. + * ipa-split.c (test_nonssa_use): Same. + (dump_split_point): Same. + (dominated_by_forbidden): Same. + (split_part_set_ssa_name_p): Same. + (find_split_points): Same. + * ira-build.c (finish_loop_tree_nodes): Same. + (low_pressure_loop_node_p): Same. + * ira-color.c (ira_reuse_stack_slot): Same. + * ira-int.h: Same. + * ira.c (setup_reg_equiv): Same. + (print_insn_chain): Same. + (ira): Same. + * loop-doloop.c (doloop_condition_get): Same. + (add_test): Same. + (record_reg_sets): Same. + (doloop_optimize): Same. + * loop-init.c (loop_optimizer_init): Same. + (fix_loop_structure): Same. + * loop-invariant.c (merge_identical_invariants): Same. + (compute_always_reached): Same. + (find_exits): Same. + (may_assign_reg_p): Same. + (find_invariants_bb): Same. + (find_invariants_body): Same. + (replace_uses): Same. + (can_move_invariant_reg): Same. + (free_inv_motion_data): Same. + (move_single_loop_invariants): Same. + (change_pressure): Same. + (mark_ref_regs): Same. + (calculate_loop_reg_pressure): Same. + * loop-iv.c (biv_entry_hasher::equal): Same. + (iv_extend_to_rtx_code): Same. + (check_iv_ref_table_size): Same. + (clear_iv_info): Same. + (latch_dominating_def): Same. + (iv_get_reaching_def): Same. + (iv_constant): Same. + (iv_subreg): Same. + (iv_extend): Same. + (iv_neg): Same. + (iv_add): Same. + (iv_mult): Same. + (get_biv_step): Same. + (record_iv): Same. + (analyzed_for_bivness_p): Same. + (record_biv): Same. + (iv_analyze_biv): Same. + (iv_analyze_expr): Same. + (iv_analyze_def): Same. + (iv_analyze_op): Same. + (iv_analyze): Same. + (iv_analyze_result): Same. + (biv_p): Same. + (eliminate_implied_conditions): Same. + (simplify_using_initial_values): Same. + (shorten_into_mode): Same. + (canonicalize_iv_subregs): Same. + (determine_max_iter): Same. + (check_simple_exit): Same. + (find_simple_exit): Same. + (get_simple_loop_desc): Same. + * loop-unroll.c (report_unroll): Same. + (decide_unrolling): Same. + (unroll_loops): Same. + (loop_exit_at_end_p): Same. + (decide_unroll_constant_iterations): Same. + (unroll_loop_constant_iterations): Same. + (compare_and_jump_seq): Same. + (unroll_loop_runtime_iterations): Same. + (decide_unroll_stupid): Same. + (unroll_loop_stupid): Same. + (referenced_in_one_insn_in_loop_p): Same. + (reset_debug_uses_in_loop): Same. + (analyze_iv_to_split_insn): Same. + * lra-eliminations.c (lra_debug_elim_table): Same. + (setup_can_eliminate): Same. + (form_sum): Same. + (lra_get_elimination_hard_regno): Same. + (lra_eliminate_regs_1): Same. + (eliminate_regs_in_insn): Same. + (update_reg_eliminate): Same. + (init_elimination): Same. + (lra_eliminate): Same. + * lra-int.h: Same. + * lra-lives.c (initiate_live_solver): Same. + * lra-remat.c (create_remat_bb_data): Same. + * lra-spills.c (lra_spill): Same. + * lra.c (lra_set_insn_recog_data): Same. + (lra_set_used_insn_alternative_by_uid): Same. + (init_reg_info): Same. + (expand_reg_info): Same. + * lto-cgraph.c (output_symtab): Same. + (read_identifier): Same. + (get_alias_symbol): Same. + (input_node): Same. + (input_varpool_node): Same. + (input_ref): Same. + (input_edge): Same. + (input_cgraph_1): Same. + (input_refs): Same. + (input_symtab): Same. + (input_offload_tables): Same. + (output_cgraph_opt_summary): Same. + (input_edge_opt_summary): Same. + (input_cgraph_opt_section): Same. + * lto-section-in.c (lto_free_raw_section_data): Same. + (lto_create_simple_input_block): Same. + (lto_free_function_in_decl_state_for_node): Same. + * lto-streamer-in.c (lto_tag_check_set): Same. + (lto_location_cache::revert_location_cache): Same. + (lto_location_cache::input_location): Same. + (lto_input_location): Same. + (stream_input_location_now): Same. + (lto_input_tree_ref): Same. + (lto_input_eh_catch_list): Same. + (input_eh_region): Same. + (lto_init_eh): Same. + (make_new_block): Same. + (input_cfg): Same. + (fixup_call_stmt_edges): Same. + (input_struct_function_base): Same. + (input_function): Same. + (lto_read_body_or_constructor): Same. + (lto_read_tree_1): Same. + (lto_read_tree): Same. + (lto_input_scc): Same. + (lto_input_tree_1): Same. + (lto_input_toplevel_asms): Same. + (lto_input_mode_table): Same. + (lto_reader_init): Same. + (lto_data_in_create): Same. + * lto-streamer-out.c (output_cfg): Same. + * lto-streamer.h: Same. + * modulo-sched.c (duplicate_insns_of_cycles): Same. + (generate_prolog_epilog): Same. + (mark_loop_unsched): Same. + (dump_insn_location): Same. + (loop_canon_p): Same. + (sms_schedule): Same. + * omp-expand.c (expand_omp_for_ordered_loops): Same. + (expand_omp_for_generic): Same. + (expand_omp_for_static_nochunk): Same. + (expand_omp_for_static_chunk): Same. + (expand_omp_simd): Same. + (expand_omp_taskloop_for_inner): Same. + (expand_oacc_for): Same. + (expand_omp_atomic_pipeline): Same. + (mark_loops_in_oacc_kernels_region): Same. + * omp-offload.c (oacc_xform_loop): Same. + * omp-simd-clone.c (simd_clone_adjust): Same. + * optabs-query.c (get_traditional_extraction_insn): Same. + * optabs.c (expand_vector_broadcast): Same. + (expand_binop_directly): Same. + (expand_twoval_unop): Same. + (expand_twoval_binop): Same. + (expand_unop_direct): Same. + (emit_indirect_jump): Same. + (emit_conditional_move): Same. + (emit_conditional_neg_or_complement): Same. + (emit_conditional_add): Same. + (vector_compare_rtx): Same. + (expand_vec_perm_1): Same. + (expand_vec_perm_const): Same. + (expand_vec_cond_expr): Same. + (expand_vec_series_expr): Same. + (maybe_emit_atomic_exchange): Same. + (maybe_emit_sync_lock_test_and_set): Same. + (expand_atomic_compare_and_swap): Same. + (expand_atomic_load): Same. + (expand_atomic_store): Same. + (maybe_emit_op): Same. + (valid_multiword_target_p): Same. + (create_integer_operand): Same. + (maybe_legitimize_operand_same_code): Same. + (maybe_legitimize_operand): Same. + (create_convert_operand_from_type): Same. + (can_reuse_operands_p): Same. + (maybe_legitimize_operands): Same. + (maybe_gen_insn): Same. + (maybe_expand_insn): Same. + (maybe_expand_jump_insn): Same. + (expand_insn): Same. + * optabs.h (create_expand_operand): Same. + (create_fixed_operand): Same. + (create_output_operand): Same. + (create_input_operand): Same. + (create_convert_operand_to): Same. + (create_convert_operand_from): Same. + * optinfo.h: Same. + * poly-int.h: Same. + * predict.c (optimize_insn_for_speed_p): Same. + (optimize_loop_for_size_p): Same. + (optimize_loop_for_speed_p): Same. + (optimize_loop_nest_for_speed_p): Same. + (get_base_value): Same. + (predicted_by_loop_heuristics_p): Same. + (predict_extra_loop_exits): Same. + (predict_loops): Same. + (predict_paths_for_bb): Same. + (predict_paths_leading_to): Same. + (propagate_freq): Same. + (pass_profile::execute): Same. + * predict.h: Same. + * profile-count.c (profile_count::differs_from_p): Same. + (profile_probability::differs_lot_from_p): Same. + * profile-count.h: Same. + * profile.c (branch_prob): Same. + * regrename.c (free_chain_data): Same. + (mark_conflict): Same. + (create_new_chain): Same. + (merge_overlapping_regs): Same. + (init_rename_info): Same. + (merge_chains): Same. + (regrename_analyze): Same. + (regrename_do_replace): Same. + (scan_rtx_reg): Same. + (record_out_operands): Same. + (build_def_use): Same. + * regrename.h: Same. + * reload.h: Same. + * reload1.c (init_reload): Same. + (maybe_fix_stack_asms): Same. + (copy_reloads): Same. + (count_pseudo): Same. + (count_spilled_pseudo): Same. + (find_reg): Same. + (find_reload_regs): Same. + (select_reload_regs): Same. + (spill_hard_reg): Same. + (fixup_eh_region_note): Same. + (set_reload_reg): Same. + (allocate_reload_reg): Same. + (compute_reload_subreg_offset): Same. + (reload_adjust_reg_for_icode): Same. + (emit_input_reload_insns): Same. + (emit_output_reload_insns): Same. + (do_input_reload): Same. + (inherit_piecemeal_p): Same. + * rtl.h: Same. + * sanopt.c (maybe_get_dominating_check): Same. + (maybe_optimize_ubsan_ptr_ifn): Same. + (can_remove_asan_check): Same. + (maybe_optimize_asan_check_ifn): Same. + (sanopt_optimize_walker): Same. + * sched-deps.c (add_dependence_list): Same. + (chain_to_prev_insn): Same. + (add_insn_mem_dependence): Same. + (create_insn_reg_set): Same. + (maybe_extend_reg_info_p): Same. + (sched_analyze_reg): Same. + (sched_analyze_1): Same. + (get_implicit_reg_pending_clobbers): Same. + (chain_to_prev_insn_p): Same. + (deps_analyze_insn): Same. + (deps_start_bb): Same. + (sched_free_deps): Same. + (init_deps): Same. + (init_deps_reg_last): Same. + (free_deps): Same. + * sched-ebb.c: Same. + * sched-int.h: Same. + * sched-rgn.c (add_branch_dependences): Same. + (concat_insn_mem_list): Same. + (deps_join): Same. + (sched_rgn_compute_dependencies): Same. + * sel-sched-ir.c (reset_target_context): Same. + (copy_deps_context): Same. + (init_id_from_df): Same. + (has_dependence_p): Same. + (change_loops_latches): Same. + (bb_top_order_comparator): Same. + (make_region_from_loop_preheader): Same. + (sel_init_pipelining): Same. + (get_loop_nest_for_rgn): Same. + (make_regions_from_the_rest): Same. + (sel_is_loop_preheader_p): Same. + * sel-sched-ir.h (inner_loop_header_p): Same. + (get_all_loop_exits): Same. + * selftest.h: Same. + * sese.c (sese_build_liveouts): Same. + (sese_insert_phis_for_liveouts): Same. + * sese.h (defined_in_sese_p): Same. + * sreal.c (sreal::stream_out): Same. + * sreal.h: Same. + * streamer-hooks.h: Same. + * target-globals.c (save_target_globals): Same. + * target-globals.h: Same. + * target.def: Same. + * target.h: Same. + * targhooks.c (default_has_ifunc_p): Same. + (default_empty_mask_is_expensive): Same. + (default_init_cost): Same. + * targhooks.h: Same. + * toplev.c: Same. + * tree-affine.c (aff_combination_mult): Same. + (aff_combination_expand): Same. + (aff_combination_constant_multiple_p): Same. + * tree-affine.h: Same. + * tree-cfg.c (build_gimple_cfg): Same. + (replace_loop_annotate_in_block): Same. + (replace_uses_by): Same. + (remove_bb): Same. + (dump_cfg_stats): Same. + (gimple_duplicate_sese_region): Same. + (gimple_duplicate_sese_tail): Same. + (move_block_to_fn): Same. + (replace_block_vars_by_duplicates): Same. + (move_sese_region_to_fn): Same. + (print_loops_bb): Same. + (print_loop): Same. + (print_loops): Same. + (debug): Same. + (debug_loops): Same. + * tree-cfg.h: Same. + * tree-chrec.c (chrec_fold_plus_poly_poly): Same. + (chrec_fold_multiply_poly_poly): Same. + (chrec_evaluate): Same. + (chrec_component_in_loop_num): Same. + (reset_evolution_in_loop): Same. + (is_multivariate_chrec): Same. + (chrec_contains_symbols): Same. + (nb_vars_in_chrec): Same. + (chrec_convert_1): Same. + (chrec_convert_aggressive): Same. + * tree-chrec.h: Same. + * tree-core.h: Same. + * tree-data-ref.c (dump_data_dependence_relation): Same. + (canonicalize_base_object_address): Same. + (data_ref_compare_tree): Same. + (prune_runtime_alias_test_list): Same. + (get_segment_min_max): Same. + (create_intersect_range_checks): Same. + (conflict_fn_no_dependence): Same. + (object_address_invariant_in_loop_p): Same. + (analyze_ziv_subscript): Same. + (analyze_siv_subscript_cst_affine): Same. + (analyze_miv_subscript): Same. + (analyze_overlapping_iterations): Same. + (build_classic_dist_vector_1): Same. + (add_other_self_distances): Same. + (same_access_functions): Same. + (build_classic_dir_vector): Same. + (subscript_dependence_tester_1): Same. + (subscript_dependence_tester): Same. + (access_functions_are_affine_or_constant_p): Same. + (get_references_in_stmt): Same. + (loop_nest_has_data_refs): Same. + (graphite_find_data_references_in_stmt): Same. + (find_data_references_in_bb): Same. + (get_base_for_alignment): Same. + (find_loop_nest_1): Same. + (find_loop_nest): Same. + * tree-data-ref.h (dr_alignment): Same. + (ddr_dependence_level): Same. + * tree-if-conv.c (fold_build_cond_expr): Same. + (add_to_predicate_list): Same. + (add_to_dst_predicate_list): Same. + (phi_convertible_by_degenerating_args): Same. + (idx_within_array_bound): Same. + (all_preds_critical_p): Same. + (pred_blocks_visited_p): Same. + (predicate_bbs): Same. + (build_region): Same. + (if_convertible_loop_p_1): Same. + (is_cond_scalar_reduction): Same. + (predicate_scalar_phi): Same. + (remove_conditions_and_labels): Same. + (combine_blocks): Same. + (version_loop_for_if_conversion): Same. + (versionable_outer_loop_p): Same. + (ifcvt_local_dce): Same. + (tree_if_conversion): Same. + (pass_if_conversion::gate): Same. + * tree-if-conv.h: Same. + * tree-inline.c (maybe_move_debug_stmts_to_successors): Same. + * tree-loop-distribution.c (bb_top_order_cmp): Same. + (free_rdg): Same. + (stmt_has_scalar_dependences_outside_loop): Same. + (copy_loop_before): Same. + (create_bb_after_loop): Same. + (const_with_all_bytes_same): Same. + (generate_memset_builtin): Same. + (generate_memcpy_builtin): Same. + (destroy_loop): Same. + (build_rdg_partition_for_vertex): Same. + (compute_access_range): Same. + (data_ref_segment_size): Same. + (latch_dominated_by_data_ref): Same. + (compute_alias_check_pairs): Same. + (fuse_memset_builtins): Same. + (finalize_partitions): Same. + (find_seed_stmts_for_distribution): Same. + (prepare_perfect_loop_nest): Same. + * tree-parloops.c (lambda_transform_legal_p): Same. + (loop_parallel_p): Same. + (reduc_stmt_res): Same. + (add_field_for_name): Same. + (create_call_for_reduction_1): Same. + (replace_uses_in_bb_by): Same. + (transform_to_exit_first_loop_alt): Same. + (try_transform_to_exit_first_loop_alt): Same. + (transform_to_exit_first_loop): Same. + (num_phis): Same. + (gen_parallel_loop): Same. + (gather_scalar_reductions): Same. + (get_omp_data_i_param): Same. + (try_create_reduction_list): Same. + (oacc_entry_exit_single_gang): Same. + (parallelize_loops): Same. + * tree-pass.h: Same. + * tree-predcom.c (determine_offset): Same. + (last_always_executed_block): Same. + (split_data_refs_to_components): Same. + (suitable_component_p): Same. + (valid_initializer_p): Same. + (find_looparound_phi): Same. + (insert_looparound_copy): Same. + (add_looparound_copies): Same. + (determine_roots_comp): Same. + (predcom_tmp_var): Same. + (initialize_root_vars): Same. + (initialize_root_vars_store_elim_1): Same. + (initialize_root_vars_store_elim_2): Same. + (finalize_eliminated_stores): Same. + (initialize_root_vars_lm): Same. + (remove_stmt): Same. + (determine_unroll_factor): Same. + (execute_pred_commoning_cbck): Same. + (base_names_in_chain_on): Same. + (combine_chains): Same. + (pcom_stmt_dominates_stmt_p): Same. + (try_combine_chains): Same. + (prepare_initializers_chain_store_elim): Same. + (prepare_initializers_chain): Same. + (prepare_initializers): Same. + (prepare_finalizers_chain): Same. + (prepare_finalizers): Same. + (insert_init_seqs): Same. + * tree-scalar-evolution.c (loop_phi_node_p): Same. + (compute_overall_effect_of_inner_loop): Same. + (add_to_evolution_1): Same. + (add_to_evolution): Same. + (follow_ssa_edge_binary): Same. + (follow_ssa_edge_expr): Same. + (backedge_phi_arg_p): Same. + (follow_ssa_edge_in_condition_phi_branch): Same. + (follow_ssa_edge_in_condition_phi): Same. + (follow_ssa_edge_inner_loop_phi): Same. + (follow_ssa_edge): Same. + (analyze_evolution_in_loop): Same. + (analyze_initial_condition): Same. + (interpret_loop_phi): Same. + (interpret_condition_phi): Same. + (interpret_rhs_expr): Same. + (interpret_expr): Same. + (interpret_gimple_assign): Same. + (analyze_scalar_evolution_1): Same. + (analyze_scalar_evolution): Same. + (analyze_scalar_evolution_for_address_of): Same. + (get_instantiated_value_entry): Same. + (loop_closed_phi_def): Same. + (instantiate_scev_name): Same. + (instantiate_scev_poly): Same. + (instantiate_scev_binary): Same. + (instantiate_scev_convert): Same. + (instantiate_scev_not): Same. + (instantiate_scev_r): Same. + (instantiate_scev): Same. + (resolve_mixers): Same. + (initialize_scalar_evolutions_analyzer): Same. + (scev_reset_htab): Same. + (scev_reset): Same. + (derive_simple_iv_with_niters): Same. + (simple_iv_with_niters): Same. + (expression_expensive_p): Same. + (final_value_replacement_loop): Same. + * tree-scalar-evolution.h (block_before_loop): Same. + * tree-ssa-address.h: Same. + * tree-ssa-dce.c (find_obviously_necessary_stmts): Same. + * tree-ssa-dom.c (edge_info::record_simple_equiv): Same. + (record_edge_info): Same. + * tree-ssa-live.c (var_map_base_fini): Same. + (remove_unused_locals): Same. + * tree-ssa-live.h: Same. + * tree-ssa-loop-ch.c (should_duplicate_loop_header_p): Same. + (pass_ch_vect::execute): Same. + (pass_ch::process_loop_p): Same. + * tree-ssa-loop-im.c (mem_ref_hasher::hash): Same. + (movement_possibility): Same. + (outermost_invariant_loop): Same. + (stmt_cost): Same. + (determine_max_movement): Same. + (invariantness_dom_walker::before_dom_children): Same. + (move_computations): Same. + (may_move_till): Same. + (force_move_till_op): Same. + (force_move_till): Same. + (memref_free): Same. + (record_mem_ref_loc): Same. + (set_ref_stored_in_loop): Same. + (mark_ref_stored): Same. + (sort_bbs_in_loop_postorder_cmp): Same. + (sort_locs_in_loop_postorder_cmp): Same. + (analyze_memory_references): Same. + (mem_refs_may_alias_p): Same. + (find_ref_loc_in_loop_cmp): Same. + (rewrite_mem_ref_loc::operator): Same. + (first_mem_ref_loc_1::operator): Same. + (sm_set_flag_if_changed::operator): Same. + (execute_sm_if_changed_flag_set): Same. + (execute_sm): Same. + (hoist_memory_references): Same. + (ref_always_accessed::operator): Same. + (refs_independent_p): Same. + (record_dep_loop): Same. + (ref_indep_loop_p_1): Same. + (ref_indep_loop_p): Same. + (can_sm_ref_p): Same. + (find_refs_for_sm): Same. + (loop_suitable_for_sm): Same. + (store_motion_loop): Same. + (store_motion): Same. + (fill_always_executed_in): Same. + * tree-ssa-loop-ivcanon.c (constant_after_peeling): Same. + (estimated_unrolled_size): Same. + (loop_edge_to_cancel): Same. + (remove_exits_and_undefined_stmts): Same. + (remove_redundant_iv_tests): Same. + (unloop_loops): Same. + (estimated_peeled_sequence_size): Same. + (try_peel_loop): Same. + (canonicalize_loop_induction_variables): Same. + (canonicalize_induction_variables): Same. + * tree-ssa-loop-ivopts.c (iv_inv_expr_hasher::equal): Same. + (name_info): Same. + (stmt_after_inc_pos): Same. + (contains_abnormal_ssa_name_p): Same. + (niter_for_exit): Same. + (find_bivs): Same. + (mark_bivs): Same. + (find_givs_in_bb): Same. + (find_induction_variables): Same. + (find_interesting_uses_cond): Same. + (outermost_invariant_loop_for_expr): Same. + (idx_find_step): Same. + (add_candidate_1): Same. + (add_iv_candidate_derived_from_uses): Same. + (alloc_use_cost_map): Same. + (prepare_decl_rtl): Same. + (generic_predict_doloop_p): Same. + (computation_cost): Same. + (determine_common_wider_type): Same. + (get_computation_aff_1): Same. + (get_use_type): Same. + (determine_group_iv_cost_address): Same. + (iv_period): Same. + (difference_cannot_overflow_p): Same. + (may_eliminate_iv): Same. + (determine_set_costs): Same. + (cheaper_cost_pair): Same. + (compare_cost_pair): Same. + (iv_ca_cand_for_group): Same. + (iv_ca_recount_cost): Same. + (iv_ca_set_remove_invs): Same. + (iv_ca_set_no_cp): Same. + (iv_ca_set_add_invs): Same. + (iv_ca_set_cp): Same. + (iv_ca_add_group): Same. + (iv_ca_cost): Same. + (iv_ca_compare_deps): Same. + (iv_ca_delta_reverse): Same. + (iv_ca_delta_commit): Same. + (iv_ca_cand_used_p): Same. + (iv_ca_delta_free): Same. + (iv_ca_new): Same. + (iv_ca_free): Same. + (iv_ca_dump): Same. + (iv_ca_extend): Same. + (iv_ca_narrow): Same. + (iv_ca_prune): Same. + (cheaper_cost_with_cand): Same. + (iv_ca_replace): Same. + (try_add_cand_for): Same. + (get_initial_solution): Same. + (try_improve_iv_set): Same. + (find_optimal_iv_set_1): Same. + (create_new_iv): Same. + (rewrite_use_compare): Same. + (remove_unused_ivs): Same. + (determine_scaling_factor): Same. + * tree-ssa-loop-ivopts.h: Same. + * tree-ssa-loop-manip.c (create_iv): Same. + (compute_live_loop_exits): Same. + (add_exit_phi): Same. + (add_exit_phis): Same. + (find_uses_to_rename_use): Same. + (find_uses_to_rename_def): Same. + (find_uses_to_rename_in_loop): Same. + (rewrite_into_loop_closed_ssa): Same. + (check_loop_closed_ssa_bb): Same. + (split_loop_exit_edge): Same. + (ip_end_pos): Same. + (ip_normal_pos): Same. + (copy_phi_node_args): Same. + (gimple_duplicate_loop_to_header_edge): Same. + (can_unroll_loop_p): Same. + (determine_exit_conditions): Same. + (scale_dominated_blocks_in_loop): Same. + (niter_for_unrolled_loop): Same. + (tree_transform_and_unroll_loop): Same. + (rewrite_all_phi_nodes_with_iv): Same. + * tree-ssa-loop-manip.h: Same. + * tree-ssa-loop-niter.c (number_of_iterations_ne_max): Same. + (number_of_iterations_ne): Same. + (assert_no_overflow_lt): Same. + (assert_loop_rolls_lt): Same. + (number_of_iterations_lt): Same. + (adjust_cond_for_loop_until_wrap): Same. + (tree_simplify_using_condition): Same. + (simplify_using_initial_conditions): Same. + (simplify_using_outer_evolutions): Same. + (loop_only_exit_p): Same. + (ssa_defined_by_minus_one_stmt_p): Same. + (number_of_iterations_popcount): Same. + (number_of_iterations_exit): Same. + (find_loop_niter): Same. + (finite_loop_p): Same. + (chain_of_csts_start): Same. + (get_val_for): Same. + (loop_niter_by_eval): Same. + (derive_constant_upper_bound_ops): Same. + (do_warn_aggressive_loop_optimizations): Same. + (record_estimate): Same. + (get_cst_init_from_scev): Same. + (record_nonwrapping_iv): Same. + (idx_infer_loop_bounds): Same. + (infer_loop_bounds_from_ref): Same. + (infer_loop_bounds_from_array): Same. + (infer_loop_bounds_from_pointer_arith): Same. + (infer_loop_bounds_from_signedness): Same. + (bound_index): Same. + (discover_iteration_bound_by_body_walk): Same. + (maybe_lower_iteration_bound): Same. + (estimate_numbers_of_iterations): Same. + (estimated_loop_iterations): Same. + (estimated_loop_iterations_int): Same. + (max_loop_iterations): Same. + (max_loop_iterations_int): Same. + (likely_max_loop_iterations): Same. + (likely_max_loop_iterations_int): Same. + (estimated_stmt_executions_int): Same. + (max_stmt_executions): Same. + (likely_max_stmt_executions): Same. + (estimated_stmt_executions): Same. + (stmt_dominates_stmt_p): Same. + (nowrap_type_p): Same. + (loop_exits_before_overflow): Same. + (scev_var_range_cant_overflow): Same. + (scev_probably_wraps_p): Same. + (free_numbers_of_iterations_estimates): Same. + * tree-ssa-loop-niter.h: Same. + * tree-ssa-loop-prefetch.c (release_mem_refs): Same. + (idx_analyze_ref): Same. + (analyze_ref): Same. + (gather_memory_references_ref): Same. + (mark_nontemporal_store): Same. + (emit_mfence_after_loop): Same. + (may_use_storent_in_loop_p): Same. + (mark_nontemporal_stores): Same. + (should_unroll_loop_p): Same. + (volume_of_dist_vector): Same. + (add_subscript_strides): Same. + (self_reuse_distance): Same. + (insn_to_prefetch_ratio_too_small_p): Same. + * tree-ssa-loop-split.c (split_at_bb_p): Same. + (patch_loop_exit): Same. + (find_or_create_guard_phi): Same. + (easy_exit_values): Same. + (connect_loop_phis): Same. + (connect_loops): Same. + (compute_new_first_bound): Same. + (split_loop): Same. + (tree_ssa_split_loops): Same. + * tree-ssa-loop-unswitch.c (tree_ssa_unswitch_loops): Same. + (is_maybe_undefined): Same. + (tree_may_unswitch_on): Same. + (simplify_using_entry_checks): Same. + (tree_unswitch_single_loop): Same. + (tree_unswitch_loop): Same. + (tree_unswitch_outer_loop): Same. + (empty_bb_without_guard_p): Same. + (used_outside_loop_p): Same. + (get_vop_from_header): Same. + (hoist_guard): Same. + * tree-ssa-loop.c (gate_oacc_kernels): Same. + (get_lsm_tmp_name): Same. + * tree-ssa-loop.h: Same. + * tree-ssa-reassoc.c (add_repeat_to_ops_vec): Same. + (build_and_add_sum): Same. + (no_side_effect_bb): Same. + (get_ops): Same. + (linearize_expr): Same. + (should_break_up_subtract): Same. + (linearize_expr_tree): Same. + * tree-ssa-scopedtables.c: Same. + * tree-ssa-scopedtables.h: Same. + * tree-ssa-structalias.c (condense_visit): Same. + (label_visit): Same. + (dump_pred_graph): Same. + (perform_var_substitution): Same. + (move_complex_constraints): Same. + (remove_preds_and_fake_succs): Same. + * tree-ssa-threadupdate.c (dbds_continue_enumeration_p): Same. + (determine_bb_domination_status): Same. + (duplicate_thread_path): Same. + (thread_through_all_blocks): Same. + * tree-ssa-threadupdate.h: Same. + * tree-streamer-in.c (streamer_read_string_cst): Same. + (input_identifier): Same. + (unpack_ts_type_common_value_fields): Same. + (unpack_ts_block_value_fields): Same. + (unpack_ts_translation_unit_decl_value_fields): Same. + (unpack_ts_omp_clause_value_fields): Same. + (streamer_read_tree_bitfields): Same. + (streamer_alloc_tree): Same. + (lto_input_ts_common_tree_pointers): Same. + (lto_input_ts_vector_tree_pointers): Same. + (lto_input_ts_poly_tree_pointers): Same. + (lto_input_ts_complex_tree_pointers): Same. + (lto_input_ts_decl_minimal_tree_pointers): Same. + (lto_input_ts_decl_common_tree_pointers): Same. + (lto_input_ts_decl_non_common_tree_pointers): Same. + (lto_input_ts_decl_with_vis_tree_pointers): Same. + (lto_input_ts_field_decl_tree_pointers): Same. + (lto_input_ts_function_decl_tree_pointers): Same. + (lto_input_ts_type_common_tree_pointers): Same. + (lto_input_ts_type_non_common_tree_pointers): Same. + (lto_input_ts_list_tree_pointers): Same. + (lto_input_ts_vec_tree_pointers): Same. + (lto_input_ts_exp_tree_pointers): Same. + (lto_input_ts_block_tree_pointers): Same. + (lto_input_ts_binfo_tree_pointers): Same. + (lto_input_ts_constructor_tree_pointers): Same. + (lto_input_ts_omp_clause_tree_pointers): Same. + (streamer_read_tree_body): Same. + * tree-streamer.h: Same. + * tree-switch-conversion.c (bit_test_cluster::is_beneficial): Same. + * tree-vect-data-refs.c (vect_get_smallest_scalar_type): Same. + (vect_analyze_possibly_independent_ddr): Same. + (vect_analyze_data_ref_dependence): Same. + (vect_compute_data_ref_alignment): Same. + (vect_enhance_data_refs_alignment): Same. + (vect_analyze_data_ref_access): Same. + (vect_check_gather_scatter): Same. + (vect_find_stmt_data_reference): Same. + (vect_create_addr_base_for_vector_ref): Same. + (vect_setup_realignment): Same. + (vect_supportable_dr_alignment): Same. + * tree-vect-loop-manip.c (rename_variables_in_bb): Same. + (adjust_phi_and_debug_stmts): Same. + (vect_set_loop_mask): Same. + (add_preheader_seq): Same. + (vect_maybe_permute_loop_masks): Same. + (vect_set_loop_masks_directly): Same. + (vect_set_loop_condition_masked): Same. + (vect_set_loop_condition_unmasked): Same. + (slpeel_duplicate_current_defs_from_edges): Same. + (slpeel_add_loop_guard): Same. + (slpeel_can_duplicate_loop_p): Same. + (create_lcssa_for_virtual_phi): Same. + (iv_phi_p): Same. + (vect_update_ivs_after_vectorizer): Same. + (vect_gen_vector_loop_niters_mult_vf): Same. + (slpeel_update_phi_nodes_for_loops): Same. + (slpeel_update_phi_nodes_for_guard1): Same. + (find_guard_arg): Same. + (slpeel_update_phi_nodes_for_guard2): Same. + (slpeel_update_phi_nodes_for_lcssa): Same. + (vect_do_peeling): Same. + (vect_create_cond_for_alias_checks): Same. + (vect_loop_versioning): Same. + * tree-vect-loop.c (vect_determine_vf_for_stmt): Same. + (vect_inner_phi_in_double_reduction_p): Same. + (vect_analyze_scalar_cycles_1): Same. + (vect_fixup_scalar_cycles_with_patterns): Same. + (vect_get_loop_niters): Same. + (bb_in_loop_p): Same. + (vect_get_max_nscalars_per_iter): Same. + (vect_verify_full_masking): Same. + (vect_compute_single_scalar_iteration_cost): Same. + (vect_analyze_loop_form_1): Same. + (vect_analyze_loop_form): Same. + (vect_active_double_reduction_p): Same. + (vect_analyze_loop_operations): Same. + (neutral_op_for_slp_reduction): Same. + (vect_is_simple_reduction): Same. + (vect_model_reduction_cost): Same. + (get_initial_def_for_reduction): Same. + (get_initial_defs_for_reduction): Same. + (vect_create_epilog_for_reduction): Same. + (vectorize_fold_left_reduction): Same. + (vectorizable_reduction): Same. + (vectorizable_induction): Same. + (vectorizable_live_operation): Same. + (loop_niters_no_overflow): Same. + (vect_get_loop_mask): Same. + (vect_transform_loop_stmt): Same. + (vect_transform_loop): Same. + * tree-vect-patterns.c (vect_reassociating_reduction_p): Same. + (vect_determine_precisions): Same. + (vect_pattern_recog_1): Same. + * tree-vect-slp.c (vect_analyze_slp_instance): Same. + * tree-vect-stmts.c (stmt_vectype): Same. + (process_use): Same. + (vect_init_vector_1): Same. + (vect_truncate_gather_scatter_offset): Same. + (get_group_load_store_type): Same. + (vect_build_gather_load_calls): Same. + (vect_get_strided_load_store_ops): Same. + (vectorizable_simd_clone_call): Same. + (vectorizable_store): Same. + (permute_vec_elements): Same. + (vectorizable_load): Same. + (vect_transform_stmt): Same. + (supportable_widening_operation): Same. + * tree-vectorizer.c (vec_info::replace_stmt): Same. + (vec_info::free_stmt_vec_info): Same. + (vect_free_loop_info_assumptions): Same. + (vect_loop_vectorized_call): Same. + (set_uid_loop_bbs): Same. + (vectorize_loops): Same. + * tree-vectorizer.h (STMT_VINFO_BB_VINFO): Same. + * tree.c (add_tree_to_fld_list): Same. + (fld_type_variant_equal_p): Same. + (fld_decl_context): Same. + (fld_incomplete_type_of): Same. + (free_lang_data_in_binfo): Same. + (need_assembler_name_p): Same. + (find_decls_types_r): Same. + (get_eh_types_for_runtime): Same. + (find_decls_types_in_eh_region): Same. + (find_decls_types_in_node): Same. + (assign_assembler_name_if_needed): Same. + * value-prof.c (stream_out_histogram_value): Same. + * value-prof.h: Same. + * var-tracking.c (use_narrower_mode): Same. + (prepare_call_arguments): Same. + (vt_expand_loc_callback): Same. + (resolve_expansions_pending_recursion): Same. + (vt_expand_loc): Same. + * varasm.c (const_hash_1): Same. + (compare_constant): Same. + (tree_output_constant_def): Same. + (simplify_subtraction): Same. + (get_pool_constant): Same. + (output_constant_pool_2): Same. + (output_constant_pool_1): Same. + (mark_constants_in_pattern): Same. + (mark_constant_pool): Same. + (get_section_anchor): Same. + * vr-values.c (compare_range_with_value): Same. + (vr_values::extract_range_from_phi_node): Same. + * vr-values.h: Same. + * web.c (unionfind_union): Same. + * wide-int.h: Same. + +2019-07-09 Martin Sebor <msebor@redhat.com> + + PR c++/61339 + * align.h: Change class-key from class to struct and vice versa + to match convention and avoid -Wclass-is-pod and -Wstruct-no-pod. + * alloc-pool.h: Same. + * asan.c (shadow_mem_size): Same. + * auto-profile.c: Same. + * basic-block.h: Same. + * bitmap.h: Same. + * cfgexpand.c (set_rtl): Same. + (expand_one_stack_var_at): Same. + * cfghooks.h: Same. + * cfgloop.h: Same. + * cgraph.h: Same. + * config/i386/i386.h: Same. + * df-problems.c (df_print_bb_index): Same. + * df-scan.c: Same. + * df.h (df_single_use): Same. + * diagnostic-show-locus.c (layout::print_annotation_line): Same. + (layout::annotation_line_showed_range_p): Same. + (get_printed_columns): Same. + (correction::ensure_terminated): Same. + (line_corrections::~line_corrections): Same. + * dojump.h: Same. + * dse.c: Same. + * dump-context.h: Same. + * dumpfile.h: Same. + * dwarf2out.c: Same. + * edit-context.c: Same. + * fibonacci_heap.c (test_union_of_equal_heaps): Same. + * flags.h: Same. + * function.c (assign_stack_local): Same. + * function.h: Same. + * gcc.c: Same. + * gcov.c (block_info::block_info): Same. + * genattrtab.c: Same. + * genextract.c: Same. + * genmatch.c (comparison_code_p): Same. + (id_base::id_base): Same. + (decision_tree::print): Same. + * genoutput.c: Same. + * genpreds.c (write_one_predicate_function): Same. + * genrecog.c (validate_pattern): Same. + (find_operand_positions): Same. + (optimize_subroutine_group): Same. + (merge_pattern_transition::merge_pattern_transition): Same. + (merge_pattern_info::merge_pattern_info): Same. + (merge_state_result::merge_state_result): Same. + (merge_into_state): Same. + * gensupport.c: Same. + * gensupport.h: Same. + * ggc-common.c (init_ggc_heuristics): Same. + * ggc-tests.c (test_union): Same. + * gimple-loop-interchange.cc (dump_induction): Same. + * gimple-loop-versioning.cc: Same. + * gimple-match.h (gimple_match_cond::any_else): Same. + * gimple-ssa-backprop.c: Same. + * gimple-ssa-sprintf.c: Same. + * gimple-ssa-store-merging.c (store_operand_info::store_operand_info): + Same. + (store_immediate_info::store_immediate_info): Same. + (merged_store_group::apply_stores): Same. + (get_location_for_stmts): Same. + * gimple-ssa-strength-reduction.c: Same. + * gimple-ssa-warn-alloca.c: Same. + * gimple-ssa-warn-restrict.c (pass_wrestrict::execute): Same. + * godump.c (go_type_decl): Same. + * hash-map-tests.c (test_map_of_strings_to_int): Same. + * hash-map.h: Same. + * hash-set-tests.c (test_set_of_strings): Same. + * hsa-brig.c: Same. + * hsa-common.h: Same. + * hsa-gen.c (transformable_switch_to_sbr_p): Same. + * input.c (assert_loceq): Same. + * input.h: Same. + * ipa-cp.c: Same. + * ipa-devirt.c (possible_polymorphic_call_targets_1): Same. + * ipa-fnsummary.h: Same. + * ipa-inline.h: Same. + * ipa-prop.h: Same. + * ipa-split.c (visit_bb): Same. + * ira-int.h (minmax_set_iter_next): Same. + * loop-invariant.c: Same. + * loop-iv.c: Same. + * lra-eliminations.c: Same. + * lra-int.h: Same. + * lra-lives.c (mark_regno_dead): Same. + * lra-remat.c: Same. + * lra-spills.c: Same. + * lto-streamer.h: Same. + * mem-stats.h: Same. + * omp-grid.c (omp_grid_lastprivate_predicate): Same. + * omp-low.c (omp_clause_aligned_alignment): Same. + * optabs-query.h (get_vcond_eq_icode): Same. + * optabs.h: Same. + * opts.c (wrap_help): Same. + * poly-int.h: Same. + * predict.c (predict_paths_leading_to_edge): Same. + * pretty-print.h: Same. + * profile-count.h: Same. + * read-md.h: Same. + * read-rtl-function.c: Same. + * ree.c: Same. + * reginfo.c: Same. + * regrename.c: Same. + * regrename.h: Same. + * reload.h: Same. + * rtl-iter.h: Same. + * rtl.h (costs_add_n_insns): Same. + * sanopt.c: Same. + * sched-int.h: Same. + * sel-sched-ir.h: Same. + * selftest.h: Same. + * sese.h (vec_find): Same. + * stmt.c: Same. + * target-globals.h: Same. + * tree-affine.c (aff_combination_find_elt): Same. + * tree-affine.h: Same. + * tree-data-ref.h: Same. + * tree-outof-ssa.c (ssa_is_replaceable_p): Same. + * tree-predcom.c: Same. + * tree-scalar-evolution.c (find_var_scev_info): Same. + * tree-ssa-alias.h: Same. + * tree-ssa-ccp.c: Same. + * tree-ssa-coalesce.c (ssa_conflicts_dump): Same. + * tree-ssa-loop-im.c (for_all_locs_in_loop): Same. + (rewrite_mem_refs): Same. + (execute_sm_if_changed): Same. + (hoist_memory_references): Same. + * tree-ssa-loop-ivopts.c (operator<=): Same. + * tree-ssa-loop.h: Same. + * tree-ssa-pre.c (get_or_alloc_expr_for_name): Same. + * tree-ssa-structalias.c: Same. + * tree-switch-conversion.h (cluster::cluster): Same. + (simple_cluster::simple_cluster): Same. + * tree-vect-patterns.c (type_conversion_p): Same. + * tree-vectorizer.c (dump_stmt_cost): Same. + * tree-vectorizer.h (loop_vec_info_for_loop): Same. + * tree.c (protected_set_expr_location): Same. + * tree.h (desired_pro_or_demotion_p): Same. + (fndecl_built_in_p): Same. + * unique-ptr-tests.cc: Same. + * var-tracking.c (delete_variable_part): Same. + * varasm.c (assemble_real): Same. + (tree_output_constant_def): Same. + * vec.c: Same. + * wide-int-bitmask.h: Same. + * wide-int.h (decompose): Same. + +2019-07-09 Richard Biener <rguenther@suse.de> + + PR tree-optimization/91114 + * tree-vect-data-refs.c (vect_analyze_data_refs): Failure to + find a vector type isn't fatal. + +2019-07-09 Sylvia Taylor <sylvia.taylor@arm.com> + + * config/aarch64/aarch64-simd.md + (aarch64_crypto_aes<aes_op>v16qi): Redefine pattern with xor. + (aarch64_crypto_aes<aesmc_op>v16qi): Remove attribute enabled. + (*aarch64_crypto_aes<aes_op>v16qi_xor_combine): Remove both. + (*aarch64_crypto_aese_fused, + *aarch64_crypto_aesd_fused): Update to new definition. + * config/aarch64/aarch64.c + (aarch_macro_fusion_pair_p): Remove aese/aesmc fusion check. + +2019-07-09 Richard Biener <rguenther@suse.de> + + * gimple-match.h (gimple_match_op::resimplify): New. + (gimple_resimplify1, gimple_resimplify2, gimple_resimplify3, + gimple_resimplify4, gimple_resimplify5): Remove. + * gimple-match-head.c (gimple_resimplify1, gimple_resimplify2, + gimple_resimplify3, gimple_resimplify4, gimple_resimplify5): + Make static. + (gimple_match_op::resimplify): New. + * tree-ssa-sccvn.c (vn_nary_build_or_lookup_1): Valueize + according to availability. Use gimple_match_op::resimplify. + +2019-07-09 Eric Botcazou <ebotcazou@adacore.com> + + * ira-emit.c (emit_moves): Skip DEBUG_INSNs when setting the location. + +2019-07-09 Sylvia Taylor <sylvia.taylor@arm.com> + + * config/arm/crypto.md: + (crypto_<crypto_pattern>): Redefine aese/aesd pattern with xor. + (crypto_<crypto_pattern>): Remove attribute enabled for aesmc. + (crypto_<crypto_pattern>): Split CRYPTO_BINARY into 2 patterns. + (*aarch32_crypto_aese_fused, *aarch32_crypto_aesd_fused): New. + * config/arm/arm.c + (aarch_macro_fusion_pair_p): Remove aes/aesmc fusion check. + * config/arm/aarch-common-protos.h + (aarch_crypto_can_dual_issue): Remove. + * config/arm/aarch-common.c + (aarch_crypto_can_dual_issue): Likewise. + * config/arm/exynos-m1.md: Remove aese/aesmc fusion. + * config/arm/cortex-a53.md: Likewise. + * config/arm/cortex-a57.md: Likewise. + * config/arm/iterators.md: + (CRYPTO_BINARY): Redefine. + (CRYPTO_UNARY): Removed. + (CRYPTO_AES, CRYPTO_AESMC): New. + +2019-07-09 Richard Biener <rguenther@suse.de> + + * tree-ssa-sccvn.c (struct vn_walk_cb_data): Add orig_ref member. + (vn_reference_lookup_3): If the main ref has no access path recorded + but orig_ref has use it to do access-path based disambiguation. + (vn_reference_lookup_pieces): Adjust. + (vn_reference_lookup): Pass down original ref if we valueized. + +2019-07-09 Martin Liska <mliska@suse.cz> + + * doc/extend.texi: Document influence on loop + optimizers. + +2019-07-09 Martin Liska <mliska@suse.cz> + + * lto-compress.c (lto_normalized_zstd_level): Do not use + ZSTD_CLEVEL_DEFAULT as it is not default in old releases + of libzstd. One can use 0 as a default compression level. + +2019-07-09 Martin Liska <mliska@suse.cz> + + * doc/invoke.texi: Add link from -fprofile-dir option. + Use better wording for 'gcno filename'. + +2019-07-08 Martin Sebor <msebor@redhat.com> + + PR middle-end/71924 + PR middle-end/90549 + * gimple-ssa-isolate-paths.c (isolate_path): Add attribute. Update + comment. + (args_loc_t): New type. + (args_loc_t, locmap_t): same. + (diag_returned_locals): New function. + (is_addr_local): Same. + (handle_return_addr_local_phi_arg, warn_return_addr_local): Same. + (find_implicit_erroneous_behavior): Call warn_return_addr_local_phi_arg. + (find_explicit_erroneous_behavior): Call warn_return_addr_local. + +2019-07-08 Jakub Jelinek <jakub@redhat.com> + + * tree-vect-stmts.c (scan_operand_equal_p): Look through MEM_REF + with SSA_NAME address of POINTER_PLUS_EXPR. Handle MULT_EXPR + and casts in offset when different, both through gimple stmts + and through trees. Rewritten using loops to minimize code duplication + for each operand. + +2019-07-08 Eric Botcazou <ebotcazou@adacore.com> + + * emit-rtl.c (set_insn_locations): New function moved from... + * function.c (set_insn_locations): ...here. + * ira-emit.c (emit_moves): Propagate location of the first instruction + to the inserted move instructions. + * reg-stack.c (compensate_edge): Set the location if the sequence is + inserted on the edge. + * rtl.h (set_insn_locations): Declare. + +2019-07-08 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/rs6000.c (rs6000_machine_from_flags): Ignore + OPTION_MASK_PPC_GFXOPT and OPTION_MASK_PPC_GPOPT for selecting the + .machine string. + +2019-07-08 Segher Boessenkool <segher@kernel.crashing.org> + + PR rtl-optimization/88233 + * common.opt (fsplit-wide-types-early): New option. + * common/config/rs6000/rs6000-common.c + (rs6000_option_optimization_table): Add OPT_fsplit_wide_types_early for + OPT_LEVELS_ALL. + * doc/invoke.texi (Optimization Options): Add -fsplit-wide-types-early. + * lower-subreg.c (pass_lower_subreg2::gate): Add test for + flag_split_wide_types_early. + (pass_data_lower_subreg3): New. + (pass_lower_subreg3): New. + (make_pass_lower_subreg3): New. + * passes.def (pass_lower_subreg2): Move after the loop passes. + (pass_lower_subreg3): New, inserted where pass_lower_subreg2 was. + * tree-pass.h (make_pass_lower_subreg2): Move up, to its new place in + the pass pipeline; its previous place is taken by ... + (make_pass_lower_subreg3): ... this. + +2019-07-08 Robin Dapp <rdapp@linux.ibm.com> + + * config/s390/s390.c (s390_shift_truncation_mask): Define. + (TARGET_SHIFT_TRUNCATION_MASK): Define. + +2019-07-08 Robin Dapp <rdapp@linux.ibm.com> + + * config/s390/constraints.md: Add new jsc constraint. + * config/s390/predicates.md: New predicates. + * config/s390/s390-protos.h (s390_valid_shift_count): New function. + * config/s390/s390.c (s390_valid_shift_count): New function. + (print_shift_count_operand): Use s390_valid_shift_count. + (print_operand): Likewise. + * config/s390/s390.md: Use new predicate. + * config/s390/subst.md: Remove addr_style_op and masked_op substs. + * config/s390/vector.md: Use new predicate. + +2019-07-08 Andrew Waterman <andrew@sifive.com> + Jim Wilson <jimw@sifive.com> + + * config/riscv/riscv.md (lshrsi3_zero_extend_3+1): Use operands[1] + bitsize instead of BITS_PER_WORD. + +2019-07-08 Martin Liska <mliska@suse.cz> + + * collect2.c (defined): Revert to before r254460. + (scan_prog_file): Revert to before r254460. + +2019-07-08 Richard Biener <rguenther@suse.de> + + PR tree-optimization/83518 + * tree-ssa-sccvn.c: Include splay-tree.h. + (struct pd_range, struct pd_data): New. + (struct vn_walk_cb_data): Add data to track partial definitions. + (vn_walk_cb_data::~vn_walk_cb_data): New. + (vn_walk_cb_data::push_partial_def): New. + (pd_tree_alloc, pd_tree_dealloc, pd_range_compare): New. + (vn_reference_lookup_2): When partial defs are registered give up. + (vn_reference_lookup_3): Track partial defs for memset and + constructor zeroing and for defs from constants. + +2019-07-08 Richard Sandiford <richard.sandiford@arm.com> + + * doc/install.texi (bootstrap-Og): Document. + +2019-07-08 Richard Sandiford <richard.sandiford@arm.com> + + * config/riscv/pic.md (*local_pic_load_s<mode>) + (*local_pic_load_u<mode>): Explicitly specify the mode iterator + referenced by <mode>, giving... + (*local_pic_load_s<SUBX:mode>, *local_pic_load_u<SUBX:mode>): ...these. + * config/riscv/riscv.md (*sge<u>_<X:mode><GPR:mode>) + (*slt<u>_<X:mode><GPR:mode>, *sle<u>_<X:mode><GPR:mode>): Explicitly + use <X:MODE> for the mode attribute. + +2019-07-07 Jeff Law <law@redhat.com> + + PR tree-optimization/91090 + * tree-ssa-dom.c (simplify_stmt_for_jump_threading): Fix logic error + in handling of ranges to simplify switch statements. + +2019-07-07 Iain Sandoe <iain@sandoe.co.uk> + + * config/darwin.c (darwin_override_options): Make a final check on PIC + options. + +2019-07-07 Iain Sandoe <iain@sandoe.co.uk> + + * config/darwin.c (darwin_override_options): Don't jam symbol stubs + on for kernel code. + +2019-07-07 Richard Sandiford <richard.sandiford@arm.com> + + PR target/91068 + * config/mips/mips.md (*mul_acc_si, *mul_acc_si_r3900, *macc) + (*msac, *msac_using_macc, *mul_sub_si): Use "l" for input operands + instead of matching them to "l" output operands. + +2019-07-07 Richard Sandiford <richard.sandiford@arm.com> + + * config/mips/mips.c (mips_split_move): Zero-initialize addr + and check whether addr.reg is nonnull before using it. + +2019-07-06 Jakub Jelinek <jakub@redhat.com> + + * omp-low.c (lower_rec_input_clauses): For lastprivate clauses in + ctx->for_simd_scan_phase simd copy the outer var to the privatized + variable(s). For conditional lastprivate look through outer + GIMPLE_OMP_SCAN context. + (lower_omp_1): For conditional lastprivate look through outer + GIMPLE_OMP_SCAN context. + + * omp-low.c (struct omp_context): Rename combined_into_simd_safelen0 + member to combined_into_simd_safelen1. + (lower_rec_input_clauses, lower_omp_1): Adjust uses. + (lower_lastprivate_clauses): Likewise. For conditional lastprivate + clauses if ctx->combined_into_simd_safelen1 put statements after the + predicate conditionalized block rather than into it. + +2019-07-06 Richard Sandiford <richard.sandiford@arm.com> + + * config/s390/s390.md (*negabs<FP:mode>2_nocc): Use FP for + operand 1. + * config/s390/vx-builtins.md (*vec_cmp<insn_cmp><mode>_cconly): + Make the choice of <mode> explicit, giving... + (*vec_cmp<insn_cmp><VF_HW:mode>_cconly): ...this. + +2019-07-06 Richard Sandiford <richard.sandiford@arm.com> + + * config/i386/i386.md (*fop_<X87MODEF:mode>_3_i387) + (l<rounding_insn><MODEF:mode><SWI48:mode>2): Fix ambiguous uses + of .md attributes. + * config/i386/sse.md (*avx512pf_gatherpf<mode>sf_mask) + (*avx512pf_gatherpf<mode>df_mask, *avx512pf_scatterpf<mode>sf_mask) + (*avx512pf_scatterpf<mode>df_mask, *avx2_gathersi<mode>) + (*avx2_gathersi<mode>_2, *avx2_gatherdi<mode>) + (*avx2_gatherdi<mode>_2, *avx2_gatherdi<mode>_3): Likewise. + (*avx2_gatherdi<mode>_4, *avx512f_gathersi<mode>): Likewise. + (*avx512f_gathersi<mode>_2, *avx512f_gatherdi<mode>): Likewise. + (*avx512f_gatherdi<mode>_2, *avx512f_scattersi<mode>): Likewise. + (*avx512f_scatterdi<mode>): Likewise. + (*andnot<mode>3_bcst): Fix VI/VI48_AVX512VL typo. + +2019-07-06 Richard Sandiford <richard.sandiford@arm.com> + + * config/h8300/h8300.md (*push1_h8300hs_<mode>): Explicitly + specify the mode iterator referenced by <mode>, giving... + (*push1_h8300hs_<QHI:mode>): ...this. + +2019-07-06 Richard Sandiford <richard.sandiford@arm.com> + + * config/gcn/gcn-valu.md + (vcond<VEC_1REG_MODE:mode><VEC_1REG_ALT:mode>): Use + gen_vec_cmp<VEC_1REG_ALT:mode>di rather than (implicitly) + gen_vec_cmp<VEC_1REG_MODE:mode>di. Explicitly use + gen_vcond_mask_<VEC_1REG_MODE:mode>di. + (vcond<VEC_1REG_MODE:mode><VEC_1REG_ALT:mode>_exec): Likewise, + but using the _exec comparison patterns. + (vcondu<VEC_1REG_INT_MODE:mode><VEC_1REG_INT_ALT:mode>): Use + gen_vec_cmp<VEC_1REG_INT_ALT:mode>di rather than (implicitly) + gen_vec_cmp<VEC_1REG_INT_MODE:mode>di. Explicitly use + gen_vcond_mask_<VEC_1REG_INT_MODE:mode>di. + (vcondu<VEC_1REG_INT_MODE:mode><VEC_1REG_INT_ALT:mode>_exec): Likewise, + but using the _exec comparison patterns. + +2019-07-06 Richard Sandiford <richard.sandiford@arm.com> + + * config/arm/sync.md + (@atomic_compare_and_swap<CCSI:arch><NARROW:mode>_1): Use + <NARROW:sync_predtab> instead of (implicitly) <CCSI:sync_predtab>. + (@atomic_compare_and_swap<CCSI:arch><SIDI:mode>_1): Likewise use + <SIDI:sync_predtab>. Use <SIDI:cas_cmp_operand> and + <SIDI:cas_cmp_str>. + +2019-07-06 Jakub Jelinek <jakub@redhat.com> + + * omp-low.c (struct omp_context): Add for_simd_scan_phase member. + (maybe_lookup_ctx): Add forward declaration. + (omp_find_scan): Likewise. Walk into body of simd if composited + with worksharing loop. + (scan_omp_simd_scan): New function. + (scan_omp_1_stmt): Call it. + (lower_rec_simd_input_clauses): Don't create rvar nor rvar2 if + ctx->for_simd_scan_phase. + (lower_rec_input_clauses): Do much less work for inscan reductions + in ctx->for_simd_scan_phase is_simd regions. + (lower_omp_scan): Set is_simd also on simd constructs composited + with worksharing loop, unless ctx->for_simd_scan_phase. Never emit + a sorry message. Don't change GIMPLE_OMP_SCAN stmts into nops and + emit their body after in simd constructs composited with worksharing + loop. + (lower_omp_for_scan): Handle worksharing loop composited with simd. + + * omp-low.c (omp_find_scan): Make static. + (lower_omp_for_scan): Fix order of merge arguments in input phase of + the second loop, var2 represents the first partial sum and so needs + to go before rprivb[ivar]. + +2019-07-05 Iain Sandoe <iain@sandoe.co.uk> + + * config/rs6000/rs6000-logue.c: Remove unused code. + +2019-07-05 Eric Botcazou <ebotcazou@adacore.com> + + * tree-ssa-loop-manip.c (create_iv): Add missing guard for gsi_end_p. + +2019-07-05 Sam Tebbs <sam.tebbs@arm.com> + + PR target/90712 + * config/aarch64/aarch64.c (aarch64_post_cfi_startproc): Replace thunk + check with a frame laid out check. + +2019-07-05 Richard Biener <rguenther@suse.de> + + * tree-ssa-sccvn.c (vn_reference_lookup_3): Valueize RHS + when comparing against a store with possibly the same value. + +2019-07-05 Richard Biener <rguenther@suse.de> + + PR tree-optimization/91091 + * tree-ssa-alias.h (get_continuation_for_phi): Add tbaa_p parameter. + (walk_non_aliased_vuses): Likewise. + * tree-ssa-alias.c (maybe_skip_until): Pass down tbaa_p. + (get_continuation_for_phi): New tbaa_p parameter and pass + it down. + (walk_non_aliased_vuses): Likewise. + * ipa-prop.c (determine_known_aggregate_parts): Adjust. + * tree-ssa-pre.c (translate_vuse_through_block): Likewise. + * tree-ssa-scopedtables.c (avail_exprs_stack::lookup_avail_expr): + Likewise. + * tree-ssa-sccvn.c (struct vn_walk_cb_data): Add tbaa_p flag. + (adjust_offsets_for_equal_base_address): New function. + (vn_reference_lookup_3): Use it to catch more base equivalences. + Handle and pass down tbaa_p flag. + (vn_reference_lookup_pieces): Adjust. + (vn_reference_lookup): Remove alias-set altering, instead pass + down false as tbaa_p. + +2019-07-05 Richard Biener <rguenther@suse.de> + + PR tree-optimization/91091 + * tree-ssa-sccvn.c (vn_reference_lookup_3): Overlap of + accesses can happen with -fno-strict-aliasing. + +2019-07-05 Jan Hubicka <hubicka@ucw.cz> + + * tree-ssa-alias.c (alias_stats): Add + nonoverlapping_component_refs_since_match_p_must_overlap. + (dump_alias_stats): Print it. + (nonoverlapping_component_refs_since_match_p): Add early exit. + (nonoverlapping_component_refs_p): Do not account early exit. + +2019-07-05 Eric Botcazou <ebotcazou@adacore.com> + + * except.c (emit_to_new_bb_before): Make sure to put a location on SEQ. + * tree-eh.c (replace_goto_queue_1) <GIMPLE_GOTO>: Propagate location. + (emit_eh_dispatch): Delete. + (lower_catch): Emit the eh_dispatch manually and set the location of + the first catch statement onto it. + (lower_eh_filter): Emit the eh_dispatch manually and set location. + (lower_eh_dispatch): Propagate location. + * tree-outof-ssa.c (set_location_for_edge): Handle EH edges specially. + (eliminate_build): Likewise. + +2019-07-05 Eric Botcazou <ebotcazou@adacore.com> + + * tree-cfg.c (gimple_make_forwarder_block): Propagate location info on + phi nodes if possible. + * tree-scalar-evolution.c (final_value_replacement_loop): Propagate + location info on the newly created statement. + * tree-ssa-loop-manip.c (create_iv): Propagate location info on the + newly created increment if needed. + +2019-07-04 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/78884 + * gimplify.c (struct gimplify_omp_ctx): Add add_safelen1 member. + (gimplify_bind_expr): If seeing TREE_ADDRESSABLE VLA inside of simd + loop body, set ctx->add_safelen1 instead of making it GOVD_PRIVATE. + (gimplify_adjust_omp_clauses): Add safelen (1) clause if + ctx->add_safelen1 is set. + + * omp-expand.c (expand_omp_for_static_nochunk): Don't emit + GOMP_loop_start at the start of second worksharing loop in a scan. + For nowait, don't emit GOMP_loop_end_nowait at the end of first + worksharing loop in a scan even if there are conditional lastprivates, + and do emit GOMP_loop_end_nowait at the end of second worksharing loop. + +2019-07-04 Jan Hubicka <jh@suse.cz> + + * tree-ssa-alias.c (nonoverlapping_component_refs_since_match_p): + Fix check for match in the ref walk. + +2019-07-04 Martin Liska <mliska@suse.cz> + + * tree-ssa-loop-niter.c + (get_upper_bound_based_on_builtin_expr_with_prob): New function. + (estimate_numbers_of_iterations): + Support __builtin_expect_with_probability for analysis + of # of loop iterations. + +2019-07-04 Alexandre Oliva <oliva@adacore.com> + + * doc/generic.texi (Cleanups): Document EH_ELSE_EXPR. + * except.c: Likewise. + * expr.c (expand_expr_real_1): Reject it. + * gimplify.c (gimplify_expr): Gimplify it, within + TRY_FINALLY_EXPR. + * tree-dump.c (dequeue_and_dump): Dump it. + * tree-pretty-print.c (dump_generic_node): Likewise. + * tree.c (block_may_fallthru): Handle it. + * tree.def (EH_ELSE_EXPR): Introduce it. + * gimple-pretty-print.c (dump_gimple_try): Dump TRY_FINALLY + with GIMPLE_EH_ELSE as try/finally/else. + +2019-07-04 Richard Biener <rguenther@suse.de> + + PR ipa/91062 + * tree-pass.h (execute_all_ipa_transforms): Add a flag + parameter whether to disable GC collection. + * passes.c (execute_one_ipa_transform_pass): Likewise, and + honor it. + (execute_all_ipa_transforms): Likewise and pass it down. + * cgraph.c (cgraph_node::get_body): Do not invoke garbage + collection from applying IPA transforms. + * cgraphunit.c (cgraph_node::expand): Allow garbage collection + from applying IPA transforms. + +2019-07-04 Richard Biener <rguenther@suse.de> + + PR tree-optimization/90911 + * tree-vectorizer.h (_loop_vec_info::scalar_loop_scaling): New field. + (LOOP_VINFO_SCALAR_LOOP_SCALING): new. + * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize + scalar_loop_scaling. + (vect_transform_loop): Scale scalar loop profile if needed. + * tree-vect-loop-manip.c (vect_loop_versioning): When re-using + the loop copy from if-conversion adjust edge probabilities + and scale the vectorized loop body profile, queue the scalar + profile for updating after peeling. + +2019-07-04 Jan Hubicka <jh@suse.cz> + + * tree-ssa-alias.c (decl_refs_may_alias_p): Add size1 and size2 + parameters; return early for must-alias. + (indirect_ref_may_alias_decl_p): Likewise; when establishing + outer types match, try nonoverlapping_component_refs + if must-alias is not obvious. + (indirect_refs_may_alias_p): Likewise. + (refs_may_alias_p_2): Likewise. + +2019-07-04 Richard Biener <rguenther@suse.de> + + * tree-ssa-sccvn.h (vn_reference_lookup): Add last_vuse_ptr + argument. + * tree-ssa-sccvn.c (last_vuse_ptr, vn_walk_kind): Move + globals into... + (struct vn_walk_cb_data): New callback data struct. + (vn_reference_lookup_2): Adjust. + (vn_reference_lookup_3): Likewise. + (vn_reference_lookup_pieces): Likewise. + (vn_reference_lookup): Likewise, get last_vuse_ptr argument. + (visit_reference_op_load): Adjust. + +2019-07-04 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/91063 + * tree-vect-stmts.c (vect_init_vector): Call gsi_remove to remove + stmt from stmts sequence before calling vect_init_vector_1. + Formatting fix. + +2019-07-04 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org> + + PR target/88833 + * fwprop.c (reg_single_def_p): New function. + (propagate_rtx_1): Add unconditional else inside RTX_EXTRA case. + (forward_propagate_into): New parameter reg_prop_only + with default value false. + Propagate def's src into loop only if SET_SRC and SET_DEST + of def_set have single definitions. + Likewise if reg_prop_only is set to true. + (fwprop): New param fwprop_addr_p. + Integrate fwprop_addr into fwprop. + (fwprop_addr): Remove. + (pass_rtl_fwprop_addr::execute): Call fwprop with arg set + to true. + (pass_rtl_fwprop::execute): Call fwprop with arg set to false. + * simplify-rtx.c (simplify_subreg): Add case for vector comparison. + * config/i386/sse.md (UNSPEC_BLENDV): Adjust pattern. + +2019-07-04 Jakub Jelinek <jakub@redhat.com> + + * omp-low.c (lower_omp_scan): Call lower_omp on stmt's body + in worksharing loop scans. + + PR tree-optimization/91074 + * omp-low.c (lower_omp_for_scan): Set DECL_GIMPLE_REG_P on cplx + temporary. + + PR rtl-optimization/90756 + * explow.c (promote_ssa_mode): Always use TYPE_MODE, don't bypass it + for VECTOR_TYPE_P. + +2019-07-03 Dennis Zhang <dennis.zhang@arm.com> + + * config/aarch64/aarch64.md: Remove redundant constraints from + define_expand but keep some patterns untouched if they are + specially selected by TARGET_SECONDARY_RELOAD hook. + * config/aarch64/aarch64-sve.md: Likewise. + * config/aarch64/atomics.md: Remove redundant constraints from + define_expand. + * config/aarch64/aarch64-simd.md: Likewise. + +2019-07-03 Iain Sandoe <iain@sandoe.co.uk> + + * config/darwin.h (DRIVER_SELF_SPECS): Remove the linker cases. + (RDYNAMIC): Rename to, DARWIN_RDYNAMIC. + (DARWIN_PIE_SPEC, DARWIN_NOPIE_SPEC): Adjust to remove the Xlinker + clauses. + (LINK_COMMAND_SPEC_A): Add DARWIN_RDYNAMIC, DARWIN_PIE_SPEC and + DARWIN_NOPIE_SPEC. + +2019-07-03 Iain Sandoe <iain@sandoe.co.uk> + + * config/darwin.h (REAL_LIBGCC_SPEC): Adjust for earlier Darwin. + (STARTFILE_SPEC): Split crt3 into a separate spec. + (DARWIN_EXTRA_SPECS): Add crt2 and crt3 spec. + (DARWIN_CRT2_SPEC): New. + (DARWIN_CRT3_SPEC): New. + (MIN_LD64_OMIT_STUBS): Revise to 62.1. + * config/rs6000/darwin.h (DARWIN_CRT2_SPEC): Revise conditions. + (DARWIN_CRT3_SPEC): New. + +2019-07-03 Michael Meissner <meissner@linux.ibm.com> + + * config/rs6000/altivec.md (altivec_mov<mode>, VM2 iterator): + Change the RTL attribute "length" from "4" to "*" to allow the + length attribute to be adjusted automatically for prefixed load, + store, and add immediate instructions. + * config/rs6000/rs6000.md (extendhi<mode>2, EXTHI iterator): + Likewise. + (extendsi<mode>2, EXTSI iterator): Likewise. + (movsi_internal1): Likewise. + (movsi_from_sf): Likewise. + (movdi_from_sf_zero_ext): Likewise. + (mov<mode>_internal): Likewise. + (movcc_internal1, QHI iterator): Likewise. + (mov<mode>_softfloat, FMOVE32 iterator): Likewise. + (movsf_from_si): Likewise. + (mov<mode>_hardfloat32, FMOVE64 iterator): Likewise. + (mov<mode>_softfloat64, FMOVE64 iterator): Likewise. + (mov<mode>, FMOVE128 iterator): Likewise. + (movdi_internal64): Likewise. + * config/rs6000/vsx.md (vsx_le_permute_<mode>, VSX_TI iterator): + Likewise. + (vsx_le_undo_permute_<mode>, VSX_TI iterator): Likewise. + (vsx_mov<mode>_64bit, VSX_M iterator): Likewise. + (vsx_mov<mode>_32bit, VSX_M iterator): Likewise. + (vsx_splat_v4sf): Likewise. + +2019-07-03 Mark Wielaard <mark@klomp.org> + + PR debug/90981 + * dwarf2out.c (add_top_level_skeleton_die_attrs): Only add + DW_AT_addr_base if there is actually a .debug_addr section with + addresses. + (output_addr_table): Add DWARF5 table header generation here after + checking there are actually any addresses from... + (dwarf2out_finish): ...here. + +2019-07-03 Richard Biener <rguenther@suse.de> + + PR middle-end/91069 + * match.pd (vec_perm -> bit_insert): Fix element read from + first vector. + +2019-07-03 Martin Liska <mliska@suse.cz> + + * dbgcnt.def (DEBUG_COUNTER): Add match debug counter. + * genmatch.c (dt_simplify::gen_1): Generate dbgcnt + condition. + * generic-match-head.c: Include dbgcnt.h. + * gimple-match-head.c: Likewise. + +2019-07-03 Martin Liska <mliska@suse.cz> + + * gcov-counter.def (GCOV_COUNTER_V_SINGLE): Remove. + (GCOV_COUNTER_V_TOPN): New. + (GCOV_COUNTER_V_INDIR): Use _topn. + * gcov-io.h (GCOV_DISK_SINGLE_VALUES): Remove. + (GCOV_TOPN_VALUES): New. + (GCOV_SINGLE_VALUE_COUNTERS): Remove. + (GCOV_TOPN_VALUES_COUNTERS): New. + * profile.c (instrument_values): Use HIST_TYPE_TOPN_VALUES. + * tree-profile.c: + (gimple_init_gcov_profiler): Rename variables from one_value + to topn_values. + (gimple_gen_one_value_profiler): Remove. + (gimple_gen_topn_values_profiler): New function. + * value-prof.c (dump_histogram_value): Use TOPN_VALUES + names instead of SINGLE_VALUE. + (stream_out_histogram_value): Likewise. + (stream_in_histogram_value): Likewise. + (get_most_common_single_value): Likewise. + (gimple_divmod_fixed_value_transform): Likewise. + (gimple_stringops_transform): Likewise. + (gimple_divmod_values_to_profile): Likewise. + (gimple_stringops_values_to_profile): Likewise. + (gimple_find_values_to_profile): Likewise. + * value-prof.h (enum hist_type): Rename to TOPN. + (gimple_gen_one_value_profiler): Remove. + (gimple_gen_topn_values_profiler): New. + +2019-07-03 Eric Botcazou <ebotcazou@adacore.com> + + * dwarf2out.c (add_scalar_info): Add back refererence to existing DIE + if it has the DW_AT_data_member_location attribute. + +2019-07-03 Richard Biener <rguenther@suse.de> + + * gimple-pretty-print.c (dump_ternary_rhs): Fix BIT_INSERT_EXPR + dumping. + +2019-07-03 Sylvia Taylor <sylvia.taylor@arm.com> + + * config/aarch64/aarch64.md (FP_REGNUM): New constant. + (tlsdesc_small_advsimd_<mode>): Add use of FP_REGNUM. + (tlsdesc_small_sve_<mode>): Likewise. + +2019-07-03 Martin Liska <mliska@suse.cz> + + * Makefile.in: Define ZSTD_LIB. + * common.opt: Adjust compression level + to support also zstd levels. + * config.in: Regenerate. + * configure: Likewise. + * configure.ac: Add --with-zstd and --with-zstd-include options + and detect ZSTD. + * doc/install.texi: Mention zstd dependency. + * gcc.c: Print supported LTO compression algorithms. + * lto-compress.c (lto_normalized_zstd_level): Likewise. + (lto_compression_zstd): Likewise. + (lto_uncompression_zstd): Likewise. + (lto_end_compression): Dispatch in between zlib and zstd. + (lto_compression_zlib): Mark with ATTRIBUTE_UNUSED. + (lto_uncompression_zlib): Make it static. + * lto-compress.h (lto_end_uncompression): Fix GNU coding style. + * lto-section-in.c (lto_get_section_data): Pass info + about used compression. + * lto-streamer-out.c: By default use zstd when possible. + * timevar.def (TV_IPA_LTO_DECOMPRESS): Rename to decompression + (TV_IPA_LTO_COMPRESS): Likewise for compression. + +2019-07-03 Martin Liska <mliska@suse.cz> + + * lto-section-in.c (lto_get_section_data): Add "lto" section. + * lto-section-out.c (lto_destroy_simple_output_block): Never + compress LTO_section_lto section. + * lto-streamer-out.c (produce_asm): Do not set major_version + and minor_version. + (lto_output_toplevel_asms): Likewise. + (produce_lto_section): New function. + (lto_output): Call produce_lto_section. + (lto_write_mode_table): Do not set major_version and + minor_version. + (produce_asm_for_decls): Likewise. + * lto-streamer.h (enum lto_section_type): Add LTO_section_lto + type. + (struct lto_header): Remove. + (struct lto_section): New struct. + (struct lto_simple_header): Do not inherit from lto_header. + (struct lto_file_decl_data): Add lto_section_header field. + +2019-07-03 Martin Liska <mliska@suse.cz> + + * lra-eliminations.c (eliminate_regs_in_insn): Remove + dead assignemts. + * reg-stack.c (check_asm_stack_operands): Likewise. + * tree-ssa-structalias.c (create_function_info_for): Likewise. + * tree-vect-generic.c (expand_vector_operations_1): Likewise. + * config/i386/i386-expand.c (ix86_expand_sse2_mulvxdi3): Use + force_expand_binop. + +2019-07-03 Martin Liska <mliska@suse.cz> + + PR tree-optimization/90892 + * builtins.c (inline_expand_builtin_string_cmp): Handle '\0' + in string constants. + +2019-07-03 Martin Liska <mliska@suse.cz> + + PR middle-end/90899 + * multiple_target.c (create_dispatcher_calls): Add to comdat + group only if set for ifunc. + +2019-07-03 Martin Liska <mliska@suse.cz> + + PR target/88056 + * config/i386/host-mingw32.c (mingw32_gt_pch_use_address): + Define local_object_name in outer scope in order to handle + use-after-scope issue. + +2019-07-03 Martin Liska <mliska@suse.cz> + + * common.opt: Add fprofile-note. + * coverage.c (coverage_init): Append the option + to bbg_file_name. + * doc/invoke.texi: Document -fprofile-note. + +2019-07-03 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/91033 + * tree-vectorizer.h (vect_mark_stmts_to_be_vectorized, + vect_analyze_data_refs): Add bool * arguments. + * tree-vect-data-refs.c (vect_analyze_data_refs): Add fatal argument, + if failure is due to scatter/gather, set *fatal to false if non-NULL. + * tree-vect-stmts.c (vect_mark_stmts_to_be_vectorized): Likewise. + * tree-vect-loop.c (vect_analyze_loop_2): Adjust + vect_mark_stmts_to_be_vectorized and vect_analyze_data_refs callers. + * tree-vect-slp.c (vect_slp_analyze_bb_1): Adjust + vect_analyze_data_refs caller. + + * tree-core.h (enum omp_clause_code): Add OMP_CLAUSE__SCANTEMP_ + clause. + * tree.h (OMP_CLAUSE_DECL): Use OMP_CLAUSE__SCANTEMP_ instead of + OMP_CLAUSE__CONDTEMP_ as range's upper bound. + (OMP_CLAUSE__SCANTEMP__ALLOC, OMP_CLAUSE__SCANTEMP__CONTROL): Define. + * tree.c (omp_clause_num_ops, omp_clause_code_name): Add + OMP_CLAUSE__SCANTEMP_ entry. + (walk_tree_1): Handle OMP_CLAUSE__SCANTEMP_. + * tree-pretty-print.c (dump_omp_clause): Likewise. + * tree-nested.c (convert_nonlocal_omp_clauses, + convert_local_omp_clauses): Likewise. + * omp-general.h (struct omp_for_data): Add have_scantemp and + have_nonctrl_scantemp members. + * omp-general.c (omp_extract_for_data): Initialize them. + * omp-low.c (struct omp_context): Add scan_exclusive member. + (scan_omp_1_stmt): Don't unnecessarily mask gimple_omp_for_kind + result again with GF_OMP_FOR_KIND_MASK. Initialize also + ctx->scan_exclusive. + (lower_rec_simd_input_clauses): Use ctx->scan_exclusive instead + of !ctx->scan_inclusive. + (lower_rec_input_clauses): Simplify gimplification of dtors using + gimplify_and_add. For non-is_simd test OMP_CLAUSE_REDUCTION_INSCAN + rather than rvarp. Handle OMP_CLAUSE_REDUCTION_INSCAN in worksharing + loops. Don't add barrier for reduction_omp_orig_ref if + ctx->scan_??xclusive. + (lower_reduction_clauses): Don't do anything for ctx->scan_??xclusive. + (lower_omp_scan): Use ctx->scan_exclusive instead + of !ctx->scan_inclusive. Handle worksharing loops with inscan + reductions. Use new_vard != new_var instead of repeated + omp_is_reference calls. + (omp_find_scan, lower_omp_for_scan): New functions. + (lower_omp_for): Call lower_omp_for_scan for worksharing loops with + inscan reductions. + * omp-expand.c (expand_omp_scantemp_alloc): New function. + (expand_omp_for_static_nochunk): Handle fd->have_nonctrl_scantemp + and fd->have_scantemp. + + * gimplify.c (gimplify_scan_omp_clauses): For inscan reductions + on worksharing loop propagate it as shared clause to containing + combined parallel. + + * omp-expand.c (expand_omp_for_static_nochunk, + expand_omp_for_static_chunk): For nowait worksharing loop with + conditional lastprivate clause(s), emit GOMP_loop_end_nowait call + at the end. + +2019-07-02 qing zhao <qing.zhao@oracle.com> + + PR preprocessor/90581 + * doc/cppopts.texi: Add document for -fmax-include-depth. + * doc/invoke.texi (Preprocessor Options): List -fmax-include-depth. + +2019-07-02 Uroš Bizjak <ubizjak@gmail.com> + + * config/i386/mmx.md (mmx_pack<s_trunsuffix>swb): + Use TARGET_SSE2 && SSE_REGNO_P in split condition. + (mmx_packssdw): Ditto. + (mmx_punpckhbw): Ditto. + (mmx_punpcklbw): Ditto. + (mmx_punpckhwd): Ditto. + (mmx_punpcklwd): Ditto. + (mmx_punpckhdq): Ditto. + (mmx_punpckldq): Ditto. + (*vec_dupv4hi): Ditto. + (*vec_dupv2si): Ditto. + (mmx_pmovmskb): Ditto. + * config/i386/sse.md (sse_cvtpi2ps): Use + TARGET_SSE2 && SSE_REG_P in split condition. + (ssse3_ph<plusminus_mnemonic>wv4hi3): Use + TARGET_SSSE3 && SSE_REGNO_P in split condition. + (ssse3_ph<plusminus_mnemonic>dv2si3): Ditto. + (ssse3_pshufbv8qi3): Ditto. + (ssse3_palignrdi): Ditto. + +2019-07-02 Andrew Stubbs <ams@codesourcery.com> + + * config/gcn/gcn.md (movdi_symbol_save_scc): Convert to define_insn + with inlined save and restore. + +2019-07-02 Eric Botcazou <ebotcazou@adacore.com> + + * cfgexpand.c (pass_expand::execute): Deal specially with instructions + to be inserted on single successor edge of the entry block. Then call + commit_edge_insertions instead of inserting the instructions manually. + * cfgrtl.c (commit_edge_insertions): Do not verify flow info during + RTL expansion and rebuild jump labels chain. + +2019-07-02 Richard Biener <rguenther@suse.de> + + * tree-core.h (enum tree_index): Add TI_CHREC_DONT_KNOW and + TI_CHREC_KNOWN. + * tree.h (chrec_not_analyzed_yet, chrec_dont_know, chrec_known): + Define here. + * tree.c (build_common_tree_nodes): Initialize them. + * tree-chrec.h (chrec_not_analyzed_yet, chrec_dont_know, chrec_known): + Make declarations comments. + * tree-scalar-evolution.c (chrec_not_analyzed_yet, chrec_dont_know, + chrec_known): Remove definitions. + (initialize_scalar_evolutions_analyzer): Remove. + (scev_initialize): Do not call initialize_scalar_evolutions_analyzer. + * tree-streamer.c (preload_common_nodes): Do not preload + TI_CHREC_DONT_KNOW or TI_CHREC_KNOWN. + +2019-07-02 Jan Hubicka <jh@suse.cz> + + * tree-ssa-alias.c (aliasing_component_refs_p): Remove forgotten + sanity check. + +2019-07-02 Jan Hubicka <jh@suse.cz> + + * tree-ssa-alias.c (nonoverlapping_component_refs_for_decl_p): Rename + to .. + (nonoverlapping_component_refs_since_match_p): ... this one; + handle also non-decl bases; return -1 if search gave up. + (alias_stats): Rename nonoverlapping_component_refs_of_decl_p_may_alias, + nonoverlapping_component_refs_of_decl_p_no_alias to + nonoverlapping_component_refs_since_match_p_may_alias, + nonoverlapping_component_refs_since_match_p_no_alias. + (dump_alias_stats): Update dumping. + (aliasing_matching_component_refs_p): Break out from ...; + dispatch to nonoverlapping_component_refs_for_decl_p + and nonoverlapping_component_refs_since_match_p. + (aliasing_component_refs_p): ... here; call + nonoverlapping_component_refs_p in scenarios where we can not + precisely determine base match. + (decl_refs_may_alias_p): Use + nonoverlapping_component_refs_since_match_p. + (indirect_ref_may_alias_decl_p): Do not call + nonoverlapping_component_refs_p. + (indirect_refs_may_alias_p): Likewise. + +2019-07-02 Jan Hubicka <jh@suse.cz> + + * tree-inline.c (remap_gimple_stmt): Do not subtitute handled components + to clobber of return value. + +2019-07-02 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/cortex-a57.md (cortex_a57_neon_type): Use neon_arith_basic + for is_neon_type instructions that have not already been categorized. + +2019-07-02 Richard Biener <rguenther@suse.de> + + PR tree-optimization/58483 + * tree-ssa-scopedtables.c (avail_expr_hash): Use OEP_ADDRESS_OF + for MEM_REF base hashing. + (equal_mem_array_ref_p): Likewise for base comparison. + +2019-07-01 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/rs6000.md (signbit<mode>2_dm): Make this a + parameterized name. + (signbit<mode>2): Use that name. Simplify. + +2019-07-01 Joern Rennecke <joern.rennecke@riscy-ip.com> + + PR middle-end/66726 + * tree-ssa-phiopt.c (factor_out_conditional_conversion): + Tune heuristic from PR71016 to allow MIN / MAX. + +2019-07-01 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/rs6000.md (ieee_128bit_vsx_abs<mode>2): Make this a + parameterized name. + (abs<mode>2): Use that name. Simplify. + +2019-07-01 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/rs6000.md (ieee_128bit_vsx_neg<mode>2): Make this a + parameterized name. + (neg<mode>2): Use that name. Simplify. + +2019-07-01 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/rs6000.md (abs<mode>2_hw): Make this a parameterized + name. + (abs<mode>2): Use that name. Simplify. + +2019-07-01 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/rs6000.md (neg<mode>2_hw): Make this a parameterized + name. + (neg<mode>2): Use that name. Simplify. + +2019-07-01 Uroš Bizjak <ubizjak@gmail.com> + + * config/i386/i386.md ("isa" attribute): Add sse_noavx. + ("enabled" attribute): Handle sse_noavx isa attribute. + * config/i386/mmx.md (*vec_dupv2sf): Add "isa" attribute. + Use TARGET_SSE && SSE_REGNO_P in split condition. + (*vec_dupv2sf): Ditto. + +2019-07-01 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/rs6000.md (extenddf<mode>2): Make this a parameterized + name. + (floatsi<mode>2): Use that name. Simplify. + +2019-07-01 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/rs6000.md (extenddf<mode>2_fprs): Make this a + parameterized name. + (extenddf<mode>2_vsx): Make this a parameterized name. + (extenddf<mode>2): Use those names. Simplify. + +2019-07-01 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/rs6000.md (eh_set_lr_<mode>): Make this a parameterized + name. + (eh_return): Use that name. Simplify. + +2019-07-01 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/rs6000.md (ctr<mode>): Make this a parameterized name. + (doloop_end): Use that name. Simplify. + +2019-07-01 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/rs6000.md (indirect_jump<mode>_nospec): Make this a + parameterized name. + (indirect_jump): Use that name. Simplify. + +2019-07-01 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/rs6000.md (abs<mode>2_internal): Make this a + parameterized name. + (abs<mode>2): Use that name. Simplify. + +2019-07-01 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/rs6000.md (fix_trunc<mode>si2_fprs): Make this a + parameterized name. + (fix_trunc<mode>si2): Use that name. Simplify. + +2019-07-01 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/rs6000.md (neg<mode>2): Make this a parameterized name. + (allocate_stack): Use that name. Simplify. + +2019-07-01 Martin Sebor <msebor@redhat.com> + + PR middle-end/90923 + * hash-map.h (hash_map::put): On insertion invoke element ctor. + (hash_map::get_or_insert): Same. Reformat comment. + * hash-set.h (hash_set::add): On insertion invoke element ctor. + * hash-map-tests.c (test_map_of_type_with_ctor_and_dtor): New. + * hash-set-tests.c (test_map_of_type_with_ctor_and_dtor): New. + * hash-table.h (hash_table::operator=): Prevent copy assignment. + (hash_table::hash_table (const hash_table&)): Use copy ctor + instead of assignment to copy elements. + +2019-07-01 Wilco Dijkstra <wdijkstr@arm.com> + John David Anglin <danglin@gcc.gnu.org> + + PR target/90963 + * config/pa/pa.md (builtin_longjmp): Restore hard_frame_pointer_rtx + using saved frame pointer. + +2019-07-01 Eric Botcazou <ebotcazou@adacore.com> + + PR middle-end/64242 + * config/sparc/sparc.md (nonlocal_goto): Restore frame pointer last. + Add frame clobber and schedule blockage. + +2019-07-01 Sandra Loosemore <sandra@codesourcery.com> + + * doc/invoke.texi (Link Options): Further editorial changes to + -flinker-output docs. + +2019-07-01 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/rs6000.c (rs6000_force_indexed_or_indirect_mem): + Load both operands of a PLUS into registers separately. + +2019-07-01 Andreas Krebbel <krebbel@linux.ibm.com> + + * config/s390/vector.md: Fix shift count operand printing. + +2019-07-01 Richard Sandiford <richard.sandiford@arm.com> + + * ira-lives.c (process_bb_node_lives): Use ira_setup_alts. + +2019-07-01 Richard Sandiford <richard.sandiford@arm.com> + + * ira.c (ira_get_dup_out_num): Don't punt for earlyclobbers. + Use recog_data to test for an output operand. + +2019-07-01 Richard Sandiford <richard.sandiford@arm.com> + + * ira.c (ira_setup_alts): If any valid alternatives have zero cost, + exclude any others that are disparaged or that are bound to need + a reload or spill. + (ira_get_dup_out_num): Expand comment. + +2019-07-01 Richard Sandiford <richard.sandiford@arm.com> + + * ira.c (ira_setup_alts): Use preprocess_constraints to get the + constraint string for each operand/alternative combo. Only handle + '%' at the start of constraint strings, and look for it outside + the main loop. + +2019-07-01 Richard Sandiford <richard.sandiford@arm.com> + + * ira-int.h (ira_setup_alts, ira_get_dup_out_num): Use + alternative_mask instead of HARD_REG_SET to represent a + bitmask of alternatives. + * ira.c (ira_setup_alts, ira_get_dup_out_num): Likewise. + * ira-conflicts.c (add_insn_allocno_copies): Likewise. + +2019-07-01 Martin Liska <mliska@suse.cz> + + * edit-context.c (test_applying_fixits_unreadable_file): Do not + use () for a constructor call. + (test_applying_fixits_line_out_of_range): Likewise. + * ggc-page.c (alloc_page): Use (void *) for %p printf format + argument. + (free_page): Likewise. + +2019-07-01 Vladislav Ivanishin <vlad@ispras.ru> + + * gdbhooks.py (GdbPrettyPrinters.add_printer_for_types): Reorder + parameter names to match usage (no functional change). + (GdbPrettyPrinters.add_printer_for_regex): Ditto. + +2019-07-01 Richard Biener <rguenther@suse.de> + + * tree-ssa-sccvn.c (class pass_fre): Add may_iterate + pass parameter. + (pass_fre::execute): Honor it. + * passes.def: Adjust pass_fre invocations to allow iterating, + add non-iterating pass_fre before late threading/dom. + +2019-07-01 Richard Biener <rguenther@suse.de> + + * tree-ssa-sccvn.c (copy_reference_ops_from_ref): Adjust + TARGET_MEM_REF handling to also handle address-taken ones. + +2019-07-01 Hongtao Liu <hongtao.liu@intel.com> + + * doc/sourcebuild.texi (Effective-Target Keywords, Other + hardware attributes): Document avx512vp2intersect. + +2019-06-30 Uroš Bizjak <ubizjak@gmail.com> + + * config/i386/sse.md (ssse3_abs<mode>2): Rename from abs<mode>2. + (abs<mode>2): New expander. + * config/i386/i386-builtin.def (__builtin_ia32_pabsb): + Use CODE_FOR_ssse3_absv8qi2. + (__builtin_ia32_pabsw): Use CODE_FOR_ssse3_absv4hi2. + (__builtin_ia32_pabsd): Use CODE_FOR_ssse3_absv2si2. + +2019-06-30 Uroš Bizjak <ubizjak@gmail.com> + + * config/i386/i386.md (mmx_isa): Rename x64, x64_noavx and x64_avx + to sse, sse_noavx and avx. Update all uses. + +2019-06-30 Uroš Bizjak <ubizjak@gmail.com> + + * config/i386/mmx.md (sse_movntq): Add "isa" attribute. + (*mmx_<plusminus_insn><mode>3): Ditto. + (*mmx_mulv4hi3"): Ditto. + (*mmx_smulv4hi3_highpart): Ditto. + (*mmx_umulv4hi3_highpart): Ditto. + (*mmx_pmaddwd): Ditto. + (*sse2_umulv1siv1di3): Ditto. + (*mmx_<code>v4hi3): Ditto. + (*mmx_<code>v8qi3): Ditto. + (mmx_ashr<mode>3): Ditto. + ("mmx_<shift_insn><mode>3): Ditto. + (*mmx_eq<mode>3): Ditto. + (mmx_gt<mode>3): Ditto. + (mmx_andnot<mode>3): Ditto. + (*mmx_<code><mode>3): Ditto. + (*mmx_pinsrw): Ditto. + (*mmx_pextrw): Ditto. + (mmx_pshufw_1): Ditto. + (*mmx_uavgv8qi3): Ditto. + (*mmx_uavgv4hi3): Ditto. + ("mmx_psadbw): Ditto. + * config/i386/sse.md (sse_cvtps2pi): Ditto. + (sse_cvttps2pi): Ditto. + (ssse3_pmaddubsw): Ditto. + (*ssse3_pmulhrswv4hi3): Ditto. + (ssse3_psign<mode>3): Ditto. + +2019-06-29 Eric Botcazou <ebotcazou@adacore.com> + + * expr.c (expand_expr_real_1) <BIT_FIELD_REF>: Apply the big-endian + adjustment for bit-fields to all aggregate types. + +2019-06-28 Michael Meissner <meissner@linux.ibm.com> + + * config/rs6000/predicates.md (pcrel_address): Use + SYMBOL_REF_LOCAL_P to determine if a label is local. + (pcrel_external_address): New predicate. + (non_prefixed_mem_operand): Delete, predicate not used. + * config/rs6000/rs6000.h (SYMBOL_FLAG_PCREL_P): Delete, we now use + SYMBOL_REF_LOCAL_P to determine if we can use pc-relative + addressing. + (SYMBOL_REF_PCREL_P): Likewise. + + PR target/91009 + * config/rs6000/rs6000.md (floatsi<mode>2_lfiwax): Add non-VSX + alternative. + (floatsi<mode>2_lfiwax_mem): Add non-VSX alternative. + (floatunssi<mode>2_lfiwzx): Add non-VSX alternative. + (floatunssi<mode>2_lfiwzx_mem): Add non-VSX alternative. + +2019-06-28 Iain Sandoe <iain@sandoe.co.uk> + + * config.gcc (powerpc-*-darwin*, powerpc64-*-darwin*): Remove + override on extra_headers. + +2019-06-28 Iain Sandoe <iain@sandoe.co.uk> + + * config/darwin-c.c (pop_field_alignment): Quote #pragma options. + * config/darwin-driver.c (darwin_default_min_version): Remove newline + from warning. + (darwin_driver_init): Likewise. + +2019-06-28 Jan Beulich <jbeulich@suse.com> + + * config/i386/sse.md (vgf2p8affineinvqb_<mode><mask_name>, + vgf2p8affineqb_<mode><mask_name>, vgf2p8mulb_<mode><mask_name>): + Eliminate redundant alternative. + +2019-06-28 Jan Beulich <jbeulich@suse.com> + + * config/i386/sse.md (vgf2p8affineinvqb_<mode><mask_name>, + vgf2p8affineqb_<mode><mask_name>): Drop % constraint modifier. + Use vector_operand. + +2019-06-28 Claudiu Zissulescu <claziss@synopsys.com> + + * config/arc/arc.c (arc_rtx_costs): All short instructions are + having a lower cost regardless of the speed option. + +2019-06-28 Jan Beulich <jbeulich@suse.com> + + * config/i386/sse.md (sse2_cvtpd2pi, sse2_cvttpd2pi): Use + vector_operand plus, on both alternatives, "Bm" constraint. + +2019-06-28 Dennis Zhang <dennis.zhang@arm.com> + + * config/arm/arm.md: Remove redundant constraints from + define_expand but leave reload_inm and reload_outm patterns + untouched since they need special constraints to work. + * config/arm/arm-fixed.md: Remove redundant constraints from + define_expand. + * config/arm/iwmmxt.md: Likewise. + * config/arm/neon.md: Likewise. + * config/arm/sync.md: Likewise. + * config/arm/thumb1.md: Likewise. + * config/arm/vec-common.md: Likewise. + +2019-06-27 Ilia Diachkov <ilia.diachkov@optimitech.com> + + * doc/install.texi: Document --disable-tm-clone-registry. + +2019-06-27 Jakub Jelinek <jakub@redhat.com> + + PR c++/91024 + * gimplify.c (collect_fallthrough_labels): Ignore GIMPLE_PREDICT + statements. + + PR tree-optimization/91010 + * tree-vect-stmts.c (scan_operand_equal_p): If offset1 == offset2, + return true. Otherwise, don't call operand_equal_p if offset1 or + offset2 is NULL and just return false. + +2019-06-27 Iain Sandoe <iain@sandoe.co.uk> + + * config/rs6000/rs6000.c (darwin_rs6000_override_options): Honour + user-specified float mode choice for kernel mode code. + +2019-06-27 Iain Sandoe <iain@sandoe.co.uk> + + * config/rs6000/darwin.h (ENDFILE_SPEC): Correct whitespace in the + spec. + +2019-06-27 Iain Sandoe <iain@sandoe.co.uk> + + * config/rs6000/rs6000.c (darwin_rs6000_override_options): Do not + use longcall for 64b code. + +2019-06-27 Aaron Sawdey <acsawdey@linux.ibm.com> + + * builtins.c (get_memory_rtx): Fix comment. + * optabs.def (movmem_optab): Change to cpymem_optab. + * expr.c (emit_block_move_via_cpymem): Change movmem to cpymem. + (emit_block_move_hints): Change movmem to cpymem. + * defaults.h: Change movmem to cpymem. + * targhooks.c (get_move_ratio): Change movmem to cpymem. + (default_use_by_pieces_infrastructure_p): Ditto. + * config/aarch64/aarch64-protos.h: Change movmem to cpymem. + * config/aarch64/aarch64.c (aarch64_expand_movmem): Change movmem + to cpymem. + * config/aarch64/aarch64.h: Change movmem to cpymem. + * config/aarch64/aarch64.md (movmemdi): Change name to cpymemdi. + * config/alpha/alpha.h: Change movmem to cpymem in comment. + * config/alpha/alpha.md (movmemqi, movmemdi, *movmemdi_1): Change + movmem to cpymem. + * config/arc/arc-protos.h: Change movmem to cpymem. + * config/arc/arc.c (arc_expand_movmem): Change movmem to cpymem. + * config/arc/arc.h: Change movmem to cpymem in comment. + * config/arc/arc.md (movmemsi): Change movmem to cpymem. + * config/arm/arm-protos.h: Change movmem to cpymem in names. + * config/arm/arm.c (arm_movmemqi_unaligned, arm_gen_movmemqi, + gen_movmem_ldrd_strd, thumb_expand_movmemqi) Change movmem to cpymem. + * config/arm/arm.md (movmemqi): Change movmem to cpymem. + * config/arm/thumb1.md (movmem12b, movmem8b): Change movmem to cpymem. + * config/avr/avr-protos.h: Change movmem to cpymem. + * config/avr/avr.c (avr_adjust_insn_length, avr_emit_movmemhi, + avr_out_movmem): Change movmem to cpymem. + * config/avr/avr.md (movmemhi, movmem_<mode>, movmemx_<mode>): + Change movmem to cpymem. + * config/bfin/bfin-protos.h: Change movmem to cpymem. + * config/bfin/bfin.c (single_move_for_movmem, bfin_expand_movmem): + Change movmem to cpymem. + * config/bfin/bfin.h: Change movmem to cpymem in comment. + * config/bfin/bfin.md (movmemsi): Change name to cpymemsi. + * config/c6x/c6x-protos.h: Change movmem to cpymem. + * config/c6x/c6x.c (c6x_expand_movmem): Change movmem to cpymem. + * config/c6x/c6x.md (movmemsi): Change name to cpymemsi. + * config/frv/frv.md (movmemsi): Change name to cpymemsi. + * config/ft32/ft32.md (movmemsi): Change name to cpymemsi. + * config/h8300/h8300.md (movmemsi): Change name to cpymemsi. + * config/i386/i386-expand.c (expand_set_or_movmem_via_loop, + expand_set_or_movmem_via_rep, expand_movmem_epilogue, + expand_setmem_epilogue_via_loop, expand_set_or_cpymem_prologue, + expand_small_cpymem_or_setmem, + expand_set_or_cpymem_prologue_epilogue_by_misaligned_moves, + expand_set_or_cpymem_constant_prologue, + ix86_expand_set_or_cpymem): Change movmem to cpymem. + * config/i386/i386-protos.h: Change movmem to cpymem. + * config/i386/i386.h: Change movmem to cpymem in comment. + * config/i386/i386.md (movmem<mode>): Change name to cpymem. + (setmem<mode>): Change expansion function name. + * config/lm32/lm32.md (movmemsi): Change name to cpymemsi. + * config/m32c/blkmov.md (movmemhi, movmemhi_bhi_op, movmemhi_bpsi_op, + movmemhi_whi_op, movmemhi_wpsi_op): Change movmem to cpymem. + * config/m32c/m32c-protos.h: Change movmem to cpymem. + * config/m32c/m32c.c (m32c_expand_movmemhi): Change movmem to cpymem. + * config/m32r/m32r.c (m32r_expand_block_move): Change movmem to cpymem. + * config/m32r/m32r.md (movmemsi, movmemsi_internal): Change movmem + to cpymem. + * config/mcore/mcore.md (movmemsi): Change name to cpymemsi. + * config/microblaze/microblaze.c: Change movmem to cpymem in comment. + * config/microblaze/microblaze.md (movmemsi): Change name to cpymemsi. + * config/mips/mips.c (mips_use_by_pieces_infrastructure_p): + Change movmem to cpymem. + * config/mips/mips.h: Change movmem to cpymem. + * config/mips/mips.md (movmemsi): Change name to cpymemsi. + * config/nds32/nds32-memory-manipulation.c + (nds32_expand_movmemsi_loop_unknown_size, + nds32_expand_movmemsi_loop_known_size, nds32_expand_movmemsi_loop, + nds32_expand_movmemsi_unroll, + nds32_expand_movmemsi): Change movmem to cpymem. + * config/nds32/nds32-multiple.md (movmemsi): Change name to cpymemsi. + * config/nds32/nds32-protos.h: Change movmem to cpymem. + * config/pa/pa.c (compute_movmem_length): Change movmem to cpymem. + (pa_adjust_insn_length): Change call to compute_movmem_length. + * config/pa/pa.md (movmemsi, movmemsi_prereload, movmemsi_postreload, + movmemdi, movmemdi_prereload, + movmemdi_postreload): Change movmem to cpymem. + * config/pdp11/pdp11.md (movmemhi, movmemhi1, + movmemhi_nocc, UNSPEC_MOVMEM): Change movmem to cpymem. + * config/riscv/riscv.c: Change movmem to cpymem in comment. + * config/riscv/riscv.h: Change movmem to cpymem. + * config/riscv/riscv.md: (movmemsi) Change name to cpymemsi. + * config/rs6000/rs6000.md: (movmemsi) Change name to cpymemsi. + * config/rx/rx.md: (UNSPEC_MOVMEM, movmemsi, rx_movmem): Change + movmem to cpymem. + * config/s390/s390-protos.h: Change movmem to cpymem. + * config/s390/s390.c (s390_expand_movmem, s390_expand_setmem, + s390_expand_insv): Change movmem to cpymem. + * config/s390/s390.md (movmem<mode>, movmem_short, *movmem_short, + movmem_long, *movmem_long, *movmem_long_31z): Change movmem to cpymem. + * config/sh/sh.md (movmemsi): Change name to cpymemsi. + * config/sparc/sparc.h: Change movmem to cpymem in comment. + * config/vax/vax-protos.h (vax_output_movmemsi): Remove prototype + for nonexistent function. + * config/vax/vax.h: Change movmem to cpymem in comment. + * config/vax/vax.md (movmemhi, movmemhi1): Change movmem to cpymem. + * config/visium/visium.h: Change movmem to cpymem in comment. + * config/visium/visium.md (movmemsi): Change name to cpymemsi. + * config/xtensa/xtensa.md (movmemsi): Change name to cpymemsi. + * doc/md.texi: Change movmem to cpymem and update description to match. + * doc/rtl.texi: Change movmem to cpymem. + * target.def (use_by_pieces_infrastructure_p): Change movmem to cpymem. + * doc/tm.texi: Regenerate. + +2019-06-27 Bill Schmidt <wschmidt@linux.ibm.com> + + * config/rs6000/rs6000.c (rs6000_option_override_internal): Enable + -fvariable-expansion-in-unroller by default. + * doc/invoke.texi (-fvariable-expansion-in-unroller): Document new + default for Power. + +2019-06-27 David Edelsohn <dje.gcc@gmail.com> + + Revert + 2019-06-26 David Edelsohn <dje.gcc@gmail.com> + * config.gcc (powerpc-ibm-aix*): Define target_gtfiles. + + * config.gcc(rs6000-*-*): Define target_gtfiles. + +2019-06-27 Jan Hubicka <jh@suse.cz> + + * ipa-devirt.c (odr_type_d): Add tbaa_enabled flag. + (add_type_duplicate): When odr hash is not allocated, to nothing. + (odr_based_tbaa_p): New function. + (set_type_canonical_for_odr_type): New function. + * ipa-utils.h (enable_odr_based_tbaa, odr_based_tbaa_p, + set_type_canonical_for_odr_type): New. + * tree.c (gimple_canonical_types_compatible_p): ODR types with + ODR based TBAA are not equivalent to non-ODR types. + +2019-06-27 Martin Liska <mliska@suse.cz> + + PR tree-optimization/90974 + PR rtl-optimization/90975 + PR rtl-optimization/90976 + PR target/91016 + PR tree-optimization/91017 + * config/i386/i386-expand.c (ix86_expand_rounddf_32): Remove + unused tmp. + * lra.c (lra_set_insn_recog_data): Remove a leftover from + initial commit of IRA. + * optabs.c (expand_twoval_binop): Use xop0 and xop1 instead + of op0 and op1. + * tree-vect-loop.c (vect_create_epilog_for_reduction): + Remove unused mode1. + * tree-vect-stmts.c (vectorizable_call): Remove dead assignment + to new_stmt_info. + +2019-06-27 Jakub Jelinek <jakub@redhat.com> + + PR target/90991 + * config/i386/sse.md (avx_vec_concat<mode>): Use nonimmediate_operand + instead of register_operand for operands[1], add m to its constraints + if operands[2] uses "C" constraint. Ensure in condition that if + operands[2] is not 0, then operands[1] is not a MEM. For last two + alternatives, use unaligned loads instead of aligned if operands[1] is + misaligned_operand. + +2019-06-27 Martin Liska <mliska@suse.cz> + + * asan.c (asan_emit_allocas_unpoison): Remove obviously + dead assignments. + * bt-load.c (move_btr_def): Likewise. + * builtins.c (expand_builtin_apply_args_1): Likewise. + (expand_builtin_apply): Likewise. + * cfgexpand.c (expand_asm_stmt): Likewise. + (construct_init_block): Likewise. + * cfghooks.c (verify_flow_info): Likewise. + * cfgloopmanip.c (remove_path): Likewise. + * cfgrtl.c (rtl_verify_bb_layout): Likewise. + * cgraph.c (cgraph_node::set_pure_flag): Likewise. + * combine.c (simplify_if_then_else): Likewise. + * config/i386/i386.c (ix86_setup_incoming_vararg_bounds): Likewise. + (choose_basereg): Likewise. + (ix86_expand_prologue): Likewise. + (ix86_preferred_output_reload_class): Likewise. + * cselib.c (cselib_record_sets): Likewise. + * df-scan.c (df_scan_alloc): Likewise. + * dojump.c (do_jump_by_parts_greater_rtx): Likewise. + * early-remat.c (early_remat::record_equiv_candidates): Likewise. + * emit-rtl.c (try_split): Likewise. + * graphite-scop-detection.c (assign_parameter_index_in_region): + Likewise. + * ipa-cp.c (cgraph_edge_brings_all_agg_vals_for_node): Likewise. + * ira-color.c (setup_profitable_hard_regs): Likewise. + * ira.c (rtx_moveable_p): Likewise. + * lra-eliminations.c (eliminate_regs_in_insn): Likewise. + * read-rtl.c (read_subst_mapping): Likewise. + * regrename.c (scan_rtx): Likewise. + * reorg.c (fill_slots_from_thread): Likewise. + * tree-inline.c (tree_function_versioning): Likewise. + * tree-ssa-reassoc.c (optimize_ops_list): Likewise. + * tree-ssa-sink.c (statement_sink_location): Likewise. + * tree-ssa-threadedge.c (thread_across_edge): Likewise. + * tree-vect-loop.c (vect_get_loop_niters): Likewise. + (vect_create_epilog_for_reduction): Likewise. + * tree.c (build_nonstandard_integer_type): Likewise. + +2019-06-27 Richard Biener <rguenther@suse.de> + + * tree-ssa-sccvn.c (vn_reference_lookup_3): Encode valueized RHS. + +2019-06-27 Jun Ma <JunMa@linux.alibaba.com> + + PR tree-optimization/89772 + * gimple-fold.c (gimple_fold_builtin_memchr): consider trailing nuls in + out-of-bound accesses checking. + +2019-06-27 Martin Liska <mliska@suse.cz> + + PR tree-optimization/91014 + * tree-ssa-dse.c (initialize_ao_ref_for_dse): Bail out + when LHS is NULL_TREE. + +2019-06-27 Martin Liska <mliska@suse.cz> + + * symbol-summary.h (traverse): Pass + argument a to the call of callback. + (gt_ggc_mx): Mark arguments as unused. + (gt_pch_nx): Likewise. + +2019-06-27 Kewen Lin <linkw@gcc.gnu.org> + + PR target/62147 + * loop-iv.c (find_simple_exit): Call finite_loop_p to update + finiteness. + +2019-06-26 Jeff Law <law@redhat.com> + + PR tree-optimization/90883 + * tree-ssa-dse.c (delete_dead_or_redundant_call): Fix signature. + (delete_dead_or_redundant_assignment): Likewise. + + PR tree-optimization/90883 + * tree-ssa-alias.c (stmt_kills_ref_p): Handle BUILT_IN_CALLOC. + * tree-ssa-dse.c: Update various comments to distinguish between + dead and redundant stores. + (initialize_ao_ref_for_dse): Handle BUILT_IN_CALLOC. + (dse_optimize_redundant_stores): New function. + (delete_dead_or_redundant_call): Renamed from delete_dead_call. + Distinguish between dead and redundant calls in dump output. All + callers updated. + (delete_dead_or_redundant_assignment): Similarly for assignments. + (dse_optimize_stmt): Handle _CHK variants. For statements which + store 0 into multiple memory locations, try to prove a subsequent + store is redundant. + +2019-06-26 Uroš Bizjak <ubizjak@gmail.com> + + PR target/89021 + * config/i386/i386.c (ix86_autovectorize_vector_sizes): + Autovectorize 8-byte vectors for TARGET_MMX_WITH_SSE. + +2019-06-26 Iain Sandoe <iain@sandoe.co.uk> + + * config/rs6000/rs6000-internal.h (branch_island): New typedef. + (branch_islands): New extern. + * config/rs6000/rs6000-logue.c (macho_branch_islands): Moved from + * config/rs6000/rs6000.c: .. here. + +2019-06-26 Iain Sandoe <iain@sandoe.co.uk> + + * config.gcc (powerpc*-*-linux*): Move target_gtfiles from here.. + (powerpc*-*-*) ... to here. + +2019-06-26 Jeff Law <law@redhat.com> + + * tree-ssa-dse.c (initialize_ao_ref_for_dse): Handle _chk variants of + memcpy, memmove and memset builtins. + (maybe_trim_memstar_call): Likewise. + +2019-06-26 David Edelsohn <dje.gcc@gmail.com> + + * config/rs6000/rs6000-logue.c: Add #ifndef TARGET_PROFILE_KERNEL. + +2019-06-26 David Edelsohn <dje.gcc@gmail.com> + + * config.gcc (powerpc-ibm-aix*): Define target_gtfiles. + +2019-06-26 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/rs6000-internal.h (rs6000_keep_leaf_when_profiled): New + declaration. + * config/rs6000/rs6000-logue.c (rs6000_keep_leaf_when_profiled): Remove + "static". + * config/rs6000/rs6000-logue.c (rs6000_keep_leaf_when_profiled): Delete + declaration. + +2019-06-26 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/rs6000.c: Fix previous commit, it missed some changes. + +2019-06-26 Richard Biener <rguenther@suse.de> + + PR ipa/90982 + * tree-inline.c (remap_ssa_name): Copy SSA range info. + +2019-06-26 Richard Biener <rguenther@suse.de> + + * lto-streamer.h (lto_bitmap_alloc): Remove. + (lto_bitmap_free): Likewise. + * lto-streamer.c (lto_bitmap_alloc): Remove. + (lto_bitmap_free): Likewise. + (lto_obstack): Likewise. + (lto_obstack_initialized): Likewise. + * lto-streamer-out.c (lto_output): Use own obstack for local + bitmap, free it consistently. + +2019-06-26 Jakub Jelinek <jakub@redhat.com> + + PR target/90991 + * config/i386/sse.md + (*<extract_type>_vinsert<shuffletype><extract_suf>_0): Use vmovupd, + vmovups, vmovdqu, vmovdqu32 or vmovdqu64 instead of the aligned + insns if operands[2] is misaligned_operand. + +2019-06-26 Li Jia He <helijia@linux.ibm.com> + + * config/rs6000/rs6000.h (TARGET_MADDLD): Remove the restriction of + TARGET_POWERPC64. + * config/rs6000/rs6000.md (maddld): Change maddld match_operand from DI + to GPR. + +2019-06-26 Segher Boessenkool <segher@kernel.crashing.org> + + * doc/invoke.texi (Warning Options): Fix some @opindex syntax. + +2019-06-26 Martin Liska <mliska@suse.cz> + + PR tree-optimization/90973 + * tree-vect-loop.c (vect_get_known_peeling_cost): Use + epilogue_cost_vec instead of prologue_cost_vec for + a epilogue cost. + +2019-06-26 Martin Liska <mliska@suse.cz> + + * bb-reorder.c (connect_better_edge_p): Add missing else + statement in the middle of if-else statements. + +2019-06-25 Hongtao Liu <hongtao.liu@intel.com> + H.J. Lu <hongjiu.lu@intel.com> + Olga Makhotina <olga.makhotina@intel.com> + + * common/config/i386/i386-common.c + (OPTION_MASK_ISA_AVX512VP2INTERSECT_SET, + OPTION_MASK_ISA_AVX512VP2INTERSECT_UNSET): New macros. + (OPTION_MASK_ISA2_AVX512F_UNSET): Add + OPTION_MASK_ISA_AVX512VP2INTERSECT_UNSET. + (ix86_handle_option): Handle -mavx512vp2intersect. + * config/i386/avx512vp2intersectintrin.h: New. + * config/i386/avx512vp2intersectvlintrin.h: New. + * config/i386/cpuid.h (bit_AVX512VP2INTERSECT): New. + * config/i386/driver-i386.c (host_detect_local_cpu): Detect + AVX512VP2INTERSECT. + * config/i386/i386-builtin-types.def: Add new types. + * config/i386/i386-builtin.def: Add new builtins. + * config/i386/i386-builtins.c: (enum processor_features): Add + F_AVX512VP2INTERSECT. + (static const _isa_names_table isa_names_table): Ditto. + * config/i386/i386-c.c (ix86_target_macros_internal): Define + __AVX512VP2INTERSECT__. + * config/i386/i386-expand.c (ix86_expand_builtin): Expand + IX86_BUILTIN_2INTERSECTD512, IX86_BUILTIN_2INTERSECTQ512, + IX86_BUILTIN_2INTERSECTD256, IX86_BUILTIN_2INTERSECTQ256, + IX86_BUILTIN_2INTERSECTD128, IX86_BUILTIN_2INTERSECTQ128. + * config/i386/i386-modes.def (P2QI, P2HI): New modes. + * config/i386/i386-options.c (ix86_target_string): Add + -mavx512vp2intersect. + (ix86_option_override_internal): Handle AVX512VP2INTERSECT. + * config/i386/i386.c (ix86_hard_regno_nregs): Allocate two regs for + P2HImode and P2QImode. + (ix86_hard_regno_mode_ok): Register pair only starts at even hardreg + number for P2QImode and P2HImode. + (ix86_regmode_natural_size): New function. + * config/i386/i386.h (TARGET_AVX512VP2INTERSECT, + TARGET_AVX512VP2INTERSECT_P, PTA_AVX512VP2INTERSECT + REGMODE_NATURAL_SIZE, MASK_PAIR_REGNO_P): New. + * config/i386/i386-protos.h (ix86_regmode_natural_size): Declare + * config/i386/i386.opt: Add -mavx512vp2intersect. + * config/i386/immintrin.h: Include avx512vp2intersectintrin.h and + avx512vp2intersectvlintrin.h. + * config/i386/sse.md (define_c_enum "unspec"): Add UNSPEC_VP2INTERSECT. + (define_mode_iterator VI48_AVX512VP2VL): New. + (avx512vp2intersect_2intersect<mode>, + avx512vp2intersect_2intersectv16si): New define_insn patterns. + * config.gcc: Add avx512vp2intersectvlintrin.h and + avx512vp2intersectintrin.h to extra_headers. + * doc/invoke.texi: Document -mavx512vp2intersect. + +2019-06-25 Iain Sandoe <iain@sandoe.co.uk> + + * config/rs6000/darwin.h (ENDFILE_SPEC): New. + +2019-06-25 Bill Seurer <seurer@linux.vnet.ibm.com> + + * config/rs6000/rs6000.c (stack_info, rs6000_pic_labelno, + savres_routine_syms, savres_routine_name, morestack_ref, + rs6000_init_machine_status, save_reg_p, first_reg_to_save, + first_fp_reg_to_save, first_altivec_reg_to_save, compute_vrsave_mask, + compute_save_world_info, is_altivec_return_reg, fixed_reg_p, + rs6000_savres_strategy, rs6000_stack_info, debug_stack_info, + rs6000_return_addr, rs6000_decl_ok_for_sibcall, + rs6000_function_ok_for_sibcall, rs6000_ra_ever_killed, + rs6000_emit_load_toc_table, rs6000_emit_eh_reg_restore, uses_TOC, + create_TOC_reference, rs6000_aix_asm_output_dwarf_table_ref, + rs6000_emit_stack_tie, rs6000_emit_allocate_stack_1, + get_stack_clash_protection_probe_interval, + get_stack_clash_protection_guard_size, + rs6000_emit_probe_stack_range_stack_clash, rs6000_emit_allocate_stack, + rs6000_emit_probe_stack_range, output_probe_stack_range_1, + interesting_frame_related_regno, output_probe_stack_range_stack_clash, + output_probe_stack_range, rs6000_frame_related, generate_set_vrsave, + gen_frame_set, gen_frame_load, gen_frame_store, emit_frame_save, + gen_frame_mem_offset, rs6000_savres_routine_name, + rs6000_savres_routine_sym, rs6000_emit_stack_reset, + ptr_regno_for_savres, rs6000_emit_savres_rtx, + rs6000_emit_prologue_move_from_cr, split_stack_arg_pointer_used_p, + rs6000_global_entry_point_prologue_needed_p, + rs6000_get_separate_components, rs6000_components_for_bb, + rs6000_disqualify_components, rs6000_emit_prologue_components, + rs6000_emit_epilogue_components, rs6000_set_handled_components, + emit_vrsave_prologue, emit_split_stack_prologue, rs6000_emit_prologue, + rs6000_output_savres_externs, rs6000_output_function_prologue, + rs6000_keep_leaf_when_profiled, load_cr_save, restore_saved_cr, + load_lr_save, restore_saved_lr, add_crlr_cfa_restore, + offset_below_red_zone_p, emit_cfa_restores, rs6000_emit_epilogue, + rs6000_output_function_epilogue, gen_add3_const, + rs6000_expand_split_stack_prologue, rs6000_live_on_entry, + rs6000_split_stack_space_check, rs6000_save_toc_in_prologue_p): Moved + to rs6000-logue.c. + (machine_function): Moved to rs6000.h. + (rs6000_stack_t, ALTIVEC_REG_BIT, quad_address_offset_p) Moved to + rs6000-internal.h. + * config/rs6000/rs6000-logue.c(stack_info, rs6000_pic_labelno, + savres_routine_syms, savres_routine_name, morestack_ref, + rs6000_init_machine_status, save_reg_p, first_reg_to_save, + first_fp_reg_to_save, first_altivec_reg_to_save, compute_vrsave_mask, + compute_save_world_info, is_altivec_return_reg, fixed_reg_p, + rs6000_savres_strategy, rs6000_stack_info, debug_stack_info, + rs6000_return_addr, rs6000_decl_ok_for_sibcall, + rs6000_function_ok_for_sibcall, rs6000_ra_ever_killed, + rs6000_emit_load_toc_table, rs6000_emit_eh_reg_restore, uses_TOC, + create_TOC_reference, rs6000_aix_asm_output_dwarf_table_ref, + rs6000_emit_stack_tie, rs6000_emit_allocate_stack_1, + get_stack_clash_protection_probe_interval, + get_stack_clash_protection_guard_size, + rs6000_emit_probe_stack_range_stack_clash, rs6000_emit_allocate_stack, + rs6000_emit_probe_stack_range, output_probe_stack_range_1, + interesting_frame_related_regno, output_probe_stack_range_stack_clash, + output_probe_stack_range, rs6000_frame_related, generate_set_vrsave, + gen_frame_set, gen_frame_load, gen_frame_store, emit_frame_save, + gen_frame_mem_offset, rs6000_savres_routine_name, + rs6000_savres_routine_sym, rs6000_emit_stack_reset, + ptr_regno_for_savres, rs6000_emit_savres_rtx, + rs6000_emit_prologue_move_from_cr, split_stack_arg_pointer_used_p, + rs6000_global_entry_point_prologue_needed_p, + rs6000_get_separate_components, rs6000_components_for_bb, + rs6000_disqualify_components, rs6000_emit_prologue_components, + rs6000_emit_epilogue_components, rs6000_set_handled_components, + emit_vrsave_prologue, emit_split_stack_prologue, rs6000_emit_prologue, + rs6000_output_savres_externs, rs6000_output_function_prologue, + rs6000_keep_leaf_when_profiled, load_cr_save, restore_saved_cr, + load_lr_save, restore_saved_lr, add_crlr_cfa_restore, + offset_below_red_zone_p, emit_cfa_restores, rs6000_emit_epilogue, + rs6000_output_function_epilogue, gen_add3_const, + rs6000_expand_split_stack_prologue, rs6000_live_on_entry, + rs6000_split_stack_space_check, rs6000_save_toc_in_prologue_p): Moved + to here from rs6000.c. + * config/rs6000/rs6000.h (machine_function): Moved to here from rs6000.c. + * config/rs6000/rs6000-internal.h: (rs6000_stack_t, ALTIVEC_REG_BIT, + quad_address_offset_p) Moved to here from rs6000.c. + * config/rs6000/t-rs6000: Add new source file rs6000-logue.c. + * config/config.gcc: Add new source file rs6000-logue.c to garbage + collector. + +2019-06-25 Martin Liska <mliska@suse.cz> + + * hash-table.c (hashtab_chk_error): Move here from ... + * hash-table.h (hashtab_chk_error): ... here. + +2019-06-25 Martin Liska <mliska@suse.cz> + + PR tree-optimization/90978 + * df-scan.c (df_update_entry_block_defs): Remove dead else + branch. + (df_update_exit_block_uses): Likewise. + +2019-06-25 Kwok Cheung Yeung <kcy@codesourcery.com> + Andrew Stubbs <ams@codesourcery.com> + + * config.gcc (thread_file): Set to gcn for AMD GCN. + * config/gcn/gcn.c (gcn_emutls_var_init): New function. + (TARGET_EMUTLS_VAR_INIT): New hook. + +2019-06-25 Martin Jambor <mjambor@suse.cz> + + PR ipa/90939 + * ipa-cp.c (ipcp_bits_lattice::meet_with): Remove assert. + +2019-06-25 Richard Biener <rguenther@suse.de> + + PR tree-optimization/90930 + * tree-ssa-reassoc.c (reassociate_bb): Only rewrite expression + into parallel form in the last pass instance. + +2019-06-25 Claudiu Zissulescu <claziss@synopsys.com> + + * config/arc/arc.c (arc_symbol_binds_local_p): New function. + (arc_legitimize_pic_address): Simplify and cleanup the function. + (SYMBOLIC_CONST): Remove. + (prepare_pic_move): Likewise. + (prepare_move_operands): Handle complex mov cases here. + (arc_legitimize_address_0): Remove call to + arc_legitimize_pic_address. + (arc_legitimize_address): Remove call to + arc_legitimize_tls_address. + * config/arc/arc.md (movqi_insn): Allow Cm3 match. + (movhi_insn): Likewise. + +2019-06-25 Jozef Lawrynowicz <jozef.l@mittosystems.com> + + * config/msp430/msp430.h: Use __int20__ for SIZE_TYPE and + PTRDIFF_TYPE. + * gimple-ssa-sprintf.c (build_intmax_type_nodes): Accept "__intN__" + format of "__intN" types for UINTMAX_TYPE. + * stor-layout.c (initialize_sizetypes): Accept "__intN__" + format of "__intN" types for SIZETYPE. + * tree.c (build_common_tree_nodes): Accept "__intN__" + format of "__intN" types for SIZE_TYPE and PTRDIFF_TYPE. + * doc/invoke.texi: Document that __intN__ disables pedantic + warnings. + +2019-06-25 Jan Hubicka <jh@suse.cz> + + * tree-ssa-alias.c (indirect_ref_may_alias_decl_p): Check that + base2_alias_set is non-zero before doing TBAA based disambiguation. + +2019-06-25 Martin Liska <mliska@suse.cz> + + PR tree-optimization/90973 + * tree-vect-loop.c (vect_get_known_peeling_cost): Sum retval + of prologue and epilogue. + +2019-06-24 Jan Hubicka <jh@suse.cz> + + * ipa-utils.h (type_with_linkage_p): Verify that type is + CXX_ODR_P. + (odr_type_p): Remove extra return. + * lto-streamer-out.c (hash_tree): Hash TYPE_CXX_ODR_P; + hash STRING_FLAG only for arrays and integers. + * tree-stremaer-in.c (unpack_ts_type_common_value_fields): + Update analogously. + * tree-streamer-out.c (pack_ts_type_common_value_fields): + Likewise. + * print-tree.c (print_node): Print cxx-odr-p + and string-flag. + * tree.c (need_assembler_name_p): Also check that type + is CXX_ODR_TYPE_P + (verify_type_variant): Update verification of SRING_FLAG; + also check CXX_ODR_P. + * tree.h (ARRAY_OR_INTEGER_TYPE_CHECK): New macro. + (TYPE_STRING_FLAG): Use it. + (TYPE_CXX_ODR_P): New macro. + * dwarf2out.c (gen_array_type_die): First check that type + is an array and then test string flag. + +2019-06-24 Richard Biener <rguenther@suse.de> + + PR tree-optimization/90972 + * tree-vect-stmts.c (vect_init_vector): Handle CONSTANT_CLASS_P + in common code, dealing with STRING_CST properly. + +2019-06-24 Richard Biener <rguenther@suse.de> + + PR tree-optimization/90930 + PR tree-optimization/90316 + * tree-ssa-alias.c (walk_non_aliased_vuses): Add missing + decrement of limit. + +2019-06-24 Martin Sebor <msebor@redhat.com> + + * tree-pretty-print.h: Remove unnecessary punctuation characters + from a diagnostic. + * tree-ssa.c (release_defs_bitset): Correct preprocessor conditional. + +2019-06-24 Jonathan Wakely <jwakely@redhat.com> + + * ginclude/float.h (FLT_DECIMAL_DIG, DBL_DECIMAL_DIG, LDBL_DECIMAL_DIG) + (FLT_HAS_SUBNORM, DBL_HAS_SUBNORM, LDBL_HAS_SUBNORM, FLT_TRUE_MIN) + (DBL_TRUE_MIN, LDBL_TRUE_MIN): Also define for C++17. + +2019-06-23 Iain Sandoe <iain@sandoe.co.uk> + + * config/rs6000/darwin.h: Handle GCC target pragma. + +2019-06-23 Iain Sandoe <iain@sandoe.co.uk> + + * config/rs6000/darwin.h: (__PPC__, __PPC64__): New. + +2019-06-22 Jeff Law <law@redhat.com> + + * config/avr/avr.c (TARGET_BUILTIN_SETJMP_FRAME_VALUE): Remove. + +2019-06-22 Jan Hubicka <jh@suse.cz> + + * tree-ssa-alias.c (nonoverlapping_component_refs_p): Do not + give up on bitfields; continue searching for different refs + appearing later. + +2019-06-21 Jakub Jelinek <jakub@redhat.com> + + * tree-vect-data-refs.c (vect_find_stmt_data_reference): Handle + even zero DR_OFFSET, but DR_BASE_ADDRESS of POINTER_PLUS_EXPR + containing the offset as possible simd lane access. Look through + widening conversion. Move the + TREE_CODE (DR_INIT (newdr)) == INTEGER_CST test earlier and reindent. + +2019-06-21 Richard Biener <rguenther@suse.de> + + PR tree-optimization/90930 + * tree-ssa-reassoc.c (rewrite_expr_tree_parallel): Set visited + flag on new stmts to avoid re-processing them. + +2019-06-21 Matthew Beliveau <mbelivea@redhat.com> + + PR c++/90875 - added -Wswitch-outside-range option + * doc/invoke.texi (Wswitch-outside-range): Document. + +2019-06-21 Jeff Law <law@redhat.com> + + PR tree-optimization/90949 + * tree-ssa-copy.c (fini_copy_prop): Use reset_flow_sensitive_info. + * tree-ssanames.c (reset_flow_sensitive_info): Reset non-null state. + +2019-06-21 Richard Biener <rguenther@suse.de> + + PR debug/90914 + * dwarf2out.c (prune_unused_types_walk): Always consider + function-local extern declarations as used. + +2019-06-21 Richard Biener <rguenther@suse.de> + + PR tree-optimization/90913 + * tree-vect-loop-manip.c (vect_loop_versioning): Do not re-use + the scalar variant of if-conversion versioning. + +2019-06-21 Jakub Jelinek <jakub@redhat.com> + + * omp-low.c (lower_rec_simd_input_clauses): Add rvar2 argument, + create another "omp scan inscan exclusive" array if + !ctx->scan_inclusive. + (lower_rec_input_clauses): Handle exclusive scan inscan reductions. + (lower_omp_scan): Likewise. + * tree-vectorizer.h (struct _stmt_vec_info): Use 3-bit instead of + 2-bit bitfield for simd_lane_access_p member. + * tree-vect-data-refs.c (vect_analyze_data_refs): Also handle + aux == (void *)-4 as simd lane access. + * tree-vect-stmts.c (check_scan_store): Handle exclusive scan. Update + comment with permutations to show the canonical permutation order. + (vectorizable_scan_store): Handle exclusive scan. + (vectorizable_store): Call vectorizable_scan_store even for + STMT_VINFO_SIMD_LANE_ACCESS_P > 3. + + * tree-vect-data-refs.c (vect_find_stmt_data_reference): Handle + "omp simd array" arrays with one byte elements. + +2019-06-20 Uroš Bizjak <ubizjak@gmail.com> + + * config/alpha/alpha.md (@unaligned_store<mode>): + Rename from unaligned_store<mode>. + (@reload_in<mode>_aligned): Rename from reload_in<mode>_aligned. + * config/alpha/sync.md (@load_locked_<mode>): Rename + from load_locked_<mode>. + (@store_conditional_<mode>): Rename from store_conditional_<mode>. + (@atomic_compare_and_swap<mode>_1): Rename + from atomic_compare_and_swap<mode>_1. + (@atomic_exchange<mode>_1): Rename from atomic_exchange<mode>_1. + * config/alpha/alpha.c (alpha_expand_mov_nobwx): + Use gen_reload_in_aligned and gen_unaligned_store. + (emit_load_locked): Remove. + (emit_store_conditional): Ditto. + (alpha_split_atomic_op): Use gen_load_locked and gen_store_conditional. + (alpha_split_compare_and_swap): Ditto. + (alpha_expand_compare_and_swap_12): Use gen_atomic_compare_and_swap_1. + (alpha_split_compare_and_swap_12): Use gen_load_locked + and gen_store_conditional. + (alpha_split_atomic_exchange): Ditto. + (alpha_expand_atomic_exchange_12): Use gen_atomic_exchange_1. + (alpha_split_atomic_exchange_12): Use gen_load_locked + and gen_store_conditional. + +2019-06-20 Richard Earnshaw <rearnsha@arm.com> + + * config/aarch64/aarch64-errata.h: New file. + * config/aarch64/aarch64-elf-raw.h (CA53_ERR_835769_SPEC): Delete. + (CA53_ERR_843419_SPEC): Delete. + (LINK_SPEC): Use AARCH64_ERRATA_LINK_SPEC instead of above. + * config/aarch64/aarch64-linux.h: Likewise. + * config/aarch64/aarch64-netbsd.h: Likewise. + * config/aarch64/aarch64-freebsd.h: Likewise. + +2019-06-20 Marek Polacek <polacek@redhat.com> + + * config/sh/sh.c (sh2a_function_vector_p): Use get_attribute_name. + +2019-06-20 Michael Meissner <meissner@linux.ibm.com> + + * config/rs6000/rs6000.md (isa attribute): Add support for + for a future processor. + +2019-06-20 H.J. Lu <hongjiu.lu@intel.com> + + PR target/54855 + * config/i386/i386-expand.c (ix86_expand_vector_set): Generate + standard scalar operation pattern for V2DF. + * config/i386/sse.md (*<sse>_vm<plusminus_insn><mode>3): New. + (*<sse>_vm<multdiv_mnemonic><mode>3): Likewise. + (*ieee_<ieee_maxmin><mode>3): Likewise. + (vec_setv2df_0): Likewise. + +2019-06-20 Jan Hubicka <jh@suse.cz> + + * tree-ssa-alias.c (aliasing_component_refs_p): Remove ref2_is_decl + parameter; it has no use in gimple memory model. + (indirect_ref_may_alias_decl_p): Update. + +2019-06-20 Martin Liska <mliska@suse.cz> + + * params.def (PARAM_HASH_TABLE_VERIFICATION_LIMIT): Decrease + to 10. + +2019-06-20 Jakub Jelinek <jakub@redhat.com> + + * tree-vect-stmts.c (enum scan_store_kind): New type. + (scan_store_can_perm_p): Change last argument from int * to + vec<enum scan_store_kind> *, record precisely which permutations + need whole vector left shift or that plus VEC_COND_EXPR. + (vectorizable_scan_store): Adjust caller, use whole vector left shift + and additional VEC_COND_EXPR only for those iterations that need it. + +2019-06-20 Alexandre Oliva <oliva@adacore.com> + + * config.gcc: Fix ARM --with-fpu checking and error message. + +2019-06-19 Marek Polacek <polacek@redhat.com> + + PR c++/60364 - noreturn after first decl not diagnosed. + * attribs.c (get_attribute_namespace): No longer static. + (decl_attributes): Avoid shadowing. Preserve the C++11 form for C++11 + attributes. + (attr_noreturn_exclusions): Make it extern. + * attribs.h (get_attribute_namespace): Declare. + * tree-inline.c (function_attribute_inlinable_p): Use + get_attribute_name. + +2019-06-19 Martin Sebor <msebor@redhat.com> + + PR tree-optimization/90626 + * tree-ssa-strlen.c (strxcmp_unequal): Fix typos. + + PR tree-optimization/90626 + * tree-ssa-strlen.c (strxcmp_unequal): New function. + (handle_builtin_string_cmp): Call it. + +2019-06-19 Iain Sandoe <iain@sandoe.co.uk> + + * config/darwin.h (DRIVER_SELF_SPECS): Add RDYNAMIC, DARWIN_PIE_SPEC + and DARWIN_NOPIE_SPEC. + (RDYNAMIC): New, modified from DARWIN_EXPORT_DYNAMIC. + (DARWIN_PIE_SPEC): Collate from darwin.h and darwin9.h. + (DARWIN_NOPIE_SPEC): Collate from darwin10.h. + (DARWIN_NOCOMPACT_UNWIND): New from darwin10.h + (DARWIN_EXPORT_DYNAMIC): Delete. + * config/darwin10.h (LINK_GCC_C_SEQUENCE_SPEC): Move no_compact_unwind + and pie options processing to darwin.h. + * config/darwin9.h (DARWIN_PIE_SPEC): Move pie processing to darwin.h + +2019-06-19 Iain Sandoe <iain@sandoe.co.uk> + + * config/darwin-driver.c (darwin_driver_init): Fix off-by-one errors + in computing the number of options to be moved. + +2019-06-19 Maya Rashish <coypu@sdf.org> + + * config/arm/netbsd-elf.h (SYSARCH_ARM_SYNC_ICACHE): New definition. + (CLEAR_INSN_CACHE) Use it. + +2019-06-19 Uroš Bizjak <ubizjak@gmail.com> + + * config/i386/i386.md (cmpstrnsi): Remove dead code. + +2019-06-19 Wilco Dijkstra <wdijkstr@arm.com> + + PR middle-end/84521 + * builtins.c (expand_builtin_setjmp_setup): Save + hard_frame_pointer_rtx. + (expand_builtin_setjmp_receiver): Do not emit sfp = fp move since we + restore fp. + * function.c (expand_function_start): Save hard_frame_pointer_rtx for + non-local goto. + * lra-eliminations.c (eliminate_regs_in_insn): Remove sfp = fp + elimination code. + (remove_reg_equal_offset_note): Remove unused function. + * reload1.c (eliminate_regs_in_insn): Remove sfp = hfp elimination + code. + * config/arc/arc.c (TARGET_BUILTIN_SETJMP_FRAME_VALUE): Remove. + (arc_builtin_setjmp_frame_value): Remove function. + * config/avr/avr.c (TARGET_BUILTIN_SETJMP_FRAME_VALUE): Remove. + (avr_builtin_setjmp_frame_value): Remove function. + * config/i386/i386.c (TARGET_BUILTIN_SETJMP_FRAME_VALUE): Remove. + (ix86_builtin_setjmp_frame_value): Remove function. + * config/pa/pa.md (nonlocal_goto): Remove FP adjustment. + * config/sparc/sparc.c (TARGET_BUILTIN_SETJMP_FRAME_VALUE): Remove. + (sparc_builtin_setjmp_frame_value): Remove function. + * config/vax/vax.c (TARGET_BUILTIN_SETJMP_FRAME_VALUE): Remove. + (vax_builtin_setjmp_frame_value): Remove function. + * config/xtensa/xtensa.c (xtensa_frame_pointer_required): Force frame + pointer if has_nonlocal_label. + +2019-06-19 Jakub Jelinek <jakub@redhat.com> + + * doc/md.texi: Document vec_shl_<mode> pattern. + * optabs.def (vec_shl_optab): New optab. + * optabs.c (shift_amt_for_vec_perm_mask): Add shift_optab + argument, if == vec_shl_optab, check for left whole vector shift + pattern rather than right shift. + (expand_vec_perm_const): Add vec_shl_optab support. + * optabs-query.c (can_vec_perm_var_p): Mention also vec_shl optab + in the comment. + * tree-vect-generic.c (lower_vec_perm): Support permutations which + can be handled by vec_shl_optab. + * tree-vect-stmts.c (scan_store_can_perm_p): New function. + (check_scan_store): Use it. + (vectorizable_scan_store): If target can't do normal permutations, + try to use whole vector left shifts and if needed a VEC_COND_EXPR + after it. + * config/i386/sse.md (vec_shl_<mode>): New expander. + + * omp-low.c (lower_rec_input_clauses): Handle references properly + in inscan clauses. + (lower_omp_scan): Likewise. + +2019-06-19 Kugan Vivekanandarajah <kugan.vivekanandarajah@linaro.org> + + * tree-ssa-address.c (preferred_mem_scale_factor): Handle when + mem_mode is BLKmode. + +2019-06-18 Max Filippov <jcmvbkbc@gmail.com> + + PR target/90922 + * config/xtensa/xtensa.c (xtensa_expand_prologue): Add stack + pointer adjustment for the case of no callee-saved registers and + stack frame bigger than 128 bytes. + +2019-06-18 Thomas Schwinge <thomas@codesourcery.com> + + PR middle-end/90862 + * omp-low.c (check_omp_nesting_restrictions): Handle + GF_OMP_TARGET_KIND_OACC_DECLARE. + +2019-06-18 Uroš Bizjak <ubizjak@gmail.com> + + * config/i386/i386.md (@cmp<mode>_1): Rename from cmp<mode>_1. + (@add<mode>3_carry): Rename from add<mode>3_carry. + (@sub<mode>3_carry_ccc): Rename from sub<mode>3_carry_ccc. + (@sub<mode>3_carry_ccgz): Rename form sub<mode>3_carry_ccgz. + (@copysign<mode>3_const): Rename from copysign<mode>3_const. + (@copysign<mode>3_var): Rename from copysign<mode>3_var. + (@xorsign<mode>3_1): Rename from xorsign<mode>3_1. + (@x86_shift<mode>_adj_1): Rename from x86_shift<mode>_adj_1. + (@x86_shift<mode>_adj_2): Rename from x86_shift<mode>_adj_2. + (@x86_shift<mode>_adj_3): Rename from x86_shift<mode>_adj_3. + (cmpstrnsi): Use gen_cmp_1. + (lwp_slwpcb): Use gen_lwp_slwpcb_1. + (@lwp_slwpcb<mode>_1): Rename from lwp_slwpcb<mode>_1. + (@umonitor_<mode>): Rename from umonitor_<mode>. + * config/i386/i386-expand.c (ix86_expand_copysign): + Use gen_copysign3_const and gen_copysign3_var. + (ix86_expand_xorsign): Use gen_xorsign3_1. + (ix86_expand_branch): Use gen_sub3_carry_ccc, + gen_sub3_carry_ccgz and gen_cmp1. + (ix86_expand_int_addcc): Use gen_sub3_carry and gen_add3_carry. + (ix86_split_ashl): Use gen_x86_shift_adj_1 and gen_x86_shift_adj_2. + (ix86_split_ashr): Use gen_x86_shift_adj_1 and gen_x86_shift_adj_3. + (ix86_split_lshr): Ditto. + (ix86_expand_builtin) <case IX86_BUILTIN_UMONITOR>: Use gen_umonitor. + +2019-06-18 Jason Merrill <jason@redhat.com> + + * tree.c (build_constructor): Add MEM_STAT_DECL. + +2019-06-18 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/aarch64-modes.def (CC_NZC): New CC_MODE. + * config/aarch64/aarch64-sve.md (*<optab><mode>3_cc) + (ptest_ptrue<mode>, while_ult<GPI:mode><PRED_ALL:mode>) + (*while_ult<GPI:mode><PRED_ALL:mode>_cc, *cmp<cmp_op><mode>) + (*cmp<cmp_op><mode>_ptest, *cmp<cmp_op><mode>_cc) + (*pred_cmp<cmp_op><mode>_combine, *pred_cmp<cmp_op><mode>) + (vec_cmp<mode><vpred>, vec_cmpu<mode><vpred>, cbranch<mode>4): + Use CC_NZC instead of CC. + * config/aarch64/aarch64.md (condjump): Print a '.' in SVE conditions. + * config/aarch64/aarch64.c (aarch64_sve_condition_codes): New variable. + (aarch64_print_operand): Handle E_CC_NZCmode. + (aarch64_emit_sve_ptrue_op_cc): Use gen_set_clobber_cc_nzc instead + of gen_set_clobber_cc. + +2019-06-18 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/aarch64-sve.md: Tabify file. + +2019-06-18 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/aarch64-protos.h (aarch64_pfalse_reg): Declare. + * config/aarch64/aarch64.c (aarch64_pfalse_reg): New function. + * config/aarch64/aarch64-sve.md: Use it. + +2019-06-18 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/aarch64-protos.h (aarch64_ptrue_reg): Declare. + * config/aarch64/aarch64.c (aarch64_ptrue_reg): New functions. + (aarch64_expand_sve_widened_duplicate, aarch64_expand_sve_mem_move) + (aarch64_maybe_expand_sve_subreg_move, aarch64_evpc_rev_local) + (aarch64_expand_sve_vec_cmp_int): Use it. + (aarch64_expand_sve_vec_cmp_float): Likewise. + * config/aarch64/aarch64-sve.md: Likewise throughout. + +2019-06-18 Richard Sandiford <richard.sandiford@arm.com> + Kugan Vivekanandarajah <kuganv@linaro.org> + + * config/aarch64/aarch64-sve.md (*cond_<optab><mode>_0): Delete. + (*cond_<optab><mode>_z): Fold into... + (*cond_<optab><mode>_any): ...here. Also handle cases in which + operand 4 can be tied to operand 0 (either inherently or via RA). + +2019-06-18 Richard Biener <rguenther@suse.de> + + PR debug/90900 + * cfgexpand.c (expand_debug_expr): Treat NOTE_P DECL_RTL + as if optimized away. + +2019-06-18 Tom de Vries <tdevries@suse.de> + + * config/nvptx/nvptx-protos.h (gen_set_softstack_insn): Remove. + * config/nvptx/nvptx.c (gen_set_softstack_insn): Remove. + * config/nvptx/nvptx.md (define_insn "set_softstack_<mode>"): + Rename to ... + (define_insn "@set_softstack_<mode>"): ... this. + (define_insn "omp_simt_enter_<mode>"): Rename to ... + (define_insn "@omp_simt_enter_<mode>"): ... this. + (define_insn "omp_simt_exit_<mode>"): Rename to ... + (define_insn "@omp_simt_exit_<mode>"): ... this. + +2019-06-18 Richard Sandiford <richard.sandiford@arm.com> + + * tree-vect-loop-manip.c (vect_set_loop_masks_directly): Remove + vf parameter. Restore the previous iv step of nscalars_step, + but give it iv_type rather than compare_type. Tweak code order + to match the comments. + (vect_set_loop_condition_masked): Update accordingly. + * tree-vect-loop.c (vect_verify_full_masking): Use "unsigned int" + for iv_precision. Tweak comment formatting. + +2019-06-18 Iain Sandoe <iain@sandoe.co.uk> + + * config/darwin.c: Strip trailing whitespace. + +2019-06-18 Iain Sandoe <iain@sandoe.co.uk> + + * config/darwin.c (darwin_emit_unwind_label): New default to false. + (darwin_override_options): Set darwin_emit_unwind_label as needed. + +2019-06-18 Martin Jambor <mjambor@suse.cz> + + PR ipa/90889 + * ipa-cp.c (ignore_edge_p): Do not ignore edges when only the + caller does not have flag_ipa_cp set. + +2019-06-18 Alejandro Martinez <alejandro.martinezvicente@arm.com> + + * config/aarch64/aarch64-sve.md (mask_fold_left_plus_<mode>): Renamed + from "*fold_left_plus_<mode>", updated operands order. + * doc/md.texi (mask_fold_left_plus_@var{m}): Documented new optab. + * internal-fn.c (mask_fold_left_direct): New define. + (expand_mask_fold_left_optab_fn): Likewise. + (direct_mask_fold_left_optab_supported_p): Likewise. + * internal-fn.def (MASK_FOLD_LEFT_PLUS): New internal function. + * optabs.def (mask_fold_left_plus_optab): New optab. + * tree-vect-loop.c (mask_fold_left_plus_optab): New function to get a + masked internal_fn for a reduction ifn. + (vectorize_fold_left_reduction): Add support for masking reductions. + +2019-06-18 Kewen Lin <linkw@gcc.gnu.org> + + PR middle-end/80791 + * target.def (predict_doloop_p): New hook. + * targhooks.h (default_predict_doloop_p): New declaration. + * targhooks.c (default_predict_doloop_p): New function. + * doc/tm.texi.in (TARGET_PREDICT_DOLOOP_P): New hook. + * doc/tm.texi: Regenerate. + * config/rs6000/rs6000.c (rs6000_predict_doloop_p): New function. + (TARGET_PREDICT_DOLOOP_P): New macro. + * tree-ssa-loop-ivopts.c (generic_predict_doloop_p): New function. + +2019-06-17 Jakub Jelinek <jakub@redhat.com> + + * omp-low.c (struct omp_context): Add scan_inclusive field. + (scan_omp_1_stmt) <case GIMPLE_OMP_SCAN>: Set ctx->scan_inclusive + if inclusive scan. + (struct omplow_simd_context): Add lastlane member. + (lower_rec_simd_input_clauses): Add rvar argument, handle inscan + reductions. Build 2 or 3 argument .GOMP_SIMD_LANE calls rather than + 1 or 2 argument. + (lower_rec_input_clauses): Handle inscan reductions in simd contexts. + (lower_lastprivate_clauses): Set TREE_THIS_NOTRAP on the ARRAY_REF. + (lower_omp_scan): New function. + (lower_omp_1) <case GIMPLE_OMP_SCAN>: Use lower_omp_scan. + * tree-ssa-dce.c (eliminate_unnecessary_stmts): For IFN_GOMP_SIMD_LANE + check 3rd argument if present rather than 2nd. + * tree-vectorizer.h (struct _loop_vec_info): Add scan_map member. + (struct _stmt_vec_info): Change simd_lane_access_p from bool into + 2-bit bitfield. + * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize + scan_map. For IFN_GOMP_SIMD_LANE check 3rd argument if present rather + than 2nd. + (_loop_vec_info::~_loop_vec_info): Delete scan_map. + * tree-vect-data-refs.c (vect_analyze_data_ref_accesses): Allow two + different STMT_VINFO_SIMD_LANE_ACCESS_P refs if they have the same + init. + (vect_find_stmt_data_reference): Encode in ->aux the 2nd + IFN_GOMP_SIMD_LANE argument. + (vect_analyze_data_refs): Set STMT_VINFO_SIMD_LANE_ACCESS_P from the + encoded ->aux value. + * tree-vect-stmts.c: Include attribs.h. + (vectorizable_call): Adjust comment about IFN_GOMP_SIMD_LANE. + (scan_operand_equal_p, check_scan_store, vectorizable_scan_store): New + functions. + (vectorizable_load): For STMT_VINFO_SIMD_LANE_ACCESS_P tests use != 0. + (vectorizable_store): Handle STMT_VINFO_SIMD_LANE_ACCESS_P > 1. + +2019-06-17 Uroš Bizjak <ubizjak@gmail.com> + + PR target/62055 + * config/i386/i386.md (*nabstf2_1): New insn pattern. + (*nabs<mode>2_1): Ditto. + (nabs sse-reg splitter): New splitter. + * config/i386/sse.md (*nabs<mode>2): New insn_and_split pattern. + +2019-06-17 Jan Hubicka <hubicka@ucw.cz> + + PR bootstrap/90873. + * tree-ssa-alias.c (indirect_ref_may_alias_decl_p): Fix + TMR index check. + +2019-06-17 Tom de Vries <tdevries@suse.de> + + * config/nvptx/nvptx-protos.h (gen_set_softstack_insn): Declare. + * config/nvptx/nvptx.c (gen_set_softstack_insn): New function. + * config/nvptx/nvptx.md (define_insn "set_softstack_insn"): Rename to + ... + (define_insn "set_softstack_<mode>"): ... this. Use P iterator on + match_operand 0. + (define_insn "omp_simt_enter_insn"): Rename to ... + (define_insn "omp_simt_enter_<mode>"): ... this. Use P iterator on + match_operand 0, 1 and 2, as well as the unspec_volatile result. + (define_expand "omp_simt_enter): Use gen_omp_simt_enter_di and + gen_omp_simt_enter_si. + (define_expand "omp_simt_exit"): New. + (define_insn "omp_simt_exit"): Rename to ... + (define_insn "omp_simt_exit_<mode>"): ... this. Use P iterator on + match_operand 0. + +2019-06-17 Matthew Green <mrg@eterna.com.au> + Maya Rashish <coypu@sdf.org> + + * config.gcc (aarch64*-*-netbsd*): New target. + * config/aarch64/aarch64-netbsd.h: New file. + * config/aarch64/t-aarch64-netbsd: Likewise. + +2019-06-17 Jan Hubicka <hubicka@ucw.cz> + + * tree-ssa-alias.c (aliasing_component_refs_p): Consider only + the access path from base to first VIEW_CONVERT_EXPR or + BIT_FIELD_REF. + +2019-06-17 Jan Hubicka <hubicka@ucw.cz> + + * tree-ssa-alias.c (nonoverlapping_component_refs_p): Also truncate + access path on BIT_FIELD_REFs. + +2019-06-17 Martin Liska <mliska@suse.cz> + + PR ipa/90874 + * ipa-utils.h (odr_type_p): Remove dead code. + +2019-06-17 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> + + * configure.ac (ld_vers) <*-*-solaris2*>: Remove support for + alternative Solaris 11.4 format. + * configure: Regenerate. + +2019-06-17 Tom de Vries <tdevries@suse.de> + + * config/nvptx/nvptx.md (define_insn "call_insn"): Rename to ... + (define_insn "call_insn_<mode>"): ... this. Use P iterator on + match_operand 0. + (define_insn "call_value_insn"): Rename to ... + (define_insn "call_value_insn_<mode>"): this. Use P iterator on + match_operand 0. + (define_insn "nvptx_red_partition"): Set unspec_volatile result mode to + DI. + +2019-06-16 John David Anglin <danglin@gcc.gnu.org> + + PR middle-end/64242 + * config/pa/pa.md (nonlocal_goto): Restore frame pointer last. Add + frame clobbers and schedule block. + (builtin_longjmp): Likewise. + +2019-06-16 Jozef Lawrynowicz <jozef.l@mittosystems.com> + + * config/msp430/msp430.c (msp430_expand_helper): Setup arguments which + describe how to perform MSPABI compliant 64-bit shift. + * config/msp430/msp430.md (ashldi3): New define_expand. + (ashrdi3): New define_expand. + (lshrdi3): New define_expand. + +2019-06-16 Jozef Lawrynowicz <jozef.l@mittosystems.com> + + * doc/sourcebuild.texi: Document new effective target keyword + longlong64. + +2019-06-16 Jan Hubicka <hubicka@ucw.cz> + + * tree-ssa-alias.c (indirect_ref_may_alias_decl_p, + indirect_refs_may_alias_p): Revert accidental commits. + + * tree-ssa-alias.c (aliasing_component_refs_p): Watch for arrays + at the end of structures. + +2019-06-16 Iain Sandoe <iain@sandoe.co.uk> + + * config/darwin.c (machopic_indirect_call_target): Use renamed + darwin_picsymbol_stubs to decide on output. + (darwin_override_options): Handle darwin_picsymbol_stubs. + * config/darwin.h (MIN_LD64_OMIT_STUBS): New. + (LD64_VERSION): Revise default. + * config/darwin.opt: (mpic-symbol-stubs): New option. + (darwin_picsymbol_stubs): New variable. + * config/i386/darwin.h (TARGET_MACHO_BRANCH_ISLANDS): + rename to TARGET_MACHO_PICSYM_STUBS. + * config/i386/i386.c (output_pic_addr_const): Likewise. + * config/i386/i386.h Likewise. + * config/rs6000/darwin.h: Likewise. + * config/rs6000/rs6000.c (rs6000_call_darwin_1): Use renamed + darwin_picsymbol_stubs. + +2019-06-16 Iain Sandoe <iain@sandoe.co.uk> + + * config/darwin.opt (prebind, noprebind, seglinkedit, + noseglinkedit): Add RejectNegative. + +2019-06-16 Jan Hubicka <hubicka@ucw.cz> + + * tree-ssa-alias.c (nonoverlapping_component_refs_p): Fix pasto + in my previous patch. + +2019-06-16 Tom de Vries <tdevries@suse.de> + + PR tree-optimization/89376 + * tree-parloops.c (oacc_entry_exit_ok_1): Handle red == NULL. + +2019-06-15 Maya Rashish <coypu@sdf.org> + + * doc/invoke.texi (Spec Files): Update location of the + Fortran spec file. + +2019-06-15 Gerald Pfeifer <gerald@pfeifer.com> + + * doc/extend.texi (Common Function Attributes): Clarify + no_sanitize. Fix grammar. + +2019-06-15 Jan Hubicka <hubicka@ucw.cz> + + * tree-ssa-alias.c (alias_stats): Add + nonoverlapping_component_refs_p_may_alias, + nonoverlapping_component_refs_p_no_alias, + nonoverlapping_component_refs_of_decl_p_may_alias, + nonoverlapping_component_refs_of_decl_p_no_alias. + (dump_alias_stats): Dump them. + (nonoverlapping_component_refs_of_decl_p): Add stats. + (nonoverlapping_component_refs_p): Add stats; do not stop on first + ARRAY_REF. + +2019-06-15 Uroš Bizjak <ubizjak@gmail.com> + + * config/i386/i386.md (and<mode>3): Generate zero-extends for + TARGET_ZERO_EXTEND_WITH_AND && optimize_function_for_speed_p (cfun)) + only. + (*anddi3_doubleword): Split before reload. Merge with + anddi->zext pre-reload splitter. + (*andndi3_doubleword): Split before reload. + (*<code>di3_doubleword): Ditto. + (*one_cmpldi2_doubleword): Ditto. + +2019-06-15 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/90779 + * gimplify.c: Include omp-offload.h and context.h. + (gimplify_bind_expr): Add "omp declare target" attributes + to static block scope variables inside of target region or target + functions. + +2019-06-15 Tom de Vries <tdevries@suse.de> + + PR tree-optimization/90009 + * tree-ssa-threadbackward.c (thread_jumps::profitable_jump_thread_path): + Return NULL if bb contains IFN_UNIQUE. + +2019-06-14 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/rs6000.md (CCEITHER): New define_mode_iterator. + (un): New define_mode_attr. + (isel_signed_<mode>, isel_unsigned_<mode>): Delete, merge into ... + (isel_<un>signed_<GPR:mode>): ... this. New define_insn. + (isel_reversed_signed_<mode>, isel_reversed_unsigned_<mode>): Delete, + merge into ... + (isel_reversed_<un>signed_<GPR:mode>): ... this. New define_insn. + +2019-06-14 Iain Sandoe <iain@sandoe.co.uk> + + * config/darwin.opt: Add RejectNegative where needed, reorder + and add minimal functional descriptions. + +2019-06-14 H.J. Lu <hongjiu.lu@intel.com> + + PR rtl-optimization/90765 + * calls.c (update_stack_alignment_for_call): New function. + (expand_call): Call update_stack_alignment_for_call when + outgoing parameter is passed in the stack. + (emit_library_call_value_1): Likewise. + * function.c (locate_and_pad_parm): Don't update + stack_alignment_needed and preferred_stack_boundary. + +2019-06-14 H.J. Lu <hongjiu.lu@intel.com> + + PR target/90877 + * config/i386/i386-features.c + (dimode_scalar_chain::compute_convert_gain): Replace + mmxsse_to_integer with sse_to_integer. + * config/i386/i386.c (ix86_register_move_cost): Verify that + moves between MMX and non-MMX units require secondary memory. + Correct costs of moves between SSE and integer units. + * config/i386/i386.h (processor_costs): Rename cost of moving + SSE register to integer to sse_to_integer. Rename cost of + +2019-06-14 Matt Thomas <matt@3am-software.com> + Matthew Green <mrg@eterna.com.au> + Nick Hudson <skrll@netbsd.org> + Maya Rashish <coypu@sdf.org> + Richard Earnshaw <rearnsha@arm.com> + + * config.gcc (arm*-*-netbsdelf*) Add support for EABI configuration. + * config.host (arm*-*-netbsd*): Use driver-arm.o on native NetBSD. + * config/arm/netbsd-eabi.h: New file. + * config/arm/netbsd-elf.h (TARGET_OS_CPP_BUILTINS): Undefine before + redefining. + (SUBTARGET_EXTRA_ASM_SPEC): Don't pass -matpcs to the assembler. + * config/netbsd-elf.h (NETBSD_LINK_LD_ELF_SO_SPEC): New define. + (NETBSD_SUBTARGET_EXTRA_SPECS): New define. + (SUBTARGET_EXTRA_SPECS): Define to NETBSD_SUBTARGET_EXTRA_SPECS. + +2019-06-14 Richard Biener <rguenther@suse.de> + + * tree-loop-distribution.c (classify_partition): Return + whether a reduction appeared in all partitions and do not + stop builtin detection because of this. + (distribute_loop): Sort a non-builtin partition last if + there's a reduction in all partitions and make sure the + partition prevailing as last is not a builtin. + +2019-06-14 Feng Xue <fxue@os.amperecomputing.com> + + PR ipa/90401 + * ipa-prop.c (add_to_agg_contents_list): New function. + (clobber_by_agg_contents_list_p): Likewise. + (extract_mem_content): Likewise. + (get_place_in_agg_contents_list): Delete. + (determine_known_aggregate_parts): Renamed from + determine_locally_known_aggregate_parts. New parameter + aa_walk_budget_p. + +2019-06-13 Martin Sebor <msebor@redhat.com> + + PR tree-optimization/90662 + * tree-ssa-strlen.c (get_stridx): Convert fold_build2 operands + to the same type. + +2019-06-13 Jan Hubicka <hubicka@ucw.cz> + + PR bootstrap/90873 + * tree-ssa-alias.c (indirect_ref_may_alias_decl_p): Also check that + dbase is not TARGET_MEM_REF. + +2019-06-13 Uroš Bizjak <ubizjak@gmail.com> + + * config/i386/i386.md (SWIM1248s): Rename from SWIM1248x. + Update all uses. + (and<mode>3): Use gen_extend_insn instead of indirect functions. + Do not generate DImode extends for 32bit targets. + (and->zext post-reload splitter): Use gen_extend_insn + instead of indirect functions. + (anddi->zext pre-reload splitter): New. + (*zext<mode>_doubleword_and): Remove. + (*zext<mode>_doubleword): Ditto. + (*zextsi_doubleword): Dittto. + +2019-06-13 Uroš Bizjak <ubizjak@gmail.com> + + * config/i386/i386-expand.c (ix86_expand_int_sse_cmp): + Use gen_sub3_insn instead of indirect function. + (ix86_expand_ashl_const): Use gen_add2_insn instead of + indirect function. + (ix86_adjust_counter): Ditto. + +2019-06-13 Jiufu Guo <guojiufu@linux.ibm.com> + Lijia He <helijia@linux.ibm.com> + + PR tree-optimization/77820 + * tree-ssa-threadedge.c + (edge_forwards_cmp_to_conditional_jump_through_empty_bb_p): New + function. + (thread_across_edge): Add call to + edge_forwards_cmp_to_conditional_jump_through_empty_bb_p. + +2019-06-13 Iain Sandoe <iain@sandoe.co.uk> + + * config/darwin-driver.c (validate_macosx_version_min): New. + (darwin_default_min_version): Cleanup and validate supplied version. + (darwin_driver_init): Likewise and push cleaned version into opts. + +2019-06-13 Jan Hubicka <hubicka@ucw.cz> + + PR tree-optimization/90869 + * tree-ssa-alias.c (indirect_ref_may_alias_decl_p): Watch for view + converts in MEM_REF referencing decl rather than view converts + from decl type to MEM_REF type. + +2019-06-13 Richard Biener <rguenther@suse.de> + + PR tree-optimization/90856 + * tree-sra.c (build_ref_for_model): Only use + build_reconstructed_reference when address-spaces are the same. + +2019-06-13 Jakub Jelinek <jakub@redhat.com> + + * config/nvptx/nvptx.c (nvptx_sese_number, nvptx_sese_pseudo): Don't + wrap ei variable name in the declaration in ()s. + (nvptx_single): Actually use mode_label variable. Formatting fix. + +2019-06-13 Richard Biener <rguenther@suse.de> + + * tree-vectorizer.h (vect_loop_vectorized_call): Declare. + * tree-vectorizer.c (vect_loop_vectorized_call): Export and + also return the condition stmt. + * tree-vect-loop-manip.c (vect_loop_versioning): Compute outermost + loop we can version and version that, reusing the loop version + created by if-conversion instead of versioning again. + +2019-06-13 Aldy Hernandez <aldyh@redhat.com> + + * gimple-loop-versioning.cc (prune_loop_conditions): Use + may_contain_p. + * tree-vrp (value_range_base::may_contain_p): Call into + value_inside_range. + (value_inside_range): Make private inside value_range_base class. + Take min/max from *this. + (range_includes_p): Remove. + * tree-vrp.h (value_range_base): Add value_inside_range. + (range_includes_p): Remove. + (range_includes_zero_p): Call may_contain_p. + * vr-values.c (compare_range_with_value): Same. + +2019-06-13 Claudiu Zissulescu <claziss@synopsys.com> + + * doc/extend.texi (ARC Function Attributes): Update info. + +2019-06-13 Feng Xue <fxue@os.amperecomputing.com> + + PR tree-optimization/89713 + * doc/invoke.texi (-ffinite-loops): Document new option. + * common.opt (-ffinite-loops): New option. + * tree-ssa-dce.c (mark_stmt_if_obviously_necessary): Mark + IFN_GOACC_LOOP calls as necessary. + * tree-ssa-loop-niter.c (finite_loop_p): Assume loop with an exit + is finite. + * omp-offload.c (oacc_xform_loop): Skip lowering if return value of + IFN_GOACC_LOOP call is not used. + * opts.c (default_options_table): Enable -ffinite-loops at -O2+. + +2019-06-13 Kugan Vivekanandarajah <kugan.vivekanandarajah@linaro.org> + + PR target/88838 + * tree-vect-loop-manip.c (vect_set_loop_masks_directly): If the + compare_type is not with Pmode size, we will create an IV with + Pmode size with truncated use (i.e. converted to the correct type). + * tree-vect-loop.c (vect_verify_full_masking): Find IV type. + (vect_iv_limit_for_full_masking): New. Factored out of + vect_set_loop_condition_masked. + * tree-vectorizer.h (LOOP_VINFO_MASK_IV_TYPE): New. + (vect_iv_limit_for_full_masking): Declare. + +2019-06-13 Kugan Vivekanandarajah <kugan.vivekanandarajah@linaro.org> + + PR target/88834 + * tree-ssa-loop-ivopts.c (get_mem_type_for_internal_fn): Handle + IFN_MASK_LOAD_LANES and IFN_MASK_STORE_LANES. + (get_alias_ptr_type_for_ptr_address): Likewise. + (add_iv_candidate_for_use): Add scaled index candidate if useful. + * tree-ssa-address.c (preferred_mem_scale_factor): New. + * config/aarch64/aarch64.c (aarch64_classify_address): Relax + allow_reg_index_p. + +2019-06-13 Kugan Vivekanandarajah <kugan.vivekanandarajah@linaro.org> + + * config/aarch64/iterators.md (ADDSUB): Fix typo in comment. + +2019-06-12 Dimitar Dimitrov <dimitar@dinux.eu> + + * common/config/pru/pru-common.c: New file. + * config.gcc: Add PRU target. + * config/pru/alu-zext.md: New file. + * config/pru/constraints.md: New file. + * config/pru/predicates.md: New file. + * config/pru/pru-opts.h: New file. + * config/pru/pru-passes.c: New file. + * config/pru/pru-pragma.c: New file. + * config/pru/pru-protos.h: New file. + * config/pru/pru.c: New file. + * config/pru/pru.h: New file. + * config/pru/pru.md: New file. + * config/pru/pru.opt: New file. + * config/pru/t-pru: New file. + * doc/extend.texi: Document PRU pragmas. + * doc/invoke.texi: Document PRU-specific options. + * doc/md.texi: Document PRU asm constraints. + +2019-06-12 Martin Sebor <msebor@redhat.com> + + PR middle-end/90676 + * tree-pretty-print.c (dump_mem_ref): New function. Include + MEM_REF type in output when different size than operand. + (dump_generic_node): Move code to dump_mem_ref and call it. + +2019-06-12 Martin Sebor <msebor@redhat.com> + + PR tree-optimization/90662 + * tree-ssa-strlen.c (get_stridx): Handle simple VLAs and pointers + to arrays. + +2019-06-12 Tom de Vries <tdevries@suse.de> + + PR tree-optimization/90009 + * config/nvptx/nvptx.c (nvptx_find_par): Assert fork has at most join. + +2019-06-12 Martin Liska <mliska@suse.cz> + + * ggc-common.c (ggc_prune_overhead_list): Do not sanitize + the created map. + * hash-map.h: Add sanitize_eq_and_hash into ::hash_map. + * mem-stats.h (mem_alloc_description::mem_alloc_description): + Do not sanitize created maps. + +2019-06-12 Aldy Hernandez <aldyh@redhat.com> + + * gimple-ssa-evrp.c (evrp_dom_walker::before_dom_children): Use + value_range::singleton_p. + * tree-vrp.c (value_range_constant_singleton): Remove. + * tree-vrp.h (value_range_constant_singleton): Remove. + * vr-values.c (vr_values::singleton): Use + value_range::singleton_p. + +2019-06-12 Jakub Jelinek <jakub@redhat.com> + + PR target/90811 + * cfgexpand.c (align_local_variable): Add really_expand argument, + don't SET_DECL_ALIGN if it is false. + (add_stack_var): Add really_expand argument, pass it through to + align_local_variable. + (expand_one_stack_var_1): Pass true as really_expand to + align_local_variable. + (expand_one_ssa_partition): Pass true as really_expand to + add_stack_var. + (expand_one_var): Pass really_expand through to add_stack_var. + +2019-06-12 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com> + + * config/arm/iterators.md (VABAL): New int iterator. + * config/arm/neon.md (<sup>sadv16qi): New define_expand. + * config/arm/unspecs.md ("unspec"): Define UNSPEC_VABAL_S, + UNSPEC_VABAL_U values. + +2019-06-12 Martin Liska <mliska@suse.cz> + + * value-prof.c (stream_out_histogram_value): Only first value + can't be negative. + +2019-06-12 Jakub Jelinek <jakub@redhat.com> + + PR c/90760 + * symtab.c (symtab_node::set_section): Allow being called on aliases + as long as they aren't analyzed yet. + +2019-06-11 Faraz Shahbazker <fshahbazker@wavecomp.com> + + * config/mips/mips.c (mips_final_postscan_insn): Modify call + to `mips_set_text_contents_type' to indicate whether a + non-debug insn follows. + +2019-06-11 Michael Meissner <meissner@linux.ibm.com> + + * config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Delete + enabling -mpcrel by default. + * config/rs6000/rs6000.c (rs6000_option_override_internal): Update + test for -mpcrel and/or -mprefixed-addr needing -mcpu=future, so + that the test against -mcpu=future is done first. Then test if + -mprefixed-addr is on for -mpcrel. + (rs6000_disable_incompatible_switches): Add -mcpu=future support. + +2019-06-11 Jakub Jelinek <jakub@redhat.com> + + PR target/90811 + * config/nvptx/nvptx.c (nvptx_output_softstack_switch): Use and.b%d + instead of and.u%d. + +2019-06-11 Marc Glisse <marc.glisse@inria.fr> + + * match.pd (X/[ex]4<Y/[ex]4): Handle conversions. + +2019-06-11 Matthew Beliveau <mbelivea@redhat.com> + + PR c++/90449 - add -Winaccessible-base option. + * doc/invoke.texi (Winaccessible-base): Document. + +2019-06-11 Marc Glisse <marc.glisse@inria.fr> + + PR tree-optimization/62041 + * fold-const.c (fold_real_zero_addition_p): Handle vectors. + +2019-06-11 Jason Merrill <jason@redhat.com> + + * gdbhooks.py (TreePrinter.to_string): Recognize ggc_free'd memory. + * tree.c (get_tree_code_name): Likewise. + * print-tree.c (print_node): Only briefly print a node with an + invalid code. + +2019-06-11 Jakub Jelinek <jakub@redhat.com> + + PR bootstrap/90819 + * trans-mem.c (tm_memopt_compute_available): Add assertion + that blocks is not empty. Formatting fix. + +2019-06-11 Martin Liska <mliska@suse.cz> + + PR c++/87847 + * hash-table.h: Extend create_gcc, add one parameter + that is passed into hash_table::hash_table. + +2019-06-10 Uroš Bizjak <ubizjak@gmail.com> + + * config/i386/i386-protos.h (ix86_split_fp_absneg_operator): + New prototype. + * config/i386/i386-expand.c (ix86_expand_fp_absneg_operator): + Emit clobber also for non-sse operations. + (ix86_split_fp_absneg_operator): New function. + * config/i386/i386.md (SSEMODEF): New mode iterator. + (ssevecmodef): New mode attribute. + (<code>tf2): Use absneg code iterator. + (*<code>tf2_1): Rename from *absnegtf3_sse. Use absneg code iterator. + Add three-operand AVX alternatives. + (*<code><mode>2_i387_1): Rename from *absnegxf2_i387. + Use absneg code iterator and X87MODEF mode iterator. + (absneg fp_reg non-sse splitter): Call absneg code iterator + and X87MODEF mode iterator. + (absneg general_reg non-sse splitter): Use absneg code iterator + and X87MODEF mode iterator. Use ix86_split_fp_absneg_operator. + (*<code><mode>2_1): Rename from *absneg<mode>2. Use absneg + code iterator. Add three-operand AVX alternative. + (absneg sse_reg splitter): Use absneg code iterator + and SSEMODEF mode iterator. Handle AVX operands. + (absneg fp_reg splitter): Use absneg code iterator + and MODEF mode iterator. + (absneg general_reg splitter): Merge splitters using MODEF mode + iterator. Use absneg code iterator. Call + ix86_split_fp_absneg_operator. + (*<code><mode>2_i387): Rename from *<code><mode>2_1. + Do not enable for non-sse modes before reload. + (CSGNMODE): Remove. + (CSGNVMODE): Ditto. + (copysing<mode>3): Use SSEMODEF instead of CSGNMODE and + ssevecmodef mode attribute instaed of CSGNVMODE. + (copysign<mode>3_const): Ditto. + (copysign<mode>3_var): Ditto. + * config/i386/i386.md (*<code><mode>2): Rename from *absneg<mode>2. + Use absneg code iterator. Simplify code using std::swap. + * config/i386/predicates.md (absneg_operator): Remove. + +2019-06-10 Martin Sebor <msebor@redhat.com> + + * gimple-fold.c (get_range_strlen): Update comment that didn't + make it into r267503 or related commits. + +2019-06-10 Vladislav Ivanishin <vlad@ispras.ru> + + * gcov-tool.c (merge_usage, rewrite_usage): Mark with + ATTRIBUTE_NORETURN thus making consistent with overlap_usage. + +2019-06-10 Jakub Jelinek <jakub@redhat.com> + + * tree.def (OMP_SCAN): New tree code. + * tree-core.h (enum omp_clause_code): Add OMP_CLAUSE_INCLUSIVE and + OMP_CLAUSE_EXCLUSIVE. + * tree.h (OMP_CLAUSES): Use OMP_SCAN instead of OMP_TASKGROUP. + (OMP_SCAN_BODY, OMP_SCAN_CLAUSES): Define. + * tree.c (omp_clause_num_ops, omp_clause_code_name): Add entries for + OMP_CLAUSE_{IN,EX}CLUSIVE. + (walk_tree_1): Handle OMP_CLAUSE_{IN,EX}CLUSIVE. + * tree-nested.c (convert_nonlocal_reference_stmt, + convert_local_reference_stmt, convert_gimple_call): Handle + GIMPLE_OMP_SCAN. + * tree-pretty-print.c (dump_omp_clause): Handle + OMP_CLAUSE_{IN,EX}CLUSIVE. + (dump_generic_node): Handle OMP_SCAN. + * gimple.def (GIMPLE_OMP_SCAN): New gimple code. + * gimple.h (gomp_scan): New type. + (is_a_helper <gomp_scan *>::test, + is_a_helper <const gomp_scan *>::test): New templates. + (gimple_build_omp_scan): Declare. + (gimple_omp_scan_clauses, gimple_omp_scan_clauses_ptr, + gimple_omp_scan_set_clauses): New inline functions. + (CASE_GIMPLE_OMP): Add case GIMPLE_OMP_SCAN:. + * gimple.c (gimple_build_omp_scan): New function. + (gimple_copy): Handle GIMPLE_OMP_SCAN. + * gimple-walk.c (walk_gimple_op, walk_gimple_stmt): Likewise. + * gimple-pretty-print.c (dump_gimple_omp_block): Don't handle + GIMPLE_OMP_TASKGROUP. + (dump_gimple_omp_scan): New function. + (pp_gimple_stmt_1): Handle GIMPLE_OMP_SCAN. + * gimple-low.c (lower_stmt): Handle GIMPLE_OMP_SCAN. + * tree-inline.c (remap_gimple_stmt, estimate_num_insns): Likewise. + * gimplify.c (enum gimplify_omp_var_data): Add GOVD_REDUCTION_INSCAN. + (is_gimple_stmt): Handle OMP_SCAN. + (gimplify_scan_omp_clauses): Reject inscan reductions on constructs + other than OMP_FOR or OMP_SIMD. Handle OMP_CLAUSE_{IN,EX}CLUSIVE. + (gimplify_adjust_omp_clauses): Diagnose inscan reductions not + mentioned in nested #pragma omp scan. Handle + OMP_CLAUSE_{IN,EX}CLUSIVE. + (gimplify_expr): Handle OMP_SCAN. + * omp-low.c (check_omp_nesting_restrictions): For parent context, + look through GIMPLE_OMP_SCAN context. Allow #pragma omp scan in + simd constructs. + (scan_omp_1_stmt, lower_omp_1, diagnose_sb_1, diagnose_sb_2): Handle + GIMPLE_OMP_SCAN. + +2019-06-10 Martin Liska <mliska@suse.cz> + + * ipa-cp.c (ignore_edge_p): New function. + (build_toporder_info): Use it. + * ipa-inline.c (ignore_edge_p): New function. + (inline_small_functions): Use it. + * ipa-pure-const.c (ignore_edge_for_nothrow): + Verify opt_for_fn for caller and callee. + (ignore_edge_for_pure_const): Likewise. + * ipa-reference.c (ignore_edge_p): Extend to check + for opt_for_fn. + * ipa-utils.c (searchc): Refactor. + * ipa-utils.h: Fix coding style. + +2019-06-10 Claudiu Zissulescu <claziss@synopsys.com> + + * config/arc/arc.c (arc_rtx_costs): Update costs. + +2019-06-10 Claudiu Zissulescu <claziss@synopsys.com> + + * config/arc/arc-protos.h (arc_check_ior_const): Declare. + (arc_split_ior): Likewise. + (arc_check_mov_const): Likewise. + (arc_split_mov_const): Likewise. + * config/arc/arc.c (arc_print_operand): Fix 'z' letter. + (arc_rtx_costs): Replace check Crr with Cax constraint. + (prepare_move_operands): Cleanup, remove unused code. + (arc_split_ior): New function. + (arc_check_ior_const): Likewise. + (arc_split_mov_const): Likewise. + (arc_check_mov_const): Likewise. + * config/arc/arc.md (movsi_insn): Restructure it, and convert it + in define_insn_and_split pattern. + (iorsi3): Likewise. + (mulsi3_v2): Add new matching variant. + (andsi3_i): Cleanup pattern. + (rotrsi3_cnt1): Update pattern. + (rotrsi3_cnt8): New pattern. + (ashlsi2_cnt8): Likewise. + (ashlsi2_cnt16): Likewise. + * config/arc/constraints.md (C0p): Update constraint. + (Crr): Remove it. + (C0x): New pattern. + (Cax): New pattern. + +2019-06-10 Martin Liska <mliska@suse.cz> + + * ipa-icf.c (sem_item_optimizer::parse_nonsingleton_classes): + Update coding style. + (sem_item_optimizer::dump_cong_classes): + Print how many items are in a non-singular class. Improve + coding style. + +2019-06-10 Martin Liska <mliska@suse.cz> + + * value-prof.c (dump_histogram_value): Change dump format. + (gimple_mod_subtract_transform): Remove legacy comment. + +2019-06-10 Martin Liska <mliska@suse.cz> + + * value-prof.c (dump_histogram_value): Print histogram values + only if present. + +2019-06-10 Martin Liska <mliska@suse.cz> + + * gcov-io.h (GCOV_DISK_SINGLE_VALUES): New. + (GCOV_SINGLE_VALUE_COUNTERS): Likewise. + * ipa-profile.c (ipa_profile_generate_summary): + Use get_most_common_single_value. + * tree-profile.c (gimple_init_gcov_profiler): + Instrument with __gcov_one_value_profiler_v2 + and __gcov_indirect_call_profiler_v4. + * value-prof.c (dump_histogram_value): + Print all values for HIST_TYPE_SINGLE_VALUE. + (stream_out_histogram_value): Update assert for + N values. + (stream_in_histogram_value): Set number of + counters for HIST_TYPE_SINGLE_VALUE. + (get_most_common_single_value): New. + (gimple_divmod_fixed_value_transform): + Use get_most_common_single_value. + (gimple_ic_transform): Likewise. + (gimple_stringops_transform): Likewise. + (gimple_find_values_to_profile): Set number + of counters for HIST_TYPE_SINGLE_VALUE. + * value-prof.h (get_most_common_single_value): New. + +2019-06-10 Martin Liska <mliska@suse.cz> + + * hash-map.h: Pass default value to hash_table ctor. + * hash-table.h: Add default value to call of a ctor. + +2019-06-08 Jonathan Wakely <jwakely@redhat.com> + + * doc/invoke.texi (C Dialect Options): Minor grammatical change. + (x86 Options): Replace all uses of "PCL_MUL" with "PCLMUL" + +2019-06-07 John David Anglin <danglin@gcc.gnu.orig> + + PR target/90751 + * config/pa/pa-linux.h (ASM_DECLARE_FUNCTION_NAME): Update comment. + Call pa_output_function_label. + (TARGET_ASM_FUNCTION_PROLOGUE): define. + * config/pa/pa-protos.h (pa_output_function_label): Declare. + * config/pa/pa.c (pa_output_function_prologue): Add ATTRIBUTE_UNUSED + to declaration. + (pa_linux_output_function_prologue): Declare. + (TARGET_ASM_FUNCTION_PROLOGUE): Delete define. + (pa_output_function_label): New. + (pa_output_function_prologue): Revise to use pa_output_function_label. + (pa_linux_output_function_prologue): New. + * config/pa/pa.h (TARGET_ASM_FUNCTION_PROLOGUE): Define. + +2019-06-07 Aldy Hernandez <aldyh@redhat.com> + + * tree-vrp.h (value_range_base::intersect): New. + (value_range::intersect_helper): Move from here... + (value_range_base::intersect_helper): ...to here. + * tree-vrp.c (value_range::intersect_helper): Rename to... + (value_range_base::intersect_helper): ...this, and rewrite to + return a value instead of modifying THIS in place. + Also, move equivalence handling... + (value_range::intersect): ...here, while calling intersect_helper. + * gimple-fold.c (size_must_be_zero_p): Use value_range_base when + calling intersect. + * gimple-ssa-evrp-analyze.c (ecord_ranges_from_incoming_edge): + Same. + * vr-values.c (vrp_evaluate_conditional_warnv_with_ops): Same. + +2019-06-07 Jakub Jelinek <jakub@redhat.com> + + * Makefile.in (genprogerr): Add condmd. + (genprog): Remove it here. + +2019-06-07 Andrew Stubbs <ams@codesourcery.com> + + * doc/invoke.texi (AMD GCN Options): Add gfx906. + +2019-06-07 Richard Biener <rguenther@suse.de> + + PR debug/90574 + * tree-cfg.c (stmt_starts_bb_p): Split blocks at labels + that appear after user labels. + +2019-06-07 Martin Liska <mliska@suse.cz> + + * cselib.c (cselib_init): Disable hash table + sanitization. + * hash-set.h: Pass new default argument to m_table. + * hash-table.c: Add global variable with hash table + sanitization limit. + * hash-table.h (Allocator>::hash_table): Add new argument + to ctor. + (hashtab_chk_error): New. + * params.def (PARAM_HASH_TABLE_VERIFICATION_LIMIT): New. + * toplev.c (process_options): Set hash_table_sanitize_eq_limit + from the PARAM_HASH_TABLE_VERIFICATION_LIMIT value. + +2019-06-07 Jan Hubicka <hubicka@ucw.cz> + + * common.opt (flto-odr-type-merging): Ignore. + * invoke.texi (-flto-odr-type-merging): Remove. + * ipa-devirt.c (odr_vtable_hasher:odr_name_hasher): Remove. + (can_be_vtable_hashed_p): Remove. + (hash_odr_vtable): Remove. + (odr_vtable_hasher::hash): Remove. + (types_same_for_odr): Remove. + (types_odr_comparable): Remove. + (odr_vtable_hasher::equal): Remove. + (odr_vtable_hash_type, odr_vtable_hash): Remove. + (add_type_duplicate): Do not synchronize vtable and name hashtables. + (get_odr_type): Do not use vtable hash. + (dump_odr_type): Remove commented out code. + (build_type_inheritance_graph): Do not allocate vtable hash. + (rebuild_type_inheritance_graph): Do not delete vtable hash. + * ipa-utils.h (type_with_linkage_p): Drop vtable hash path. + (odr_type_p): Likewise. + * tree.c (need_assembler_name_p): Remove flag_lto_odr_type_mering + test. + +2019-06-07 Jan Hubicka <hubicka@ucw.cz> + + * tree-ssa-alias.c (aliasing_component_refs_p): Do not give up + immediately after same_types_for_tbaa_p returns -1 and continue + looking for possible exact match; if matching types are arrays + watch for partial overlaps. + (indirect_ref_may_alias_decl_p): Watch for partial array overlaps. + (indirect_refs_may_alias_p): Do type based disambiguation first; + update comment. + +2019-06-07 Richard Sandiford <richard.sandiford@arm.com> + + * fwprop.c (propagate_rtx): Fix call to paradoxical_subreg_p. + +2019-06-07 Martin Liska <mliska@suse.cz> + + * doc/invoke.texi: Remove param. + * gcov-counter.def (GCOV_COUNTER_ICALL_TOPNV): + Remove. + * gcov-io.h (GCOV_ICALL_TOPN_VAL): Likewise. + (GCOV_ICALL_TOPN_NCOUNTS): Likewise. + * params.def (PARAM_INDIR_CALL_TOPN_PROFILE): Likewise. + * profile.c (instrument_values): Remove + HIST_TYPE_INDIR_CALL_TOPN. + * tree-profile.c (init_ic_make_global_vars): + Always build __gcov_indirect_call only. + (gimple_init_gcov_profiler): Remove usage + of PARAM_INDIR_CALL_TOPN_PROFILE. + (gimple_gen_ic_profiler): Likewise. + * value-prof.c (dump_histogram_value): Likewise. + (stream_in_histogram_value): Likewise. + (gimple_indirect_call_to_profile): Likewise. + (gimple_find_values_to_profile): Likewise. + * value-prof.h (enum hist_type): Likewise. + +2019-06-07 Martin Liska <mliska@suse.cz> + + * tree-ssa-loop.c (get_lsm_tmp_name): Return at the end of the + function. + +2019-06-07 Martin Liska <mliska@suse.cz> + + PR tree-optimization/78902 + * builtin-attrs.def (ATTR_WARN_UNUSED_RESULT): New. + (ATTR_MALLOC_NOTHROW_LEAF_LIST): Remove. + (ATTR_WARN_UNUSED_RESULT_NOTHROW_LEAF_LIST): New. + (ATTR_MALLOC_WARN_UNUSED_RESULT_NOTHROW_LEAF_LIST): New. + (ATTR_ALLOC_SIZE_2_NOTHROW_LIST): Remove. + (ATTR_MALLOC_SIZE_1_NOTHROW_LEAF_LIST): Remove. + (ATTR_MALLOC_WARN_UNUSED_RESULT_NOTHROW_LIST): New. + (ATTR_ALLOC_WARN_UNUSED_RESULT_SIZE_2_NOTHROW_LIST): New. + (ATTR_MALLOC_WARN_UNUSED_RESULT_SIZE_1_NOTHROW_LEAF_LIST): New. + (ATTR_ALLOCA_SIZE_1_NOTHROW_LEAF_LIST): Remove. + (ATTR_ALLOCA_WARN_UNUSED_RESULT_SIZE_1_NOTHROW_LEAF_LIST): New. + (ATTR_MALLOC_SIZE_1_2_NOTHROW_LEAF_LIST): Remove. + (ATTR_MALLOC_WARN_UNUSED_RESULT_SIZE_1_2_NOTHROW_LEAF_LIST): + New. + (ATTR_ALLOC_SIZE_2_NOTHROW_LEAF_LIST): Remove. + (ATTR_ALLOC_WARN_UNUSED_RESULT_SIZE_2_NOTHROW_LEAF_LIST): New. + (ATTR_MALLOC_NOTHROW_NONNULL): Remove. + (ATTR_WARN_UNUSED_RESULT_NOTHROW_NONNULL): New. + (ATTR_MALLOC_WARN_UNUSED_RESULT_NOTHROW_NONNULL): New. + (ATTR_MALLOC_NOTHROW_NONNULL_LEAF): Remove. + (ATTR_WARN_UNUSED_RESULT_NOTHROW_NONNULL_LEAF): New. + (ATTR_MALLOC_WARN_UNUSED_RESULT_NOTHROW_NONNULL_LEAF): New. + * builtins.def (BUILT_IN_ALIGNED_ALLOC): Change to use + warn_unused_result attribute. + (BUILT_IN_STRDUP): Likewise. + (BUILT_IN_STRNDUP): Likewise. + (BUILT_IN_ALLOCA): Likewise. + (BUILT_IN_CALLOC): Likewise. + (BUILT_IN_MALLOC): Likewise. + (BUILT_IN_REALLOC): Likewise. + +2019-06-06 Jim Wilson <jimw@sifive.com> + + PR target/89955 + * config/riscv/riscv.h (STARTFILE_PREFIX_SPEC): Deleted. + * config/riscv/freebsd.h (STARTFILE_PREFIX_SPEC): Added. + * config/riscv/linux.h (STARTFILE_PREFIX_SPEC): Added. + +2019-06-06 Martin Sebor <msebor@redhat.com> + + * tree-ssa-strlen.c (adjust_related_strinfos): Avoid trailing article. + (handle_builtin_malloc): Remove trailing spaces. + (handle_builtin_memset): Same. + (handle_builtin_memcmp): Same. + (compute_string_length): Same. + (determine_min_objsize): Same. + (handle_builtin_string_cmp): Same. + (handle_char_store): Same. Break up excessively long line. + +2019-06-06 Martin Jambor <mjambor@suse.cz> + + * tree-sra.c (build_reconstructed_reference): Drop the alignment + check. + +2019-06-06 Martin Jambor <mjambor@suse.cz> + + * tree-sra.c (struct access): New field grp_same_access_path. + (dump_access): Dump it. + (build_reconstructed_reference): New function. + (build_ref_for_model): Use it if possible. + (path_comparable_for_same_access): New function. + (same_access_path_p): Likewise. + (sort_and_splice_var_accesses): Set the new flag. + (analyze_access_subtree): Likewise. + (propagate_subaccesses_across_link): Propagate zero value of the new + flag down the access tree. + +2019-06-06 Andrew Stubbs <ams@codesourcery.com> + + * config.gcc (amdgcn-*-*): Allow --with-arch=gfx906. + * config/gcn/gcn.opt (gpu_type): Add gfx906. + * config/gcn/t-gcn-hsa (MULTILIB_OPTIONS): Add gfx906 multilib. + (MULTILIB_DIRNAMES): Rename gcn5 to gfx900. + Add gfx906. + +2019-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + PR tree-optimization/90332 + * config/aarch64/aarch64.c (aarch64_expand_vector_init): + Handle VALS containing two vectors. + * config/aarch64/aarch64-simd.md (*aarch64_combinez<mode>): Rename + to... + (@aarch64_combinez<mode>): ... This. + (*aarch64_combinez_be<mode>): Rename to... + (@aarch64_combinez_be<mode>): ... This. + (vec_init<mode><Vhalf>): New define_expand. + * config/aarch64/iterators.md (Vhalf): Handle V8HF. + +2019-06-06 Jozef Lawrynowicz <jozef.l@mittosystems.com> + + * config/msp430/msp430.md (ashlhi3): Use the const_variant of shift + library functions only when not optimizing for size. + (ashlsi3): Likewise. + (ashrhi3): Likewise. + (ashrsi3): Likewise. + (lshrhi3): Likewise. + (lshrsi3): Likewise. + +2019-06-06 Andreas Krebbel <krebbel@linux.ibm.com> + + PR rtl-optimization/88751 + * ira.c (ira): Use the number of the actually referenced registers + when calculating the threshold. + +2019-06-06 Jakub Jelinek <jakub@redhat.com> + + * configure: Regenerate. + +2019-06-06 Jozef Lawrynowicz <jozef.l@mittosystems.com> + + * config/msp430/msp430.md (ashlhi3): Force shift src operand into a + register if it is in memory, so the shift can be emulated with a rotate + instruction. + (ashrhi3): Likewise. + (lshrhi3): Likewise. + +2019-06-06 Martin Liska <mliska@suse.cz> + + PR tree-optimization/87954 + * match.pd: Simplify mult where both arguments are 0 or 1. + +2019-06-06 Richard Biener <rguenther@suse.de> + + * vr-values.c (vr_values::extract_range_from_ssa_name): Do not + put equivalences on UNDEFINED ranges. + * gimple-ssa-evrp.c (evrp_dom_walker::before_dom_children): + Make sure to drop defs of stmts added during simplification + to VARYING. + +2019-06-06 Richard Biener <rguenther@suse.de> + + * tree-ssa-structalias.c: Include tree-cfg.h. + (make_heapvar): Do not make heap vars artificial. + (find_func_aliases_for_builtin_call): Handle stack allocation + functions. + (find_func_aliases): Delay processing of simple enough returns + in non-IPA mode. + (set_uids_in_ptset): Adjust. + (find_what_var_points_to): Likewise. + (solve_constraints): Do not dump points-to sets here. + (compute_points_to_sets): Post-process return statements, + amending the escaped solution. Dump points-to sets afterwards. + (ipa_pta_execute): Dump points-to sets. + +2019-06-06 Martin Liska <mliska@suse.cz> + + PR web/87933 + * doc/install.texi: Fix HTML headers and + titles for 'Installing GCC' pages. + +2019-06-06 Martin Liska <mliska@suse.cz> + + * ipa-icf-gimple.h (dump_message_1): Remove. + (dump_message): Likewise. + (return_false_with_message_1): Print also file. + (return_false_with_msg): Likewise. + (return_with_result): Likewise. + (return_with_debug): Likewise. + * ipa-icf.c (sem_function::equals_private): Remove call + to dump_message. + +2019-06-05 Hongtao Liu <hongtao.liu@intel.com> + + * config/i386/sse.md (define_mode_suffix vecmemsuffix): New. + (define_insn "avx512dq_fpclass<mode><mask_scalar_merge_name>"): Enable + memory operand for it. + (define_insn "avx512dq_vmfpclass<mode><mask_scalar_merge_name>"): Ditto. + +2019-06-05 Martin Sebor <msebor@redhat.com> + + * config/i386/i386-features.c (ix86_get_function_versions_dispatcher): + Adjust quoting and hyphenation. + * convert.c (convert_to_real_1): Same. + * gcc.c (driver_wrong_lang_callback): Same. + (driver::handle_unrecognized_options): Same. + * gimple-ssa-nonnull-compare.c (do_warn_nonnull_compare): Same. + * opts-common.c (cmdline_handle_error): Same. + (read_cmdline_option): Same. + * opts-global.c (complain_wrong_lang): Same. + (print_ignored_options): Same. + (handle_common_deferred_options): Same. + * pretty-print.h: Same. + * print-rtl.c (debug_bb_n_slim): Same. + * sched-rgn.c (make_pass_sched_fusion): Same. + * tree-cfg.c (verify_gimple_assign_unary): Same. + (verify_gimple_label): Same. + * tree-ssa-operands.c (verify_ssa_operands): Same. + * varasm.c (do_assemble_alias): Same. + (assemble_alias): Same. + +2019-06-05 Richard Henderson <rth@twiddle.net> + + * config/alpha/alpha.c (direct_return): Move down after + struct machine_function definition; use saved frame_size; + return bool. + (struct machine_function): Add sa_mask, sa_size, frame_size. + (alpha_sa_mask, alpha_sa_size, compute_frame_size): Merge into ... + (alpha_compute_frame_layout): ... new function. + (TARGET_COMPUTE_FRAME_LAYOUT): New. + (alpha_initial_elimination_offset): Use saved sa_size. + (alpha_vms_initial_elimination_offset): Likewise. + (alpha_vms_can_eliminate): Remove alpha_sa_size call. + (alpha_expand_prologue): Use saved frame data. Merge integer + and fp register save loops. + (alpha_expand_epilogue): Likewise. + (alpha_start_function): Use saved frame data. + * config/alpha/alpha-protos.h (direct_return): Update. + (alpha_sa_size): Remove. + +2019-06-05 Eric Botcazou <ebotcazou@adacore.com> + + * fold-const.c (extract_muldiv_1) <PLUS_EXPR>: Do not distribute a + multiplication by a power-of-two value. + (fold_plusminus_mult_expr): Use pow2p_hwi to spot a power-of-two value + and turn the modulo operation into a masking operation. + +2019-06-05 Jakub Jelinek <jakub@redhat.com> + + PR debug/90733 + * var-tracking.c (vt_expand_loc_callback): Don't create raw subregs + with VOIDmode inner operands. + +2019-06-05 Richard Biener <rguenther@suse.de> + + PR middle-end/90726 + * tree-ssa-loop-niter.c (expand_simple_operations): Do not + turn an expression graph into a tree. + +2019-06-05 Jakub Jelinek <jakub@redhat.com> + + * omp-expand.c (struct omp_region): Add has_lastprivate_conditional + member. + (expand_parallel_call): If region->inner->has_lastprivate_conditional, + treat it like explicit monotonic schedule modifier. + (expand_omp_for): Initialize has_lastprivate_conditional. + If fd.lastprivate_conditional != 0, treat it like explicit monotonic + schedule modifier. + + * omp-low.c (lower_rec_input_clauses): For lastprivate conditional + references, lookup in in hash map MEM_REF operand instead of the + MEM_REF itself. + (lower_omp_1): When looking for lastprivate conditional assignments, + handle MEM_REFs with REFERENCE_TYPE operands. + + * omp-low.c (lower_rec_input_clauses): Force max_vf if is_simd and + on privatization clauses OMP_CLAUSE_DECL is privatized by reference + and references a VLA. Handle references to non-VLAs if is_simd + all privatization clauses like reductions. + (lower_rec_input_clauses) <case do_private, case do_firstprivate>: + If omp_is_reference, use always omp simd arrays and set + DECL_VALUE_EXPR in that case, if lower_rec_simd_input_clauses + fails, emit reference initialization. + +2019-06-05 Hongtao Liu <hongtao.liu@intel.com> + + PR target/89803 + * config/i386/avx512dqintrin.h (_mm_mask_fpclass_ss_mask, + _mm_mask_fpclass_sd_mask): New intrinsics. + (_mm_fpclass_ss_mask, _mm_fpclass_sd_mask): Modified, use new builtins. + * config/i386/i386-builtin.def + (__builtin_ia32_fpclassss_mask, __builtin_ia32_fpclasssd_mask): + New builtins. + (__builtin_ia32_fpclassss, __builtin_ia32_fpclasssd): Deleted. + * config/i386/i386-builtin-types.def (DEF_FUNCTION_TYPE (QI, V2DF, INT), + DEF_FUNCTION_TYPE (QI, V4SF, INT)): Deleted. + * config/i386/i386-expand.c (case QI_FTYPE_V4SF_INT, + case QI_FTYPE_V2SF_INT): Ditto. + * config/i386/sse.md + (define_insn "avx512dq_vmfpclass<mode><mask_scalar_merge_name>): + Extended to insnstructions with mask operands. + +2019-06-04 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/constraints.md (define_register_constraint "wp"): + Delete. + (define_register_constraint "wq"): Delete. + * config/rs6000/rs6000.c (rs6000_debug_reg_global): Adjust. + (rs6000_init_hard_regno_mode_ok): Adjust. + * config/rs6000/rs6000.h (enum r6000_reg_class_enum): Delete + RS6000_CONSTRAINT_wp and RS6000_CONSTRAINT_wq. + * config/rs6000/vsx.md (define_mode_attr VSr3): Delete. + (define_mode_attr VSa): Delete. + (define_mode_attr VSisa): New. + (rest of file): Adjust. + * doc/md.texi (Machine Constraints): Adjust. + +2019-06-04 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/rs6000.md (define_attr "isa"): Add p9kf and p9tf. + (define_attr "enabled"): Handle those new isa values. + +2019-06-04 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/vsx.md (define_mode_attr VSr4): Delete. + (define_mode_attr VSr5): Delete. + (define_mode_attr VStype_sqrt): Delete. + (define_mode_iterator VSX_SPDP): Delete. + (define_mode_attr VS_spdp_res): Delete. + (define_mode_attr VS_spdp_insn): Delete. + (define_mode_attr VS_spdp_type): Delete. + (*vsx_sqrt<mode>2): Adjust. + (vsx_<VS_spdp_insn>): Delete, split to... + (vsx_xscvdpsp): ... this. New. And... + (vsx_xvcvspdp): ... this. New. And... + (vsx_xvcvdpsp): ... this. New. + +2019-06-04 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/rs6000.md (define_mode_attr sd): Add values for V4SF + and V2DF. + * config/rs6000/vsx.md (define_mode_attr VSs): Delete. + (rest of file): Adjust. + +2019-06-04 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/vsx.md (vsx_<VS_spdp_insn>): Use wa instead of <VSa>. + (vsx_extract_<mode>_var): Ditto. + +2019-06-04 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/vsx.md: Replace all <VSa> that are used with VSX_TI + with just "wa". + +2019-06-04 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/constraints.md (define_register_constraint "ww"): + Delete. + * config/rs6000/rs6000.c (rs6000_debug_reg_global): Adjust. + (rs6000_init_hard_regno_mode_ok): Adjust. + * config/rs6000/rs6000.h (enum r6000_reg_class_enum): Delete + RS6000_CONSTRAINT_ww. + * config/rs6000/rs6000.md: Adjust. + * config/rs6000/vsx.md: Adjust. + * doc/md.texi (Machine Constraints): Adjust. + +2019-06-04 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/rs6000.md (SFDF, SFDF2): Adjust comments. + (define_mode_attr sd): New. + (define_mode_attr s): New. + (define_mode_attr Ftrad): Delete. + (define_mode_attr Fvsx): Delete. + (define_mode_attr Fs): Delete. + (rest of file): Use the new mode attributes. + * config.rs6000/vsx.md: Use the new mode attributes. + +2019-06-04 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/vsx.md: Replace all <VSa> that are used with VSX_W + with just "wa". + +2019-06-04 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/vsx.md (define_mode_attr VSr2): Delete. + (rest of file): Replace all <VSa>, <VSr>, <VSr2>, and <VSr3> that are + used with VSX_B, VSX_D, or VSX_F, with just "wa". + +2019-06-04 Bill Schmidt <wschmidt@linux.ibm.com> + + PR target/78263 + * config/rs6000/altivec.h: Don't #define vector, pixel, bool for + C++ with strict ANSI requirements. + +2019-06-04 Marc Glisse <marc.glisse@inria.fr> + + * tree-ssa-loop-niter.c (number_of_iterations_ne): Skip + computations when step is 1. + +2019-06-04 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/constraints.md (define_register_constraint "wf"): + Delete. + * config/rs6000/rs6000.c (rs6000_debug_reg_global): Adjust. + (rs6000_init_hard_regno_mode_ok): Adjust. + * config/rs6000/rs6000.h (enum r6000_reg_class_enum): Delete + RS6000_CONSTRAINT_wf. + * config/rs6000/rs6000.md: Adjust. + * config/rs6000/vsx.md: Adjust. + * doc/md.texi (Machine Constraints): Adjust. + +2019-06-04 Andrew Pinski <apinski@marvell.com> + + * config/aarch64/aarch64.c (aarch64_asan_shadow_offset): + Fix ILP32 value. + +2019-06-04 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/constraints.md (define_register_constraint "wd"): + Delete. + * config/rs6000/rs6000.c (rs6000_debug_reg_global): Adjust. + (rs6000_init_hard_regno_mode_ok): Adjust. + * config/rs6000/rs6000.h (enum r6000_reg_class_enum): Delete + RS6000_CONSTRAINT_wd. + * config/rs6000/rs6000.md: Adjust. + * config/rs6000/vsx.md: Adjust. + * doc/md.texi (Machine Constraints): Adjust. + +2019-06-04 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/rs6000.md (define_mode_attr Fv2): Delete. + (rest of file): Adjust. + +2019-06-04 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/vsx.md (define_mode_attr VS_64reg): Delete. + (*vsx_extract_<P:mode>_<VSX_D:mode>_load): Adjust. + (vsx_splat_<mode>_reg): Adjust. + +2019-06-04 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/constraints.md (define_register_constraint "ws"): + Delete. + * config/rs6000/rs6000.c (rs6000_debug_reg_global): Adjust. + (rs6000_init_hard_regno_mode_ok): Adjust. + * config/rs6000/rs6000.h (enum r6000_reg_class_enum): Delete + RS6000_CONSTRAINT_ws. + * config/rs6000/rs6000.md: Adjust. + * config/rs6000/vsx.md: Adjust. + * doc/md.texi (Machine Constraints): Adjust. + +2019-06-04 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/constraints.md (define_register_constraint "wv"): + Delete. + * config/rs6000/rs6000.c (rs6000_debug_reg_global): Adjust. + (rs6000_init_hard_regno_mode_ok): Adjust. + * config/rs6000/rs6000.h (enum r6000_reg_class_enum): Delete + RS6000_CONSTRAINT_wv. + * config/rs6000/rs6000.md: Adjust. + * config/rs6000/vsx.md: Adjust. + * doc/md.texi (Machine Constraints): Adjust. + +2019-06-04 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/constraints.md (define_register_constraint "wi"): + Delete. + (define_register_constraint "wt"): Delete. + * config/rs6000/rs6000.c (rs6000_debug_reg_global): Adjust. + (rs6000_init_hard_regno_mode_ok): Adjust. + * config/rs6000/rs6000.h (enum r6000_reg_class_enum): Delete + RS6000_CONSTRAINT_wi and RS6000_CONSTRAINT_wt. + * config/rs6000/rs6000.md: Adjust. + * config/rs6000/vsx.md: Adjust. + * doc/md.texi (Machine Constraints): Adjust. + +2019-06-04 Szabolcs Nagy <szabolcs.nagy@arm.com> + + * config/aarch64/aarch64-protos.h (aarch64_asm_output_external): Remove + const. + * config/aarch64/aarch64.c (aarch64_asm_output_external): Call + default_elf_asm_output_external. + +2019-06-04 Martin Liska <mliska@suse.cz> + + * ipa-icf.c (INCLUDE_LIST): Remove. + (sem_item_optimizer::execute): Remove call to init_wpa. + * ipa-icf.h (init_wpa): Remove. + +2019-06-04 Jakub Jelinek <jakub@redhat.com> + + * gimplify.c (gimplify_scan_omp_clauses): Don't sorry_at on lastprivate + conditional on combined for simd. + * omp-low.c (struct omp_context): Add combined_into_simd_safelen0 + member. + (lower_rec_input_clauses): For gimple_omp_for_combined_into_p max_vf 1 + constructs, don't remove lastprivate_conditional_map, but instead set + ctx->combined_into_simd_safelen0 and adjust hash_map, so that it points + to parent construct temporaries. + (lower_lastprivate_clauses): Handle ctx->combined_into_simd_safelen0 + like !ctx->lastprivate_conditional_map. + (lower_omp_1) <case GIMPLE_ASSIGN>: If up->combined_into_simd_safelen0, + use up->outer context instead of up. + * omp-expand.c (expand_omp_for_generic): Perform cond_var bump even if + gimple_omp_for_combined_p. + (expand_omp_for_static_nochunk): Likewise. + (expand_omp_for_static_chunk): Add forgotten cond_var bump that was + probably moved over into expand_omp_for_generic rather than being copied + there. + +2019-06-04 Martin Liska <mliska@suse.cz> + + * value-prof.c (dump_histogram_value): Fix typo. + (gimple_mod_subtract_transform): Likewise. + +2019-06-04 Richard Biener <rguenther@suse.de> + + PR middle-end/90726 + * tree-chrec.c (chrec_contains_symbols): Add to visited. + (tree_contains_chrecs): Likewise. + (chrec_contains_symbols_defined_in_loop): Move here and avoid + exponential behaivor from ... + * tree-scalar-evolution.c (chrec_contains_symbols_defined_in_loop): + ... here. + (expression_expensive_p): Avoid exponential behavior and compute + expanded size, rejecting any expansion. + * tree-ssa-loop-ivopts.c (abnormal_ssa_name_p): Remove. + (idx_contains_abnormal_ssa_name_p): Likewise. + (contains_abnormal_ssa_name_p_1): New helper for walk_tree. + (contains_abnormal_ssa_name_p): Simplify and use + walk_tree_without_duplicates. + +2019-06-04 Richard Biener <rguenther@suse.de> + + PR tree-optimization/90738 + Revert + 2019-06-03 Richard Biener <rguenther@suse.de> + + * tree-ssa-sccvn.c (ao_ref_init_from_vn_reference): Get original + full reference tree and record in ref->ref. + (vn_reference_lookup_3): Pass in original ref to + ao_ref_init_from_vn_reference. + (vn_reference_lookup): Likewise. + * tree-ssa-sccvn.h (ao_ref_init_from_vn_reference): Adjust prototype. + * tree-ssa-alias.c (nonoverlapping_component_refs_of_decl_p): + Handle non-decl bases in the original reference. + +2019-06-04 Martin Liska <mliska@suse.cz> + + * ipa-icf.c (sem_item_optimizer::add_item_to_class): Count + number of references. + (sem_item_optimizer::do_congruence_step): + (sem_item_optimizer::worklist_push): Dump how references + a class has. + (sem_item_optimizer::worklist_pop): Use heap. + (sem_item_optimizer::process_cong_reduction): Likewise. + * ipa-icf.h: Use fibonacci_heap insteam of std::list. + +2019-06-04 Martin Liska <mliska@suse.cz> + + * ipa-icf.h (struct sem_usage_pair_hash): New. + (sem_usage_pair_hash::hash): Likewise. + (sem_usage_pair_hash::equal): Likewise. + (struct sem_usage_hash): Likewise. + * ipa-icf.c (sem_item::sem_item): Initialize + referenced_by_count. + (sem_item::add_reference): Register a reference + in ref_map and not in target->usages. + (sem_item::setup): Remove initialization of + dead vectors. + (sem_item::~sem_item): Remove usage of dead vectors. + (sem_item::dump): Remove dump of references. + (sem_item_optimizer::sem_item_optimizer): Initialize + m_references. + (sem_item_optimizer::read_section): Remove useless + dump. + (sem_item_optimizer::parse_funcs_and_vars): Likewise here. + (sem_item_optimizer::build_graph): Pass m_references + to ::add_reference. + (sem_item_optimizer::verify_classes): Remove usage of dead + vectors. + (sem_item_optimizer::traverse_congruence_split): Return true + when a class is split. + (sem_item_optimizer::do_congruence_step_for_index): Use + hash_map for look up of (sem_item *, index). That brings + significant speed up. + (sem_item_optimizer::do_congruence_step): Return true + when a split is done. + (congruence_class::is_class_used): Use referenced_by_count. + +2019-06-04 Alan Modra <amodra@gmail.com> + + PR target/90689 + * config/rs6000/rs6000.c (rs6000_call_aix): Correct r271753 merge + error. + +2019-06-03 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/rs6000.h (MASK_MFPGPR): Delete. + * config/rs6000/rs6000.c (direct_move_p): Adjust. + (rs6000_secondary_reload_simple_move): Adjust. + (rs6000_opt_masks): Neuter the "mfpgpr" option. + * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Adjust. + * config/rs6000/rs6000-cpus.def (ISA_2_5_MASKS_EMBEDDED): Adjust + comment. + (power6x): Adjust. + * config/rs6000/rs6000.md (floatsi<mode>2_lfiwax): Adjust. + (floatunssi<mode>2_lfiwzx): Adjust. + (fix_trunc<mode>si2_stfiwx): Adjust. + (fixuns_trunc<mode>si2_stfiwx): Adjust. + * config/rs6000/rs6000.opt (mno-mfpgpr): New. + (mfpgpr): Mark as deprecated. + * doc/extend.texi (PowerPC Function Attributes): Delete mfpgpr. + (Basic PowerPC Built-in Functions Available on ISA 2.05): Adjust. + * doc/invoke.texi (RS/6000 and PowerPC Options): Delete -mmfpgpr. + +2019-06-03 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/constraints.md (define_register_constraint "wg"): + Delete. + * config/rs6000/rs6000.h (enum r6000_reg_class_enum): Delete + RS6000_CONSTRAINT_wg. + * config/rs6000/rs6000.c (rs6000_debug_reg_global): Adjust. + (rs6000_init_hard_regno_mode_ok): Adjust. + * config/rs6000/rs6000.md (*mov<mode>_softfloat32, *movdi_internal64): + Delete "wg" alternatives. + * doc/md.texi (Machine Constraints): Adjust. + +2019-06-03 Alan Modra <amodra@gmail.com> + + * bb-reorder.c (copy_bb_p): Don't overflow size calculation. + (get_uncond_jump_length): Assert length less than INT_MAX and + non-negative. + +2019-06-03 Wilco Dijkstra <wdijkstr@arm.com> + + PR middle-end/64242 + * builtins.c (expand_builtin_longjmp): Add frame clobbers and schedule + block. + (expand_builtin_nonlocal_goto): Likewise. + +2019-06-03 Szabolcs Nagy <szabolcs.nagy@arm.com> + + * config/aarch64/aarch64-protos.h (aarch64_asm_output_alias): Declare. + (aarch64_asm_output_external): Declare. + * config/aarch64/aarch64.c (aarch64_asm_output_variant_pcs): New. + (aarch64_declare_function_name): Call aarch64_asm_output_variant_pcs. + (aarch64_asm_output_alias): New. + (aarch64_asm_output_external): New. + * config/aarch64/aarch64.h (ASM_OUTPUT_DEF_FROM_DECLS): Define. + (ASM_OUTPUT_EXTERNAL): Define. + +2019-06-03 Aldy Hernandez <aldyh@redhat.com> + * tree-vrp.h (value_range_base::nonzero_p): New. + (value_range_base::set_nonnull): Rename to... + (value_range_base::set_nonzero): ...this. + (value_range_base::set_null): Rename to... + (value_range_base::set_zero): ...this. + (value_range::set_nonnull): Remove. + (value_range::set_null): Remove. + * tree-vrp.c (range_is_null): Remove. + (range_is_nonnull): Remove. + (extract_range_from_binary_expr): Use value_range_base::*zero_p + instead of range_is_*null. + (extract_range_from_unary_expr): Same. + (value_range_base::set_nonnull): Rename to... + (value_range_base::set_nonzero): ...this. + (value_range::set_nonnull): Remove. + (value_range_base::set_null): Rename to... + (value_range_base::set_zero): ...this. + (value_range::set_null): Remove. + (extract_range_from_binary_expr): Rename set_*null uses to + set_*zero. + (extract_range_from_unary_expr): Same. + (union_helper): Same. + * vr-values.c (get_value_range): Use set_*zero instead of + set_*null. + (vr_values::extract_range_from_binary_expr): Same. + (vr_values::extract_range_basic): Same. + +2019-06-03 Wilco Dijkstra <wdijkstr@arm.com> + + PR driver/90684 + * opts.c (parse_and_check_align_values): Allow 4 alignment values. + +2019-06-03 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/aarch64/iterators.md (MAX_OPP): New code attr. + * config/aarch64/aarch64-simd.md (*aarch64_<su>abd<mode>_3): + Rename to... + (aarch64_<su>abd<mode>_3): ... This. + (<sur>sadv16qi): Add TARGET_DOTPROD expansion. + +2019-06-03 Richard Biener <rguenther@suse.de> + + * tree-ssa-sccvn.c (ao_ref_init_from_vn_reference): Get original + full reference tree and record in ref->ref. + (vn_reference_lookup_3): Pass in original ref to + ao_ref_init_from_vn_reference. + (vn_reference_lookup): Likewise. + * tree-ssa-sccvn.h (ao_ref_init_from_vn_reference): Adjust prototype. + * tree-ssa-alias.c (nonoverlapping_component_refs_of_decl_p): + Handle non-decl bases in the original reference. + +2019-06-03 Martin Liska <mliska@suse.cz> + + * doc/generic.texi: Remove Java Trees. + +2019-06-03 Martin Liska <mliska@suse.cz> + + * fold-const.c (operand_equal_p): Fix typo as compare_tree_int + returns 0 when operands are equal. + +2019-06-03 Richard Biener <rguenther@suse.de> + + PR tree-optimization/90716 + * tree-loop-distribution.c (destroy_loop): Process blocks in + correct order. + +2019-06-03 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org> + + PR target/88837 + * vector-builder.h (vector_builder::count_dups): New method. + * config/aarch64/aarch64-protos.h (aarch64_expand_sve_vector_init): + Declare prototype. + * config/aarch64/aarch64/sve.md (aarch64_sve_rev64<mode>): Use @. + (vec_init<mode><Vel>): New pattern. + * config/aarch64/aarch64.c (emit_insr): New function. + (aarch64_sve_expand_vector_init_handle_trailing_constants): Likewise. + (aarch64_sve_expand_vector_init_insert_elems): Likewise. + (aarch64_sve_expand_vector_init_handle_trailing_same_elem): Likewise. + (aarch64_sve_expand_vector_init): Define two overloaded functions. + +2019-06-03 Alejandro Martinez <alejandro.martinezvicente@arm.com> + + PR tree-optimization/90681 + * internal-fn.c (mask_load_direct): Mark as non-vectorizable again. + * tree-vect-slp.c (vect_build_slp_tree_1): Add masked loads as a + special case for SLP, but fail on non-groupped loads. + +2019-06-03 Martin Liska <mliska@suse.cz> + + * cfg.c (debug): Use TDF_DETAILS for debug and + print edge info only once. + +2019-06-02 Thomas Koenig <tkoenig@gcc.gnu.org> + + PR fortran/90539 + * predict.def (PRED_FORTRAN_CONTIGUOUS): New predictor. + +2019-06-01 Martin Sebor <msebor@redhat.com> + + PR middle-end/90694 + * tree-pretty-print.c (dump_generic_node): Add parentheses. + +2019-05-31 Jan Hubicka <jh@suse.cz> + + * alias.c: Include ipa-utils.h. + (get_alias_set): Try to complete ODR type via ODR type hash lookup. + * ipa-devirt.c (prevailing_odr_type): New. + * ipa-utils.h (previaling_odr_type): Declare. + +2019-05-31 H.J. Lu <hongjiu.lu@intel.com> + Hongtao Liu <hongtao.liu@intel.com> + + PR target/89355 + * config/i386/i386-features.c (rest_of_insert_endbranch): Remove + NOTE_INSN_DELETED_LABEL check. + +2019-05-31 Prachi Godbole <prachi.godbole@imgtec.com> + Robert Suchanek <robert.suchanek@mips.com> + + * config/mips/mips.c (mips_expand_builtin_insn): Swap the 1st + and 3rd operands of the fmadd/fmsub/maddv builtin. + +2019-05-31 Jakub Jelinek <jakub@redhat.com> + + * tree.h (OMP_CLAUSE__CONDTEMP__ITER): Define. + * gimplify.c (gimplify_scan_omp_clauses): Allow lastprivate conditional + on OMP_SIMD if not nested inside of worksharing loop that also has + lastprivate conditional clause for the same decl. + (gimplify_omp_for): Add _condtemp_ clauses to OMP_SIMD if needed. + * omp-low.c (scan_sharing_clauses): Handle OMP_CLAUSE__CONDTEMP_ also + on simd. + (lower_rec_input_clauses): Likewise. Handle lastprivate conditional + on simd construct. + (lower_lastprivate_conditional_clauses): Handle lastprivate conditional + on simd construct. + (lower_lastprivate_clauses): Likewise. + (lower_omp_sections): Call lower_lastprivate_conditional_clauses before + calling lower_rec_input_clauses. + (lower_omp_for): Likewise. + (lower_omp_1): Use first rather than second OMP_CLAUSE__CONDTEMP_ + clause on simd construct. + * omp-expand.c (expand_omp_simd): Initialize cond_var if + OMP_CLAUSE__CONDTEMP_ clause is present. + + * omp-low.c (lower_rec_simd_input_clauses): Set TREE_THIS_NOTRAP on + ivar and lvar. + +2019-05-31 Xiong Hu Luo <luoxhu@linux.ibm.com> + + PR c/43673 + * c-format.c (print_char_table, scanf_char_table): Replace BADLEN with + TEX_D32, TEX_D64 or TEX_D128. + +2019-05-31 Marc Glisse <marc.glisse@inria.fr> + + * match.pd (~(vec?cst1:cst2)): New transformation. + +2019-05-31 Marc Glisse <marc.glisse@inria.fr> + + * match.pd (X/[ex]D<Y/[ex]D): Handle negative denominator. + ((size_t)(A /[ex] B) CMP C): New transformation. + +2019-05-31 Richard Sandiford <richard.sandiford@arm.com> + + * doc/md.texi: Document define_insn_and_rewrite. + * rtl.def (DEFINE_INSN_AND_REWRITE): New rtx code. + * gensupport.c (queue_elem): Update comment. + (replace_operands_with_dups): New function. + (gen_rewrite_sequence): Likewise. + (process_rtx): Handle DEFINE_INSN_AND_REWRITE. + * read-rtl.c (apply_subst_iterator): Likewise. + (add_condition_to_rtx, named_rtx_p): Likewise. + (rtx_reader::read_rtx_operand): Likewise. + * config/aarch64/aarch64-sve.md + (while_ult<GPI:mode><PRED_ALL:mode>_cc): Rename to... + (*while_ult<GPI:mode><PRED_ALL:mode>_cc): ...this and use + define_insn_and_rewrite. + (*cond_<optab><mode>_any): Turn into define_insn_and_rewrites. + Remove separate define_split. + +2019-05-31 Jan Hubicka <jh@suse.cz> + + * tree-ssa-alias.c (type_has_components_p): New function. + (aliasing_component_refs_p): Use it. + +2019-05-31 Martin Liska <mliska@suse.cz> + + * gdbhooks.py: Add const_tree to TreePrinter. + +2019-05-31 Thomas De Schampheleire <thomas.de_schampheleire@nokia.com> + + PR debug/86964 + * common.opt (feliminate-unused-debug-symbols): Enable by default. + * doc/invoke.texi (Debugging Options): Document new default of + -feliminate-unused-debug-symbols and remove restriction to 'stabs'. + +2019-05-31 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/90671 + * tree-ssa-threadupdate.c (ssa_create_duplicates): If + template_block used to be empty on the first call, don't use + gsi_split_seq_after and gsi_insert_seq_after, but remember whole + seq with bb_seq and set it with set_bb_seq. + +2019-05-31 Iain Sandoe <iain@sandoe.co.uk> + + * config/i386/darwin.h (ASM_OUTPUT_MAX_SKIP_ALIGN): New. + +2019-05-30 Bill Schmidt <wschmidt@linux.ibm.com> + Michael Meissner <meissner@linux.ibm.com> + + * config/rs6000/predicates.md (pcrel_address): New define_predicate. + (prefixed_mem_operand): Likewise. + (non_prefixed_mem_operand): Likewise. + * config/rs6000/rs6000-protos.h (rs6000_prefixed_address): New + prototype. + * config/rs6000/rs6000.c (print_operand_address): Handle + PC-relative addresses. + (mode_supports_prefixed_address_p): New function. + (rs6000_prefixed_address): New function. + * config/rs6000/rs6000.h (SYMBOL_FLAG_PCREL): New #define. + (SYMBOL_REF_PCREL_P): Likewise. + +2019-05-30 Jakub Jelinek <jakub@redhat.com> + + * gimplify.c (enum gimplify_omp_var_data): Add GOVD_CONDTEMP. + (gimplify_adjust_omp_clauses_1): Handle GOVD_CONDTEMP. + (gimplify_omp_for): If worksharing loop with lastprivate conditional + is nested inside of parallel region, add _condtemp_ clause to both. + * tree-nested.c (convert_nonlocal_omp_clauses, + convert_local_omp_clauses): Ignore OMP_CLAUSE__CONDTEMP_ instead of + assertion failure. + * omp-general.h (struct omp_for_data): Add have_pointer_condtemp + member. + * omp-general.c (omp_extract_for_data): Compute it. + * omp-low.c (scan_sharing_clauses): Handle OMP_CLAUSE__CONDTEMP_. + (lower_rec_input_clauses): Likewise. + (lower_lastprivate_conditional_clauses): If OMP_CLAUSE__CONDTEMP_ + clause is already present, just add one further one after it. + (lower_lastprivate_clauses): Handle cond_ptr with array type. + (lower_send_shared_vars): Clear _condtemp_ vars. + (lower_omp_1) <case GIMPLE_ASSIGN>: Handle target data like critical + or section or taskgroup. + * omp-expand.c (determine_parallel_type): Disallow combining only if + first OMP_CLAUSE__CONDTEMP_ has pointer type. Disallow combining + of parallel sections if OMP_CLAUSE__CONDTEMP_ is present. + (expand_omp_for_generic, expand_omp_for_static_nochunk, + expand_omp_for_static_chunk, expand_omp_for): Use + fd->have_pointer_condtemp instead of fd->lastprivate_conditional to + determine if a special set of API routines are needed and if condtemp + needs to be initialized, while always initialize cond_var if + fd->lastprivate_conditional is non-zero. + +2019-05-30 Bill Schmidt <wschmidt@linux.ibm.com> + Michael Meissner <meissner@linux.ibm.com> + + * config/rs6000/constraints.md (eI): New constraint. + * config/rs6000/predicates.md (cint34_operand): New predicate. + * config/rs6000/rs6000.h (SIGNED_16BIT_OFFSET_P): New #define. + (SIGNED_34BIT_OFFSET_P): Likewise. + * doc/md.texi (eI): Document constraint. + +2019-05-30 Sylvia Taylor <sylvia.taylor@arm.com> + + * config/aarch64/aarch64-sve.md (*fabd<mode>3): New. + +2019-05-30 Bill Schmidt <wschmidt@linux.ibm.com> + Michael Meissner <meissner@linux.ibm.com> + + * rs6000-cpus.def (OTHER_FUSION_MASKS): New #define. + (ISA_3_0_MASKS_SERVER): Mask off OTHER_FUSION_MASKS. + (ISA_3_0_MASKS_IEEE): Remove OPTION_MASK_DIRECT_MOVE. + (ISA_FUTURE_MASKS_SERVER): Add OPTION_MASK_PREFIXED_ADDR. + (OTHER_FUTURE_MASKS): Likewise. + (POWERPC_MASKS): Likewise. + * rs6000.c (rs6000_option_override_internal): Error if -mpcrel is + specified without -mprefixed-addr or -mcpu=future. Error if + -mprefixed-addr is specified without -mcpu=future. + (rs6000_opt_masks): Add entry for prefixed-addr. + * rs6000.opt (mprefixed-addr): New option. + +2019-05-30 Sam Tebbs <sam.tebbs@arm.com> + + * aarch64/aarch64.c (aarch64_post_cfi_startproc): Add + cfun->is_thunk check. + +2019-05-30 Jakub Jelinek <jakub@redhat.com> + + * tree-predcom.c (is_inv_store_elimination_chain): Fix a typo - lenght + to length. + +2019-05-30 Martin Liska <mliska@suse.cz> + + * gdbinit.in: Fix 'ptc' command. Add trt + that prints TREE_TYPE($). + +2019-05-29 Bill Schmidt <wschmidt@linux.ibm.com> + Alan Modra <amodra@gmail.com> + + * config/rs6000/rs6000.c (rs6000_call_template_1): Handle pcrel + calls here... + (rs6000_indirect_call_template_1): ...and here. + (rs6000_pltseq_template): Handle plt_pcrel34. Rework tocsave, + plt16_ha, plt16_lo, mtctr indirect calls. Use + rs6000_pltseq_enum. + (rs6000_decl_ok_for_sibcall): New function. + (rs6000_function_ok_for_sibcall): Refactor. + (rs6000_longcall_ref): Use UNSPEC_PLT_PCREL when pcrel. + (rs6000_call_aix): Don't emit toc restore rtl for indirect calls + when pcrel. Reorganize. + (rs6000_sibcall_aix): Don't add r2 to function usage when pcrel. + * rs6000.h (rs6000_pltseq_enum): New enum. + * rs6000.md (UNSPEC_PLT_PCREL): New unspec. + (*pltseq_tocsave): Use rs6000_pltseq_enum. + (*pltseq_plt16_ha): Likewise. + (*pltseq_plt16_lo): Likewise. + (*pltseq_mtctr): Likewise. + (*pltseq_plt_pcrel): New insn. + (*call_local_aix): Handle @notoc calls. + (*call_value_local_aix): Likewise. + (*call_nonlocal_aix): Adjust lengths for pcrel calls. + (*call_value_nonlocal_aix): Likewise. + (*call_indirect_pcrel): New insn. + (*call_value_indirect_pcrel): Likewise. + +2019-05-29 Uroš Bizjak <ubizjak@gmail.com> + + * config/i386/sse.md (*save_multiple<mode>): Rename from + save_multiple<mode>. + (*restore_multiple<mode>): Rename from restore_multiple<mode>. + (*restore_multiple_and_return<mode>): Rename from + restore_multiple_and_return<mode>. + (*restore_multiple_leave_return<mode>): Rename from + restore_multiple_leave_return<mode>. + +2019-05-29 Yoshinori Sato <ysato@users.sourceforge.jp> + + * config.gcc (rx-*-linux*): New target. + * config/rx/elf.opt: New file. + * config/rx/linux.h: Likewise. + * config/rx/t-linux: Likewise. + * config/rx/rx.c (TARGET_SAVE_ACC_REGISTER): If not defined, + make it zero. + * config/rx/rx.h (ASM_APP_ON): Allow to be overridden. + (ASM_APP_OFF): Likewise. + * config/rx/rx.opt: Drop -msim and -mas100-syntax, they were + moved elsewhere. + +2019-05-29 Jan Hubicka <jh@suse.cz> + + * tree-ssa-alias.c (same_type_for_tbaa): Return ture if main + variants are pointer equivalent. + +2019-05-29 Alejandro Martinez <alejandro.martinezvicente@arm.com> + + * config/aarch64/aarch64-c.c: Added TARGET_SVE2. + * config/aarch64/aarch64-sve2.md: New file. + (<u>avg<mode>3_floor): New pattern. + (<u>avg<mode>3_ceil): Likewise. + (*<sur>h<addsub><mode>): Likewise. + * config/aarch64/aarch64.h: Added AARCH64_ISA_SVE2 and TARGET_SVE2. + * config/aarch64/aarch64.md: Include aarch64-sve2.md. + +2019-05-29 Jakub Jelinek <jakub@redhat.com> + + PR bootstrap/90543 + * optc-save-gen.awk: In cl_optimization_print, use correct condition + for var_opt_string printing. In cl_optimization_print_diff, print + (null) instead of invoking undefined behavior if one of the + var_opt_string pointers is NULL and use && instead of first || in the + guarding condition. For var_target_other options, handle const char * + target variables similarly to const char * optimize node variables. + +2019-05-29 Sam Tebbs <sam.tebbs@arm.com> + + * config/aarch64/aarch64-builtins.c (aarch64_builtins): Add + AARCH64_PAUTH_BUILTIN_AUTIB1716 and AARCH64_PAUTH_BUILTIN_PACIB1716. + * config/aarch64/aarch64-builtins.c (aarch64_init_pauth_hint_builtins): + Add autib1716 and pacib1716 initialisation. + * config/aarch64/aarch64-builtins.c (aarch64_expand_builtin): Add checks + for autib1716 and pacib1716. + * config/aarch64/aarch64-protos.h (aarch64_key_type, + aarch64_post_cfi_startproc): Define. + * config/aarch64/aarch64-protos.h (aarch64_ra_sign_key): Define extern. + * config/aarch64/aarch64.c (aarch64_handle_standard_branch_protection, + aarch64_handle_pac_ret_protection): Set default sign key to A. + * config/aarch64/aarch64.c (aarch64_expand_epilogue, + aarch64_expand_prologue): Add check for b-key. + * config/aarch64/aarch64.c (aarch64_ra_sign_key, + aarch64_post_cfi_startproc, aarch64_handle_pac_ret_b_key): Define. + * config/aarch64/aarch64.h (TARGET_ASM_POST_CFI_STARTPROC): Define. + * config/aarch64/aarch64.c (aarch64_pac_ret_subtypes): Add "b-key". + * config/aarch64/aarch64.md (unspec): Add UNSPEC_AUTIA1716, + UNSPEC_AUTIB1716, UNSPEC_AUTIASP, UNSPEC_AUTIBSP, UNSPEC_PACIA1716, + UNSPEC_PACIB1716, UNSPEC_PACIASP, UNSPEC_PACIBSP. + * config/aarch64/aarch64.md (do_return): Add check for b-key. + * config/aarch64/aarch64.md (<pauth_mnem_prefix>sp): Replace + pauth_hint_num_a with pauth_hint_num. + * config/aarch64/aarch64.md (<pauth_mnem_prefix>1716): Replace + pauth_hint_num_a with pauth_hint_num. + * config/aarch64/aarch64.opt (msign-return-address=): Deprecate. + * config/aarch64/iterators.md (PAUTH_LR_SP): Add UNSPEC_AUTIASP, + UNSPEC_AUTIBSP, UNSPEC_PACIASP, UNSPEC_PACIBSP. + * config/aarch64/iterators.md (PAUTH_17_16): Add UNSPEC_AUTIA1716, + UNSPEC_AUTIB1716, UNSPEC_PACIA1716, UNSPEC_PACIB1716. + * config/aarch64/iterators.md (pauth_mnem_prefix): Add UNSPEC_AUTIA1716, + UNSPEC_AUTIB1716, UNSPEC_PACIA1716, UNSPEC_PACIB1716, UNSPEC_AUTIASP, + UNSPEC_AUTIBSP, UNSPEC_PACIASP, UNSPEC_PACIBSP. + * config/aarch64/iterators.md (pauth_hint_num_a): Replace + UNSPEC_PACI1716 and UNSPEC_AUTI1716 with UNSPEC_PACIA1716 and + UNSPEC_AUTIA1716 respectively. + * config/aarch64/iterators.md (pauth_hint_num_a): Rename to + pauth_hint_num and add UNSPEC_PACIBSP, UNSPEC_AUTIBSP, + UNSPEC_PACIB1716, UNSPEC_AUTIB1716. + * doc/invoke.texi (-mbranch-protection): Add b-key type. + * config/aarch64/aarch64-bti-insert.c (aarch64_pac_insn_p): Rename + UNSPEC_PACISP to UNSPEC_PACIASP and UNSPEC_PACIBSP. + +2019-05-29 Jakub Jelinek <jakub@redhat.com> + + * gimplify.c (struct gimplify_omp_ctx): Add clauses member. + (gimplify_scan_omp_clauses): Initialize ctx->clauses. + (gimplify_adjust_omp_clauses_1): Transform lastprivate conditional + explicit clause on combined parallel into implicit shared clause. + (gimplify_adjust_omp_clauses): Move lastprivate conditional clause + and firstprivate if the decl has one too from combined parallel to + the worksharing construct. + +2019-05-28 Bill Schmidt <wschmidt@linux.ibm.com> + Michael Meissner <meissner@linux.ibm.com> + + * config/rs6000/rs6000-cpus.def (OTHER_FUTURES_MASK): New #define. + +2019-05-28 Michael Meissner <meissner@linux.ibm.com> + + * rtl.h (LABEL_REF_P): New #define. + +2019-05-28 John David Anglin <danglin@gcc.gnu.org> + + * config/pa/pa.c (hppa_profile_hook): Remove offset adjustment. + +2019-05-28 Alejandro Martinez <alejandro.martinezvicente@arm.com> + + * internal-fn.c: Marked mask_load_direct as vectorizable. + * tree-data-ref.c (data_ref_compare_tree): Fixed comment typo. + * tree-vect-data-refs.c (can_group_stmts_p): Allow masked loads to be + combined even if masks different with allow_slp_p param. + (vect_analyze_data_ref_accesses): Mark SLP only vectorizable groups. + * tree-vect-loop.c (vect_dissolve_slp_only_groups): New function to + dissolve SLP-only vectorizable groups when SLP has been discarded. + (vect_analyze_loop_2): Call vect_dissolve_slp_only_groups when needed. + * tree-vect-slp.c (vect_get_and_check_slp_defs): Check masked loads + masks. + (vect_build_slp_tree_1): Fixed comment typo. + (vect_build_slp_tree_2): Include masks from masked loads in SLP tree. + * tree-vect-stmts.c (vectorizable_load): Allow vectorizaion of masked + loads for SLP only. + * tree-vectorizer.h (_stmt_vec_info): Added flag for SLP-only + vectorizable. + * tree-vectorizer.c (vec_info::new_stmt_vec_info): Likewise. + +2019-05-28 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> + + * config/alpha/alpha.c [TARGET_ABI_OSF] (alpha_output_mi_thunk_osf): + Remove obsolete use_thunk reference. + * config/i386/i386.c (x86_output_mi_thunk): Likewise. + * config/ia64/ia64.c (ia64_output_mi_thunk): Likewise. + * config/nios2/nios2.c (nios2_asm_output_mi_thunk): Likewise. + * config/or1k/or1k.c (or1k_output_mi_thunk): Likewise. + * config/rs6000/rs6000.c (rs6000_output_mi_thunk): Likewise. + * config/sh/sh.c (sh_output_mi_thunk): Likewise. + * config/sparc/sparc.c (sparc_output_mi_thunk): Likewise. + * config/tilegx/tilegx.c (tilegx_output_mi_thunk): Likewise. + * config/tilepro/tilepro.c (tilepro_asm_output_mi_thunk): Likewise. + +2019-05-28 Nathan Sidwell <nathan@acm.org> + + * tree.h (IDENTIFIER_ANON_P): New. + (anon_aggrname_format, anon_aggname_p): Don't declare. + (make_anon_name): Declare. + * lto-streamer-out.c (DFS::DFS_write_tree_body): Use IDENTIFIER_ANON_P. + (hash_tree): Likewise. + * tree-streamer-out.c (write_ts_decl_minimal_tree): Likewise. + * tree.c (anon_aggrname_p, anon_aggrname_format): Delete. + (anon_cnt, make_anon_name): New. + +2019-05-28 Martin Liska <mliska@suse.cz> + + PR other/90315 + * opts-global.c (decode_options): Print help for all + help_option_arguments. + * opts.c (print_help): Add new argument. + (common_handle_option): Remember all values into + help_option_arguments. + * opts.h (print_help): Add new argument. + +2019-05-28 Martin Liska <mliska@suse.cz> + + PR ipa/90555 + * ipa-icf-gimple.c (func_checker::compare_loops): New function. + * ipa-icf-gimple.h (func_checker::compare_loops): Likewise. + (func_checker::compare_bb): Call compare_loops. + +2019-05-27 Jakub Jelinek <jakub@redhat.com> + + * gimplify.c (gimplify_scan_omp_clauses): Allow lastprivate conditional + on sections construct. + * omp-low.c (lower_lastprivate_conditional_clauses): Handle sections + construct. + (lower_omp_sections): Handle lastprivate conditional. + (lower_omp_1) <case GIMPLE_ASSIGN>: Handle sections construct with + lastprivate_conditional_map. + * omp-expand.c (expand_omp_sections): Handle lastprivate conditional. + + * omp-low.c (lower_omp_1) <case GIMPLE_ASSIGN>: Look through ordered, + critical, taskgroup and section regions when looking for a region + with non-NULL lastprivate_conditional_map. + +2019-05-27 Uroš Bizjak <ubizjak@gmail.com> + + * config/i386/i386.c (ix86_gen_add3): Remove indirect function. + (*ix86_gen_sub3): Ditto. + (*ix86_gen_sub3_carry): Ditto. + (*ix86_gen_one_cmpl2): Ditto. + (*ix86_gen_andsp): Ditto. + (ix86_init_large_pic_reg): Use gen_add2_insn instead of ix86_gen_add3. + (gen_and2_insn): New static function. + (ix86_expand_prologue): Use gen_and2_insn instead of ix86_gen_andsp. + Use gen_add3_insn instead of ix86_gen_add3. + (ix86_expand_split_stack_prologue): Use gen_add2_insn + instead of ix86_gen_add3. + (legitimize_tls_address): Use gen_add2_insn instead of ix86_gen_add3. + Use gen_sub3_insn instead of ix86_gen_sub3. + * config/i386-expand.c (ix86_split_long_move): Use gen_add2_insn + instead of ix86_gen_add3. + (ix86_expand_strlensi_unroll_1): Use gen_add2_insn instead of + ix86_gen_add3. Use gen_sub3_insn instead of ix86_gen_sub3. + (construct_plt_address): Use gen_add2_insn instead of ix86_gen_add3. + * config/i386/i386-options.c (ix86_option_override_internal): + Do not initialize ix86_gen_add3, ix86_gen_sub3, ix86_gen_sub3_carry, + ix86_gen_one_cmpl2 and ix86_gen_andsp. + +2019-05-27 Eric Botcazou <ebotcazou@adacore.com> + + * dwarf2out.c (resolve_args_picking_1): Deal with DW_OP_GNU_addr_index + and DW_OP_GNU_const_index opcodes. + +2019-05-27 Uroš Bizjak <ubizjak@gmail.com> + + * config/i386/i386.h (STACK_SIZE_MODE): Define. + +2019-05-27 Richard Biener <rguenther@suse.de> + + PR tree-optimization/90637 + * tree-ssa-sink.c (statement_sink_location): Honor the + computed sink location for single-uses. + +2019-05-27 Richard Biener <rguenther@suse.de> + + PR middle-end/90610 + * match.pd (vec_perm): Avoid clobbering op0 when not generating + a bit-insert. + +2019-05-26 Uroš Bizjak <ubizjak@gmail.com> + + * config/i386/i386.md (@sub<mode>3_carry): Rename + from sub<mode>3_carry. + (@leave_<mode>): New expander. + (*leave): Rename from leave. + (*leave_rex64): Rename from leave_rex64. + (@monitorx_<mode>): Rename from monitorx_<mode>. + (@clzero_<mode>): Rename from clzero_<mode>. + * config/i386/sse.md (@sse3_monitor_<mode>): Rename + from sse3_monitor_<mode>. + * config/i386/i386.c (ix86_gen_sub3_carry): Remove indirect function. + (*ix86_gen_leave): Ditto. + (*ix86_gen_monitor): Ditto. + (*ix86_gen_monitorx): Ditto. + (*ix86_gen_clzero): Ditto. + (ix86_emit_leave): Use gen_leave instead of ix86_gen_leave. + * config/i386/i386-expand.c (ix86_expand_strlensi_unroll_1): + Use gen_sub3_carry instead of ix86_gen_sub3_carry. + (ix86_expand_builtin) <case IX86_BUILTIN_MONITOR>: + Use gen_sse3_monitor instead of ix86_gen_monitor. + <case IX86_BUILTIN_MONITORX>: Use gen_monitorx + instead of ix86_gen_monitorx. + <case IX86_BUILTIN_CLZERO>: Use gen_clzero + instead of ix86_gen_clzero. + * config/i386/i386-options.c (ix86_option_override_internal): + Do not initialize ix86_gen_leave, ix86_gen_sub3_carry, + ix86_gen_monitor, ix86_gen_monitorx and ix86_gen_clzero. + +2019-05-26 Uroš Bizjak <ubizjak@gmail.com> + + * config/i386/i386.md (@tls_global_dynamic_64_<mode>): + Rename from tls_global_dynamic_64_<mode>. + (@tls_local_dynamic_base_64_<mode>): Rename from + tls_local_dynamic_base_64_<mode>. + * config/i386/i386.c (*ix86_gen_tls_global_dynamic_64): + Remove indirect function. + (*ix86_gen_tls_local_dynamic_base_64): Ditto. + (legitimize_tls_address): Use gen_tls_global_dynamic_64 function + instead of ix86_gen_tls_global_dynamic_64. + Use gen_tls_local_dynamic_base_64 instead of + ix86_gen_tls_local_dynamic_base_64. + * config/i386/i386-options.c (ix86_option_override_internal): + Do not initialize ix86_gen_tls_global_dynamic_64 and + ix86_gen_tls_local_dynamic_base_64. + +2019-05-26 Uroš Bizjak <ubizjak@gmail.com> + + * config/i386/i386.md (@pro_epilogue_adjust_stack_add_<mode>) + Rename from pro_epilogue_adjust_stack_<mode>_add. + (@pro_epilogue_adjust_stack_sub_<mode>) + Rename from pro_epilogue_adjust_stack_<mode>_sub. + (@allocate_stack_worker_probe_<mode>): + Rename from allocate_stack_worker_probe_<mode>. + (allocate_stack): Use gen_allocate_stack_worker_probe. + (probe_stack): Use gen_probe_stack_1. + (@probe_stack_1_<mode>): Rename from probe_stack_<mode>. + (@adjust_stack_and_probe_<mode>): Rename from + adjust_stack_and_probe<mode>. + (@probe_stack_range_<mode>): Rename from probe_stack_range<mode>. + (stack_protect_set): Use gen_stack_protect_set_1. + (@stack_protect_set_1_<mode>): Rename from stack_protect_set_<mode>. + (stack_protect_test): Use gen_stack_protect_test_1. + (@stack_protect_test_1_<mode>): Rename from stack_protect_test_<mode>. + * config/i386/i386.c (*ix86_gen_allocate_stack_worker): + Remove indirect function. + (*ix86_gen_adjust_stack_and_probe): Ditto. + (*ix86_gen_probe_stack_range): Ditto. + (pro_epilogue_adjust_stack): Use gen_pro_epilogue_adjust_stack_add + instead of gen_pro_epilogue_adjust_stack_{si,di}_add. + (ix86_adjust_stack_and_probe_stack_clash): Use + gen_adjust_stack_and_probe instead of ix86_gen_adjust_stack_and_probe. + (ix86_adjust_stack_and_probe): Ditto. + (ix86_emit_probe_stack_range): Use gen_probe_stack_range instead + of ix86_gen_probe_stack_range. + (ix86_expand_prologue): Use gen_pro_epilogue_adjust_stack_sub + instead of gen_pro_epilogue_adjust_stack_{si,di}_sub. + * config/i386/x86-tune-sched.c (ix86_macro_fusion_pair_p): + Include insn-opinit.h. Use code_for_stack_protect_test_1 instead of + CODE_FOR_stack_protect_test_{si,di}. + * config/i386/i386-options.c (ix86_option_override_internal): + Do not initialize ix86_gen_allocate_stack_worker, + ix86_gen_adjust_stack_and_probe and ix86_gen_probe_stack_range. + +2019-05-26 Gerald Pfeifer <gerald@pfeifer.com> + + * doc/invoke.texi (Link Options): Many editorial changes around + -flinker-output. + +2019-05-26 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> + + * doc/invoke.texi (x86 Options, -mvect8-ret-in-mem): Remove + pre-Solaris 11 referene and most Studio compiler details. + +2019-05-24 John David Anglin <danglin@gcc.gnu.org> + + PR target/90530 + * config/pa/pa.c (pa_can_change_mode_class): Accept mode changes from + DImode to SImode in floating-point registers on 64-bit target. + * config/pa/pa.md (umulsidi3): Change nonimmediate_operand to + register_operand in xmpyu patterns. + +2019-05-24 Jakub Jelinek <jakub@redhat.com> + + * tree-core.h (enum omp_clause_code): Add OMP_CLAUSE__CONDTEMP_. + * tree.h (OMP_CLAUSE_DECL): Use OMP_CLAUSE__CONDTEMP_ instead of + OMP_CLAUSE__REDUCTEMP_. + * tree.c (omp_clause_num_ops, omp_clause_code_name): Add + OMP_CLAUSE__CONDTEMP_. + (walk_tree_1): Handle OMP_CLAUSE__CONDTEMP_. + * tree-pretty-print.c (dump_omp_clause): Likewise. + * tree-nested.c (convert_nonlocal_omp_clauses, + convert_local_omp_clauses): Likewise. + * gimplify.c (enum gimplify_omp_var_data): Use hexadecimal constants + instead of decimal. Add GOVD_LASTPRIVATE_CONDITIONAL. + (gimplify_scan_omp_clauses): Don't reject lastprivate conditional + on OMP_FOR. + (gimplify_omp_for): Warn and disable conditional modifier from + lastprivate on loop iterators. + * omp-general.h (struct omp_for_data): Add lastprivate_conditional + member. + * omp-general.c (omp_extract_for_data): Initialize it. + * omp-low.c (struct omp_context): Add lastprivate_conditional_map + member. + (delete_omp_context): Delete it. + (lower_lastprivate_conditional_clauses): New function. + (lower_lastprivate_clauses): Add BODY_P and CSTMT_LIST arguments, + handle lastprivate conditional clauses. + (lower_reduction_clauses): Add CLIST argument, emit it into + the critical section if any. + (lower_omp_sections): Adjust lower_lastprivate_clauses and + lower_reduction_clauses callers. + (lower_omp_for_lastprivate): Add CLIST argument, pass it through + to lower_lastprivate_clauses. + (lower_omp_for): Call lower_lastprivate_conditional_clauses, adjust + lower_omp_for_lastprivate and lower_reduction_clauses callers, emit + clist into a critical section if not emitted there already by + lower_reduction_clauses. + (lower_omp_taskreg, lower_omp_teams): Adjust lower_reduction_clauses + callers. + (lower_omp_1): Handle GIMPLE_ASSIGNs storing into lastprivate + conditional variables. + * omp-expand.c (determine_parallel_type): Punt if OMP_CLAUSE__CONDTEMP_ + clause is present. + (expand_omp_for_generic, expand_omp_for_static_nochunk, + expand_omp_for_static_chunk): Handle lastprivate conditional. + (expand_omp_for): Handle fd.lastprivate_conditional like + fd.have_reductemp. + +2019-05-24 Andrew Stubbs <ams@codesourcery.com> + + * config/gcn/gcn-run.c (main): Set a non-zero return value if the + kernel does not exit cleanly. + * config/gcn/gcn.md (gcn_return): Insert s_waitcnt before s_dcache_wb. + +2019-05-24 Jason Merrill <jason@redhat.com> + + Revert: + * gimplify.c (gimplify_cond_expr): Don't check TREE_ADDRESSABLE. + +2019-05-24 Richard Biener <rguenther@suse.de> + + PR testsuite/90607 + * tree-loop-distribution.c (struct partition): Add location + member. + (partition_alloc): Initialize all fields. + (generate_memset_builtin): Use the location recorded in the + partition for the generated call. + (generate_memcpy_builtin): Likewise. + (classify_partition): Record the location of a single store + as location for the partition. + +2019-05-24 Andrew Stubbs <ams@codesourcery.com> + + * config/gcn/gcn.c (gcn_expand_prologue): Use gen_addsi3_scalar_carry + for lo-part. + +2019-05-24 Matthew Malcomson <matthew.malcomson@arm.com> + + PR target/90588 + * common/config/aarch64/aarch64-common.c + (aarch64_rewrite_selected_cpu): Change local temporary variable + type from unsigned long to uint64_t. + * config/aarch64/aarch64-protos.h (aarch64_parse_extension, + aarch64_get_extension_string_for_isa_flags): Change declaration to + match new definition by replacing unsigned long with uint64_t. + +2019-05-24 Jakub Jelinek <jakub@redhat.com> + + PR target/90568 + * config/i386/x86-tune-sched.c (ix86_macro_funsion_pair_p): Call + gen_attr_type just once instead of 4-7 times. Formatting fixes. + Handle stack_protect_test_<mode> codegen similarly to corresponding + sub instruction. + +2019-05-23 Iain Sandoe <iain@sandoe.co.uk> + + * config/i386/darwin.h: Reject -mfentry*. + * doc/sourcebuild.texi: Document mfentry target support. + +2019-05-23 Bill Schmidt <wschmidt@linux.ibm.com> + + * config/rs6000/rs6000.c (rs6000_global_entry_point_needed_p): + Rename to rs6000_global_entry_point_prologue_needed_p. Return + false for PC-relative functions. + (rs6000_output_function_prologue): Change called function name to + rs6000_global_entry_point_prologue_needed_p. Emit ".localentry + name,1" for PC-relative functions. + (rs6000_elf_declare_function_name): Change called function name to + rs6000_global_entry_point_prologue_needed_p. + +2019-05-23 Uroš Bizjak <ubizjak@gmail.com> + + PR target/90552 + * config/i386/i386.c (gen_rtx_cost): + Use ix86_tune_cost instead of ix86_cost. + +2019-05-23 Bill Schmidt <wschmidt@linux.ibm.com> + Michael Meissner <meissner@linux.ibm.com> + Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Add + OPTION_MASK_PCREL. + (POWERPC_MASKS): Add OPTION_MASK_PCREL. + * config/rs6000/rs6000-protos.h (rs6000_pcrel_p): New prototype. + (rs6000_fndecl_pcrel_p): Likewise. + * config/rs6000/rs6000.c (rs6000_option_override_internal): Report + error if -mpcrel is requested without -mcpu=future. + (rs6000_opt_masks): Add entry for pcrel. + (rs6000_fndecl_pcrel_p): New function. + (rs6000_pcrel_p): Likewise. + * config/rs6000/rs6000.opt (mpcrel): New option. + * doc/invoke.texi: Document -mpcrel and -mno-pcrel. + +2019-05-23 Jan Hubicka <jh@suse.cz> + Martin Liska <mliska@suse.cz> + + PR tree-optimization/90576 + * tree-ssa-alias.c (compare_sizes): Remove dead calls to + poly_int_tree_p. + (aliasing_component_refs_p): Fix three way size compare conditional; + give up earlier in case we can not decide on equivalence. + +2019-05-23 Bill Schmidt <wschmidt@linux.ibm.com> + Michael Meissner <meissner@linux.ibm.com> + Segher Boessenkool <segher@kernel.crashing.org> + + * config.gcc: Add future cpu. + * config/rs6000/driver-rs6000.c (asm_names): Add future cpu. + * config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): New + #define. + (POWERPC_MASKS): Add OPTION_MASK_FUTURE. + (RS6000_CPU): New instantiation for future cpu. + * config/rs6000/rs6000-opts.h (enum processor_type): Add + PROCESSOR_FUTURE. + * config/rs6000/rs6000-string.c (expand_compare_loop): Treat + PROCESSOR_FUTURE like PROCESSOR_POWER9 for now. + * config/rs6000/rs6000-tables.opt: Regenerate. + * config/rs6000/rs6000.c (rs6000_option_override_internal): Treat + PROCESSOR_FUTURE similarly to PROCESSOR_POWER9 for now. + (rs6000_machine_from_flags): Handle future cpu. + (rs6000_reassociation_width): Treat PROCESSOR_FUTURE like + PROCESSOR_POWER9 for now. + (rs6000_adjust_cost): Likewise. + (rs6000_issue_rate): Likewise. + (rs6000_register_move_cost): Likewise. + (rs6000_opt_masks): Add entry for future. + * config/rs6000/rs6000.h (ASM_CPU_SPEC): Add future cpu. + (MASK_FUTURE): New #define. + * config/rs6000/rs6000.md (define_attr "cpu"): Add future cpu. + * config/rs6000/rs6000.opt (mfuture): New target option. + * doc/invoke.texi (mcpu): Add future cpu. + +2019-05-23 Martin Liska <mliska@suse.cz> + + PR c++/90587 + * tree-ssa-uninit.c (value_sat_pred_p): The result of & + operation points to a temporary (pointed via tree_to_wide_ref) + that is out of scope after the &. + +2019-05-23 Jonathan Wakely <jwakely@redhat.com> + + PR c++/90592 + * doc/extend.texi (Function Names): Add missing word. + +2019-05-23 Richard Biener <rguenther@suse.de> + + PR tree-optimization/88440 + * opts.c (default_options_table): Enable -ftree-loop-distribute-patterns + at -O[2s]+. + * tree-loop-distribution.c (generate_memset_builtin): Fold the + generated call. + (generate_memcpy_builtin): Likewise. + (distribute_loop): Pass in whether to only distribute patterns. + (prepare_perfect_loop_nest): Also allow size optimization. + (pass_loop_distribution::execute): When optimizing a loop + nest for size allow pattern replacement. + +2019-05-23 Jakub Jelinek <jakub@redhat.com> + + PR target/90568 + * config/i386/i386.md (stack_protect_test_<mode>): Use sub instead + of xor. + +2019-05-23 Martin Liska <mliska@suse.cz> + + PR sanitizer/90570 + * gimplify.c (gimplify_target_expr): Skip TREE_STATIC target + expression similarly to gimplify_decl_expr. + +2019-05-23 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org> + + * cse.c (cse_dump_path): s/dump_file/f. + +2019-05-22 David Malcolm <dmalcolm@redhat.com> + + PR c++/90462 + * diagnostic-format-json.cc: Include "selftest.h". + (json_from_expanded_location): Only add "file" key for non-NULL + file strings. + (json_from_location_range): Don't add "start" and "finish" + children if they are UNKNOWN_LOCATION. + (selftest::test_unknown_location): New selftest. + (selftest::test_bad_endpoints): New selftest. + (selftest::diagnostic_format_json_cc_tests): New function. + * json.cc (json::object::get): New function. + (selftest::test_object_get): New selftest. + (selftest::json_cc_tests): Call it. + * json.h (json::object::get): New decl. + * selftest-run-tests.c (selftest::run_tests): Call + selftest::diagnostic_format_json_cc_tests. + * selftest.h (selftest::diagnostic_format_json_cc_tests): New + decl. + +2019-05-22 Kwok Cheung Yeung <kcy@codesourcery.com> + Andrew Stubbs <amd@codesourcery.com> + + * config.gcc (gcc_cv_initfini_array): Set for AMD GCN. + * config/gcn/gcn-run.c (init_array_kernel, fini_array_kernel): New. + (kernel): Rename to... + (main_kernel): ... this. + (load_image): Load _init_array and _fini_array kernels. + (run): Add argument for kernel to run. + (main): Run init_array_kernel before main_kernel, and + fini_array_kernel after. + * config/gcn/gcn.c (gcn_handle_amdgpu_hsa_kernel_attribute): Allow + amdgpu_hsa_kernel attribute on functions. + (gcn_disable_constructors): Delete. + (TARGET_ASM_CONSTRUCTOR, TARGET_ASM_DESTRUCTOR): Delete. + * config/gcn/crt0.c (size_t): Define. + (_init_array, _fini_array): New. + (__preinit_array_start, __preinit_array_end, + __init_array_start, __init_array_end, + __fini_array_start, __fini_array_end): Declare weak references. + +2019-05-22 Andrew Stubbs <ams@codesourcery.com> + + * config/gcn/gcn.c (gcn_trampoline_init): Call "sorry" on GCN5. + +2019-05-22 Jason Merrill <jason@redhat.com> + + * gimplify.c (gimplify_cond_expr): Don't check TREE_ADDRESSABLE. + +2019-05-22 H.J. Lu <hongjiu.lu@intel.com> + + PR target/88483 + * config/i386/i386-options.c (ix86_init_machine_status): Set + stack_frame_required to true. + * config/i386/i386.c (ix86_get_frame_size): New function. + (ix86_frame_pointer_required): Replace get_frame_size with + ix86_get_frame_size. + (ix86_compute_frame_layout): Likewise. + (ix86_find_max_used_stack_alignment): Changed to void. Set + stack_frame_required. + (ix86_finalize_stack_frame_flags): Always call + ix86_find_max_used_stack_alignment. Replace get_frame_size with + ix86_get_frame_size. + * config/i386/i386.h (machine_function): Add stack_frame_required. + +2019-05-22 Uroš Bizjak <ubizjak@gmail.com> + + * config/i386/sse.md (sse_cvtpi2ps): Use TARGET_MMX in insn condition. + +2019-05-22 Matthew Malcomson <matthew.malcomson@arm.com> + + * common/config/aarch64/aarch64-common.c + (struct aarch64_option_extension, struct processor_name_to_arch, + struct arch_to_arch_name, aarch64_parse_extension, opt_ext_cmp, + aarch64_contains_opt, + aarch64_get_extension_string_for_isa_flags): Change type of + variables storing flags to uint64_t. + * config/aarch64/aarch64-option-extensions.def (sve2, sve2-sm4, + sve2-aes, sve2-sha3, bitperm): New optional SVE2 extension flags. + * config/aarch64/aarch64.c (struct processor, + aarch64_parse_arch, aarch64_parse_cpu, aarch64_validate_mcpu, + aarch64_validate_march, aarch64_override_options, + aarch64_option_print, aarch64_handle_attr_isa_flags, + aarch64_declare_function_name, aarch64_start_file): Make flag + variables uint64_t. + * config/aarch64/aarch64.h (AARCH64_FL_SVE2, AARCH64_FL_SVE2_AES, + AARCH64_FL_SVE2_SM4, AARCH64_FL_SVE2_SHA3, + AARCH64_FL_SVE2_BITPERM): New macro feature flags. + * config/aarch64/aarch64.opt (aarch64_isa_flags): Make uint64_t. + * config/aarch64/driver-aarch64.c + (struct aarch64_arch_extension, struct aarch64_core_data, + struct aarch64_arch_driver_info, host_detect_local_cpu): Make + flag variables uint64_t. + * doc/invoke.texi: Add documentation for new arguments. + +2019-05-22 Richard Biener <rguenther@suse.de> + + * alias.c (ao_ref_from_mem): Move stack-slot sharing + rewrite ... + * emit-rtl.c (set_mem_attributes_minus_bitpos): ... here. + +2019-05-22 Martin Liska <mliska@suse.cz> + + PR lto/90500 + * doc/extend.texi: Document the change. + +2019-05-22 Richard Biener <rguenther@suse.de> + + PR tree-optimization/90450 + * tree-ssa-loop-im.c (struct im_mem_ref): Add ref_decomposed. + (mem_ref_hasher::equal): Check it. + (mem_ref_alloc): Initialize it. + (gather_mem_refs_stmt): Set it. + +2019-05-22 Richard Biener <rguenther@suse.de> + + * gimple-fold.c (arith_code_with_undefined_signed_overflow): + Add ABS_EXPR. + (rewrite_to_defined_overflow): Handle rewriting ABS_EXPR + as ABSU_EXPR. + +2019-05-22 Alan Modra <amodra@gmail.com> + + * config/rs6000/rs6000.h (ASM_OPT_ANY): Define. + (ASM_CPU_SPEC): Conditionally add -many. + * config/rs6000/rs6000.c (rs6000_machine): New static var. + (rs6000_machine_from_flags, emit_asm_machine): New functions.. + (rs6000_file_start): ..extracted from here, and modified to + test all ISA bits. + (rs6000_output_function_prologue): Emit .machine as necessary. + +2019-05-22 Hans-Peter Nilsson <hp@axis.com> + + PR middle-end/90553 + * ira-lives.c (process_bb_node_lives): Consider defs + for a call insn to be die before the call, not after. + + * function.c (assign_parm_setup_block): Raise alignment of + stacked parameter only for STRICT_ALIGNMENT targets. + +2019-05-21 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/constraints.md (define_register_constraint "wz"): + Delete. + * config/rs6000/rs6000.h (enum r6000_reg_class_enum): Delete + RS6000_CONSTRAINT_wz. + * config/rs6000/rs6000.c (rs6000_debug_reg_global): Adjust. + (rs6000_init_hard_regno_mode_ok): Adjust. + * config/rs6000/rs6000.md: Replace "wz" constraint by "d" with "p7". + * doc/md.texi (Machine Constraints): Adjust. + +2019-05-21 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/constraints.md (define_register_constraint "wl"): + Delete. + * config/rs6000/rs6000.h (enum r6000_reg_class_enum): Delete + RS6000_CONSTRAINT_wl. + * config/rs6000/rs6000.c (rs6000_debug_reg_global): Adjust. + (rs6000_init_hard_regno_mode_ok): Adjust. + * config/rs6000/rs6000.md: Replace "wl" constraint by "d" with "p6". + * doc/md.texi (Machine Constraints): Adjust. + +2019-05-21 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/constraints.md (define_register_constraint "wm"): + Delete. + * config/rs6000/rs6000.h (enum r6000_reg_class_enum): Delete + RS6000_CONSTRAINT_wm. + * config/rs6000/rs6000.c (rs6000_debug_reg_global): Adjust. + (rs6000_init_hard_regno_mode_ok): Adjust. + * config/rs6000/vsx.md: Replace "wm" constraint by "wa" with "p8v". + * doc/md.texi (Machine Constraints): Adjust. + +2019-05-21 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/constraints.md (define_register_constraint "wk"): + Delete. + * config/rs6000/rs6000.h (enum r6000_reg_class_enum): Delete + RS6000_CONSTRAINT_wk. + * config/rs6000/rs6000.c (rs6000_debug_reg_global): Adjust. + (rs6000_init_hard_regno_mode_ok): Adjust. + * config/rs6000/rs6000.md: Replace "wk" constraint by "ws" with "p8v". + * doc/md.texi (Machine Constraints): Adjust. + +2019-05-21 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/constraints.md (define_register_constraint "wj"): + Delete. + * config/rs6000/rs6000.h (enum r6000_reg_class_enum): Delete + RS6000_CONSTRAINT_wj. + * config/rs6000/rs6000.c (rs6000_debug_reg_global): Adjust. + (rs6000_init_hard_regno_mode_ok): Adjust. + * config/rs6000/rs6000.md: Replace "wj" constraint by "wi" with "p8v". + (VS_64dm): Delete. + * config/rs6000/vsx.md: Ditto. + * doc/md.texi (Machine Constraints): Adjust. + +2019-05-21 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/constraints.md (define_register_constraint "wh"): + Delete. + * config/rs6000/rs6000.h (enum r6000_reg_class_enum): Delete + RS6000_CONSTRAINT_wh. + * config/rs6000/rs6000.c (rs6000_debug_reg_global): Adjust. + (rs6000_init_hard_regno_mode_ok): Adjust. + * config/rs6000/rs6000.md: Replace "wh" constraint by "wa" with "p8v". + * doc/md.texi (Machine Constraints): Adjust. + +2019-05-21 Uroš Bizjak <ubizjak@gmail.com> + + PR target/90547 + * config/i386/i386.md (anddi_1 to andsi_1_zext splitter): + Avoid calling gen_lowpart with CONST operand. + +2019-05-21 Alexandre Oliva <aoliva@redhat.com> + + * tree-ssa-threadupdate.c (struct ssa_local_info_t): Add + field template_last_to_copy. + (ssa_create_duplicates): Set it, and use it. Attempt to + preserve more debug stmts. + +2019-05-21 Uroš Bizjak <ubizjak@gmail.com> + + * config/i386/sse.md (VF1_AVX2): New mode iterator. + (signbit<mode>2): New expander + +2019-05-21 James Clarke <jrtc27@jrtc27.com> + + PR bootstrap/87338 + * dwarf2out.c (dwarf2out_inline_entry): Use ASM_OUTPUT_DEBUG_LABEL + instead of ASM_GENERATE_INTERNAL_LABEL and ASM_OUTPUT_LABEL. + +2019-05-21 Uroš Bizjak <ubizjak@gmail.com> + + * config/i386/cpuid.h (__cpuid): For 32bit targets, zero + %ebx and %ecx bafore calling cpuid with leaf 1 or + non-constant leaf argument. + +2019-05-21 Alan Modra <amodra@gmail.com> + + PR target/90545 + * config/rs6000/rs6000.c (rs6000_register_move_cost): Increase + power9 direct move cost. + +2019-05-21 Richard Biener <rguenther@suse.de> + + PR middle-end/90510 + * fold-const.c (fold_read_from_vector): New function. + * fold-const.h (fold_read_from_vector): Declare. + * match.pd (VEC_PERM_EXPR): Build BIT_INSERT_EXPRs for + single-element insert permutations. Canonicalize selector + further and fix issue with last commit. + +2019-05-21 Vladislav Ivanishin <vlad@ispras.ru> + + * tree-cfg.h (split_critical_edges): Add for_edge_insertion_p + parameter with default value false to declaration. + (split_edges_for_insertion): New inline function. Wrapper for + split_critical_edges with for_edge_insertion_p = true. + * tree-cfg.c (split_critical_edges): Don't split non-critical + edges if for_edge_insertion_p is false. Fix whitespace. + * tree-ssa-pre.c (pass_pre::execute): Call + split_edges_for_insertion instead of split_critical_edges. + * tree-ssa-tail-merge.c (tail_merge_optimize): Ditto. + * tree-ssa-sink.c (pass_sink_code::execute): Ditto. + (pass_data_sink_code): Update function name in the comment. + +2019-05-21 Vladislav Ivanishin <vlad@ispras.ru> + + * tree-ssa-uninit.c (value_sat_pred_p): This new function is a wrapper + around is_value_included_in that knows how to handle BIT_AND_EXPR. + (is_pred_expr_subset_of): Use the new function. Handle more cases where + code1 == EQ_EXPR and where code1 == BIT_AND_EXPR and thus fix some false + positives. + +2019-05-21 Martin Liska <mliska@suse.cz> + + * config/rs6000/driver-rs6000.c (elf_platform): Do not use + an extra newline. + * config/rs6000/rs6000-c.c (rs6000_pragma_longcal): Wrap pragma in %<%>. + (altivec_resolve_overloaded_builtin): Likewise for vec_lvsl and + vec_lvsr. + * config/rs6000/rs6000.c (rs6000_option_override_internal): + Quote a C type. + (rs6000_function_arg): Likewise. + (rs6000_expand_set_fpscr_drn_builtin): Remove trailing dot. + (rs6000_expand_ternop_builtin): Use interval syntax. + (get_element_number): Likewise. + (altivec_expand_builtin): Likewise. + (rs6000_get_function_versions_dispatcher): Quote target_clones. + +2019-05-20 Jakub Jelinek <jakub@redhat.com> + + PR c++/59813 + PR target/90418 + * function.h (struct function): Add calls_eh_return member. + * gimplify.c (gimplify_call_expr): Set cfun->calls_eh_return when + gimplifying __builtin_eh_return call. + * tree-inline.c (initialize_cfun): Copy calls_eh_return from src_cfun + to cfun. + (expand_call_inline): Or in src_cfun->calls_eh_return into + dst_cfun->calls_eh_return. + * tree-tailcall.c (suitable_for_tail_call_opt_p): Return false if + cfun->calls_eh_return. + * lto-streamer-in.c (input_struct_function_base): Read calls_eh_return. + * lto-streamer-out.c (output_struct_function_base): Write + calls_eh_return. + +2019-05-20 Marc Glisse <marc.glisse@inria.fr> + + PR rtl-optimization/43147 + * config/i386/i386.c (ix86_gimple_fold_builtin): Handle + IX86_BUILTIN_SHUFPD. + +2019-05-20 Jan Hubicka <hubicka@ucw.cz> + + * tree-ssa-alias.c (refs_may_alias_p_2): Break out from ... + (refs_may_alias_p_1): ... here; update stats. + (refs_may_alias_p): Do not update stats here. + +2019-05-20 Richard Biener <rguenther@suse.de> + + * tree-ssa-structalias.c (find_func_aliases): POINTER_DIFF_EXPR + doesn't produce pointers. + {TRUNC,CEIL,FLOOR,ROUND,EXACT}_{DIV,MOD}_EXPR points to what + the first operand points to. + +2019-05-20 Jan Hubicka <hubicka@ucw.cz> + + * tree-ssa-alias.c (compare_sizes): New function. + (sompare_type_sizes): New function + (aliasing_component_refs_p): Use it. + (indirect_ref_may_alias_decl_p): Likewise. + +2019-05-20 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> + + * config/i386/sol2.h (CC1_SPEC): Reject -mx32. + +2019-05-20 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> + + * config/sol2.h (LIBTSAN_EARLY_SPEC): Remove : after %e. + (LIBLSAN_EARLY_SPEC): Likewise. + * config/i386/sol2.h (ASAN_REJECT_SPEC): Likewise. + +2019-05-20 Martin Liska <mliska@suse.cz> + + * config/i386/i386.c (ix86_libc_has_fast_function): + Add ATTRIBUTE_UNUSED for the argument. + +2019-05-20 Richard Biener <rguenther@suse.de> + + * gimple-match-head.c: Include vec-perm-indices.h. + * generic-match-head.c: Likewise. + * fold-const.h (fold_vec_perm): Declare when vec-perm-indices.h + is included. + * fold-const.c (fold_vec_perm): Export. + (fold_ternary_loc): Move non-constant folding of VEC_PERM_EXPR... + (match.pd): ...here. + +2019-05-20 Jakub Jelinek <jakub@redhat.com> + + * cfgloop.h (struct loop): Add simdlen member. + * cfgloopmanip.c (copy_loop_info): Copy simdlen as well. + * omp-expand.c (expand_omp_simd): Set it if simdlen clause is present. + * tree-vect-loop.c (vect_analyze_loop): Pass loop->simdlen != 0 + as new argument to autovectorize_vector_sizes target hook. If + loop->simdlen, pick up vector size where the vectorization factor + is equal to loop->simd, and if there is none, fall back to the first + successful one. + (vect_transform_loop): Adjust autovectorize_vector_sizes target hook + caller. + * omp-low.c (omp_clause_aligned_alignment): Likewise. + * omp-general.c (omp_max_vf): Likewise. + * optabs-query.c (can_vec_mask_load_store_p): Likewise. + * tree-vect-slp.c (vect_slp_bb): Likewise. + * target.def (autovectorize_vector_sizes): Add ALL argument and + document it. + * doc/tm.texi: Adjust documentation. + * targhooks.c (default_autovectorize_vector_sizes): Add bool argument. + * targhooks.h (default_autovectorize_vector_sizes): Likewise. + * config/aarch64/aarch64.c (aarch64_autovectorize_vector_sizes): Add + bool argument. + * config/arc/arc.c (arc_autovectorize_vector_sizes): Likewise. + * config/arm/arm.c (arm_autovectorize_vector_sizes): Likewise. + * config/mips/mips.c (mips_autovectorize_vector_sizes): Likewise. + * config/i386/i386.c (ix86_autovectorize_vector_sizes): Likewise. If + true and TARGET_AVX512F or TARGET_AVX, push 3 or 2 sizes even if + preferred vector size is not 512-bit or 256-bit, just put those + unpreferred ones last. + +2019-05-20 Martin Liska <mliska@suse.cz> + + * targhooks.c (default_libc_has_fast_function): New function. + * targhooks.h (default_libc_has_fast_function): Likewise. + +2019-05-20 Martin Liska <mliska@suse.cz> + + PR middle-end/90263 + * builtins.c (expand_builtin_memory_copy_args): When having a + target with fast mempcpy implementation do now use memcpy. + * config/i386/i386.c (ix86_libc_has_fast_function): New. + (TARGET_LIBC_HAS_FAST_FUNCTION): Likewise. + * doc/tm.texi: Likewise. + * doc/tm.texi.in: Likewise. + * target.def: + * expr.c (emit_block_move_hints): Add 2 new arguments. + * expr.h (emit_block_move_hints): Bail out when libcall + to memcpy would be used. + +2019-05-20 Martin Liska <mliska@suse.cz> + + * profile-count.c: Add vertical spacing in order + to separate functions. + * profile-count.h: Likewise. + +2019-05-20 Martin Liska <mliska@suse.cz> + + * profile-count.h: Do not use full qualified + names if possible. + * profile-count.c (profile_count::to_frequency): Likewise. + +2019-05-20 Martin Liska <mliska@suse.cz> + + * profile-count.h (enum profile_quality): Use capital letters + for enum value names. Use the adjusted names. + * profile-count.c: Use the adjusted names. + +2019-05-19 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/constraints.md (define_register_constraint "wH"): + Delete. + (define_register_constraint "wI"): Delete. + * config/rs6000/rs6000.h (enum r6000_reg_class_enum): Delete + RS6000_CONSTRAINT_wH and RS6000_CONSTRAINT_wI. + * config/rs6000/rs6000.c (rs6000_debug_reg_global): Adjust. + (rs6000_init_hard_regno_mode_ok): Adjust. + * config/rs6000/rs6000.md: Replace "wH" and "wI" constraints by "v" + resp. "d", or with "wa" as appropriate, all with "p8v". + * config/rs6000/vsx.md: Ditto. + * doc/md.texi (Machine Constraints): Adjust. + +2019-05-19 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/constraints.md (define_register_constraint "wy"): + Delete. + * config/rs6000/rs6000.h (enum r6000_reg_class_enum): Delete + RS6000_CONSTRAINT_wy. + * config/rs6000/rs6000.c (rs6000_debug_reg_global): Adjust. + (rs6000_init_hard_regno_mode_ok): Adjust. + * config/rs6000/rs6000.md: Replace "wy" constraint by "wa" with "p8v". + Use "<Fisa>" as "isa" in all alternatives that use "<Fv2>". + (define_mode_attr Fisa): New. + * config/rs6000/vsx.md: Replace "wy" constraint by "wa" with "p8v". + * doc/md.texi (Machine Constraints): Adjust. + +2019-05-19 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/constraints.md (define_register_constraint "wu"): + Delete. + * config/rs6000/rs6000.h (enum r6000_reg_class_enum): Delete + RS6000_CONSTRAINT_wu. + * config/rs6000/rs6000.c (rs6000_debug_reg_global): Adjust. + (rs6000_init_hard_regno_mode_ok): Adjust. + * config/rs6000/rs6000.md: Replace "wu" constraint by "v" or "wa", + both with "p8v". + (define_mode_attr Fa): Delete. + * config/rs6000/vsx.md: Ditto. + * doc/md.texi (Machine Constraints): Adjust. + +2019-05-19 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/constraints.md (define_register_constraint "wJ"): + Delete. + (define_register_constraint "wK"): Delete. + * config/rs6000/rs6000.h (enum r6000_reg_class_enum): Delete + RS6000_CONSTRAINT_wJ and RS6000_CONSTRAINT_wK. + * config/rs6000/rs6000.c (rs6000_debug_reg_global): Adjust. + (rs6000_init_hard_regno_mode_ok): Adjust. + * config/rs6000/rs6000.md: Replace "wJ" constraint by "wI" with "p9v". + Replace "wK" constraint by "wH" with "p9v". + * config/rs6000/vsx.md: Ditto. + * doc/md.texi (Machine Constraints): Adjust. + +2019-05-19 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/constraints.md (define_register_constraint "wb"): + Delete. + * config/rs6000/rs6000.h (enum r6000_reg_class_enum): Delete + RS6000_CONSTRAINT_wb. + * config/rs6000/rs6000.c (rs6000_debug_reg_global): Adjust. + (rs6000_init_hard_regno_mode_ok): Adjust. + * config/rs6000/rs6000.md: Replace "wb" constraint by "v" with "p9v". + * config/rs6000/vsx.md: Ditto. + * doc/md.texi (Machine Constraints): Adjust. + +2019-05-19 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/constraints.md (define_register_constraint "wo"): + Delete. + * config/rs6000/rs6000.h (enum r6000_reg_class_enum): Delete + RS6000_CONSTRAINT_wo. + * config/rs6000/rs6000.c (rs6000_debug_reg_global): Adjust. + (rs6000_init_hard_regno_mode_ok): Adjust. + * config/rs6000/rs6000.md: Replace "wo" constraint by "wa" with "p9v". + * config/rs6000/altivec.md: Ditto. + * doc/md.texi (Machine Constraints): Adjust. + +2019-05-18 Iain Sandoe <iain@sandoe.co.uk> + + * config/darwin-c.c (darwin_register_objc_includes): Do not + prepend the sysroot when building gnu-runtime header search + paths. + +2019-05-18 Iain Sandoe <iain@sandoe.co.uk> + + * config/darwin.c (darwin_file_end): Use switch_to_section () + instead of direct output of the asm. + +2019-05-17 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/rs6000.c (restore_saved_cr): Change a boolean + argument to be type bool (was int before). + (rs6000_emit_epilogue): Simplify some code. Declare some variables + at first use. Use type bool for some variables. Fix a theoretical + eh_return bug for svr4. + +2019-05-17 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/rs6000.md (isa): New attribute. + (enabled): New attribute. + +2019-05-17 Max Filippov <jcmvbkbc@gmail.com> + + * config/aarch64/aarch64.c (aarch64_output_mi_thunk): Call + assemble_start_function and assemble_end_function. + +2019-05-17 Thomas Schwinge <thomas@codesourcery.com> + + PR middle-end/89433 + * omp-general.c (oacc_verify_routine_clauses): Change formal + parameters. Add checking if already marked with an OpenACC + 'routine' directive. Adjust all users. + + PR middle-end/89433 + * omp-general.c (oacc_build_routine_dims): Move some of its + processing into... + (oacc_verify_routine_clauses): ... this new function. + * omp-general.h (oacc_verify_routine_clauses): New prototype. + +2019-05-17 Iain Sandoe <iain@sandoe.co.uk> + + * config/rs6000/rs6000.c (machopic_output_stub): Adjust the + formating of picbase labels to match other ports. + +2019-05-17 Iain Sandoe <iain@sandoe.co.uk> + + * config/rs6000/rs6000.c (macho_branch_islands): Fix bad indent + in the generated code. + +2019-05-16 Martin Sebor <msebor@redhat.com> + + * builtins.c (expand_builtin_atomic_always_lock_free): Quote + identifiers, keywords, operators, and types in diagnostics. Correct + quoting, spelling, and sentence capitalization issues. + (expand_builtin_atomic_is_lock_free): Same. + (fold_builtin_next_arg): Same. + * cfgexpand.c (expand_one_var): Same. + (tree_conflicts_with_clobbers_p): Same. + (expand_asm_stmt): Same. + (verify_loop_structure): Same. + * cgraphunit.c (process_function_and_variable_attributes): Same. + * collect-utils.c (collect_execute): Same. + * collect2.c (maybe_run_lto_and_relink): Same. + (is_lto_object_file): Same. + (scan_prog_file): Same. + * convert.c (convert_to_real_1): Same. + * dwarf2out.c (dwarf2out_begin_prologue): Same. + * except.c (verify_eh_tree): Same. + * gcc.c (execute): Same. + (eval_spec_function): Same. + (run_attempt): Same. + (driver::set_up_specs): Same. + (compare_debug_auxbase_opt_spec_function): Same. + * gcov-tool.c (unlink_gcda_file): Same. + (do_merge): Same. + (do_rewrite): Same. + * gcse.c (gcse_or_cprop_is_too_expensive): Same. + * gimplify.c (gimplify_asm_expr): Same. + (gimplify_adjust_omp_clauses): Same. + * hsa-gen.c (gen_hsa_addr_insns): Same. + (gen_hsa_insns_for_load): Same. + (gen_hsa_cmp_insn_from_gimple): Same. + (gen_hsa_insns_for_operation_assignment): Same. + (gen_get_level): Same. + (gen_hsa_alloca): Same. + (omp_simple_builtin::generate): Same. + (gen_hsa_atomic_for_builtin): Same. + (gen_hsa_insns_for_call): Same. + * input.c (dump_location_info): Same. + * ipa-devirt.c (compare_virtual_tables): Same. + * ira.c (ira_setup_eliminable_regset): Same. + * lra-assigns.c (lra_assign): Same. + * lra-constraints.c (lra_constraints): Same. + * lto-streamer-in.c (lto_input_mode_table): Same. + * lto-wrapper.c (get_options_from_collect_gcc_options): Same. + (merge_and_complain): Same. + (compile_offload_image): Same. + (compile_images_for_offload_targets): Same. + (debug_objcopy): Same. + (run_gcc): Same. + (main): Same. + * opts.c (print_specific_help): Same. + (parse_no_sanitize_attribute): Same. + (print_help): Same. + (handle_param): Same. + * plugin.c (add_new_plugin): Same. + (parse_plugin_arg_opt): Same. + (try_init_one_plugin): Same. + * print-rtl.c (debug_bb_n_slim): Quote identifiers, keywords, + operators, and types in diagnostics. Correct quoting and spelling + issues. + * read-rtl-function.c (parse_edge_flag_token): Same. + (function_reader::parse_enum_value): Same. + * reg-stack.c (check_asm_stack_operands): Same. + * regcprop.c (validate_value_data): Same. + * sched-rgn.c (make_pass_sched_fusion): Same. + * stmt.c (check_unique_operand_names): Same. + * targhooks.c (default_target_option_pragma_parse): Same. + * tlink.c (recompile_files): Same. + * toplev.c (process_options): Same. + (do_compile): Same. + * trans-mem.c (diagnose_tm_1): Same. + (ipa_tm_scan_irr_block): Same. + (ipa_tm_diagnose_transaction): Same. + * tree-cfg.c (verify_address): Same. Use get_tree_code_name to + format a tree code name in a diagnostic. + (verify_types_in_gimple_min_lval): Same. + (verify_types_in_gimple_reference): Same. + (verify_gimple_call): Same. + (verify_gimple_assign_unary): Same. + (verify_gimple_assign_binary): Same. + (verify_gimple_assign_ternary): Same. + (verify_gimple_assign_single): Same. + (verify_gimple_switch): Same. + (verify_gimple_label): Same. + (verify_gimple_phi): Same. + (verify_gimple_in_seq): Same. + (verify_eh_throw_stmt_node): Same. + (collect_subblocks): Same. + (gimple_verify_flow_info): Same. + (do_warn_unused_result): Same. + * tree-inline.c (expand_call_inline): Same. + * tree-into-ssa.c (update_ssa): Same. + * tree.c (tree_int_cst_elt_check_failed): Same. + (tree_vec_elt_check_failed): Same. + (omp_clause_operand_check_failed): Same. + (verify_type_variant): Same. + (verify_type): Same. + * value-prof.c (verify_histograms): Same. + * varasm.c (assemble_start_function): Same. + +2019-05-16 Martin Sebor <msebor@redhat.com> + + * config/i386/i386-expand.c (get_element_number): Quote keywords + and other internal names in diagnostics. Adjust other diagnostic + formatting issues noted by -Wformat-diag. + * config/i386/i386-features.c + (ix86_mangle_function_version_assembler_name): Same. + * config/i386/i386-options.c (ix86_handle_abi_attribute): Same. + * config/i386/i386.c (ix86_function_type_abi): Same. + (ix86_function_ms_hook_prologue): Same. + (classify_argument): Same. + (ix86_expand_prologue): Same. + (ix86_md_asm_adjust): Same. + (ix86_memmodel_check): Same. + +2019-05-17 Dragan Mladjenovic <dmladjenovic@wavecomp.com> + + * config/mips/mips.c (mips_dwarf_frame_reg_mode): Replace + TARGET_FLOAT64 with !TARGET_FLOAT32, thus handling both fp64 + and fpxx modes. + +2019-05-17 H.J. Lu <hongjiu.lu@intel.com> + + PR target/90497 + * config/i386/i386-expand.c (ix86_expand_builtin): Enable MMX + intrinsics without SSE/SSE2/SSSE3. + * config/i386/mmx.md (mmx_uavgv8qi3): Restore TARGET_3DNOW + check. + (*mmx_uavgv8qi3): Likewise. + +2019-05-17 Richard Biener <rguenther@suse.de> + + * gimple-pretty-print.c (dump_ternary_rhs): Handle dumping + VEC_PERM_EXPR as __VEC_PERM with -gimple. + +2019-05-17 Andreas Krebbel <krebbel@linux.ibm.com> + + * config/s390/s390-builtins.def (s390_vec_sldw_*): Use the + vec_sldw insn pattern. + +2019-05-17 Richard Biener <rguenther@suse.de> + + * ccmp.c (expand_ccmp_expr_1): Do not use gimple_assign_rhs_to_tree. + +2019-05-17 Martin Liska <mliska@suse.cz> + + PR driver/90496 + * toplev.c (output_stack_usage): With LTO and sanitizer it + happens that a global ctor (_GLOBAL__sub_I_00099_0_main) + has no file location. + +2019-05-16 Jakub Jelinek <jakub@redhat.com> + + PR c++/90484 + * tree-ssa-scopedtables.c (equal_mem_array_ref_p): Don't assert that + sz0 is equal to sz1, instead return false in that case. + + * omp-low.c (lower_rec_input_clauses): If OMP_CLAUSE_IF + has non-constant expression, force sctx.lane and use two + argument IFN_GOMP_SIMD_LANE instead of single argument. + * tree-ssa-dce.c (eliminate_unnecessary_stmts): Don't DCE + two argument IFN_GOMP_SIMD_LANE without lhs. + * tree-vectorizer.h (struct _loop_vec_info): Add simd_if_cond + member. + (LOOP_VINFO_SIMD_IF_COND, LOOP_REQUIRES_VERSIONING_FOR_SIMD_IF_COND): + Define. + (LOOP_REQUIRES_VERSIONING): Or in + LOOP_REQUIRES_VERSIONING_FOR_SIMD_IF_COND. + * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize + simd_if_cond. + (vect_analyze_loop_2): Punt if LOOP_VINFO_SIMD_IF_COND is constant 0. + * tree-vect-loop-manip.c (vect_loop_versioning): Add runtime check + from simd if clause if needed. + +2019-05-16 Richard Biener <rguenther@suse.de> + + * tree-affine.c (expr_to_aff_combination): New function split + out from... + (tree_to_aff_combination): ... here. + (aff_combination_expand): Avoid building a GENERIC tree. + +2019-05-16 Max Filippov <jcmvbkbc@gmail.com> + + * cgraphunit.c (cgraph_node::expand_thunk): Remove + assemble_start_function and assemble_end_function calls. + * config/alpha/alpha.c (alpha_output_mi_thunk_osf): Call + assemble_start_function and assemble_end_function. + * config/arc/arc.c (arc_output_mi_thunk): Likewise. + * config/arm/arm.c (arm_output_mi_thunk): Likewise. + * config/bfin/bfin.c (bfin_output_mi_thunk): Likewise. + * config/c6x/c6x.c (c6x_output_mi_thunk): Likewise. + * config/cris/cris.c (cris_asm_output_mi_thunk): Likewise. + * config/csky/csky.c (csky_output_mi_thunk): Likewise. + * config/epiphany/epiphany.c (epiphany_output_mi_thunk): Likewise. + * config/frv/frv.c (frv_asm_output_mi_thunk): Likewise. + * config/i386/i386.c (x86_output_mi_thunk): Likewise. + * config/ia64/ia64.c (ia64_output_mi_thunk): Likewise. + * config/m68k/m68k.c (m68k_output_mi_thunk): Likewise. + * config/microblaze/microblaze.c (microblaze_asm_output_mi_thunk): + Likewise. + * config/mips/mips.c (mips_output_mi_thunk): Likewise. + * config/mmix/mmix.c (mmix_asm_output_mi_thunk): Likewise. + * config/mn10300/mn10300.c (mn10300_asm_output_mi_thunk): Likewise. + * config/nds32/nds32.c (nds32_asm_output_mi_thunk): Likewise. + * config/nios2/nios2.c (nios2_asm_output_mi_thunk): Likewise. + * config/or1k/or1k.c (or1k_output_mi_thunk): Likewise. + * config/pa/pa.c (pa_asm_output_mi_thunk): Likewise. + * config/riscv/riscv.c (riscv_output_mi_thunk): Likewise. + * config/rs6000/rs6000.c (rs6000_output_mi_thunk): Likewise. + * config/s390/s390.c (s390_output_mi_thunk): Likewise. + * config/sh/sh.c (sh_output_mi_thunk): Likewise. + * config/sparc/sparc.c (sparc_output_mi_thunk): Likewise. + * config/spu/spu.c (spu_output_mi_thunk): Likewise. + * config/stormy16/stormy16.c (xstormy16_asm_output_mi_thunk): + Likewise. + * config/tilegx/tilegx.c (tilegx_output_mi_thunk): Likewise. + * config/tilepro/tilepro.c (tilepro_asm_output_mi_thunk): Likewise. + * config/vax/vax.c (vax_output_mi_thunk): Likewise. + +2019-05-16 Jan Hubicka <hubicka@ucw.cz> + + * tree-ssa-alias.c (alias_stats): Add + aliasing_component_refs_p_may_alias and + aliasing_component_refs_p_no_alias. + (dump_alias_stats): Print aliasing_component_refs_p stats. + (aliasing_component_refs_p): Update stats. + +2019-05-16 Martin Liska <mliska@suse.cz> + + PR lto/90500 + * multiple_target.c (expand_target_clones): Do not allow + target_clones being used with a symbol that is an alias. + +2019-05-16 Vladislav Ivanishin <vlad@ispras.ru> + + PR tree-optimization/90394 + * tree-ssa-uninit.c (is_pred_expr_subset_of): Potentially give false + positives rather than ICE for cases where (code2 == NE_EXPR + && code1 == BIT_AND_EXPR). + +2019-05-16 Jakub Jelinek <jakub@redhat.com> + + PR fortran/90329 + * tree-core.h (struct tree_decl_common): Document + decl_nonshareable_flag for PARM_DECLs. + * tree.h (DECL_HIDDEN_STRING_LENGTH): Define. + * calls.c (expand_call): Don't try tail call if caller + has any DECL_HIDDEN_STRING_LENGTH PARM_DECLs that are or might be + passed on the stack and callee needs to pass any arguments on the + stack. + * tree-streamer-in.c (unpack_ts_decl_common_value_fields): Use + else if instead of series of mutually exclusive ifs. Handle + DECL_HIDDEN_STRING_LENGTH for PARM_DECLs. + * tree-streamer-out.c (pack_ts_decl_common_value_fields): Likewise. + + * lto-streamer.h (LTO_major_version): Bump to 9. + +2019-05-16 Jun Ma <JunMa@linux.alibaba.com> + + PR tree-optimization/90106 + * tree-call-cdce.c (shrink_wrap_one_built_in_call_with_conds): Add + new parameter as new internal function call, also move it to new + basic block. + (use_internal_fn): Pass internal function call to + shrink_wrap_one_built_in_call_with_conds. + +2019-05-15 Jakub Jelinek <jakub@redhat.com> + + * omp-low.c (lower_rec_input_clauses): For if (0) or simdlen (1) set + max_vf to 1. + * omp-expand.c (expand_omp_simd): For if (0) or simdlen (1) clear + safelen_int and set loop->dont_vectorize. + +2019-05-15 H.J. Lu <hongjiu.lu@intel.com> + + PR target/89021 + * config/i386/i386-builtin.def: Enable MMX intrinsics with + SSE/SSE2/SSSE3. + * config/i386/i386-builtins.c (ix86_init_mmx_sse_builtins): + Likewise. + * config/i386/i386-expand.c (ix86_expand_builtin): Allow + SSE/SSE2/SSSE3 to emulate MMX intrinsics with TARGET_MMX_WITH_SSE. + * config/i386/mmintrin.h: Only require SSE2 if __MMX_WITH_SSE__ + is defined. + +2019-05-15 H.J. Lu <hongjiu.lu@intel.com> + + PR target/89021 + * config/i386/mmx.md (*vec_dupv2sf): Changed to + define_insn_and_split to support SSE emulation. + (*vec_extractv2sf_0): Likewise. + (*vec_extractv2sf_1): Likewise. + (*vec_extractv2si_0): Likewise. + (*vec_extractv2si_1): Likewise. + (*vec_extractv2si_zext_mem): Likewise. + (vec_setv2sf): Also allow TARGET_MMX_WITH_SSE. + (vec_extractv2sf_1 splitter): Likewise. + (vec_extractv2sfsf): Likewise. + (vec_setv2si): Likewise. + (vec_extractv2si_1 splitter): Likewise. + (vec_extractv2sisi): Likewise. + (vec_setv4hi): Likewise. + (vec_extractv4hihi): Likewise. + (vec_setv8qi): Likewise. + (vec_extractv8qiqi): Likewise. + (vec_extractv2sfsf): Also allow TARGET_MMX_WITH_SSE. Pass + TARGET_MMX_WITH_SSE ix86_expand_vector_extract. + (vec_extractv2sisi): Likewise. + (vec_extractv4hihi): Likewise. + (vec_extractv8qiqi): Likewise. + (vec_initv2sfsf): Also allow TARGET_MMX_WITH_SSE. Pass + TARGET_MMX_WITH_SSE to ix86_expand_vector_init. + (vec_initv2sisi): Likewise. + (vec_initv4hihi): Likewise. + (vec_initv8qiqi): Likewise. + (vec_setv2si): Also allow TARGET_MMX_WITH_SSE. Pass + TARGET_MMX_WITH_SSE to ix86_expand_vector_set. + (vec_setv4hi): Likewise. + (vec_setv8qi): Likewise. + +2019-05-15 H.J. Lu <hongjiu.lu@intel.com> + + PR target/89021 + * config/i386/mmx.md (MMXMODE:mov<mode>): Also allow + TARGET_MMX_WITH_SSE. + (MMXMODE:*mov<mode>_internal): Likewise. + (MMXMODE:movmisalign<mode>): Likewise. + +2019-05-15 Uroš Bizjak <ubizjak@gmail.com> + + PR target/89021 + * config/i386/i386.md (*zero_extendsidi2): Add mmx_isa attribute. + * config/i386/sse.md (sse2_cvtpi2pd): Ditto. + (sse2_cvtpd2pi): Ditto. + (sse2_cvttpd2pi): Ditto. + (*vec_concatv2sf_sse4_1): Ditto. + (*vec_concatv2sf_sse): Ditto. + (*vec_concatv2si_sse4_1): Ditto. + (*vec_concatv2si): Ditto. + (*vec_concatv4si_0): Ditto. + (*vec_concatv2di_0): Ditto. + +2019-05-15 H.J. Lu <hongjiu.lu@intel.com> + + PR target/89021 + * config/i386/sse.md (abs<mode>2): Add SSE emulation. + +2019-05-15 H.J. Lu <hongjiu.lu@intel.com> + + PR target/89021 + * config/i386/sse.md (ssse3_palignrdi): Changed to + define_insn_and_split to support SSE emulation. + +2019-05-15 H.J. Lu <hongjiu.lu@intel.com> + + PR target/89021 + * config/i386/sse.md (ssse3_psign<mode>3): Add SSE emulation. + +2019-05-15 H.J. Lu <hongjiu.lu@intel.com> + + PR target/89021 + * config/i386/sse.md (ssse3_pshufbv8qi3): Changed to + define_insn_and_split. Also allow TARGET_MMX_WITH_SSE. Add + SSE emulation. + +2019-05-15 H.J. Lu <hongjiu.lu@intel.com> + + PR target/89021 + * config/i386/sse.md (ssse3_pmulhrswv4hi3): Require TARGET_MMX + or TARGET_MMX_WITH_SSE. + (*ssse3_pmulhrswv4hi3): Add SSE emulation. + +2019-05-15 H.J. Lu <hongjiu.lu@intel.com> + + PR target/89021 + * config/i386/sse.md (ssse3_pmaddubsw): Add SSE emulation. + +2019-05-15 H.J. Lu <hongjiu.lu@intel.com> + + PR target/89021 + * config/i386/sse.md (ssse3_ph<plusminus_mnemonic>dv2si3): + Changed to define_insn_and_split to support SSE emulation. + +2019-05-15 H.J. Lu <hongjiu.lu@intel.com> + + PR target/89021 + * config/i386/sse.md (ssse3_ph<plusminus_mnemonic>wv4hi3): + Changed to define_insn_and_split to support SSE emulation. + +2019-05-15 H.J. Lu <hongjiu.lu@intel.com> + + PR target/89021 + * config/i386/mmx.md (mmx_<emms>): Renamed to ... + (*mmx_<emms>): This. + (mmx_<emms>): New expander. + +2019-05-15 H.J. Lu <hongjiu.lu@intel.com> + + PR target/89021 + * config/i386/mmx.md (sse2_umulv1siv1di3): Add SSE emulation + support. + (*sse2_umulv1siv1di3): Add SSE2 emulation. + +2019-05-15 H.J. Lu <hongjiu.lu@intel.com> + + PR target/89021 + * config/i386/mmx.md (sse_movntq): Add SSE2 emulation. + +2019-05-15 H.J. Lu <hongjiu.lu@intel.com> + + PR target/89021 + * config/i386/mmx.md (mmx_psadbw): Add SSE emulation. + +2019-05-15 H.J. Lu <hongjiu.lu@intel.com> + + PR target/89021 + * config/i386/mmx.md (mmx_uavgv4hi3): Also check TARGET_MMX and + TARGET_MMX_WITH_SSE. + (*mmx_uavgv4hi3): Add SSE emulation. + +2019-05-15 H.J. Lu <hongjiu.lu@intel.com> + + PR target/89021 + * config/i386/mmx.md (mmx_uavgv8qi3): Also check TARGET_MMX + and TARGET_MMX_WITH_SSE. + (*mmx_uavgv8qi3): Add SSE emulation. + +2019-05-15 H.J. Lu <hongjiu.lu@intel.com> + + PR target/89021 + * config/i386/xmmintrin.h: Emulate MMX maskmovq with SSE2 + maskmovdqu for __MMX_WITH_SSE__. + +2019-05-15 H.J. Lu <hongjiu.lu@intel.com> + + PR target/89021 + * config/i386/mmx.md (mmx_umulv4hi3_highpart): Also check + TARGET_MMX and TARGET_MMX_WITH_SSE. + (*mmx_umulv4hi3_highpart): Add SSE emulation. + +2019-05-15 H.J. Lu <hongjiu.lu@intel.com> + + PR target/89021 + * config/i386/mmx.md (mmx_pmovmskb): Changed to + define_insn_and_split to support SSE emulation. + +2019-05-15 H.J. Lu <hongjiu.lu@intel.com> + + PR target/89021 + * config/i386/mmx.md (mmx_<code>v4hi3): Also check TARGET_MMX + and TARGET_MMX_WITH_SSE. + (mmx_<code>v8qi3): Likewise. + (smaxmin:<code>v4hi3): New. + (umaxmin:<code>v8qi3): Likewise. + (smaxmin:*mmx_<code>v4hi3): Add SSE emulation. + (umaxmin:*mmx_<code>v8qi3): Likewise. + +2019-05-15 H.J. Lu <hongjiu.lu@intel.com> + + PR target/89021 + * config/i386/mmx.md (mmx_pinsrw): Also check TARGET_MMX and + TARGET_MMX_WITH_SSE. + (*mmx_pinsrw): Add SSE emulation. + +2019-05-15 H.J. Lu <hongjiu.lu@intel.com> + + PR target/89021 + * config/i386/mmx.md (mmx_pextrw): Add SSE emulation. + +2019-05-15 H.J. Lu <hongjiu.lu@intel.com> + + PR target/89021 + * config/i386/sse.md (sse_cvtpi2ps): Changed to + define_insn_and_split. Also allow TARGET_MMX_WITH_SSE. Add + SSE emulation. + +2019-05-15 H.J. Lu <hongjiu.lu@intel.com> + + PR target/89021 + * config/i386/sse.md (sse_cvtps2pi): Add SSE emulation. + (sse_cvttps2pi): Likewise. + +2019-05-15 H.J. Lu <hongjiu.lu@intel.com> + + PR target/89021 + * config/i386/mmx.md (mmx_pshufw): Also check TARGET_MMX and + TARGET_MMX_WITH_SSE. + (mmx_pshufw_1): Add SSE emulation. + (*vec_dupv4hi): Changed to define_insn_and_split and also allow + TARGET_MMX_WITH_SSE to support SSE emulation. + +2019-05-15 H.J. Lu <hongjiu.lu@intel.com> + + PR target/89021 + * config/i386/constraints.md (Yw): New constraint. + * config/i386/mmx.md (*vec_dupv2si): Changed to + define_insn_and_split and also allow TARGET_MMX_WITH_SSE to + support SSE emulation. + +2019-05-15 H.J. Lu <hongjiu.lu@intel.com> + + PR target/89021 + * config/i386/mmx.md (mmx_eq<mode>3): Also allow + TARGET_MMX_WITH_SSE. + (*mmx_eq<mode>3): Also allow TARGET_MMX_WITH_SSE. Add SSE + support. + (mmx_gt<mode>3): Likewise. + +2019-05-15 H.J. Lu <hongjiu.lu@intel.com> + + PR target/89021 + * config/i386/mmx.md (mmx_andnot<mode>3): Also allow + TARGET_MMX_WITH_SSE. Add SSE support. + +2019-05-15 H.J. Lu <hongjiu.lu@intel.com> + + PR target/89021 + * config/i386/mmx.md (any_logic:mmx_<code><mode>3): Also allow + TARGET_MMX_WITH_SSE. + (any_logic:<code><mode>3): New. + (any_logic:*mmx_<code><mode>3): Also allow TARGET_MMX_WITH_SSE. + Add SSE support. + +2019-05-15 H.J. Lu <hongjiu.lu@intel.com> + + PR target/89021 + * config/i386/mmx.md (mmx_ashr<mode>3): Also allow + TARGET_MMX_WITH_SSE. Add SSE emulation. + (mmx_<shift_insn><mode>3): Likewise. + (ashr<mode>3): New. + (<shift_insn><mode>3): Likewise. + +2019-05-15 H.J. Lu <hongjiu.lu@intel.com> + + PR target/89021 + * config/i386/mmx.md (mmx_pmaddwd): Also allow TARGET_MMX_WITH_SSE. + (*mmx_pmaddwd): Also allow TARGET_MMX_WITH_SSE. Add SSE support. + +2019-05-15 H.J. Lu <hongjiu.lu@intel.com> + + PR target/89021 + * config/i386/mmx.md (mmx_smulv4hi3_highpart): Also allow + TARGET_MMX_WITH_SSE. + (*mmx_smulv4hi3_highpart): Also allow TARGET_MMX_WITH_SSE. Add + SSE support. + +2019-05-15 H.J. Lu <hongjiu.lu@intel.com> + + PR target/89021 + * config/i386/mmx.md (mmx_mulv4hi3): Also allow + TARGET_MMX_WITH_SSE. + (mulv4hi3): New. + (*mmx_mulv4hi3): Also allow TARGET_MMX_WITH_SSE. Add SSE + support. + +2019-05-15 H.J. Lu <hongjiu.lu@intel.com> + + PR target/89021 + * config/i386/mmx.md (MMXMODEI8): Require TARGET_SSE2 for V1DI. + (plusminus:mmx_<plusminus_insn><mode>3): Check + TARGET_MMX_WITH_SSE. + (sat_plusminus:mmx_<plusminus_insn><mode>3): Likewise. + (<plusminus_insn><mode>3): New. + (*mmx_<plusminus_insn><mode>3): Add SSE emulation. + (*mmx_<plusminus_insn><mode>3): Likewise. + +2019-05-15 H.J. Lu <hongjiu.lu@intel.com> + + PR target/89021 + * config/i386/i386-expand.c (ix86_split_mmx_punpck): New function. + * config/i386/i386-protos.h (ix86_split_mmx_punpck): New + prototype. + * config/i386/mmx.m (mmx_punpckhbw): Changed to + define_insn_and_split to support SSE emulation. + (mmx_punpcklbw): Likewise. + (mmx_punpckhwd): Likewise. + (mmx_punpcklwd): Likewise. + (mmx_punpckhdq): Likewise. + (mmx_punpckldq): Likewise. + +2019-05-15 H.J. Lu <hongjiu.lu@intel.com> + Uros Bizjak <ubizjak@gmail.com> + + PR target/89021 + * config/i386/i386-expand.c (ix86_move_vector_high_sse_to_mmx): + New function. + (ix86_split_mmx_pack): Likewise. + * config/i386/i386-protos.h (ix86_move_vector_high_sse_to_mmx): + New prototype. + (ix86_split_mmx_pack): Likewise. + * config/i386/i386.md (mmx_isa): New. + (enabled): Also check mmx_isa. + * config/i386/mmx.md (any_s_truncate): New code iterator. + (s_trunsuffix): New code attr. + (mmx_packsswb): Removed. + (mmx_packssdw): Likewise. + (mmx_packuswb): Likewise. + (mmx_pack<s_trunsuffix>swb): New define_insn_and_split to emulate + MMX packsswb/packuswb with SSE2. + (mmx_packssdw): Likewise. + * config/i386/predicates.md (register_mmxmem_operand): New. + +2019-05-15 H.J. Lu <hongjiu.lu@intel.com> + + PR target/89021 + * config/i386/i386-c.c (ix86_target_macros_internal): Define + __MMX_WITH_SSE__ for TARGET_MMX_WITH_SSE. + * config/i386/i386.c (ix86_set_reg_reg_cost): Add support for + TARGET_MMX_WITH_SSE with VALID_MMX_REG_MODE. + (ix86_vector_mode_supported_p): Likewise. + * config/i386/i386.h (TARGET_MMX_WITH_SSE): New. + +2019-05-15 Martin Liska <mliska@suse.cz> + + PR middle-end/90478 + * tree-switch-conversion.c (jump_table_cluster::can_be_handled): + Check for overflow. + +2019-05-15 Richard Biener <rguenther@suse.de> + + * tree-into-ssa.c (pass_build_ssa::execute): Run + update_address_taken before going into SSA. + +2019-05-15 Richard Biener <rguenther@suse.de> + + * tree-pretty-print.c (dump_generic_node): Dump BIT_FIELD_REF + as __BIT_FIELD_REF with type with -gimple. + +2019-05-15 Vladislav Ivanishin <vlad@ispras.ru> + + * tree-ssa-uninit.c (is_value_included_in): Remove is_unsigned and merge + semantically equivalent branches (left over after prior refactorings). + +2019-05-15 Richard Biener <rguenther@suse.de> + + PR tree-optimization/88828 + * tree-ssa-forwprop.c (simplify_vector_constructor): Fix + bogus check. + +2019-05-14 Richard Biener <rguenther@suse.de> + + * tree-pretty-print.c (dump_generic_node): Dump VIEW_CONVERT_EXPR + as __VIEW_CONVERT with -gimple. + +2019-05-12 Iain Sandoe <iain@sandoe.co.uk> + + PR target/82920 + * config/i386/darwin.h (CC1_SPEC): Report -mx32 as an error for + Darwin. + +2019-05-14 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/rs6000.md (eh_set_lr_<mode>): Merge with following + define_split to become a define_insn_and_split. + +2019-05-14 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/rs6000-protos.h (rs6000_emit_epilogue): Change + arguments. + * config/rs6000/rs6000.c (rs6000_emit_epilogue): Change arguments. + * config/rs6000/rs6000.md (epilogue_type): New define_enum. + (sibcall_epilogue): Adjust. + (epilogue): Adjust. + +2019-05-14 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> + + * config.gcc: Move *-*-solaris2.10* from obsolete configurations + to unsupported ones. + Simplify x86_64-*-solaris2.1[0-9]* to x86_64-*-solaris2*. + * config.host: Likewise. + * config/i386/sol2.h (ASM_COMMENT_START): Remove. + * config/sparc/driver-sparc.c (host_detect_local_cpu) [__sun__ && + __svr4__]: Remove "brand" fallback. + [!KSTAT_DATA_STRING]: Remove. + * configure.ac (gcc_cv_ld_hidden): Simplify *-*-solaris2.1[0-9]* + to *-*-solaris2*. + (comdat_group): Likewise. + (set_have_as_tls): Likewise. + (gcc_cv_target_dl_iterate_phdr): Likewise. + (gcc_cv_as_shf_merge): Remove Solaris 10/x86 workaround. + (gcc_cv_ld_aligned_shf_merge): Remove Solaris 10/SPARC workaround. + * configure: Regenerate. + * doc/install.texi: Simplify Solaris target triplets. + (Specific, i?86-*-solaris2*): Remove Solaris 10 references. + (Specific, *-*-solaris2*): Document Solaris 10 removal. + Remove Solaris 10 references. + Remove obsolete Solaris bug reference. + (Specific, sparc-sun-solaris2.10): Remove. + +2019-05-14 Uroš Bizjak <ubizjak@gmail.com> + + * config/i386/i386.md (any_div): New code iterator. + (paired_mod): New code attribute. + (sgnprefix): Handle DIV and UDIV RTXes. + (u): Ditto. + (<u>divmod<mode>4): Macroize expander from divmod<mode>4 + and udivmod<mode>4 patterns using any_div code iterator. + (divmod splitters): Macroize splitters using any_div code iterator. + (*udivmodsi4_pow2_zext_1): Use exactl_log2 in insn condition. + (*udivmodsi4_pow2_zext_2): Ditto. + (*<u>divmod<mode>4_noext): Macroize insn from *divmod<mode>4_noext + and *udivmod<mode>4_noext patterns using any_div code iterator. + (*<u>divmod<mode>4_noext_zext_1): Macroize insn from + *divmod<mode>4_noext_zext_1 and *udivmod<mode>4_noext_zext_1 + patterns using any_div code iterator. + (*<u>divmod<mode>4_noext_zext_2): Macroize insn from + *divmod<mode>4_noext_zext_2 and *udivmod<mode>4_noext_zext_2 + patterns using any_div code iterator. + (<u>divmodhiqi3): Macroize insn from divmodhiqi3 and + udivmodhiqi3 patterns using any_extend code iterator. + +2019-05-14 Richard Biener <rguenther@suse.de> + H.J. Lu <hongjiu.lu@intel.com> + + PR tree-optimization/88828 + * tree-ssa-forwprop.c (simplify_vector_constructor): Handle + permuting in a single non-constant element not extracted + from a vector. + +2019-05-14 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com> + + * internal-fn.def (SIGNBIT): New. + * config/aarch64/aarch64-simd.md (signbitv2sf2): New expand + defined. + (signbitv4sf2): Likewise. + +2019-05-14 Chenghua Xu <paul.hua.gm@gmail.com> + + PR target/90357 + * config/mips/mips.c (mips_split_move): Skip forward SRC into + next insn when the SRC reg is dead. + +2019-05-14 Bin Cheng <bin.cheng@linux.alibaba.com> + + * gimple-ssa-strength-reduction.c (lookup_cand): Adjust index by 1. + (alloc_cand_and_find_basis): Ditto. + (backtrace_base_for_ref, create_mul_ssa_cand): Remove if-then-else. + (create_mul_imm_cand, create_add_ssa_cand): Ditto. + (create_add_imm_cand, slsr_process_cast): Ditto. + (slsr_process_copy, replace_mult_candidate): Ditto. + (replace_rhs_if_not_dup, replace_one_candidate): Ditto. + (dump_cand_vec, analyze_candidates_and_replace): Skip NULL element. + (pass_strength_reduction::execute): Init the first NULL element. + +2019-05-13 Nathan Sidwell <nathan@acm.org> + + * gcc.c (execute): Simplify cond-expr into if. Reformat comment. + (run_attempt): Reformat line break. + +2019-05-13 David Edelsohn <dje.gcc@gmail.com> + + PR target/90418 + * config/rs6000/rs6000.c (rs6000_emit_epilogue): Don't load EH + data registers in sibcall epilogues. + Don't add EH_RETURN_STACKADJ_RTX to sp in sibcall epilogues. + +2019-05-13 Uroš Bizjak <ubizjak@gmail.com> + + PR target/89221 + * configure.ac (--enable-frame-pointer): + Disable by default for cygwin and mingw. + * configure: Regenerate. + +2019-05-13 Nathan Sidwell <nathan@acm.org> + + * dwarf2out.c (breakout_comdat_types): Move comment to correct + piece of code. + (const_ok_for_output_1): Balance parens around #if/#else/#endif + (gen_member_die): Move abstract origin check earlier. Only VARs + can be static_inline_p. Simplify splicing control flow. + +2019-05-13 Richard Biener <rguenther@suse.de> + + * tree-vect-slp.c (vect_get_and_check_slp_defs): Handle + VIEW_CONVERT_EXPR. + (vect_build_slp_tree_1): Likewise. + +2019-05-13 Richard Biener <rguenther@suse.de> + + PR tree-optimization/90402 + * tree-if-conv.c (tree_if_conversion): Value number only + the loop body by making the latch an exit of the region + as well. + * tree-ssa-sccvn.c (process_bb): Add flag whether to skip + processing PHIs. + (do_rpo_vn): Deal with multiple edges into the entry block + that are not backedges inside the region by skipping PHIs + of the entry block. + +2019-05-13 Richard Biener <rguenther@suse.de> + + PR tree-optimization/90316 + * tree-ssa-pre.c (insert_aux): Fold into ... + (insert): ... this function. Use a RPO walk to reduce the + number of required iterations. + +2019-05-13 Martin Liska <mliska@suse.cz> + + PR tree-optimization/90416 + * tree-vect-stmts.c (vect_check_load_store_mask): Concatenate + string instead of passing the second part as va_arg argument. + +2019-05-13 Martin Liska <mliska@suse.cz> + + PR gcov-profile/90380 + * gcov.c (handle_cycle): Do not support zero cycle count, + it should not be possible. + (path_contains_zero_cycle_arc): New function. + (circuit): Ignore zero cycle arc counts. + +2019-05-13 Martin Liska <mliska@suse.cz> + + PR gcov-profile/90380 + * gcov.c (enum loop_type): Remove the enum and + the operator. + (handle_cycle): Assert that we should not reach + a negative count. + (circuit): Use loop_found instead of a tri-state loop_type. + (get_cycles_count): Do not handle NEGATIVE_LOOP as it can't + happen. + +2019-05-12 Iain Sandoe <iain@sandoe.co.uk> + + PR target/82920 + * config/i386/i386.c (ix86_output_jmp_thunk_or_indirect): New. + (ix86_output_indirect_branch_via_reg): Use output mechanism + accounting for __USER_LABEL_PREFIX__. + (ix86_output_indirect_branch_via_push): Likewise. + (ix86_output_function_return): Likewise. + (ix86_output_indirect_function_return): Likewise. + +2019-05-12 Richard Sandiford <richard.sandiford@arm.com> + + * doc/md.texi: Document use of code attributes in rtx patterns. + * read-md.h (rtx_reader::rtx_alloc_for_name): New member function. + * read-rtl.c (find_code): Split out search loops into... + (maybe_find_code): ...this new function. + (check_code_iterator): Make the error message more informative. + (check_code_attribute): New function. + (rtx_reader::rtx_alloc_for_name): Likewise. + (rtx_reader::read_rtx_code): Use rtx_alloc_for_name. + * config/aarch64/predicates.md (aarch64_smin, aarch64_umin): Delete. + * config/aarch64/aarch64-simd.md (*aarch64_<su>abd<mode>_3): Use + <max_opp> directly as an rtx code instead of via a match_operator. + * config/aarch64/aarch64-sve.md (aarch64_<su>abd<mode>_3): Likewise. + (<su>abd<mode>_3): Update accordingly. + +2019-05-12 Iain Sandoe <iain@sandoe.co.uk> + + * config/rs6000/rs6000.c (debug_stack_info): When -mdebug=stack + is given, print the state of the EH "save world" computation for + Darwin. + +2019-05-11 Jakub Jelinek <jakub@redhat.com> + + PR c++/59813 + * config/aarch64/aarch64.c (aarch64_expand_epilogue): Don't add + EH_RETURN_STACKADJ_RTX to sp in sibcall epilogues. + +2019-05-11 Uroš Bizjak <ubizjak@gmail.com> + + * config/i386/i386.md (floatdi<X87MODEF:mode>2_i387_with_xmm): + Use pinsrd for TARGET_SSE4_1. + * config/i386/sse.md (movdi_to_sse): Ditto. + +2019-05-10 Richard Biener <rguenther@suse.de> + + * tree-ssa-sccvn.c (visit_reference_op_call): Initialize value-id. + (do_rpo_vn): Initialize next_value_id. + +2019-05-10 Martin Liska <mliska@suse.cz> + + * params.def (PARAM_GIMPLE_FE_COMPUTED_HOT_BB_THRESHOLD): + Fix plural form. + +2019-05-10 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/90385 + * tree-parloops.c (try_create_reduction_list): Punt on non-SSA_NAME + arguments of the exit phis. + + PR c++/90383 + * tree-inline.h (struct copy_body_data): Add do_not_fold member. + * tree-inline.c (remap_gimple_op_r): Avoid folding expressions if + id->do_not_fold. + (copy_tree_body_r): Likewise. + (copy_fn): Set id.do_not_fold to true. + +2019-05-10 Martin Liska <mliska@suse.cz> + + * config/i386/i386-expand.c (ix86_expand_floorceildf_32): + Reapply changes from r269790. + +2019-05-10 Martin Liska <mliska@suse.cz> + + PR middle-end/90340 + * doc/invoke.texi: New params. + * params.def (PARAM_JUMP_TABLE_MAX_GROWTH_RATIO_FOR_SIZE): New. + (PARAM_JUMP_TABLE_MAX_GROWTH_RATIO_FOR_SPEED): Likewise. + * tree-switch-conversion.c (jump_table_cluster::can_be_handled): + Use it. + * tree-switch-conversion.h (struct jump_table_cluster): + Likewise. + +2019-05-09 Segher Boessenkool <segher@kernel.crashing.org> + + * combine.c (combine_simplify_rtx): Don't make IF_THEN_ELSE RTL. + +2019-05-09 Bill Schmidt <wschmidt@linux.ibm.com> + + * doc/loop.texi: Remove reference to FOR_EACH_LOOP_BREAK. + +2019-05-09 Alexander Monakov <amonakov@ispras.ru> + + PR rtl-optimization/88879 + * sel-sched.c (sel_target_adjust_priority): Remove assert. + +2019-05-09 Richard Earnshaw <rearnsha@arm.com> + + PR target/90405 + * config/arm/arm.c (callee_saved_reg_p): Move before + thumb_find_work_register. + (thumb1_prologue_unused_call_clobbered_lo_regs): Move before + thumb_find_work_register. Only call df_get_live_out once. + (thumb1_epilogue_unused_call_clobbered_lo_regs): Likewise. + (thumb_find_work_register): Use + thumb1_prologue_unused_call_clobbered_lo_regs instead of ad hoc + algorithms to locate a spare call clobbered reg. + +2019-05-09 Martin Liska <mliska@suse.cz> + + * gimple-pretty-print.c (dump_binary_rhs): Dump MIN_EXPR + and MAX_EXPR in GIMPLE FE format. + +2019-05-09 Martin Liska <mliska@suse.cz> + + * tree-cfg.c (dump_function_to_file): Dump entry BB count. + * gimple-pretty-print.c (dump_gimple_bb_header): + Dump BB count. + (pp_cfg_jump): Dump edge probability. + * profile-count.c (profile_quality_as_string): Simplify + with a static array. + (parse_profile_quality): New function. + (profile_count::dump): Simplify with a static array. + (profile_count::from_gcov_type): Add new argument. + * profile-count.h (parse_profile_quality): Likewise. + * predict.h (set_hot_bb_threshold): New. + * params.def (PARAM_GIMPLE_FE_COMPUTED_HOT_BB_THRESHOLD): + New param. + * predict.c (get_hot_bb_threshold): Set from the new param. + (set_hot_bb_threshold): New. + +2019-05-09 Richard Biener <rguenther@suse.de> + + PR tree-optimization/90395 + * tree-ssa-forwprop.c (pass_forwprop::execute): Do not + rewrite vector stores that throw internally. + +2019-05-09 Thomas Schwinge <thomas@codesourcery.com> + + * cif-code.def (CHKP): Remove. + + PR target/89221 + * configure.ac (--enable-frame-pointer): Disable by default for + GNU systems. + * configure: Regenerate. + +2019-05-09 Alan Modra <amodra@gmail.com> + + PR target/89271 + * config/rs6000/rs6000.h (enum reg_class, REG_CLASS_NAMES), + (REG_CLASS_CONTENTS): Add GEN_OR_VSX_REGS class. + * config/rs6000/rs6000.c (rs6000_register_move_cost): Correct + cost for general <-> vsx when direct moves are available. + Cost union classes at minimal cost for any reg in the class. + Correct calculation for moves between vsx, float, and altivec. + Don't return a low cost for moves between special regs. Don't + use hard coded register numbers. + (TARGET_IRA_CHANGE_PSEUDO_ALLOCNO_CLASS): Define. + (rs6000_ira_change_pseudo_allocno_class): New function. + * config/rs6000/rs6000.md (movsi_internal1, mov<mode>_internal), + (movdi_internal32, movdi_internal64): Remove '*' from vsx register + alternatives. + (movsi_internal1): Don't disparage vector alternatives. + (mov<mode>_internal): Likewise, excepting alternative that + will be split. + * config/rs6000/vsx.md (vsx_splat_<mode>_reg): Don't disparage + we <- b alternative. + +2019-05-08 Jakub Jelinek <jakub@redhat.com> + + PR c++/59813 + PR tree-optimization/89060 + * tree-ssa-live.h (live_vars_map): New typedef. + (compute_live_vars, live_vars_at_stmt, destroy_live_vars): Declare. + * tree-ssa-live.c: Include gimple-walk.h and cfganal.h. + (struct compute_live_vars_data): New type. + (compute_live_vars_visit, compute_live_vars_1, compute_live_vars, + live_vars_at_stmt, destroy_live_vars): New functions. + * tree-tailcall.c: Include tree-ssa-live.h. + (live_vars, live_vars_vec): New global variables. + (find_tail_calls): Perform variable life analysis before punting. + (tree_optimize_tail_calls_1): Clean up live_vars and live_vars_vec. + * tree-inline.h (struct copy_body_data): Add eh_landing_pad_dest + member. + * tree-inline.c (add_clobbers_to_eh_landing_pad): Remove BB argument. + Perform variable life analysis to select variables that really need + clobbers added. + (copy_edges_for_bb): Don't call add_clobbers_to_eh_landing_pad here, + instead set id->eh_landing_pad_dest and assert it is the same. + (copy_cfg_body): Call it here if id->eh_landing_pad_dest is non-NULL. + +2019-05-08 Mihail Ionescu <mihail.ionescu@arm.com> + Richard Earnshaw <rearnsha@arm.com> + + PR target/88167 + * config/arm/arm.c (thumb1_prologue_unused_call_clobbered_lo_regs): New + function. + (thumb1_epilogue_unused_call_clobbered_lo_regs): New function. + (thumb1_compute_save_core_reg_mask): Don't force a spare work + register if both the epilogue and prologue can use call-clobbered + regs. + (thumb1_unexpanded_epilogue): Use + thumb1_epilogue_unused_call_clobbered_lo_regs. Reverse the logic for + picking temporaries for restoring high regs to match that of the + prologue where possible. + (thumb1_expand_prologue): Add any usable call-clobbered low registers to + the list of work registers. Detect if the return address is still live + at the end of the prologue and avoid using it for a work register if so. + If the return address is not live, add LR to the list of pushable regs + after the first pass. + +2019-05-08 Bin Cheng <bin.cheng@linux.alibaba.com> + + PR tree-optimization/90078 + * tree-ssa-loop-ivopts.c (inttypes.h): Include new header file. + (INFTY): Increase the value for infinite cost. + (struct comp_cost): Promote type of members to int64_t. + (infinite_cost): Don't set complexity in initialization. + (comp_cost::operator +,-,+=,-+,/=,*=): Assert when cost computation + overflows to infinite_cost. + (adjust_setup_cost): Promote type of parameter and cost computation + to int64_t. + (struct ainc_cost_data, struct iv_ca): Promote type of member to + int64_t. + (get_scaled_computation_cost_at, determine_iv_cost): Promote type of + cost computation to int64_t. + (determine_group_iv_costs, iv_ca_dump, find_optimal_iv_set): Use + int64_t's format specifier in dump. + +2019-05-08 Bin Cheng <bin.cheng@linux.alibaba.com> + + PR tree-optimization/90240 + * tree-ssa-loop-ivopts.c (get_scaled_computation_cost_at): Scale cost + with respect to scaling factor pre-computed for each basic block. + (try_improve_iv_set): Return bool if best_cost equals to iv_ca cost. + (find_optimal_iv_set_1): Free iv_ca set if it has infinite_cost. + (COST_SCALING_FACTOR_BOUND, determine_scaling_factor): New. + (tree_ssa_iv_optimize_loop): Call determine_scaling_factor. Extend + live range for array of loop's basic blocks. Cleanup aux field of + loop's basic blocks. + +2019-05-08 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/90356 + * match.pd ((X +/- 0.0) +/- 0.0): Optimize into X +/- 0.0 if possible. + +2019-05-07 Wei Xiao <wei3.xiao@intel.com> + + * common/config/i386/i386-common.c (OPTION_MASK_ISA_AVX512BF16_SET + OPTION_MASK_ISA_AVX512BF16_UNSET, OPTION_MASK_ISA2_AVX512BW_UNSET): New. + (OPTION_MASK_ISA2_AVX512F_UNSET): Add OPTION_MASK_ISA_AVX512BF16_UNSET. + (ix86_handle_option): Handle -mavx512bf16. + * config.gcc: Add avx512bf16vlintrin.h and avx512bf16intrin.h + to extra_headers. + * config/i386/avx512bf16vlintrin.h: New. + * config/i386/avx512bf16intrin.h: New. + * config/i386/cpuid.h (bit_AVX512BF16): New. + * config/i386/driver-i386.c (host_detect_local_cpu): Detect BF16. + * config/i386/i386-builtin-types.def: Add new types. + * config/i386/i386-builtin.def: Add new builtins. + * config/i386/i386-c.c (ix86_target_macros_internal): Define + __AVX512BF16__. + * config/i386/i386-option.c (ix86_target_string): Add -mavx512bf16. + (ix86_option_override_internal): Handle BF16. + (ix86_valid_target_attribute_inner_p): Ditto. + * config/i386/i386-expand.c (ix86_expand_args_builtin): Ditto. + * config/i386/i386-builtin.c (enum processor_features): Add + F_AVX512BF16. + (static const _isa_names_table isa_names_table): Ditto. + * config/i386/i386.h (TARGET_AVX512BF16, TARGET_AVX512BF16_P): New. + (PTA_AVX512BF16): Ditto. + * config/i386/i386.opt: Add -mavx512bf16. + * config/i386/immintrin.h: Include avx512bf16intrin.h + and avx512bf16vlintrin.h. + * config/i386/sse.md (avx512f_cvtne2ps2bf16_<mode><mask_name>, + avx512f_cvtneps2bf16_<mode><mask_name>, + avx512f_dpbf16ps_<mode><mask_half_name>): New define_insn patterns. + * config/i386/subst.md (mask_half): Add new subst. + * doc/invoke.texi: Document -mavx512bf16. + +2019-05-07 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/rs6000-protos.h (rs6000_legitimize_reload_address_ptr): + Delete declaration. + * config/rs6000/rs6000.c (rs6000_legitimize_reload_address): Delete. + (rs6000_debug_legitimize_reload_address): Delete. + (rs6000_legitimize_reload_address_ptr): Delete. + (rs6000_option_override_internal): Adjust. + (mem_operand_gpr): Adjust comment. + (legitimate_lo_sum_address_p): Ditto. + (rs6000_legitimize_reload_address): Delete. + (rs6000_debug_legitimize_reload_address): Delete. + * config/rs6000/rs6000.h (LEGITIMIZE_RELOAD_ADDRESS): Delete. + +2019-05-07 Kelvin Nilsen <kelvin@gcc.gnu.org> + + PR target/89765 + * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): + In handling of ALTIVEC_BUILTIN_VEC_INSERT, use modular arithmetic + to compute vector element selector for both constant and variable + operands. + +2019-05-07 Uroš Bizjak <ubizjak@gmail.com> + + * config/i386/i386.md (cvt_mnemonic): New mode attribute. + (ashr<mode>3_cvt): Merge insn pattern from ashrsi3_cvt and + ashrdi3_cvt using SWI48 mode iterator. + +2019-05-07 Alejandro Martinez <alejandro.martinezvicente@arm.com> + + * config/aarch64/aarch64-sve.md (<su>abd<mode>_3): New define_expand. + (aarch64_<su>abd<mode>_3): Likewise. + (*aarch64_<su>abd<mode>_3): New define_insn. + (<sur>sad<vsi2qi>): New define_expand. + * config/aarch64/iterators.md: Added MAX_OPP attribute. + * tree-vect-loop.c (use_mask_by_cond_expr_p): Add SAD_EXPR. + (build_vect_cond_expr): Likewise. + +2019-05-07 Uroš Bizjak <ubizjak@gmail.com> + + * cfgexpand.c (asm_clobber_reg_is_valid): Reject + clobbers outside of accessible_reg_set. + * config/i386/i386.c (ix86_conditional_register_usage): + Disable register sets by clearing corresponding bits in + accessible_reg_set. Do not set corresponding bits in fixed_regs, + call_used_regs and don't clear corresponding reg_names array members. + +2019-05-07 Richard Biener <rguenther@suse.de> + + * tree-vect-stmts.c (vect_is_simple_cond): When vectype is + not specified still compute a comp_vectype for invariant + compares. + +2019-05-07 Richard Biener <rguenther@suse.de> + + PR tree-optimization/90316 + * tree-ssa-pre.c (translate_vuse_through_block): When + same_valid is NULL do not bother to search for a virtual + PHI continuation. + (phi_translate_1): When operands changed we cannot keep + the same value-number so do not bother to ask whether + that's possible from translate_vuse_through_block. + +2019-05-07 Martin Liska <mliska@suse.cz> + + * bitmap.c (bitmap_register): Come up with + alloc_descriptor_max_uid and assign it for + a new bitmap. + (register_overhead): Use get_descriptor as + a descriptor. + (release_overhead): New. + (bitmap_elem_to_freelist): Call it. + (bitmap_elt_clear_from): Likewise. + (bitmap_obstack_free): Likewise. + (bitmap_move): Sensitively release memory. + * bitmap.h (struct GTY): Add alloc_descriptor and padding. + (bitmap_initialize): Initialize alloc_descriptor to zero. + * tree-ssa-pre.c (do_hoist_insertion): Use bitmap_move. + +2019-05-07 Richard Biener <rguenther@suse.de> + + * tree-vect-slp.c (vect_build_slp_tree_2): Bump size whenever + we build a SLP node. Remove max_size and limiting. + (vect_analyze_slp_instance): Record and dump size of the SLP graph. + +2019-05-07 Richard Biener <rguenther@suse.de> + + PR tree-optimization/90316 + * tree-ssa-alias.h (get_continuation_for_phi): Take walking + limit by reference. + (walk_non_aliased_vuses): Take walking limit argument. + * tree-ssa-alias.c (maybe_skip_until): Take limit and abort + walking if it is reached instead of just counting. + (get_continuation_for_phi): Likewise. + (walk_non_aliased_vuses): Likewise, instead of leaving counter + limiting to the callback. + * tree-ssa-sccvn.c (vn_reference_lookup_2): Adjust. + (vn_reference_lookup_3): Likewise. + (vn_reference_lookup_pieces): Likewise. + (vn_reference_lookup): Likewise. + * tree-ssa-pre.c (translate_vuse_through_block): Limit walking. + * tree-ssa-scopedtables.c (vuse_eq): Adjust. + (avail_exprs_stack::lookup_avail_expr): Likewise. + +2019-05-07 Jan Hubicka <hubicka@ucw.cz> + + * tree-ssa-alias.c (aliasing_component_refs_p): Continue looking + for comparaible types in the second direction even if first one + hits incomparable type. + +2019-05-07 Richard Biener <rguenther@suse.de> + + PR lto/90369 + * lto-wrapper.c (debug_objcopy): Use the original filename + including archive offset for the filename used for -save-temps. + +2019-05-07 Li Jia He <helijia@linux.ibm.com> + + * tree-ssa-phiopt.c (two_value_replacement): Fix a typo in parameter + detection. + +2019-05-06 H.J. Lu <hongjiu.lu@intel.com> + Hongtao Liu <hongtao.liu@intel.com> + + PR target/89750 + PR target/86444 + * config/i386/i386-expand.c (ix86_expand_sse_comi_round): + Modified, original implementation isn't correct. + +2019-05-06 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/rs6000.md (FIRST_ALTIVEC_REGNO, LAST_ALTIVEC_REGNO) + (LR_REGNO, CTR_REGNO, CA_REGNO, ARG_POINTER_REGNUM, CR0_REGNO) + (CR1_REGNO, CR2_REGNO, CR3_REGNO, CR4_REGNO, CR5_REGNO, CR6_REGNO) + (CR7_REGNO, MAX_CR_REGNO, VRSAVE_REGNO, VSCR_REGNO) + (FRAME_POINTER_REGNUM): Change numbering. + * config/rs6000/rs6000.c (rs6000_reg_names): Adjust. + (alt_reg_names): Adjust. + (rs6000_conditional_register_usage): Don't mark hard register 64 as + fixed. + * config/rs6000/rs6000.h (FIRST_PSEUDO_REGISTER): Adjust. + (DWARF_FRAME_REGISTERS): Delete. + (DWARF2_FRAME_REG_OUT): Fix whitespace. + (FIXED_REGISTERS, CALL_USED_REGISTERS, CALL_REALLY_USED_REGISTERS): + Adjust. + (REG_ALLOC_ORDER): Adjust. + (FRAME_POINTER_REGNUM, ARG_POINTER_REGNUM): Adjust. + (REG_CLASS_CONTENTS): Adjust. + (RETURN_ADDR_RTX): Change comment. + (REGNO_OK_FOR_INDEX_P, REGNO_OK_FOR_BASE_P): Use ARG_POINTER_REGNUM + instead of 67. + (REGISTER_NAMES): Adjust. + (ADDITIONAL_REGISTER_NAMES): Adjust. + * config/rs6000/darwin.h (REGISTER_NAMES): Adjust. + +2019-05-06 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/rs6000.md (TFHAR_REGNO, TFIAR_REGNO, TEXASR_REGNO): + Delete. + * config/rs6000/rs6000.h (FIRST_PSEUDO_REGISTER): Adjust. + (DWARF_FRAME_REGISTERS): Adjust. + (FIXED_REGISTERS, CALL_USED_REGISTERS, CALL_REALLY_USED_REGISTERS): + Adjust. + (REG_ALLOC_ORDER): Adjust. + (enum reg_class): Delete SPR_REGS. + (REG_CLASS_NAMES): Delete SPR_REGS. + (REG_CLASS_CONTENTS): Delete SPR_REGS. Adjust for deleted TM regs. + (REGISTER_NAMES): Adjust. + (ADDITIONAL_REGISTER_NAMES): Adjust. + * config/rs6000/darwin.h (REGISTER_NAMES): Adjust. + * config/rs6000/htm.md (htm_mfspr_<mode>, htm_mtspr_<mode>): Adjust. + * config/rs6000/predicates.md (htm_spr_reg_operand): Delete. + * config/rs6000/rs6000.c (rs6000_init_hard_regno_mode_ok): Adjust. + (htm_spr_regno): Delete. + (htm_expand_builtin): Adjust: the HTM builtins now have one fewer + argument. + (rs6000_dbx_register_number): Adjust. + +2019-05-06 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/rs6000.h (PRE_GCC3_DWARF_FRAME_REGISTERS): Delete. + +2019-05-06 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/rs6000.c (rs6000_dbx_register_number): Handle + FRAME_POINTER_REGNUM, ARG_POINTER_REGNUM, and 64 (which was MQ). + +2019-05-06 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/88709 + PR tree-optimization/90271 + * params.def (PARAM_STORE_MERGING_MAX_SIZE): New parameter. + * gimple-ssa-store-merging.c (encode_tree_to_bitpos): Handle + non-clobber CONSTRUCTORs with no elts. Remove useless tmp_int + variable. + (imm_store_chain_info::coalesce_immediate_stores): Punt if the size + of the store merging group is larger than + PARAM_STORE_MERGING_MAX_SIZE parameter. + (split_group): Add bzero_first argument. If set, always emit first + the first store which must be = {} of the whole area and then for the + rest of the stores consider all zero bytes as paddings. + (imm_store_chain_info::output_merged_store): Check if first store + is = {} of the whole area and if yes, determine which setting of + bzero_first for split_group gives smaller number of stores. Adjust + split_group callers. + (lhs_valid_for_store_merging_p): Allow decls. + (rhs_valid_for_store_merging_p): Allow non-clobber CONTRUCTORs with + no elts. + (pass_store_merging::process_store): Likewise. + +2019-05-06 Kelvin Nilsen <kelvin@gcc.gnu.org> + + PR target/89424 + * config/rs6000/rs6000.c (rs6000_expand_vector_extract): Add + handling of V1TImode. + +2019-05-06 Uroš Bizjak <ubizjak@gmail.com> + + PR target/89221 + * config.gcc (i[34567]86-*-*, x86_64-*-*): Move tests for enable_cld + and enable_frame_pointer ... + * configure.ac: ... here. Update help strings for + --enable-frame-pointer. + * configure: Regenerate. + * config/i386/i386-options.c (ix86_option_override_internal): Remove + USE_X86_64_FRAME_POINTER define, use USE_IX86_FRAME_POINTER instead. + * config/i386/sol2.h (USE_IX86_FRAME_POINTER): Remove. + (USE_X86_64_FRAME_POINTER): Ditto. + +2019-05-06 Martin Liska <mliska@suse.cz> + + * config.gcc: Append to target_gtfiles and fix indentation. + +2019-05-06 Richard Biener <rguenther@suse.de> + + PR tree-optimization/90358 + * tree-vect-stmts.c (get_group_load_store_type): Properly + detect unused upper half of load. + (vectorizable_load): Likewise. + +2019-05-06 Richard Biener <rguenther@suse.de> + + PR tree-optimization/88828 + * tree-ssa-forwprop.c (get_bit_field_ref_def): Split out from... + (simplify_vector_constructor): ...here. Handle constants in + the constructor. + +2019-05-06 Richard Biener <rguenther@suse.de> + + PR tree-optimization/90328 + * tree-data-ref.h (dr_may_alias_p): Pass in the actual loop nest. + * tree-data-ref.c (dr_may_alias_p): Check whether the clique + is valid in the loop nest before using it. + (initialize_data_dependence_relation): Adjust. + * graphite-scop-detection.c (build_alias_set): Pass the SCOP enclosing + loop as loop-nest to dr_may_alias_p. + +2019-05-06 Richard Biener <rguenther@suse.de> + + * dwarf2out.c (mem_loc_descriptor): Initialize int_mode. + +2019-05-06 Richard Biener <rguenther@suse.de> + + PR tree-optimization/90316 + * tree-ssa-alias.c (maybe_skip_until): Pass in target BB, + compute target on demand. + (get_continuation_for_phi): Remove code walking stmts to + get to a target virtual operand which could end up being + quadratic. + +2019-05-06 Martin Liska <mliska@suse.cz> + + PR sanitizer/90312 + * config/i386/i386-options.c (ix86_option_override_internal): Error only + when -mabi is selected to a non-default version. + +2019-05-06 Hrishikesh Kulkarni <hrishikeshparag@gmail.com> + Martin Liska <mliska@suse.cz> + + * Makefile.in: Add lto-dump.texi. + * cgraph.h: Add new functions get_visibility_string and + get_symtab_type_string. + * doc/gcc.texi: Include lto-dump section. + * doc/lto-dump.texi: New file. + * dumpfile.c (dump_switch_p_1): Use parse_dump_option. + (parse_dump_option): Factor out this function. + * dumpfile.h (enum dump_flag): Add new value TDF_ERROR. + (parse_dump_option): Export the function. + * symtab.c (symtab_node::get_visibility_string): New function. + (symtab_node::get_symtab_type_string): Likewise. + +2019-05-06 Martin Liska <mliska@suse.cz> + + * config/i386/i386-builtins.c: New file. + * config/i386/i386-builtins.h: New file. + * config/i386/i386-expand.c: New file. + * config/i386/i386-expand.h: New file. + * config/i386/i386-features.c: New file. + * config/i386/i386-features.h: New file. + * config/i386/i386-options.c: New file. + * config/i386/i386-options.h: New file. + * config.gcc: Add new files into extra_objs and + target_gtfiles. + * config/i386/i386.c: Split content of the file + into newly introduced files. + * config/i386/i386.h: Declare common variables + and macros. + * config/i386/t-i386: Define dependencies for new files. + +2019-05-03 Richard Earnshaw <rearnsha@arm.com> + + PR target/89400 + * config/arm/arm.md (unaligned_loadsi): Add variant for thumb1. + Restrict 'all' variant to 32-bit configurations. + (unaligned_loadhiu): Likewise. + (unaligned_storehi): Likewise. + (unaligned_storesi): Likewise. + (unaligned_loadhis): Disable when compiling for thumb1. + +2019-05-03 Marc Glisse <marc.glisse@inria.fr> + + PR tree-optimization/90269 + * tree-loop-distribution.c (find_seed_stmts_for_distribution): + Ignore clobbers. + +2019-05-03 Martin Liska <mliska@suse.cz> + + * hash-map.h: Add is_empty function. + * hash-set.h: Likewise. + * hash-table.h: Likewise. + * dwarf2out.c (dwarf2out_finish): Use is_empty instead of + elements () == 0 (and similar usages). + * gimple-ssa-store-merging.c (pass_store_merging::terminate_and_process_all_chains): Likewise. + * gimplify.c (gimplify_bind_expr): Likewise. + (gimplify_switch_expr): Likewise. + * hash-map-tests.c (test_map_of_strings_to_int): Likewise. + * ipa-icf.c (sem_item_optimizer::remove_symtab_node): Likewise. + * postreload-gcse.c (dump_hash_table): Likewise. + (gcse_after_reload_main): Likewise. + * predict.c (combine_predictions_for_bb): Likewise. + * tree-parloops.c (reduction_phi): Likewise. + (separate_decls_in_region): Likewise. + (transform_to_exit_first_loop): Likewise. + (gen_parallel_loop): Likewise. + (gather_scalar_reductions): Likewise. + (try_create_reduction_list): Likewise. + * var-tracking.c (dump_vars): Likewise. + (emit_notes_for_changes): Likewise. + (vt_emit_notes): Likewise. + +2019-05-03 Richard Biener <rguenther@suse.de> + + PR tree-optimization/90316 + * tree-ssa-pre.c (pass_pre::execute): Re-compute DOM fast queries + before running VN. + +2019-05-03 Richard Biener <rguenther@suse.de> + + * tree-vect-stmts.c (get_group_load_store_type): Avoid + peeling for gaps by loading only lower halves of vectors + if possible. + (vectorizable_load): Likewise. + +2019-05-03 Richard Biener <rguenther@suse.de> + + PR middle-end/89518 + * match.pd: Add pattern to optimize (A / B) * B + (A % B) to A. + +2019-05-03 Richard Biener <rguenther@suse.de> + + PR middle-end/87314 + * match.pd (cmp (convert1?@2 addr@0) (convert2? addr@1)): + Handle STRING_CST vs DECL or STRING_CST. + +2019-05-03 Richard Biener <rguenther@suse.de> + + PR tree-optimization/88963 + * tree-ssa-forwprop.c (pass_forwprop::execute): Rewrite + vector loads feeding only BIT_FIELD_REFs to component + loads. Rewrite stores fed by CONSTRUCTORs to component + stores. + +2019-05-03 Jakub Jelinek <jakub@redhat.com> + + * opts.h (finish_options): Remove lang_mask argument. + (print_help, help_option_argument): Declare. + * opts.c (print_help): Remove forward declaration, no longer static. + (finish_options): Remove lang_mask argument, don't call print_help + here. + * opts-global.c (decode_options): Adjust finish_option caller, call + print_help here. + + PR tree-optimization/90303 + * ipa-devirt.c (obj_type_ref_class, get_odr_type): Don't use + TYPE_CANONICAL for TYPE_STRUCTURAL_EQUALITY_P types in !in_lto_p mode. + +2019-05-03 Richard Biener <rguenther@suse.de> + + PR tree-optimization/89698 + * gimple-fold.c (canonicalize_constructor_val): Early out + for constants, handle unfolded INTEGER_CSTs as they appear in + C++ virtual table ctors. + +2019-05-03 Richard Biener <rguenther@suse.de> + + * passes.c (execute_function_todo): Remove dead code. + +2019-05-02 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/rs6000.c (rs6000_dbx_register_number): Do not use + the internal register number, for any "real" register. + +2019-05-02 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/rs6000.c (rs6000_dbx_register_number): Return the + correct numbers for TFHAR, TFIAR, TEXASR. + +2019-05-02 Richard Biener <rguenther@suse.de> + + PR tree-optimization/89653 + * tree-ssa-loop.c (pass_data_tree_loop_init): Execute + update-address-taken before the pass. + * passes.def (pass_tree_loop_init): Put comment before it. + +2019-05-02 Richard Biener <rguenther@suse.de> + + PR tree-optimization/89509 + * tree-ssa-structalias.c (compute_dependence_clique): Look + at the first subvar when determining whether it is restrict. + +2019-05-02 Richard Biener <rguenther@suse.de> + + PR tree-optimization/90273 + * tree-ssa-dce.c (eliminate_unnecessary_stmts): Eliminate + useless debug stmts. + +2019-05-02 Alejandro Martinez <alejandro.martinezvicente@arm.com> + + * config/aarch64/aarch64-sve.md (<sur>dot_prod<vsi2qi>): Taken from SVE + ACLE branch. + * config/aarch64/iterators.md: Copied Vetype_fourth, VSI2QI and vsi2qi from + SVE ACLE branch. + * tree-vect-loop.c (use_mask_by_cond_expr_p): New function to check if a + VEC_COND_EXPR be inserted to emulate a conditional internal function. + (build_vect_cond_expr): Emit the VEC_COND_EXPR. + (vectorizable_reduction): Use the functions above to vectorize in a + fully masked loop codes that don't have a conditional internal + function. + +2019-05-02 Martin Liska <mliska@suse.cz> + + * cgraphclones.c: Call valid_attribute_p with 1 for + target_clone. + * config/i386/i386-c.c (ix86_pragma_target_parse): Use 0 as + it's for target attribute. + * config/i386/i386-protos.h (ix86_valid_target_attribute_tree): + Add new boolean argument. + * config/i386/i386.c (ix86_valid_target_attribute_inner_p): + Likewise. + (ix86_valid_target_attribute_tree): Pass target_clone_attr + to ix86_valid_target_attribute_inner_p. + (ix86_valid_target_attribute_p): Pass flags argument to + ix86_valid_target_attribute_inner_p. + (get_builtin_code_for_version): Use 0 as it's target attribute. + +2019-05-02 Martin Liska <mliska@suse.cz> + + * gcc.c (process_command): Add dummy file only + if n_infiles == 0. + * opts-global.c (decode_options): Pass lang_mask. + * opts.c (print_help): New function. + (finish_options): Print --help if help_option_argument + is set. + (common_handle_option): Factor out content of OPT__help_ + into print_help. + * opts.h (finish_options): Add new argument. + +2019-05-02 Martin Liska <mliska@suse.cz> + + PR target/88809 + * config/i386/i386.c (ix86_expand_strlen): Use strlen call. + With -minline-all-stringops use inline expansion using 4B loop. + * doc/invoke.texi: Document the change of + -minline-all-stringops. + +2019-05-01 Jeff Law <law@redhat.com> + + PR tree-optimization/88797 + * gimple-ssa-split-paths (is_feasible_trace): Reject cases where the + PHI feeds a conditional on the RHS of an assignment. + +2019-04-30 Andrew Waterman <andrew@sifive.com> + Jim Wilson <jimw@sifive.com> + + * config/riscv/constraints.md (L): New. + * config/riscv/predicates.md (lui_operand): New. + (sfb_alu_operand): New. + * config/riscv/riscv-protos.h (riscv_expand_conditional_move): Declare. + * config/riscv/riscv.c (riscv_expand_conditional_move): New. + * config/riscv/riscv.h (TARGET_SFB_ALU): New. + * config/riscv/risc.md (type): Add sfb_alu. + (branch<mode>): Renamed from branch_order<mode>. Change predicate for + operand 3 to reg_or_0_operand. In output string, change %3 to %z3. + (branch_zero<mode>): Delete. + (mov<mode>cc): New. + (mov<GPR:mode><X:mode>cc): Likewise. + * config/riscv/sifive-7.md (sifive_7_sfb_alu): New. Use in bypasses. + +2019-04-30 Nathan Sidwell <nathan@acm.org> + + * tree.h (MARK_TS_EXP): New. + +2019-04-30 Martin Liska <mliska@suse.cz> + + * opts.c (enable_warning_as_error): Provide hints + for unknown options. + +2019-04-30 Martin Liska <mliska@suse.cz> + + PR debug/90288 + * doc/invoke.texi: Add missing dash for gas-locview-support + and gno-as-locview-support. + +2019-04-30 Jakub Jelinek <jakub@redhat.com> + + PR target/89093 + * config/aarch64/aarch64.c (aarch64_process_one_target_attr): Don't skip + whitespace at the start of target attribute string. + +2019-04-30 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> + + PR target/86538 + * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): + Define __ARM_FEATURE_ATOMICS. + +2019-04-30 Martin Liska <mliska@suse.cz> + + * gimple-fold.c (gimple_fold_builtin_memory_op): Change endp + into built_in_function enum. Remove code for endp == 2 and + use BUILT_IN_* constants. + (gimple_fold_builtin): Call the function with fcode. + +2019-04-30 Martin Liska <mliska@suse.cz> + + * config/i386/i386.c (ix86_builtin_reciprocal): Cast + DECL_FUNCTION_CODE into ix86_builtins enum before + the switch statement. + +2019-04-30 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/89475 + * tree-ssa-ccp.c (evaluate_stmt): Handle BUILT_IN_BSWAP{16,32,64} + calls. + +2019-04-30 Martin Liska <mliska@suse.cz> + + PR translation/90274 + * opts.c (print_filtered_help): Wrap string in _(...). + +2019-04-30 Bin Cheng <bin.cheng@linux.alibaba.com> + + PR tree-optimization/90240 + Revert: + 2019-04-23 Bin Cheng <bin.cheng@linux.alibaba.com> + + PR tree-optimization/90078 + * tree-ssa-loop-ivopts.c (comp_cost::operator +,-,+=,-+,/=,*=): Add + checks for infinite_cost overflow. + +2019-04-29 Jeff Law <law@redhat.com> + + * passes.def: Move -Wrestrict pass after copy propagation. + +2019-04-29 Maya Rashish <coypu@sdf.org> + + * config.gcc (default_gnu_indirect_function): Default to yes + for arm*-*-netbsd*, i[34567]86-*-netbsd*, powerpc*-*-netbsd*, + sparc*-*-netbsd*, x86_64-*-netbsd*. + +2019-04-29 Vladislav Ivanishin <vlad@ispras.ru> + + * tree-ssa-uninit.c (is_pred_expr_subset_of): Correctly handle cases + where cond2 is NE_EXPR. + (is_value_included_in): Update comment. + +2019-04-29 Richard Biener <rguenther@suse.de> + + PR tree-optimization/90278 + * tree-ssa-forwprop.c (pass_forwprop::execute): Transfer/clean + EH on comparison simplification. + +2019-04-29 Jason Merrill <jason@redhat.com> + + PR c++/82081 - tail call optimization breaks noexcept + * tree-tailcall.c (find_tail_calls): Don't turn a call from a + nothrow function to a might-throw function into a tail call. + +2019-04-29 Richard Sandiford <richard.sandiford@arm.com> + + * tree-data-ref.h (data_dependence_relation::inner_loop): Delete. + (DDR_INNER_LOOP): Likewise. + * tree-data-ref.c (dump_data_dependence_relation): Update accordingly. + (initialize_data_dependence_relation): Likewise. + (insert_innermost_unit_dist_vector): Use 0 instead of DDR_INNER_LOOP. + +2019-04-29 Jakub Jelinek <jakub@redhat.com> + + PR rtl-optimization/90257 + * cfgrtl.c (flow_active_insn_p): Return true for USE of a function + return value. + + Revert the revert: + 2019-04-21 H.J. Lu <hongjiu.lu@intel.com> + + PR target/90178 + Revert: + 2018-11-21 Uros Bizjak <ubizjak@gmail.com> + + Revert the revert: + 2013-10-26 Vladimir Makarov <vmakarov@redhat.com> + + Revert: + 2013-10-25 Vladimir Makarov <vmakarov@redhat.com> + + * lra-spills.c (lra_final_code_change): Remove useless move insns. + +2019-04-29 Richard Biener <rguenther@suse.de> + + * tree-ssa.c (insert_debug_temp_for_var_def): For {CLOBBER} + rhs issue a reset. + +2019-04-27 Iain Buclaw <ibuclaw@gdcproject.org> + + * config/netbsd-d.c: Include memmodel.h. Remove unused tree.h, + varasm.h, and netbsd-protos.h. + +2019-04-27 Uroš Bizjak <ubizjak@gmail.com> + + PR target/89261 + * config/i386/i386-protos.h (ix86_data_alignment): Change + the second argument type to unsigned int. + * config/i386/i386.c (ix86_data_alignment): Change "align" + argument type to unsigned int. + +2019-04-27 Martin Liska <mliska@suse.cz> + + PR middle-end/90258 + * opt-suggestions.c (option_proposer::build_option_suggestions): + When get_valid_option_values returns empty values, add the + misspelling candidate. + +2019-04-26 Jim Wilson <jimw@sifive.com> + + * config/riscv/riscv-protos.h (riscv_move_integer): Add machine_mode + parameter. + * config/riscv/riscv.c (riscv_move_integer): New parameter orig_mode. + Pass orig_mode to riscv_build_integer. + (riscv_split_integer): Pass mode to riscv_move_integer. + (riscv_legitimize_const_move): Likewise. + (riscv_legitimize_move): For MEM dest and CONST_INT src case, new local + promoted_mode. Replace force_reg call with code to load constant into + promoted reg and then subreg it for the store. + * config/riscv/riscv.md (low<mode>+1): Pass <GPR:MODE>mode to + riscv_move_integer. + +2018-04-26 Eugene Sharygin <eush@ispras.ru> + + * gdbhooks.py: Fix UnicodeDecodeErrors when printing trees with + corrupt codes. + +2019-04-26 Richard Sandiford <richard.sandiford@arm.com> + + * tree.h (TYPE_VECTOR_SUBPARTS, SET_TYPE_VECTOR_SUBPARTS): Add + commentary about the encoding of precision. + +2019-04-25 Andreas Tobler <andreast@gcc.gnu.org> + + * config/i386/freebsd64.h: Add bits for 32-bit multilib support. + * config/i386/t-freebsd64: New file. + * config.gcc: Add the t-freebsd64 for multilib support. + +2019-04-25 Uroš Bizjak <ubizjak@gmail.com> + + * doc/extend.texi (vector_size): Add missing comma after @xref. + +2019-04-25 Jakub Jelinek <jakub@redhat.com> + + * BASE-VER: Set to 10.0.0. + +2019-04-25 Richard Biener <rguenther@suse.de> + + PR middle-end/89765 + * gimplify.c (gimplify_expr): Avoid turning a lvalue + VIEW_CONVERT_EXPR into one operating on an rvalue. + +2019-04-25 H.J. Lu <hongjiu.lu@intel.com> + + PR target/89929 + * config/i386/i386.c (feature_priority): Moved to file scope. + (processor_features): Likewise. + (processor_model): Likewise. + (_arch_names_table): Likewise. + (arch_names_table): Likewise. + (_feature_list): Removed. + (feature_list): Likewise. + (_isa_names_table): Moved to file scope. Add priority. + (isa_names_table): Likewise. + (get_builtin_code_for_version): Replace feature_list with + isa_names_table. Update error message for P_ZERO priority. + +2019-04-25 Richard Biener <rguenther@suse.de> + + * tree-pass.h (make_pass_phi_only_cprop): Remove. + * timevar.def (TV_TREE_PHI_CPROP): Likewise. + +2019-04-24 Jeff Law <law@redhat.com> + + PR tree-optimization/90037 + * Makefile.in (OBJS): Remove tree-ssa-phionlycprop.c + * passes.def: Replace all instance of phi-only cprop with the + lattice propagator. Move propagation pass from after erroneous + path isolation to before erroneous path isolation. + * tree-ssa-phionlycprop.c: Remove. + +2019-04-24 Richard Biener <rguenther@suse.de> + + PR middle-end/90213 + * gimple-fold.c (fold_const_aggregate_ref_1): Do multiplication + by size and BITS_PER_UNIT on poly-wide-ints. + +2019-04-25 Richard Biener <rguenther@suse.de> + + PR middle-end/90194 + * match.pd: Add pattern to simplify view-conversion of an + empty constructor. + +2019-04-24 Clement Chigot <clement.chigot@atos.net> + + * config/rs6000/aix71.h (SUBTARGET_OVERRIDE_OPTIONS): Disable + OPTION_MASK_VSX and OPTION_MASK_ALTIVEC from rs6000_isa_flags + for Go on 32 bit AIX. + * config/rs6000/aix72.h: Likewise. + +2019-04-24 Jakub Jelinek <jakub@redhat.com> + + PR target/90193 + * rtl.c (classify_insn): Return JUMP_INSN for asm goto. + * emit-rtl.c (try_split): Copy over REG_LABEL_TARGET. + +2019-04-24 Andreas Krebbel <krebbel@linux.ibm.com> + + PR target/89952 + * config/s390/s390.c (s390_restore_gprs_from_fprs): Restore GPRs + from FPRs in reverse order. Generate REG_CFA_DEF_CFA note also + for restored hard frame pointer. + (s390_sched_dependencies_evaluation): Implement new target hook. + (TARGET_SCHED_DEPENDENCIES_EVALUATION_HOOK): New macro definition. + +2019-04-24 Claudiu Zissulescu <claziss@sysnopsys.com> + + * config/arc/arc-options.def: Fix typos and spelling mistakes. + * config/arc/arc.c (arc_init): Cleanup warning message. + (arc_override_options): Likewise. + +2019-04-24 Jakub Jelinek <jakub@redhat.com> + + PR target/90187 + * config/i386/i386.c (ix86_expand_sse_fp_minmax): Force if_true into + a register if both if_true and if_false are MEMs. + + PR tree-optimization/90208 + * tree-cfg.c (remove_bb): Move forced labels from removed bbs + after labels of new_bb, not before them. + + PR tree-optimization/90211 + * tree-parloops.c (try_create_reduction_list): Ignore phi arguments + which are not SSA_NAMEs. + +2018-04-23 Sudakshina Das <sudi.das@arm.com> + + * config/aarch64/aarch64-linux.h (TARGET_ASM_FILE_END): Define for + AArch64. + (aarch64_file_end_indicate_exec_stack): Add gnu note section. + +2019-04-23 Roman Zhuykov <zhroma@ispras.ru> + + PR rtl-optimization/87979 + * modulo-sched.c (sms_schedule): Start ii value "mii" should + not equal zero. + +2019-04-23 Roman Zhuykov <zhroma@ispras.ru> + + PR rtl-optimization/84032 + * modulo-sched.c (ps_insn_find_column): Change condition so that + branch will always be the last insn in a row inside partial + schedule. + +2019-04-23 Richard Biener <rguenther@suse.de> + + PR debug/90131 + * tree-cfgcleanup.c (move_debug_stmts_from_forwarder): Add + dest_single_pred_p argument. + (remove_forwarder_block): Adjust. + (remove_forwarder_block_with_phi): Likewise. + +2019-04-23 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> + Bernd Edlinger <bernd.edlinger@hotmail.de> + Jakub Jelinek <jakub@redhat.com> + + PR target/89093 + * config/arm/arm.c (aapcs_vfp_is_call_or_return_candidate): Diagnose + if used with general-regs-only. + (arm_conditional_register_usage): Don't add non-general regs if + general-regs-only. + (arm_valid_target_attribute_rec): Handle general-regs-only. + * config/arm/arm.h (TARGET_HARD_FLOAT): Return false if + general-regs-only. + (TARGET_HARD_FLOAT_SUB): Define. + (TARGET_SOFT_FLOAT): Define as negation of TARGET_HARD_FLOAT_SUB. + (TARGET_REALLY_IWMMXT): Add && !TARGET_GENERAL_REGS_ONLY. + (TARGET_REALLY_IWMMXT2): Likewise. + * config/arm/arm.opt: Add -mgeneral-regs-only. + * doc/extend.texi: Document ARM general-regs-only target. + * doc/invoke.texi: Document ARM -mgeneral-regs-only. + +2019-04-23 Bin Cheng <bin.cheng@linux.alibaba.com> + + PR tree-optimization/90078 + * tree-ssa-loop-ivopts.c (comp_cost::operator +,-,+=,-+,/=,*=): Add + checks for infinite_cost overflow. + +2019-04-23 Bin Cheng <bin.cheng@linux.alibaba.com> + + PR tree-optimization/90021 + * tree-chrec.c (evolution_function_is_univariate_p): New parameter + and check univariate against it. + * tree-chrec.h (evolution_function_is_univariate_p): New parameter. + * tree-data-ref.c (add_other_self_distances): Pass new argument. + +2019-04-21 H.J. Lu <hongjiu.lu@intel.com> + + PR target/90178 + Revert: + 2018-11-21 Uros Bizjak <ubizjak@gmail.com> + + Revert the revert: + 2013-10-26 Vladimir Makarov <vmakarov@redhat.com> + + Revert: + 2013-10-25 Vladimir Makarov <vmakarov@redhat.com> + + * lra-spills.c (lra_final_code_change): Remove useless move insns. + +2019-04-21 Iain Sandoe <iain@sandoe.co.uk> + + * config/rs6000/rs6000.md (group_end_nop): Emit insn register + names using operand format, rather than hard-wired. + (speculation_barrier): Likewise. + +2019-04-19 Segher Boessenkool <segher@kernel.crashing.org> + + PR tree-optimization/88055 + * tree-call-cdce.c (comparison_code_if_no_nans): New function. + (gen_one_condition): Use it if !HONOR_NANS. + +2019-04-19 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/90139 + * tree-outof-ssa.c (get_temp_reg): If reg_mode is BLKmode, return + assign_temp instead of gen_reg_rtx. + +2019-04-19 Christophe Lyon <christophe.lyon@linaro.org> + + PR translation/90118 + * config/aarch64/aarch64.c (aarch64_override_options_internal): + Add missing space before %<. + +2019-04-18 Peter Bergner <bergner@linux.ibm.com> + + PR rtl-optimization/87871 + * ira-lives.c (make_object_dead): Don't add conflicts to + TOTAL_CONFLICT_HARD_REGS for register ignore_reg_for_conflicts. + +2019-04-18 Martin Sebor <msebor@redhat.com> + + PR middle-end/89797 + * tree.h (TYPE_VECTOR_SUBPARTS): Use HOST_WIDE_INT_1U. + * config/aarch64/aarch64.c (aarch64_simd_vector_alignment): Avoid + assuming type size fits in SHWI. + +2019-04-18 Jan Hubicka <hubicka@ucw.cz> + + PR ipa/85051 + * ipa-inline.c (flatten_function): New parameter UPDATE. + (ipa_inline, early_inliner): Use it. + +2019-04-18 Richard Sandiford <richard.sandiford@arm.com> + + * fold-const.c (int_const_binop): Return early on failure. + +2019-04-18 Richard Sandiford <richard.sandiford@arm.com> + + PR middle-end/85164 + * combine.c (force_int_to_mode): Cast the argument rather than + the result of known_alignment. + * rtlanal.c (rtx_addr_can_trap_p_1): Use known_subrange_p. + +2019-04-18 Richard Biener <rguenther@suse.de> + + PR debug/90131 + * tree-cfgcleanup.c (move_debug_stmts_from_forwarder): Split + out from ... + (remove_forwarder_block): ... here. + (remove_forwarder_block_with_phi): Also move debug stmts here. + +2019-04-18 Jakub Jelinek <jakub@redhat.com> + + PR translation/79183 + * gimple-ssa-sprintf.c (format_directive): Use inform_n instead of + inform where appropriate. + +2019-04-18 Richard Biener <rguenther@suse.de> + + * tree.c (get_qualified_type): Put found type variants at the + head of the variant list. + +2018-04-17 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/rs6000.c (rs6000_register_move_cost): Fix typo. + +2019-04-17 Hongtao Liu <hongtao.liu@intel.com> + + PR target/90125 + * config/i386/avx512fintrin.h (_mm_maskz_fmadd_round_sd, + _mm_maskz_fmadd_round_ss, _mm_maskz_fmsub_round_sd, + _mm_maskz_fmsub_round_ss, _mm_maskz_fnmadd_round_sd, + _mm_maskz_fnmadd_round_ss, _mm_maskz_fnmsub_round_sd, + _mm_maskz_fnmsub_round_ss): Use _maskz builtin instead of _mask3. + +2019-04-17 Peter Bergner <bergner@linux.ibm.com> + + * ira-conflicts.c (print_allocno_conflicts): Always print something, + even for allocno's with no conflicts. + (print_conflicts): Print an extra newline. + +2019-04-17 Segher Boessenkool <segher@kernel.crashing.org> + + * auto-inc-dec.c (attempt_change): Set the alignment of the + temporary memory to that of the original. + +2019-04-17 Joao Moreira <jmoreira@suse.de> + + * targhooks.c (default_print_patchable_function_entry): Emit + __patchable_function_entries section with writable flags to allow + relocation resolution. + +2019-04-17 Jonny Grant <jg@jguk.org> + + * collect2.c (main): Change gcc.gnu.org URL to HTTPS. + +2019-04-17 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/90095 + * internal-fn.c (expand_mul_overflow): Don't set SUBREG_PROMOTED_VAR_P + on lowpart SUBREGs. + +2019-04-17 Claudiu Zissulescu <claziss@synopsys.com> + + * config/arc/arc.c (arc_init): Format diagnostic string. + (arc_override_options): Likewise. + (check_if_valid_regno_const): Likewise. + (arc_reorg): Likewise. + +2019-04-17 Segher Boessenkool <segher@kernel.crashing.org> + + PR target/17108 + * config/rs6000/rs6000.c (rs6000_split_multireg_move): Adjust pattern + name. + (rs6000_emit_allocate_stack_1): Simplify condition. Adjust pattern + name. + * config/rs6000/rs6000.md (bits): Add entries for SF and DF. + (*movdi_update1): Use Pmode. + (movdi_<mode>_update): Fix argument to avoiding_indexed_address_p. + (movdi_<mode>_update_stack): Rename to ... + (movdi_update_stack): ... this. Fix comment. Change condition. Don't + use Pmode. + (*movsi_update1): Use Pmode. + (*movsi_update2): Use Pmode. + (movsi_update): Rename to ... + (movsi_<mode>_update): ... this. Use Pmode. + (movsi_update_stack): Fix condition. + (*movhi_update1): Use Pmode. Fix argument to + avoiding_indexed_address_p. + (*movhi_update2): Ditto. + (*movhi_update3): Ditto. + (*movhi_update4): Ditto. + (*movqi_update1): Ditto. + (*movqi_update2): Ditto. + (*movqi_update3): Ditto. + (*movsf_update1, *movdf_update1): Merge, rename to... + (*mov<mode>_update1): This. Use Pmode. Fix argument to + avoiding_indexed_address_p. Add "size" attribute. + (*movsf_update2, *movdf_update2): Merge, rename to... + (*mov<mode>_update2): This. Ditto. + (*movsf_update3): Use Pmode. Fix argument to + avoiding_indexed_address_p. + (*movsf_update4): Ditto. + (allocate_stack): Simplify condition. Adjust pattern names. + +2019-04-17 Jakub Jelinek <jakub@redhat.com> + + PR target/89093 + * config/arm/arm.c (arm_valid_target_attribute_rec): Don't skip + whitespace at the start of target attribute string. + +2019-04-16 Pat Haugen <pthaugen@us.ibm.com> + + PR target/84369 + * config/rs6000/power9.md: Add store forwarding bypass. + +2019-04-16 Alexandre Oliva <aoliva@redhat.com> + + PR debug/89528 + * valtrack.c (dead_debug_insert_temp): Reset debug references + to the return value of a call being removed. + +2019-04-16 Claudiu Zissulescu <claziss@synopsys.com> + + * config/arc/arc-protos.h (arc_register_move_cost): Remove. + * config/arc/arc.c (arc_register_move_cost): Re-purpose it to + implement target hook. + (arc_memory_move_cost): New function. + (TARGET_REGISTER_MOVE_COST): Define. + (TARGET_MEMORY_MOVE_COST): Likewise. + * config/arc/arc.h (REGISTER_MOVE_COST): Remove. + (MEMORY_MOVE_COST): Likewise. + +2019-04-16 Claudiu Zissulescu <claziss@synopsys.com> + + * config/arc/arc.md (sibcall_insn): Use Rcd constraint. + (sibcall_value_insn): Likewise. + * config/arc/constraints.md (Rs5): Remove. + +2019-04-16 Claudiu Zissulescu <claziss@synopsys.com> + + * config/arc/arc.c (arc_hard_regno_modes): Add two missing modes + for last two fake registers. + (arc_conditional_register_usage): Make sure fake frame and arg + pointer regs are in general regs class. + (FRAME_POINTER_MASK): Remove. + (RETURN_ADDR_MASK): Remove. + (arc_must_save_register): Use hard frame regnum. + (frame_restore_reg): Use hard_frame_pointer_rtx. + (arc_save_callee_saves): Likewise. + (arc_restore_callee_saves): Likewise. + (arc_save_callee_enter): Likewise. + (arc_restore_callee_leave): Likewise. + (arc_save_callee_milli): Likewise. + (arc_eh_return_address_location): Likewise. + (arc_check_multi): Use hard frame regnum. + (arc_can_eliminate): Likewise. + * config/arc/arc.h (FIXED_REGISTERS): Make FP register available + for register allocator. + (REG_CLASS_CONTENTS): Update GENERAL_REGS. + (REGNO_OK_FOR_BASE_P): Consider FRAME_POINTER_REGNUM. + (FRAME_POINTER_REGNUM): Change it to a fake register. + (HARD_FRAME_POINTER_REGNUM): Defined. + (ARG_POINTER_REGNUM): Change it to a new fake register. + (ELIMINABLE_REGS): Update. + (REGISTER_NAMES): Update names. + * config/arc/arc.md (LP_START): Remove. + (LP_END): Likewise. + (shift_si3_loop): Update pattern. + +2019-04-16 Claudiu Zissulescu <claziss@synopsys.com> + + * config/arc/arc.c (arc_expand_prologue): Emit blockage regardless + to avoid delay slot scheduling. + (arc_must_save_register): Don't save SP. + * config/arc/arc.md (stack_tie): Remove. + (UNSPEC_ARC_STKTIE): Likewise. + +2019-04-16 Kito Cheng <kito.cheng@gmail.com> + Shiva Chen <shiva0217@gmail.com> + + * config/nds32/nds32-md-auxiliary.c (nds32_split_ashiftdi3): Fix wrong + code gen with large shift amount. + +2019-04-16 Chung-Ju Wu <jasonwucj@gmail.com> + + * config/nds32/nds32-pipelines-auxiliary.c (wext_odd_dep_p): Handle + subreg. + +2019-04-16 Jakub Jelinek <jakub@redhat.com> + + PR target/90096 + * config/i386/i386.c (ix86_target_string): Add ADD_ABI_P argument, only + print -m64/-mx32/-m32 if it is true. + (ix86_debug_options, ix86_function_specific_print): Pass true as + ADD_ABI_P to ix86_target_string. + (ix86_expand_builtin): Adjust ix86_target_string caller, pass true as + ADD_ABI_P only if OPTION_MASK_ISA_64BIT is set in bisa and in that case + or into it OPTION_MASK_ISA_ABI_64 or OPTION_MASK_ISA_ABI_X32. + + PR rtl-optimization/90082 + * dce.c (can_delete_call): New function. + (deletable_insn_p, mark_insn): Use it. + + PR tree-optimization/90090 + * tree-ssa-math-opts.c (is_division_by): Ignore divisions that can + throw internally. + (is_division_by_square): Likewise. Formatting fix. + +2019-04-16 Richard Biener <rguenther@suse.de> + + PR tree-optimization/56049 + * tree-ssa-loop-im.c (mem_ref_hasher::equal): Elide alias-set + equality check if alias-set zero will prevail. + +2019-04-15 Jeff Law <law@redhat.com> + + * config/microblaze/microblaze.c (microblaze_expand_block_move): Treat + size and alignment as unsigned. + +2019-04-15 Richard Biener <rguenther@suse.de> + + PR debug/90074 + * tree-loop-distribution.c (destroy_loop): Preserve correct + debug info. + +2019-04-15 Richard Biener <rguenther@suse.de> + + PR tree-optimization/90071 + * tree-ssa-reassoc.c (init_range_entry): Do not pick up + abnormal operands from def stmts. + +2019-04-15 Segher Boessenkool <segher@kernel.crashing.org> + + PR rtl-optimization/89794 + * combine.c (count_auto_inc): New function. + (try_combine): Count how many auto_inc expressions there were in the + original instructions. Ensure we have the same number in the new + instructions. Remove the code that tried to ensure auto_inc side + effects on i1 and i0 are not lost. + +2019-04-15 Richard Biener <rguenther@suse.de> + + PR ipa/88936 + * tree.h (auto_var_p): Declare. + * tree.c (auto_var_p): New function, split out from ... + (auto_var_in_fn_p): ... here. + * tree-ssa-structalias.c (struct variable_info): Add shadow_var_uid + member. + (new_var_info): Initialize it. + (set_uids_in_ptset): Also set the shadow variable uid if required. + (ipa_pta_execute): Postprocess points-to solutions assigning + shadow variable uids for locals that may reach their containing + function recursively. + * tree-ssa-ccp.c (fold_builtin_alloca_with_align): Do not + assert but instead check whether the points-to solution is + a singleton. + +2019-04-15 Martin Jambor <mjambor@suse.cz> + + PR ipa/pr89693 + * cgraph.c (clone_of_p): Loop over clone chain for each step in + the thunk chain. + +2019-04-15 Monk Chiang <sh.chiang04@gmail.com> + + * config.gcc (nds32*-*-linux*): Set gcc_cv_initfini_array to yes. + +2019-04-15 Monk Chiang <sh.chiang04@gmail.com> + Kito Cheng <kito.cheng@gmail.com> + Shiva Chen <shiva0217@gmail.com> + + * config/nds32/nds32-md-auxiliary.c + (nds32_legitimize_pic_address): Use new PIC pattern. + (nds32_legitimize_tls_address): Use new TLS pattern. + (nds32_output_symrel): New. + * config/nds32/nds32-protos.h (nds32_output_symrel): Declare. + (nds32_alloc_relax_group_id): Ditto. + * config/nds32/nds32-relax-opt.c (nds32_alloc_relax_group_id): New. + (nds32_group_insns): Use nds32_alloc_relax_group_id instead of use + relax_group_id. + (nds32_group_tls_insn): Ditto. + (nds32_group_float_insns): Ditto. + * config/nds32/nds32.md (tls_le): New. + (sym_got): Ditto. + +2019-04-15 Chung-Ju Wu <jasonwucj@gmail.com> + + * configure: Add nds32 target for dwarf2 debug_line checking. + * configure.ac: Regenerated. + +2019-04-14 Jan Hubicka <hubicka@ucw.cz> + + PR lto/89358 + * ipa-devirt.c (skip_in_fields_list_p): New. + (odr_types_equivalent_p): Use it. + +2019-04-13 Jakub Jelinek <jakub@redhat.com> + + PR target/89093 + * config/arm/arm.c (arm_valid_target_attribute_rec): Use strcmp + instead of strncmp when checking for thumb and arm. Formatting fixes. + +2019-04-12 Iain Buclaw <ibuclaw@gdcproject.org> + + * doc/install.texi: Document --with-target-system-zlib. + +2019-04-12 Martin Sebor <msebor@redhat.com> + + PR c/88383 + PR c/89288 + PR c/89798 + PR c/89797 + * targhooks.c (default_vector_alignment): Avoid assuming + argument fits in SHWI. + * tree.h (TYPE_VECTOR_SUBPARTS): Avoid sign overflow in + a shift expression. + * doc/extend.texi (__builtin_has_attribute): Add a clarifying note. + +2019-04-12 Jakub Jelinek <jakub@redhat.com> + + PR rtl-optimization/89965 + * dce.c: Include rtl-iter.h. + (struct check_argument_load_data): New type. + (check_argument_load): New function. + (find_call_stack_args): Check for loads from stack slots still tracked + in sp_bytes and punt if any is found. + + * config/mips/loongson-mmiintrin.h: Fix up #error message. + +2019-04-12 Jan Hubicka <hubicka@ucw.cz> + + * params.def (PARAM_MAX_LTO_STREAMING_PARALLELISM): New parameter. + * doc/invoke.texi (max-lto-streaming-paralellism): New --param. + +2019-04-12 Martin Liska <mliska@suse.cz> + + PR middle-end/89970 + * multiple_target.c (create_dispatcher_calls): Wrap ifunc + in error message. + (separate_attrs): Handle multiple 'default's. + (expand_target_clones): Rework error handling code. + +2019-04-12 Kelvin Nilsen <kelvin@gcc.gnu.org> + + PR target/87532 + * config/rs6000/rs6000.c (rs6000_split_vec_extract_var): Use inner + mode of vector rather than mode of destination for move instruction. + * config/rs6000/vsx.md (*vsx_extract_<mode>_<VS_scalar>mode_var): + Use QI inner mode with V16QI vector mode. + +2019-04-12 Jakub Jelinek <jakub@redhat.com> + + PR target/52726 + * config/tilepro/tilepro.c (tilepro_print_operand): Use just + "invalid %%t operand" in output_operand_lossage message. + +2019-04-12 Andreas Krebbel <krebbel@linux.ibm.com> + + * config/s390/predicates.md (permute_pattern_operand): New + predicate. + * config/s390/vector.md ("*vec_splats_bswap_vec<mode>"): Add USE + operand for the permute pattern. + ("*vec_perm<mode>"): New insn definition. + ("bswap<mode>"): Generate the permute pattern operand in the + expander and perform the operand reloads for pre arch13 level + already. + ("*bswap<mode>_emu"): Rename to ... + ("*bswap<mode>"): ... this. And make the splitter vxe2 only. + * config/s390/vx-builtins.md ("*vec_insert_and_zero_bswap<mode>"): + Add the USE operand for the permute pattern. + ("*vec_set_bswap_vec<mode>"): Likewise. + +2019-04-12 Jakub Jelinek <jakub@redhat.com> + + PR c/89946 + * varasm.c (assemble_start_function): Don't use tree_fits_uhwi_p + and gcc_unreachable if it fails, just call tree_to_uhwi which + verifies that too. Test TREE_CHAIN instead of list_length > 1. + Start warning message with a lower-case letter. Formatting fixes. + + PR rtl-optimization/90026 + * cfgcleanup.c (try_optimize_cfg): When removing empty bb with no + successors, look for BARRIERs inside of the whole BB_FOOTER chain + rather than just at the start of it. If e->src BB_FOOTER is not NULL + in cfglayout mode, use emit_barrier_after_bb. + +2018-04-11 Steve Ellcey <sellcey@marvell.com> + + PR rtl-optimization/87763 + * config/aarch64/aarch64.md (*aarch64_bfi<GPI:mode>4_noshift_alt): + New Instruction. + +2019-04-11 Tom de Vries <tdevries@suse.de> + + * doc/extend.texi (@node Statement Exprs): Note variable shadowing at + max macro using statement expression. + +2019-04-11 David Edelsohn <dje.gcc@gmail.com> + + * xcoffout.h (xcoff_private_rodata_section_name): Declare. + * xcoffout.c (xcoff_private_rodata_section_name): Define. + * config/rs6000/rs6000.c (rs6000_xcoff_asm_init_sections): Create + read_only_private_data_section using xcoff_private_rodata_section_name. + (rs6000_xcoff_file_start): Generate xcoff_private_rodata_section_name. + +2019-04-11 Christophe Lyon <christophe.lyon@linaro.org> + + PR target/90016 + * config/aarch64/aarch64.opt (msve-vector-bits): Add missing final '.'. + +2019-04-11 Jakub Jelinek <jakub@redhat.com> + + PR rtl-optimization/89965 + * dce.c (sp_based_mem_offset): New function. + (find_call_stack_args): Use sp_based_mem_offset. + +2019-04-11 Jonathan Wakely <jwakely@redhat.com> + + * doc/invoke.texi (Optimize Options): Clarify -flive-patching docs. + +2019-04-11 Richard Biener <rguenther@suse.de> + + PR tree-optimization/90020 + * tree-ssa-sccvn.c (vn_reference_may_trap): New function. + * tree-ssa-sccvn.h (vn_reference_may_trap): Declare. + * tree-ssa-pre.c (compute_avail): Use it to not put + possibly trapping references after a call that might not + return into EXP_GEN. + * gcse.c (compute_hash_table_work): Do not elide + marking a block containing a call if the call might not + return. + +2019-04-11 Richard Biener <rguenther@suse.de> + + PR tree-optimization/90018 + * tree-vect-data-refs.c (vect_preserves_scalar_order_p): + Test both SLP and interleaving variants. + +2019-04-11 Robin Dapp <rdapp@linux.ibm.com> + + * config/s390/8561.md: New file. + * config/s390/driver-native.c (s390_host_detect_local_cpu): + Add arch13 cpu model. + * config/s390/s390-opts.h (enum processor_type): Likewise. + * config/s390/s390.c (s390_get_sched_attrmask): Add arch13. + (s390_get_unit_mask): Likewise. + (s390_is_fpd): Likewise. + (s390_is_fxd): Likewise. + * config/s390/s390.h (s390_tune_attr): Likewise. + * config/s390/s390.md: Include arch13 pipeline description. + * config/s390/s390.opt: Add arch13. + +2018-04-10 Steve Ellcey <sellcey@marvell.com> + + PR rtl-optimization/87763 + * config/aarch64/aarch64-protos.h (aarch64_masks_and_shift_for_bfi_p): + New prototype. + * config/aarch64/aarch64.c (aarch64_masks_and_shift_for_bfi_p): + New function. + * config/aarch64/aarch64.md (*aarch64_bfi<GPI:mode>5_shift): + New instruction. + (*aarch64_bfi<GPI:mode>5_shift_alt): Ditto. + (*aarch64_bfi<GPI:mode>4_noand): Ditto. + (*aarch64_bfi<GPI:mode>4_noand_alt): Ditto. + (*aarch64_bfi<GPI:mode>4_noshift): Ditto. + +2019-04-10 Jonathan Wakely <jwakely@redhat.com> + + * doc/invoke.texi (Optimize Options): Change "Nevertheless" to + "Although" in -fipa-icf documentation. + + * doc/invoke.texi (Debugging Options): Explicitly state the semantics + of using multiple -g options. + +2019-04-10 Martin Liska <mliska@suse.cz> + + PR gcov-profile/89959 + * doc/gcov.texi: Make documentation of -x option + more precise. + +2019-04-10 Richard Biener <rguenther@suse.de> + + * tree-vectorizer.h (_stmt_vec_info): Remove same_dr_stmt + member. + (DR_GROUP_SAME_DR_STMT): Remove. + * tree-vect-stmts.c (vectorizable_load): Remove unreachable code. + * tree-vect-data-refs.c (vect_analyze_group_access_1): Likewise, + replace with assert. + (vect_analyze_data_ref_accesses): Fix INTEGER_CST comparison. + (vect_record_grouped_load_vectors): Remove unreachable code. + +2019-04-10 Richard Earnshaw <rearnsha@arm.com> + + PR target/90016 + * config/aarch64/aarch64.opt (msve-vector-bits): Remove redundant and + obsolete reference to N. + +2019-04-10 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/90025 + * expr.c (store_expr): Set properly size on the MEM passed to + clear_storage. + + PR c++/90010 + * gimple-ssa-sprintf.c (target_to_host): Fix handling of targstr + with strlen in between hostsz-3 and hostsz-1 inclusive when no + translation is needed, and when translation is needed, only append + ... if the string length is hostsz or more bytes long. Avoid using + strncpy or strcat. + +2019-04-09 Matthew Malcomson <matthew.malcomson@arm.com> + + PR target/90024 + * config/arm/arm.c (neon_valid_immediate): Disallow VOIDmode parameter. + * config/arm/constraints.md (Dm, DN, Dn): Split previous Dn constraint + into three. + * config/arm/neon.md (*neon_mov<mode>): Account for TImode and DImode + differences directly. + (*smax<mode>3_neon, vashl<mode>3, vashr<mode>3_imm): Use Dm constraint. + +2019-04-09 Jakub Jelinek <jakub@redhat.com> + + PR translation/90011 + * ipa-devirt.c (compare_virtual_tables): Remove two trailing spaces + from diagnostics. + * config/arm/freebsd.h (LINK_SPEC): Remove trailing space from -p + diagnostics. + * config/riscv/freebsd.h (LINK_SPEC): Likewise. + * config/aarch64/aarch64-freebsd.h (FBSD_TARGET_LINK_SPEC): Likewise. + * config/darwin.h (DRIVER_SELF_SPECS, ASM_FINAL_SPEC): Remove + trailing space from -gsplit-dwarf diagnostics. + + PR tree-optimization/89998 + * gimple-ssa-sprintf.c (try_substitute_return_value): Use lhs type + instead of integer_type_node if possible, don't add ranges if return + type is not compatible with int. + * gimple-fold.c (gimple_fold_builtin_sprintf, + gimple_fold_builtin_snprintf): Use lhs type instead of hardcoded + integer_type_node. + +2019-04-09 Martin Liska <mliska@suse.cz> + + * Makefile.in: Use GENERATOR_CFLAGS for all generators. + * doc/install.texi: Document the new config. + +2019-04-09 Richard Sandiford <richard.sandiford@arm.com> + + * tree-vect-data-refs.c (vect_get_smallest_scalar_type): Always + use gimple_expr_type for load and store calls. Skip over the + condition argument in a conditional internal function. + Protect use of TREE_INT_CST_LOW. + +2019-04-09 Jakub Jelinek <jakub@redhat.com> + + PR target/90015 + * config/riscv/riscv.c (riscv_get_interrupt_type): Fix comment typo. + (riscv_merge_decl_attributes): Fix typo in diagnostics. Remove + trailing period from it too. + +2019-04-08 wu yuan <wuyuan5@huawei.com> + + * config/aarch64/aarch64-cores.def (tsv1100): Change scheduling model. + * config/aarch64/aarch64.md: Add "tsv110.md". + * config/aarch64/tsv110.md: New file. + +2019-04-08 Richard Biener <rguenther@suse.de> + + PR tree-optimization/90006 + * tree-vect-data-refs.c (vect_get_smallest_scalar_type): Handle + calls like lrint. + +2019-04-08 Andrea Corallo <andrea.corallo@arm.com> + + PR target/83033 + * config/aarch64/cortex-a57-fma-steering.c (fma_forest): Prohibit copy + construction. + (fma_root_node): Likewise. + (func_fma_steering): Likewise. + +2019-04-08 Jakub Jelinek <jakub@redhat.com> + + PR rtl-optimization/89865 + * config/i386/i386.md: Add peepholes for z = x; x ^= y; x != z. + + PR rtl-optimization/89865 + * config/i386/i386.md + (SWI12 peephole for mem {+,-,&,|,^}= x; mem != 0): Fix up operand + numbers not to clash with the additional operands[4]. + (peepholes for mem {+,-,&,|,^}= x; mem != 0): New peephole2s + with extra register copy in the middle. + +2019-04-08 Martin Liska <mliska@suse.cz> + + PR gcov-profile/89961 + * doc/gcov.texi: Document data_file. + * gcov.c (generate_results): Add data_info into JSON output. + +2019-04-01 Bin Cheng <bin.cheng@linux.alibaba.com> + + PR tree-optimization/89725 + * tree-chrec.c (chrec_contains_symbols): New parameter. Handle outer + loop's chrec as invariant symbol. + * tree-chrec.h (chrec_contains_symbols): New parameter. + * tree-data-ref.c (analyze_miv_subscript): Pass new argument. + (build_classic_dist_vector_1, add_other_self_distances): Bypass access + function of loops not in DDR's loop_nest. + * tree-data-ref.h (index_in_loop_nest): Add unreachable check. + +2019-04-08 Chenghua Xu <paul.hua.gm@gmail.com> + + PR target/89623 + * config/mips/mips.opt (LOONGSON_EXT2): Use Var instead of + Mask. + +2019-04-07 Uroš Bizjak <ubizjak@gmail.com> + + PR target/89945 + * config/i386/i386.md (anddi_1 to andsi_1_zext splitter): + Avoid calling gen_lowpart with SYMBOL_REF and LABEL_REF operand. + +2019-04-05 Joern Rennecke <joern.rennecke@embecosm.com> + + * sched-deps.c (sched_macro_fuse_insns): Check return value of + targetm.fixed_condition_code_regs. + +2019-04-05 Richard Biener <rguenther@suse.de> + + PR debug/89892 + PR debug/89905 + * tree-cfgcleanup.c (remove_forwarder_block): Always move + debug bind stmts but reset them if they are not valid at the + destination. + +2019-04-05 Martin Liska <mliska@suse.cz> + + PR translation/89936 + * collect-utils.c (collect_execute): Use %< and %>, or %qs in + order to wrap keywords or arguments. + * collect2.c (main): Likewise. + (scan_prog_file): Likewise. + (scan_libraries): Likewise. + * common/config/riscv/riscv-common.c + (riscv_subset_list::parsing_subset_version): Likewise. + (riscv_subset_list::parse_std_ext): Likewise. + * config/aarch64/aarch64.c (aarch64_override_options_internal): + Likewise. + * config/arm/arm.c (arm_option_override): Likewise. + * config/cris/cris.c (cris_print_operand): Likewise. + * config/darwin-c.c (darwin_pragma_options): Likewise. + (darwin_pragma_unused): Likewise. + (darwin_pragma_ms_struct): Likewise. + * config/ft32/ft32.c (ft32_print_operand): Likewise. + * config/i386/i386.c (print_reg): Likewise. + (ix86_print_operand): Likewise. + * config/i386/xm-djgpp.h: Likewise. + * config/iq2000/iq2000.c (iq2000_print_operand): Likewise. + * config/m32c/m32c.c (m32c_option_override): Likewise. + * config/msp430/msp430.c (msp430_option_override): Likewise. + * config/nds32/nds32.c (nds32_option_override): Likewise. + * config/nvptx/mkoffload.c (main): Likewise. + * config/rx/rx.c (rx_print_operand): Likewise. + (valid_psw_flag): Likewise. + * config/vms/vms-c.c (vms_pragma_member_alignment): Likewise. + (vms_pragma_nomember_alignment): Likewise. + (vms_pragma_extern_model): Likewise. + * lto-wrapper.c (compile_offload_image): Likewise. + * omp-offload.c (oacc_parse_default_dims): Likewise. + * symtab.c (symtab_node::verify_base): Likewise. + * tlink.c (recompile_files): Likewise. + (start_tweaking): Likewise. + * tree-profile.c (parse_profile_filter): Likewise. + +2019-04-05 Richard Sandiford <richard.sandiford@arm.com> + + PR tree-optimization/89956 + * tree-ssa-math-opts.c (convert_mult_to_fma): Protect against + multiple negates of the same value. + +2019-04-04 Martin Sebor <msebor@redhat.com> + + PR middle-end/89957 + PR middle-end/89911 + * builtins.c (expand_builtin_strnlen): Make sure wi::ltu_p operands + have the same precision since the function crashes otherwise. + * calls.c (maybe_warn_nonstring_arg): Avoid assuming strnlen() call + has non-zero arguments. + +2019-04-04 Martin Sebor <msebor@redhat.com> + + PR middle-end/89934 + * gimple-ssa-warn-restrict.c (builtin_access::builtin_access): Bail + out if the number of arguments is less than expected. + +2019-04-04 Jeff Law <law@redhat.com> + + PR rtl-optimization/89399 + * ree.c (combine_set_extension): Use single_set rather than + digging into PATTERN for items on the candidate list. + (combine_reaching_defs): Likewise. + +2019-04-04 Richard Sandiford <richard.sandiford@arm.com> + + PR rtl-optimization/46590 + * loop-invariant.c (find_defs): Move df_remove_problem and + df_process_deferred_rescans to move_invariants. + Move df_live_add_problem and df_live_set_all_dirty calls + to move_invariants. + (move_invariants): Likewise. + (move_loop_invariants): Likewise, making the df_live calls + conditional on -O. Remove the problem again if we added it + locally. + +2019-04-03 qing zhao <qing.zhao@oracle.com> + + PR tree-optimization/89730 + * ipa-inline.c (can_inline_edge_p): Delete the checking for + -flive-patching=inline-only-static. + (can_inline_edge_by_limits_p): Add the checking for + -flive-patching=inline-only-static and grant always_inline + even when -flive-patching=inline-only-static is specified. + +2019-04-03 Jeff Law <law@redhat.com> + + PR rtl-optimization/81025 + * reorg.c (skip_consecutive_labels): Do not skip past a BARRIER. + +2019-04-03 Richard Biener <rguenther@suse.de> + + PR tree-optimization/84101 + * tree-vect-stmts.c: Include explow.h for hard_function_value, + regs.h for hard_regno_nregs. + (cfun_returns): New helper. + (vect_model_store_cost): When vectorizing a store to a decl + we return and the function ABI returns in a multi-reg location + account for the possible spilling that will happen. + +2019-04-03 Andreas Krebbel <krebbel@linux.ibm.com> + + * config/s390/s390.c (s390_legitimate_address_p): Reject long + displacement addresses for vector mode operands. + +2019-04-03 Claudiu Zissulescu <claziss@synopsys.com> + + * config/arc/arc.c (GMASK_LEN): Define. + (arc_restore_callee_saves): Restore first blink when + !optimize_size. + +2019-04-03 Sudakshina Das <sudi.das@arm.com> + + * doc/extend.texi: Add deprecated comment on sign-return-address + function attribute and add mbranch-protection. + * doc/invoke.texi: Add bti to the options for mbranch-protection. + +2019-04-03 Richard Biener <rguenther@suse.de> + + PR lto/89896 + * lto-wrapper.c (run_gcc): Avoid implicit rules making + the all target phony. + +2019-04-02 Uroš Bizjak <ubizjak@gmail.com> + + PR target/89902 + PR target/89903 + * config/i386/i386.c (dimode_scalar_to_vector_candidate_p): + Return false for variable DImode shifts. + (dimode_scalar_chain::compute_convert_gain): Do not handle + register count operand in variable DImode shifts. + (dimode_scalar_chain::make_vector_copies): Remove support to copy + count argument of a variable shift instruction to a vector register. + (dimode_scalar_chain::convert_reg): Remove support to convert + count argument of a variable shift instruction. + +2019-04-02 Andrey Belevantsev <abel@ispras.ru> + + PR rtl-optimization/84206 + * sel-sched-ir.h (get_all_loop_exits): Avoid the outer loop when + iterating over loop headers. + +2019-04-02 Andrey Belevantsev <abel@ispras.ru> + + PR rtl-optimization/85876 + * sel-sched.c (code_motion_path_driver): Avoid unwinding first_insn + beyond the original fence. + +2019-04-02 Ulrich Weigand <uweigand@de.ibm.com> + + * config.gcc: Mark spu* targets as deprecated/obsolete. + +2019-04-02 Andreas Krebbel <krebbel@linux.ibm.com> + + * config/s390/s390-builtin-types.def: New builtin function type + definitions. Remove unused types. + * config/s390/s390-builtins.def (s390_vcdgb, s390_vcdlgb) + (s390_vcgdb, s390_vclgdb): Remove low-level builtin definitions. + (s390_vec_float, s390_vec_signed, s390_vec_unsigned): New + overloaded builtins. + (s390_vcefb, s390_vcdgb, s390_vcelfb, s390_vcdlgb, s390_vcfeb) + (s390_vcgdb, s390_vclfeb, s390_vclgdb): New low-level builtins. + * config/s390/vecintrin.h (vec_float): New builtin macro definition. + (vec_double, vec_signed, vec_unsigned): Define to use the new + overloaded builtins. + * config/s390/vx-builtins.md ("vec_double_s64", "vec_double_u64"): + Remove expanders. + +2019-04-02 Andreas Krebbel <krebbel@linux.ibm.com> + + * config/s390/s390-builtin-types.def: New builtin function type + definitions. + * config/s390/s390-builtins.def (s390_vec_search_string_cc) + (s390_vec_search_string_until_zero_cc): New overloaded builtins. + (s390_vstrsb, s390_vstrsh, s390_vstrsf, s390_vstrszb) + (s390_vstrszh, s390_vstrszf): New low-level builtins. + * config/s390/s390.md (UNSPEC_VEC_VSTRS, UNSPEC_VEC_VSTRSCC): New + constant definitions. + * config/s390/vecintrin.h (vec_search_string_cc) + (vec_search_string_until_zero_cc): New builtin name definitions. + * config/s390/vx-builtins.md ("vstrs<mode>", "vstrsz<mode>"): New + expanders. + ("vec_vstrs<mode>"): New insn definition. + +2019-04-02 Andreas Krebbel <krebbel@linux.ibm.com> + + * config/s390/s390-builtin-types.def: Add new builtin function + types. + * config/s390/s390-builtins.def (s390_vec_sldb, s390_vec_srdb): + New overloaded builtins. + (s390_vec_sldb, s390_vec_srdb): New low-level builtins. and + s390_vsrd. + * config/s390/s390.md (UNSPEC_VEC_SLDB): Rename to ... + (UNSPEC_VEC_SLDBYTE): ... this. + (UNSPEC_VEC_SLDBIT, UNSPEC_VEC_SRDBIT): New constant definitions. + * config/s390/vecintrin.h (vec_sldb, vec_srdb): New builtin name + definitions. + * config/s390/vx-builtins.md ("vec_sld<mode>", "vec_sldw<mode>"): + Rename UNSPEC_VEC_SLDB to UNSPEC_VEC_SLDBYTE. + ("vec_sldb<mode>", "vec_srdb<mode>"): New insn definitions. + +2019-04-02 Andreas Krebbel <krebbel@linux.ibm.com> + + ("*vec_splats_bswap_vec<mode>", "*vec_splats_bswap_elem<mode>"): + New insn definition. + * config/s390/vx-builtins.md (V_HW_HSD): Move to ... + * config/s390/vector.md (V_HW_HSD): ... here. + +2019-04-02 Andreas Krebbel <krebbel@linux.ibm.com> + + * config/s390/vecintrin.h: Map vec_vster low-level builtins to vec_vler. + * config/s390/vx-builtins.md ("*vec_insert_and_zero_bswap<mode>") + ("*vec_set_bswap_elem<mode>", "*vec_set_bswap_vec<mode>") + ("*vec_extract_bswap_vec<mode>", "*vec_extract_bswap_elem<mode>"): + New insn definitions. + +2019-04-02 Andreas Krebbel <krebbel@linux.ibm.com> + + * config/s390/s390-builtin-types.def: Add new builtin function type. + * config/s390/s390-builtins.def: Add overloaded builtin + s390_vec_reve and low-level builtins for s390_vler and s390_vster. + * config/s390/s390.md (UNSPEC_VEC_ELTSWAP): New constant definition. + * config/s390/vecintrin.h (vec_reve): New builtin name definition. + * config/s390/vx-builtins.md (V_HW_HSD): New mode iterator. + ("eltswap<mode>"): New expander. + ("*eltswapv16qi", "*eltswap<mode>", "*eltswap<mode>_emu"): New + insn definitions. + +2019-04-02 Andreas Krebbel <krebbel@linux.ibm.com> + + * config/s390/s390-builtin-types.def: Add new builtin function types. + * config/s390/s390-builtins.def: Add overloaded builtin + s390_vec_revb. Add low-level builtins for vlbr and vstbr + instructions. + * config/s390/vecintrin.h (vec_revb): New builtin name definition. + * config/s390/vector.md (VT_HW_HSDT): New mode iterator. + ("bswap<mode>"): New expander. + ("*bswap<mode>", "*bswap<mode>_emu"): New insn definitions. + +2019-04-02 Andreas Krebbel <krebbel@linux.ibm.com> + + * config/s390/s390-builtins.def (B_VXE2): New builtin flag definition. + * config/s390/s390-c.c (s390_cpu_cpp_builtins_internal): Increment + vector builtin version number in __VEC__. + +2019-04-02 Andreas Krebbel <krebbel@linux.ibm.com> + + * config/s390/s390.md (VX_CONV_BFP, VX_CONV_INT): New mode + iterators. + (SFSI): New mode attribute. + ("*fixuns_truncdfdi2_vx", "*fix_truncdfdi2_bfp_z13") + ("*floatunsdidf2_z13", ): Add support for 32 bit conversions and + rename to ... + ("*fixuns_trunc<VX_CONV_BFP:mode><VX_CONV_INT:mode>2_z13") + ("*fix_trunc<VX_CONV_BFP:mode><VX_CONV_INT:mode>2_bfp_z13") + ("*floatuns<VX_CONV_INT:mode><VX_CONV_BFP:mode>2_z13"): ... these. + ("floatsi<mode>2"): Add wcefb instruction. + +2019-04-02 Andreas Krebbel <krebbel@linux.ibm.com> + + * config/s390/s390.md ("xde"): Extend mode attribute to vector types. + * config/s390/vector.md (VX_VEC_CONV_BFP, VX_VEC_CONV_INT): New + mode iterators. + ("floatv2div2df2", "floatunsv2div2df2", "fix_truncv2dfv2di2") + ("fixuns_truncv2dfv2di2"): Enhance with mode iterator to also + support 32 bit fp-int conversions. Rename to ... + ("float<VX_VEC_CONV_INT:mode><VX_VEC_CONV_BFP:mode>2") + ("floatuns<VX_VEC_CONV_INT:mode><VX_VEC_CONV_BFP:mode>2") + ("fix_trunc<VX_VEC_CONV_BFP:mode><VX_VEC_CONV_INT:mode>2") + ("fixuns_trunc<VX_VEC_CONV_BFP:mode><VX_VEC_CONV_INT:mode>2"): + ... to these. + +2019-04-02 Andreas Krebbel <krebbel@linux.ibm.com> + + * config/s390/s390.c (s390_rtx_costs): Do not add extra costs for + if-then-else constructs if we can use the select instruction. + * config/s390/s390.md ("*mov<mode>cc"): Add the new instructions. + +2019-04-02 Andreas Krebbel <krebbel@linux.ibm.com> + + * config/s390/s390.md ("*popcountdi_arch13_cc") + ("*popcountdi_arch13_cconly", "*popcountdi_arch13"): New insn + definition. + ("*popcount<mode>", "popcountdi2", "popcountsi2", "popcounthi2"): + Append _z196 to make it ... + ("*popcount<mode>_z196", "popcountdi2_z196", "popcountsi2_z196") + ("popcounthi2_z196"): ... this. + ("popcountdi2_z196"): Remove TARGET_64BIT from the insn condition. + ("popcountdi2", "popcountsi2", "popcounthi2"): New expanders. + +2019-04-02 Andreas Krebbel <krebbel@linux.ibm.com> + + * config/s390/s390.c (s390_canonicalize_comparison): Convert + certain compares for arch13 in order to make use of the condition + code result produced by the new instructions. + (s390_rtx_costs): Adjust the costs for nnrk, nngrk, nork, nogrk, + nxrk, and nxgrk instruction patterns. + * config/s390/s390.md (ANDOR, bitops_name, inv_bitops_name) + (inv_no): Add new code iterator together with some attributes. + ("*andc_split_<mode>"): Disable splitter for arch13. + ("*<ANDOR:bitops_name>c<GPR:mode>_cc") + ("*<ANDOR:bitops_name>c<GPR:mode>_cconly") + ("*<ANDOR:bitops_name>c<GPR:mode>") + ("*n<ANDOR:inv_bitops_name><GPR:mode>_cc") + ("*n<ANDOR:inv_bitops_name><mode>_cconly") + ("*n<ANDOR:inv_bitops_name><mode>", "*nxor<GPR:mode>_cc") + ("*nxor<mode>_cconly", "*nxor<mode>"): New insn definitions. + +2019-04-02 Andreas Krebbel <krebbel@linux.ibm.com> + + * common/config/s390/s390-common.c (processor_flags_table): New + entry for arch13. + * config.gcc: Support arch13 with the --with-arch= configure flag. + * config/s390/driver-native.c (s390_host_detect_local_cpu): + * config/s390/s390-opts.h (enum processor_type): Add PROCESSOR_ARCH13. + * config/s390/s390.c (s390_get_sched_attrmask) + (s390_get_unit_mask): Add PROCESSOR_ARCH13. + * config/s390/s390.h (enum processor_flags): Add PF_VXE2 and PF_ARCH13. + * config/s390/s390.md (TARGET_CPU_ARCH13, TARGET_CPU_ARCH13_P) + (TARGET_CPU_VXE2, TARGET_CPU_VXE2_P, TARGET_ARCH13) + (TARGET_ARCH13_P, TARGET_VXE2, TARGET_VXE2_P): New macro + definitions. + * config/s390/s390.opt: Support arch13 as processor type in + command line options. + +2019-04-02 Martin Liska <mliska@suse.cz> + + PR translation/89912 + * params.def (PARAM_GRAPHITE_MAX_ARRAYS_PER_SCOP): + Fix param description of graphite-max-arrays-per-scop. + +2019-04-02 Eric Botcazou <ebotcazou@adacore.com> + + * config/sparc/linux64.h (ASAN_REJECT_SPEC): New macro. + (ASAN_CC1_SPEC): Use it in 64-bit mode. + * config/sparc/sol2.h (ASAN_REJECT_SPEC): Remove superfluous colon. + +2019-04-01 Andrey Belevantsev <abel@ispras.ru> + + PR rtl-optimization/85412 + * sel-sched.c (sel_sched_region): Assign reset_sched_cycles_p before + sel_sched_region_1, not after. + +2019-04-01 Andrey Belevantsev <abel@ispras.ru> + + PR rtl-optimization/86928 + * sel-sched-ir.c (sel_redirect_edge_and_branch_force): Invoke + compute_live if necessary. + (sel_redirect_edge_and_branch): Likewise. + +2019-04-01 Vladimir Makarov <vmakarov@redhat.com> + + PR rtl-optimization/89865 + * ira-costs.c (process_bb_node_for_hard_reg_moves): Skip hard + register if it is a part of small class. + +2019-04-01 Andrey Belevantsev <abel@ispras.ru> + + PR rtl-optimization/87273 + * sel-sched-ir.c (merge_fences): Remove assert. + +2019-04-01 Richard Biener <rguenther@suse.de> + + PR tree-optimization/46590 + * domwalk.h (dom_walker::dom_walker): Consolidate constructors. + (dom_walker::m_reachability): Add in place of... + (dom_walker::m_skip_unreachable_blocks): ...this. + * domwalk.c (dom_walker::dom_walker): Consoliate constructors. + Move complex initialization ... + (dom_walker::walk): Here. Especially compute m_bb_to_rpo + lazily and initialize edge flags on each invocation. + (dom_walker::bb_reachable): Use m_reachability. + +2019-04-01 Martin Liska <mliska@suse.cz> + + PR driver/89861 + * opt-suggestions.c (option_proposer::build_option_suggestions): + Add variant without any argument in order to provide better + hints. + +2019-04-01 Richard Biener <rguenther@suse.de> + + PR c/71598 + * gimple.c: Include langhooks.h. + (gimple_get_alias_set): Treat enumeral types as the underlying + integer type. + +2019-03-29 Kugan Vivekanandarajah <kuganv@linaro.org> + Eric Botcazou <ebotcazou@adacore.com> + + PR rtl-optimization/89862 + * rtl.h (word_register_operation_p): Exclude CONST_INT from operations + that operates on the full registers for WORD_REGISTER_OPERATIONS + architectures. + +2019-03-29 Jim Wilson <jimw@sifive.com> + + * common/config/riscv/riscv-common.c (riscv_parse_arch_string): + Clear MASK_RVC and then set if C subset supported. + +2019-03-29 Jakub Jelinek <jakub@redhat.com> + + PR c/89872 + * gimplify.c (gimplify_compound_literal_expr): Don't optimize a + non-addressable complit into its initializer if it is volatile. + +2019-03-29 Roman Zhuykov <zhroma@ispras.ru> + + * opts-common.c (integral_argument): Set errno properly in one case. + +2019-03-29 Martin Liska <mliska@suse.cz> + + * doc/invoke.texi: Remove -Wchkp from documentation. + +2019-03-29 Martin Liska <mliska@suse.cz> + + * dbgcnt.c (print_limit_reach): New function. + (dbg_cnt): Use it. + +2019-03-29 Martin Liska <mliska@suse.cz> + + * dbgcnt.c (dbg_cnt_process_single_pair): Fix GNU coding style. + (dbg_cnt_process_opt): Parse first tokens aas + dbg_cnt_process_single_pair is also using strtok. + +2019-03-29 Jakub Jelinek <jakub@redhat.com> + + PR rtl-optimization/87485 + * function.c (expand_function_end): Move stack_protect_epilogue + before loading of return value into hard register(s). + +2019-03-28 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/89621 + * tree-inline.h (struct copy_body_data): Add + dont_remap_vla_if_no_change flag. + * tree-inline.c (remap_type_3, remap_type_2): New functions. + (remap_type): Don't remap vla types if id->dont_remap_vla_if_no_change + and remap_type_2 returns false. + * omp-low.c (new_omp_context): Set ctx->cb.dont_remap_vla_if_no_change. + Move ctx->cb.adjust_array_error_bounds setting to the outermost ctx + only from where it is copied to nested contexts. + +2019-03-28 Uroš Bizjak <ubizjak@gmail.com> + + PR target/89865 + * config/i386/i386.md (RMW operation with LEA peephole): + Use LEAMODE mode attribute instead of SWI mode iterator for + LEA pattern. + +2019-03-28 Uroš Bizjak <ubizjak@gmail.com> + + PR target/89848 + * config/i386/i386.c (dimode_scalar_chain::make_vector_copies): + Also process XEXP (src, 0) of a shift insn. + +2019-03-28 David Malcolm <dmalcolm@redhat.com> + + PR middle-end/89725 + * optinfo-emit-json.cc (optrecord_json_writer::optinfo_to_json): + Use DECL_ASSEMBLER_NAME rather than get_fnname_from_decl. + +2019-03-28 Jakub Jelinek <jakub@redhat.com> + + * regcprop.c (copyprop_hardreg_forward_1): Remove redundant INSN_P + test. + (cprop_hardreg_bb, cprop_hardreg_debug): New functions. + (pass_cprop_hardreg::execute): Use those. Don't repeat bb processing + immediately after first one with df_analyze in between, but rather + process all bbs, queueing ones that need second pass in a worklist, + df_analyze, process queued debug insn changes and if second pass is + needed, process bbs from worklist, df_analyze, process queued debug + insns again. + + * rtl.h (NONDEBUG_INSN_P): Define as NONJUMP_INSN_P or JUMP_P + or CALL_P instead of INSN_P && !DEBUG_INSN_P. + (INSN_P): Define using NONDEBUG_INSN_P or DEBUG_INSN_P. + +2019-03-28 Jonathan Wakely <jwakely@redhat.com> + + PR c/79022 + * gengtype.h (create_nested_ptr_option): Fix parameter names to match + definition. + +2019-03-27 Mateusz B <mateuszb@poczta.onet.pl> + + PR target/85667 + * config/i386/i386.c (ix86_function_value_1): Call the newly added + function for 32-bit MS_ABI. + (function_value_ms_32): New function. + +2019-03-27 Andrew Stubbs <ams@codesourcery.com> + + * config/gcn/gcn.md (CC_SAVE_REG): New constant. + (movdi): Call gen_movdi_symbol_save_scc. + (gen_movdi_symbol_save_scc): New insn and split. + +2019-03-27 Peter Bergner <bergner@linux.ibm.com> + + PR rtl-optimization/89313 + * function.c (matching_constraint_num): New static function. + (match_asm_constraints_1): Use it. Fixup white space and comment. + Don't replace inputs with non-matching constraints which conflict + with early clobber outputs. + +2019-03-27 Jeff Law <law@redhat.com> + + PR rtl-optimization/87761 + PR rtl-optimization/89826 + * regcprop.c (copyprop_hardreg_forward_1): Move may_trap_p test + slightly later. + (pass_cprop_hardreg::execute): Call df_analyze after adding the + note problem to get REG_DEAD/REG_UNUSED notes updated. + +2019-03-27 Richard Biener <rguenther@suse.de> + + PR tree-optimization/89463 + * tree-ssa-dce.c (remove_dead_stmt): Take output vector to + queue edges to remove. + (eliminate_unnecessary_stmts): Remove dead PHIs alongside + dead stmts. Delay edge removal until PHIs are removed to + make debug-stmt creation not confused by seemingly degenerate + PHIs. + +2019-03-27 Alan Modra <amodra@gmail.com> + + * config/rs6000/rs6000.h: Rename NON_SPECIAL_REGS to GEN_OR_FLOAT_REGS + throughout file. + * config/rs6000/darwin.h: Likewise. + * config/rs6000/rs6000.c: Likewise. + +2019-03-27 Alan Modra <amodra@gmail.com> + + * config/rs6000/rs6000.c (rs6000_init_hard_regno_mode_ok): Always + assign rs6000_hard_regno_mode_ok_p[m][r]. Formatting. + +2019-03-26 Andrew Waterman <andrew@sifive.com> + Jim Wilson <jimw@sifive.com> + + * config/riscv/generic.md (generic_alu, generic_load, generic_store) + (generic_xfer, generic_branch, generic_imul, generic_idivsi) + (generic_idivdi, generic_fmul_single, generic_fmul_double) + (generic_fdiv, generic_fsqrt): Add check for generic tune. + (generic_alu): Add auipc to type list. + * config/riscv/riscv-opts.h (enum riscv_microarchitecture_type): New. + (riscv_microarchitecture): Declare. + * config/riscv/riscv-protos.h (riscv_store_data_bypass_p): Declare. + * config/riscv/riscv.c (struct riscv_cpu_info): Add microarchitecture + field. + (riscv_microarchitecture): New. + (sifive_7_tune_info): New. + (riscv_cpu_info_table): Add microarchitecture value for rocket and + size. Add sifive-3-series, sifive-5-series, and sifive-7-series + entries. + (riscv_store_data_bypass_p): New. + (riscv_option_override): Set riscv_microarchitecture from + cpu->microarchitecture. + * config/riscv/riscv.md: Include sifive-7.md. + (type): Add auipc. + (tune): New. + (auipc<mode>): Change type to auipc. + (restore_stack_nonlocal): New. + * config/riscv/sifive-7.md: New. + * doc/invoke.texi (RISC-V Options): Update mtune docs. + +2019-03-26 Uroš Bizjak <ubizjak@gmail.com> + + PR target/89827 + * config/i386/i386.c (dimode_scalar_chain::convert_reg): + Also process XEXP (src, 0) of a shift insn. + +2019-03-26 Richard Biener <rguenther@suse.de> + + * tree-inline.c (remap_gimple_stmt): Cache gimple_block. + (copy_debug_stmt): Likewise. + (expand_call_inline): Likewise. + (copy_bb): Avoid redundant lookup & set of gimple_block. + * gimple-low.c (lower_gimple_return): Likewise. + (lower_builtin_setjmp): Likewise. + +2019-03-26 Jakub Jelinek <jakub@redhat.com> + + * hash-table.h (hash_table::m_gather_mem_stats): If GATHER_STATISTICS + is constant 0, turn into static const data member initialized to false. + (hash_table::hash_table): Only initialize m_gather_mem_stats #if + GATHER_STATISTICS. Add ATTRIBUTE_UNUSED to gather_mem_stats param. + +2019-03-26 Jason Merrill <jason@redhat.com> + Jakub Jelinek <jakub@redhat.com> + + * mem-stats.h (mem_alloc_description::unregister_descriptor): New + method. + (mem_alloc_description::release_object_overhead): Fix comment typos. + * hash-table.h (hash_table::~hash_table): Call + release_instance_overhead only if m_entries is non-NULL, otherwise + call unregister_descriptor. + +2019-03-26 Bin Cheng <bin.cheng@linux.alibaba.com> + + PR tree-optimization/81740 + * tree-vect-data-refs.c (vect_analyze_data_ref_dependence): + In case of outer loop vectorization, check for backward dependence + at the inner loop if outer loop dependence is reversed. + +2019-03-26 Alan Modra <amodra@gmail.com> + + * config/rs6000/rs6000.c (rs6000_init_hard_regno_mode_ok): Correct + rs6000_vector_mem init. Correct wI and wJ comment. + +2019-03-25 Alexander Monakov <amonakov@ispras.ru> + + PR rtl-optimization/88347 + PR rtl-optimization/88423 + * sched-deps.c (sched_analyze_insn): Take into account that for + tablejumps the barrier appears after a label and a jump_table_data. + +2019-03-25 Martin Sebor <msebor@redhat.com> + + PR c/89812 + * c-common.c (check_user_alignment): Rename local. Correct maximum + alignment in diagnostic. Avoid assuming argument fits in SHWI, + convert it to UHWI when it fits. + +2019-03-25 Johan Karlsson <johan.karlsson@enea.com> + + PR debug/86964 + * dwarf2out.c (premark_used_variables): New function. + (prune_unused_types_walk): Do not mark not premarked external + variables. + (prune_unused_types): Call premark_used_variables. + +2019-03-25 Vladimir Makarov <vmakarov@redhat.com> + + PR rtl-optimization/89676 + * lra-constraints.c (curr_insn_transform): Do match reload for + early clobbers when the match was successful only for different + registers. + +2019-03-25 Martin Sebor <msebor@redhat.com> + + * doc/extend.texi (Common Type Attributes): Document vector_size. + (Common Variable Attributes): Mention size constraint. Correct + quoting and typos. + (Vector Extensions): Use @dfn when defining bas type. Clarify + base type and size constraints. + +2019-03-25 Richard Biener <rguenther@suse.de> + + PR tree-optimization/89789 + * tree-ssa-sccvn.c (set_ssa_val_to): Do not allow lattice + changes from non-undefined back to undefined. + +2019-03-25 Thomas Otto <thomas.otto@pdv-fs.de> + + * dwarf2out.c (comp_dir_string): cached_wd could be set to both a + heap string and a gc string, but since this variable is unknown to + ggc the gc string might get reused and corrupted. Fixed by always + using a heap string. + +2019-03-25 Richard Biener <rguenther@suse.de> + + PR tree-optimization/89779 + * tree-ssa-loop-ivopts.c (remove_unused_ivs): Return + to remove IV defs, delay actual removal. + (tree_ssa_iv_optimize_loop): Likewise. Avoid SCEV reset. + (tree_ssa_iv_optimize): Remove eliminated IV defs at the + very end, properly also reset loop control IV information. + +2019-03-25 Richard Biener <rguenther@suse.de> + + PR tree-optimization/89802 + * tree-ssa-math-opts.c (convert_mult_to_fma_1): Properly + move EH data to folded stmt. + +2019-03-25 Andreas Krebbel <krebbel@linux.ibm.com> + + * config/s390/s390-builtin-types.def: Remove few unused types and + fix sort order for others. + +2019-03-25 Andreas Krebbel <krebbel@linux.ibm.com> + + * config/s390/s390-c.c (s390_fn_types_compatible): Print the + expected and found types with -mdebug during builtin matching. + +2019-03-25 Richard Biener <rguenther@suse.de> + + PR middle-end/89790 + * fold-const.c (operand_equal_p): Revert last change with + updated comment. + +2019-03-24 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/rs6000.c (rs6000_legitimize_tls_address): Add REG_EQUAL + notes for the result of the __tls_get_addr calls. + * config/rs6000/rs6000.md (unspec UNSPEC_TLS_GET_ADDR): New. + +2019-03-24 Jeff Law <law@redhat.com> + + * config/bfin/bfin.md (movpdi): Fix length for alternative 1. + + PR rtl-optimization/87761 + * regcprop.c (copyprop_hardreg_forward_1): Check may_trap_p on SET, + not INSN. Also check RTX_FRAME_RELATED_P. Queue insns for DF rescan + as needed. + (pass_cprop_hardreg::execute): Add df note problem and defer insn + rescans. Reprocess blocks as needed, calling df_analyze before + reprocessing. Always call df_analyze before fixing up debug bind + insns. + +2019-03-23 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/xmmintrin.h (_mm_movemask_pi8): Implement for 32-bit + big endian. + +2019-03-22 Andrew Pinski <apinski@marvell.com> + + * config/aarch64/aarch64.md (zero_extendsidi2_aarch64): Fix type + attrribute for uxtw. + +2019-03-26 Jeff Law <law@redhat.com> + + PR rtl-optimization/87761 + * config/mips/mips-protos.h (mips_split_move): Add new argument. + (mips_emit_move_or_split): Pass NULL for INSN into mips_split_move. + (mips_split_move): Accept new INSN argument. Try to forward SRC + into the next instruction. + (mips_split_move_insn): Pass INSN through to mips_split_move. + +2019-03-22 Vladimir Makarov <vmakarov@redhat.com> + + PR rtl-optimization/89676 + * lra-constraints.c (curr_insn_transform): Do match reload for + early clobbers even if the match was successful. + +2019-03-22 Jakub Jelinek <jakub@redhat.com> + + PR c++/87481 + * doc/invoke.texi (-fconstexpr-ops-limit=): Document. + +2019-03-22 Bill Schmidt <wschmidt@linux.ibm.com> + + * config/rs6000/mmintrin.h (_mm_sub_pi32): Fix typo. + +2019-03-22 Jakub Jelinek <jakub@redhat.com> + + * config/i386/sse.md (<avx512>_fmadd_<mode>_mask3<round_name>, + <avx512>_fmsub_<mode>_mask3<round_name>, + <avx512>_fnmadd_<mode>_mask3<round_name>, + <avx512>_fnmsub_<mode>_mask3<round_name>, + avx512f_vmfmadd_<mode>_mask3<round_name>, + avx512f_vmfmsub_<mode>_mask3<round_name>, + *avx512f_vmfnmadd_<mode>_mask3<round_name>): Use <round_nimm_predicate> + instead of register_operand and %v instead of v for match_operand 1. + (avx512f_vmfnmsub_<mode>_mask3<round_name>): Rename to ... + (*avx512f_vmfnmsub_<mode>_mask3<round_name>): ... this. Use + <round_nimm_predicate> instead of register_operand and %v instead of v + for match_operand 1. + + * config/i386/sse.md (<avx512>_fmadd_<mode>_mask<round_name>, + <avx512>_fmadd_<mode>_mask3<round_name>, + <avx512>_fmsub_<mode>_mask<round_name>, + <avx512>_fmsub_<mode>_mask3<round_name>, + <avx512>_fnmadd_<mode>_mask<round_name>, + <avx512>_fnmadd_<mode>_mask3<round_name>, + <avx512>_fnmsub_<mode>_mask<round_name>, + <avx512>_fnmsub_<mode>_mask3<round_name>, + <avx512>_fmaddsub_<mode>_mask<round_name>, + <avx512>_fmaddsub_<mode>_mask3<round_name>, + <avx512>_fmsubadd_<mode>_mask<round_name>, + <avx512>_fmsubadd_<mode>_mask3<round_name>): Use + <round_nimm_predicate> instead of nonimmediate_operand. + (fmai_vmfmadd_<mode><round_name>, fmai_vmfmsub_<mode><round_name>, + fmai_vmfnmadd_<mode><round_name>, fmai_vmfnmsub_<mode><round_name>): + Use register_operand instead of <round_nimm_predicate> for the + operand that needs to match output. + (*fmai_fmadd_<mode>, *fmai_fmsub_<mode>, + *fmai_fnmadd_<mode><round_name>, *fmai_fnmsub_<mode><round_name>): + Likewise. Formatting fixes. + + PR target/89784 + * config/i386/i386.c (enum ix86_builtins): Remove + IX86_BUILTIN_VFMSUBSD3_MASK3 and IX86_BUILTIN_VFMSUBSS3_MASK3. + * config/i386/i386-builtin.def (__builtin_ia32_vfmaddsd3_mask, + __builtin_ia32_vfmaddsd3_mask3, __builtin_ia32_vfmaddsd3_maskz, + __builtin_ia32_vfmsubsd3_mask3, __builtin_ia32_vfmaddss3_mask, + __builtin_ia32_vfmaddss3_mask3, __builtin_ia32_vfmaddss3_maskz, + __builtin_ia32_vfmsubss3_mask3): New builtins. + * config/i386/sse.md (avx512f_vmfmadd_<mode>_mask<round_name>, + avx512f_vmfmadd_<mode>_mask3<round_name>, + avx512f_vmfmadd_<mode>_maskz_1<round_name>, + *avx512f_vmfmsub_<mode>_mask<round_name>, + avx512f_vmfmsub_<mode>_mask3<round_name>, + *avx512f_vmfmasub_<mode>_maskz_1<round_name>, + *avx512f_vmfnmadd_<mode>_mask<round_name>, + *avx512f_vmfnmadd_<mode>_mask3<round_name>, + *avx512f_vmfnmadd_<mode>_maskz_1<round_name>, + *avx512f_vmfnmsub_<mode>_mask<round_name>, + avx512f_vmfnmsub_<mode>_mask3<round_name>, + *avx512f_vmfnmsub_<mode>_maskz_1<round_name>): New define_insns. + (avx512f_vmfmadd_<mode>_maskz<round_expand_name>): New define_expand. + * config/i386/avx512fintrin.h (_mm_mask_fmadd_sd, _mm_mask_fmadd_ss, + _mm_mask3_fmadd_sd, _mm_mask3_fmadd_ss, _mm_maskz_fmadd_sd, + _mm_maskz_fmadd_ss, _mm_mask_fmsub_sd, _mm_mask_fmsub_ss, + _mm_mask3_fmsub_sd, _mm_mask3_fmsub_ss, _mm_maskz_fmsub_sd, + _mm_maskz_fmsub_ss, _mm_mask_fnmadd_sd, _mm_mask_fnmadd_ss, + _mm_mask3_fnmadd_sd, _mm_mask3_fnmadd_ss, _mm_maskz_fnmadd_sd, + _mm_maskz_fnmadd_ss, _mm_mask_fnmsub_sd, _mm_mask_fnmsub_ss, + _mm_mask3_fnmsub_sd, _mm_mask3_fnmsub_ss, _mm_maskz_fnmsub_sd, + _mm_maskz_fnmsub_ss, _mm_mask_fmadd_round_sd, _mm_mask_fmadd_round_ss, + _mm_mask3_fmadd_round_sd, _mm_mask3_fmadd_round_ss, + _mm_maskz_fmadd_round_sd, _mm_maskz_fmadd_round_ss, + _mm_mask_fmsub_round_sd, _mm_mask_fmsub_round_ss, + _mm_mask3_fmsub_round_sd, _mm_mask3_fmsub_round_ss, + _mm_maskz_fmsub_round_sd, _mm_maskz_fmsub_round_ss, + _mm_mask_fnmadd_round_sd, _mm_mask_fnmadd_round_ss, + _mm_mask3_fnmadd_round_sd, _mm_mask3_fnmadd_round_ss, + _mm_maskz_fnmadd_round_sd, _mm_maskz_fnmadd_round_ss, + _mm_mask_fnmsub_round_sd, _mm_mask_fnmsub_round_ss, + _mm_mask3_fnmsub_round_sd, _mm_mask3_fnmsub_round_ss, + _mm_maskz_fnmsub_round_sd, _mm_maskz_fnmsub_round_ss): New intrinsics. + +2019-03-21 Martin Sebor <msebor@redhat.com> + + PR tree-optimization/89350 + * builtins.c (compute_objsize): Also ignore offsets whose upper + bound is negative. + * gimple-ssa-warn-restrict.c (builtin_memref): Add new member. + (builtin_memref::builtin_memref): Initialize new member. + Allow EXPR to be null. + (builtin_memref::extend_offset_range): Replace local with a member. + Avoid assuming pointer offsets are unsigned. + (builtin_memref::set_base_and_offset): Determine base object + before computing offset range. + (builtin_access::builtin_access): Handle memset. + (builtin_access::generic_overlap): Replace local with a member. + (builtin_access::strcat_overlap): Same. + (builtin_access::overlap): Same. + (maybe_diag_overlap): Same. + (maybe_diag_access_bounds): Same. + (wrestrict_dom_walker::check_call): Handle memset. + (check_bounds_or_overlap): Same. + +2019-03-21 Jan Hubicka <hubicka@ucw.cz> + Jakub Jelinek <jakub@redhat.com> + + PR lto/89692 + * tree.c (fld_type_variant, fld_incomplete_type_of, + fld_process_array_type): Call fld->pset.add and don't call + add_tree_to_fld_list if it returns true. + (free_lang_data_in_type): Similarly with self-recursive call. Purge + non-marked types from TYPE_NEXT_VARIANT list. + (find_decls_types_r): Call fld_worklist_push for TYPE_CANONICAL (t). + +2019-03-21 Jakub Jelinek <jakub@redhat.com> + + * hash-table.h (hash_table): Add Lazy template parameter defaulted + to false, if true, don't alloc_entries during construction, but defer + it to the first method that needs m_entries allocated. + (hash_table::hash_table, hash_table::~hash_table, + hash_table::alloc_entries, hash_table::find_empty_slot_for_expand, + hash_table::too_empty_p, hash_table::expand, hash_table::empty_slow, + hash_table::clear_slot, hash_table::traverse_noresize, + hash_table::traverse, hash_table::iterator::slide): Adjust all methods. + * hash-set.h (hash_set): Add Lazy template parameter defaulted to + false. + (hash_set::contains): If Lazy is true, use find_slot_with_hash with + NO_INSERT instead of find_with_hash. + (hash_set::traverse, hash_set::iterator, hash_set::iterator::m_iter, + hash_set::m_table): Add Lazy to template params of hash_table. + (gt_ggc_mx, gt_pch_nx): Use false as Lazy in hash_set template param. + * attribs.c (test_attribute_exclusions): Likewise. + * hash-set-tests.c (test_set_of_strings): Add iterator tests for + hash_set. Add tests for hash_set with Lazy = true. + +2019-03-21 Richard Biener <rguenther@suse.de> + + PR tree-optimization/89779 + * tree.c (tree_nop_conversion): Consolidate and fix defensive + checks with respect to released SSA names now having error_mark_node + type. + * fold-const.c (operand_equal_p): Likewise. + +2019-03-20 Andreas Krebbel <krebbel@linux.ibm.com> + + PR target/89775 + * config/s390/s390.c (global_not_special_regno_p): Move to make it + available to ... + (s390_optimize_register_info): Use global_not_special_regno_p to + check for global regs. + +2019-03-20 Jakub Jelinek <jakub@redhat.com> + + PR target/89752 + * lra-constraints.c (process_alt_operands) <reg>: For BLKmode, don't + update this_alternative nor this_alternative_set. + +2019-03-19 Jim Wilson <jimw@sifive.com> + + PR target/89411 + * config/riscv/riscv.c (riscv_valid_lo_sum_p): New arg x. New locals + align, size, offset. Use them to handle a BLKmode reference. Update + comment. + (riscv_classify_address): Pass info->offset to riscv_valid_lo_sum_p. + +2019-03-19 Jakub Jelinek <jakub@redhat.com> + + PR rtl-optimization/89768 + * loop-unroll.c (unroll_loop_constant_iterations): Use gen_int_mode + instead of GEN_INT. + (unroll_loop_runtime_iterations): Likewise. + +2019-03-19 Martin Sebor <msebor@redhat.com> + + PR tree-optimization/89644 + * tree-ssa-strlen.c (handle_builtin_stxncpy): Use full_string_p + rather than endptr as an indicator of nul-termination. + + PR tree-optimization/89644 + * tree-ssa-strlen.c (handle_builtin_stxncpy): Consider unterminated + arrays in determining sequence sizes in strncpy and stpncpy. + +2019-03-19 Martin Liska <mliska@suse.cz> + + PR middle-end/89737 + * predict.c (combine_predictions_for_bb): Empty likely_edges and + unlikely_edges if there's an edge that belongs to both these sets. + +2018-03-19 Segher Boessenkool <segher@kernel.crashing.org> + + PR target/89746 + * config/rs6000/rs6000.md (fix_trunc<mode>si2_stfiwx): If we have a + non-TARGET_MFCRF target, and the dest is memory but not 32-bit aligned, + go via a stack temporary. + +2019-03-19 Jakub Jelinek <jakub@redhat.com> + + PR target/89378 + * config/mips/mips.c (mips_expand_vec_cond_expr): Use gen_lowpart + instead of gen_rtx_SUBREG. + * config/mips/mips-msa.md (vec_extract<mode><unitmode>): Likewise. + +2019-03-19 Richard Biener <rguenther@suse.de> + + PR debug/88389 + * opts.c (finish_options): Disable -gsplit-dwarf when doing LTO. + +2019-03-19 Jan Hubicka <hubicka@ucw.cz> + + PR lto/87809 + PR lto/89335 + * tree.c (free_lang_data_in_decl): Do not free context of C++ + destrutors. + +2019-03-19 Jakub Jelinek <jakub@redhat.com> + + PR target/89506 + * config/arm/arm.md (cmpsi2_addneg): Swap the alternatives and use + subs for the first alternative except when operands[3] is 1. + + PR target/89752 + * gimplify.c (gimplify_asm_expr): For output argument with + TREE_ADDRESSABLE type, clear allows_reg if it allows memory, otherwise + diagnose error. + +2019-03-19 Eric Botcazou <ebotcazou@adacore.com> + + PR rtl-optimization/89753 + * loop-unroll.c (decide_unroll_constant_iterations): Make guard for + explicit unrolling factor even more robust. + +2019-03-19 Jakub Jelinek <jakub@redhat.com> + + PR target/89726 + * config/i386/i386.c (ix86_expand_floorceildf_32): In ceil + compensation use x2 += 1 instead of x2 -= -1 and when honoring + signed zeros, do another copysign after the compensation. + +2019-03-18 Martin Sebor <msebor@redhat.com> + + PR tree-optimization/89720 + * tree-vrp.c (vrp_prop::check_mem_ref): Treat range with max < min + more conservatively, the same as anti-range. + +2019-03-18 Richard Biener <rguenther@suse.de> + + PR middle-end/88945 + * tree-ssanames.c (release_ssa_name_fn): For released SSA names + use a TREE_TYPE of error_mark_node to avoid ICEs when dumping + basic-blocks that are removed. Remove restoring SSA_NAME_VAR. + * tree-outof-ssa.c (eliminate_useless_phis): Remove redundant checking. + +2019-03-18 Andrew Stubbs <ams@codesourcery.com> + + * config/gcn/gcn-run.c (struct output): Make next_output unsigned. + Extend queue to 1024 entries. + Add "consumed" field. + (gomp_print_output): Remove print_index parameter. + Add final parameter. + Change limit to unsigned. + Use consumed field to implement circular buffer. + Detect interrupted print in final pass. + Flush output at the end. + (run): Update gomp_print_output usage. + (main): Initialize kernargs->output_data.consumed. + +2019-03-18 Richard Sandiford <richard.sandiford@arm.com> + + * tree-vect-loop.c (vect_estimate_min_profitable_iters): Fix the + calculation of the minimum number of scalar iterations for + fully-predicated loops. + +2019-03-18 Martin Jambor <mjambor@suse.cz> + + PR tree-optimization/89546 + * tree-sra.c (propagate_subaccesses_across_link): Requeue new_acc if + any propagation to its children took place. + +2019-03-18 Andrew Burgess <andrew.burgess@embecosm.com> + + PR target/89627 + * config/riscv/riscv.c (riscv_pass_fpr_single): Add offset + parameter, and make use of it. + (riscv_get_arg_info): Pass offset to riscv_pass_fpr_single. + +2019-03-18 Claudiu Zissulescu <claziss@synopsys.com> + + * config/arc/arc.opt (mcode-density-frame): Get the inital value + from TARGET_CODE_DENSITY_FRAME_DEFAULT. + * config/arc/elf.h (TARGET_CODE_DENSITY_FRAME_DEFAULT): Define. + * config/arc/linux.h (TARGET_CODE_DENSITY_FRAME_DEFAULT): Define. + * config/arc/arc.md (pop_multi_fp_blink): Adjust constraints to + match what the ops is doing. + (push_multi_fp_blink): Likewise. + * config/arc/arc.c (arc_override_options): Enable enter/leave when + compiling for size and elf target. + (arc_save_callee_enter): Adjust note to match what enter/leave + operation does. + +2019-03-18 Claudiu Zissulescu <claziss@synopsys.com> + + * config/arc/arc.md (tst_movb): Fix constraint. + +2019-03-18 Claudiu Zissulescu <claziss@synopsys.com> + + * config/arc/arc.c (TARGET_HAVE_SPECULATION_SAFE_VALUE): Define. + +2019-03-18 Claudiu Zissulescu <claziss@synopsys.com> + + * config/arc/arc-protos.h (arc_adjust_reg_alloc_order): Declare. + * config/arc/arc.c (arc_conditional_register_usage): Remove all + reg_alloc_order references. + (size_alloc_order): Define. + (arc_adjust_reg_alloc_order): New function. + * config/arc/arc.h (REG_ALLOC_ORDER): Proper define the register + order. + (ADJUST_REG_ALLOC_ORDER): Define. + (HONOR_REG_ALLOC_ORDER): Likewise. + +2019-03-18 Richard Biener <rguenther@suse.de> + + PR target/87561 + * config/i386/i386.c (ix86_add_stmt_cost): Pessimize strided + loads and stores a bit more. + +2019-03-18 Richard Biener <rguenther@suse.de> + + PR target/87561 + * config/i386/i386.c (ix86_add_stmt_cost): Apply strided + load pessimization to stores as well. + +2019-03-18 Andrey Belevantsev <abel@ispras.ru> + + PR middle-end/86979 + * sel-sched.c (compute_av_set_at_bb_end): When we have an ineligible + successor, use NULL as its av set. + +2019-03-15 Segher Boessenkool <segher@kernel.crashing.org> + + PR rtl-optimization/89721 + * lra-constraints (invariant_p): Return false if side_effects_p holds. + +2019-03-15 Kelvin Nilsen <kelvin@gcc.gnu.org> + + PR target/87532 + * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): + When handling vec_extract, use modular arithmetic to allow + constant selectors greater than vector length. + * config/rs6000/rs6000.c (rs6000_expand_vector_extract): Allow + V1TImode vectors to have constant selector values greater than 0. + Use modular arithmetic to compute vector index. + (rs6000_split_vec_extract_var): Use modular arithmetic to compute + index for in-memory vectors. Correct code generation for + in-register vectors. + (altivec_expand_vec_ext_builtin): Use modular arithmetic to + compute index. + +2019-03-15 Alexandre Oliva <aoliva@redhat.com> + + PR c++/88534 + PR c++/88537 + * dwarf2out.c (generic_parameter_die): Follow DECL_INITIAL of + VAR_DECL args. + +2019-03-15 Jakub Jelinek <jakub@redhat.com> + + PR c++/89709 + * tree.c (inchash::add_expr): Strip any location wrappers. + * fold-const.c (operand_equal_p): Move stripping of location wrapper + after hash verification. + + PR debug/89704 + * dwarf2out.c (add_const_value_attribute): Return false for MINUS, + SIGN_EXTEND and ZERO_EXTEND. + +2019-03-14 Jason Merrill <jason@redhat.com> + Jakub Jelinek <jakub@redhat.com> + + * hash-table.h (remove_elt_with_hash): Return if slot is NULL rather + than if is_empty (*slot). + * hash-set-tests.c (test_set_of_strings): Add tests for addition of + existing elt and for elt removal. + * hash-map-tests.c (test_map_of_strings_to_int): Add test for removal + of already removed elt. + +2019-03-15 H.J. Lu <hongjiu.lu@intel.com> + + PR target/89650 + * config/i386/i386.c (remove_partial_avx_dependency): Handle + REG_EH_REGION note. + +2019-03-14 Martin Liska <mliska@suse.cz> + + PR other/89712 + * doc/invoke.texi: Remove -fdump-class-hierarchy option. + +2019-03-14 Richard Biener <rguenther@suse.de> + + PR target/89711 + * config/i386/i386.c (make_resolver_func): Properly set + DECL_CONTEXT on the RESULT_DECL. + * config/rs6000/rs6000.c (make_resolver_func): Likewise. + +2019-03-14 Richard Biener <rguenther@suse.de> + + * gimple-pretty-print.c: Include cfgloop.h. + (dump_gimple_phi): Adjust. + (dump_gimple_bb_header): Dump loop header for GIMPLE. + (pp_cfg_jump): Adjust. + (dump_implicit_edges): Dump fallthru to next block for GIMPLE as well. + * tree-cfg.c (build_gimple_cfg): Remove lower_phi_internal_fn call. + (lower_phi_internal_fn): Remove. + (verify_gimple_call): Remove IFN_PHI special-casing. + (dump_function_to_file): Dump IL state. + * tree-into-ssa.c (rewrite_add_phi_arguments): Revert changes + done to deal with PHI nodes being present in non-SSA state. + +2019-03-14 Jakub Jelinek <jakub@redhat.com> + + PR ipa/89684 + * multiple_target.c (create_dispatcher_calls): Change + references_to_redirect from vector of ipa_ref * to vector of ipa_ref. + In the node->iterate_referring loop, push *ref rather than ref, call + ref->remove_reference () and always pass 0 to iterate_referring. + + PR rtl-optimization/89679 + * expmed.c (expand_mult_const): Don't add a REG_EQUAL note if it + would contain a paradoxical SUBREG. + +2019-03-14 Richard Biener <rguenther@suse.de> + + PR tree-optimization/89710 + * tree-ssa-loop-ch.c (should_duplicate_loop_header_p): Use + safe_dyn_cast. + +2019-03-14 Martin Liska <mliska@suse.cz> + + * coverage.c (coverage_begin_function): Stream also + end_column. + * doc/gcov.texi: Document 2 new fields in JSON file. Improve + documentation about function declaration location. + * gcov-dump.c (tag_function): Print whole range + of function declaration. + * gcov.c (struct function_info): Add end_column field. + (function_info::function_info): Initialize it. + (output_json_intermediate_file): Output {start,end}_column + fields. + (read_graph_file): Read end_column. + +2019-03-14 Richard Biener <rguenther@suse.de> + + PR middle-end/89698 + * fold-const.c (operand_equal_p): For INDIRECT_REF check + that the access types are similar. + +2019-03-14 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/89703 + * tree-ssa-strlen.c (valid_builtin_call): Punt if stmt call types + aren't compatible also with builtin_decl_explicit. Check pure + or non-pure status of BUILT_IN_STR{{,N}CMP,N{LEN,{CAT,CPY}{,_CHK}}} + and BUILT_IN_STPNCPY{,_CHK}. + +2019-03-14 H.J. Lu <hongjiu.lu@intel.com> + + PR target/89523 + * config/i386/i386.c (ix86_print_operand): Handle 'M' to add + addr32 prefix to VSIB address for X32. + * config/i386/sse.md (*avx512pf_gatherpf<mode>sf_mask): Prepend + "%M2" to opcode. + (*avx512pf_gatherpf<mode>df_mask): Likewise. + (*avx512pf_scatterpf<mode>sf_mask): Likewise. + (*avx512pf_scatterpf<mode>df_mask): Likewise. + (*avx2_gathersi<mode>): Prepend "%M3" to opcode. + (*avx2_gathersi<mode>_2): Prepend "%M2" to opcode. + (*avx2_gatherdi<mode>): Prepend "%M3" to opcode. + (*avx2_gatherdi<mode>_2): Prepend "%M2" to opcode. + (*avx2_gatherdi<mode>_3): Prepend "%M3" to opcode. + (*avx2_gatherdi<mode>_4): Prepend "%M2" to opcode.` + (*avx512f_gathersi<mode>): Prepend "%M4" to opcode. + (*avx512f_gathersi<mode>_2): Prepend "%M3" to opcode. + (*avx512f_gatherdi<mode>): Prepend "%M4" to opcode. + (*avx512f_gatherdi<mode>_2): Prepend "%M3" to opcode. + (*avx512f_scattersi<mode>): Prepend "%M0" to opcode. + (*avx512f_scatterdi<mode>): Likewise. + +2019-03-13 Vladimir Makarov <vmakarov@redhat.com> + + PR target/85860 + * lra-constraints.c (inherit_in_ebb): Update + potential_reload_hard_regs along with live_hard_regs. + +2019-03-13 Jakub Jelinek <jakub@redhat.com> + + PR debug/89498 + * dwarf2out.c (size_of_die): For dw_val_class_view_list always use + DWARF_OFFSET_SIZE. + (value_format): For dw_val_class_view_list never use DW_FORM_loclistx. + +2019-03-13 Martin Sebor <msebor@redhat.com> + + PR tree-optimization/89662 + * tree-vrp.c (vrp_prop::check_mem_ref): Avoid assuming every type + has a size. + +2019-03-13 Richard Biener <rguenther@suse.de> + + PR middle-end/89677 + * tree-scalar-evolution.c (simplify_peeled_chrec): Do not + throw FP expressions at tree-affine. + +2019-03-14 Richard Biener <rguenther@suse.de> + + * tree-pretty-print.c (dump_generic_node): For -gimple properly + dump negative integer constants using _Literal (type) -num. + +2019-03-13 Jakub Jelinek <jakub@redhat.com> + + * ipa-param-manipulation.h (struct ipa_parm_adjustment): Remove + nonlocal_value member. + + PR middle-end/88588 + * omp-simd-clone.c (ipa_simd_modify_stmt_ops): Handle PHI args. + (ipa_simd_modify_function_body): Handle PHIs. + +2019-03-12 Robin Dapp <rdapp@linux.ibm.com> + + * config/s390/s390.c (s390_option_override_internal): Use more + aggressive inlining parameters. + +2019-03-12 Robin Dapp <rdapp@linux.ibm.com> + + * config/s390/3906.md: New file. + * config/s390/s390.c (MAX_SCHED_UNITS): Increase. + (LONGRUNNING_THRESHOLD): Remove. + (MAX_SCHED_MIX_SCORE): Decrease. + (MAX_SCHED_MIX_DISTANCE): Decrease. + (s390_bb_fallthru_entry_likely): Assume fallthru for less than likely. + (struct s390_sched_state): New struct to hold scheduling state. + (S390_SCHED_STATE_NORMAL): Remove. + (S390_SCHED_STATE_CRACKED): Remove. + (S390_SCHED_ATTR_MASK_GROUPOFTWO): Add. + (s390_get_sched_attrmask): Use new attribute. + (s390_get_unit_mask): Use new units. + (s390_is_fpd): New function. + (s390_is_fxd): New function. + (s390_is_longrunning): New function. + (s390_sched_score): Use new functions. + (s390_sched_reorder): Likewise. + (s390_sched_variable_issue): Rework and use new functions. + (s390_sched_init): Use new functions. + * config/s390/s390.h (s390_tune_attr): Add z14. + * config/s390/s390.md: Add z14. + +2019-03-12 Robin Dapp <rdapp@linux.ibm.com> + + * config/s390/2964.md: Update pipeline description. + * config/s390/s390.c (MAX_SCHED_UNITS): Increase. + (LONGRUNNING_THRESHOLD): Remove. + (LATENCY_FACTOR): Remove. + (s390_get_unit_mask): Add unit. + (s390_sched_score): Use fxd/fpd. + (s390_sched_variable_issue): Use fxd/fpd. + +2019-03-12 Martin Liska <mliska@suse.cz> + + * config/i386/i386.c: Reword an error message. + +2019-03-12 Martin Jambor <mjambor@suse.cz> + + * cgraph.c (cgraph_node::dump): Dump more info for former thunks, + terminate with newline. + +2019-03-12 Jakub Jelinek <jakub@redhat.com> + + PR target/52726 + * config/s390/s390.md (tabort): Use %wd instead of + HOST_WIDE_INT_PRINT_DEC in error message, reword to avoid two capital + letters and periods. + * config/tilepro/tilepro.c (tilepro_print_operand): Use %wd in + output_operand_lossage instead of HOST_WIDE_INT_PRINT_DEC, replace + 's with %< and %>. + + PR middle-end/89663 + * builtins.c (expand_builtin_int_roundingfn, + expand_builtin_int_roundingfn_2): Return NULL_RTX instead of + gcc_unreachable if validate_arglist fails. + +2019-03-12 Richard Biener <rguenther@suse.de> + + PR tree-optimization/89664 + * tree-ssa-math-opts.c (execute_cse_reciprocals_1): Properly + free the occurance tree after the early out. + +2019-03-11 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/89655 + PR bootstrap/89656 + * vr-values.c (vr_values::update_value_range): If + old_vr->varying_p (), don't update it, make new_vr also VARYING + and return false. + +2019-03-11 Martin Liska <mliska@suse.cz> + + * config/aarch64/aarch64.c (aarch64_override_options_internal): + Fix double string quoting. + +2019-03-11 Martin Liska <mliska@suse.cz> + + * collect-utils.c (collect_wait): Wrap apostrophes + in gcc internal format with %'. + * collect2.c (main): Likewise. + (scan_prog_file): Likewise. + (scan_libraries): Likewise. + * config/i386/i386.c (ix86_expand_call): Likewise. + (ix86_handle_interrupt_attribute): Likewise. + * config/nds32/nds32-intrinsic.c (nds32_expand_builtin_impl): Likewise. + * config/nds32/nds32.c (nds32_insert_attributes): Likewise. + * config/rl78/rl78.c (rl78_handle_saddr_attribute): Likewise. + * lto-wrapper.c (find_crtoffloadtable): Likewise. + * symtab.c (symtab_node::verify_base): Likewise. + * tree-cfg.c (verify_gimple_label): Likewise. + * tree.c (verify_type_variant): Likewise. + +2019-03-11 Martin Liska <mliska@suse.cz> + + * builtins.c (expand_builtin_thread_pointer): Wrap an option name + in a string format message and fix GNU coding style. + (expand_builtin_set_thread_pointer): Likewise. + * common/config/aarch64/aarch64-common.c + (aarch64_rewrite_selected_cpu): Likewise. + * common/config/alpha/alpha-common.c (alpha_handle_option): Likewise. + * common/config/arc/arc-common.c (arc_handle_option): Likewise. + * common/config/arm/arm-common.c (arm_parse_fpu_option): Likewise. + * common/config/bfin/bfin-common.c (bfin_handle_option): Likewise. + * common/config/i386/i386-common.c (ix86_handle_option): Likewise. + * common/config/ia64/ia64-common.c (ia64_handle_option): Likewise. + * common/config/m68k/m68k-common.c (m68k_handle_option): Likewise. + * common/config/msp430/msp430-common.c (msp430_handle_option): Likewise. + * common/config/nds32/nds32-common.c (nds32_handle_option): Likewise. + * common/config/powerpcspe/powerpcspe-common.c (rs6000_handle_option): + Likewise. + * common/config/riscv/riscv-common.c + (riscv_subset_list::parsing_subset_version): Likewise. + (riscv_subset_list::parse_std_ext): Likewise. + (riscv_subset_list::parse_sv_or_non_std_ext): Likewise. + (riscv_subset_list::parse): Likewise. + * common/config/rs6000/rs6000-common.c (rs6000_handle_option): Likewise. + * config/aarch64/aarch64.c (aarch64_parse_one_option_token): Likewise. + (aarch64_override_options_internal): Likewise. + (aarch64_validate_mcpu): Likewise. + (aarch64_validate_march): Likewise. + (aarch64_validate_mtune): Likewise. + (aarch64_override_options): Likewise. + * config/alpha/alpha.c (alpha_option_override): Likewise. + * config/arc/arc.c (arc_init): Likewise. + (parse_mrgf_banked_regs_option): Likewise. + (arc_override_options): Likewise. + (arc_expand_builtin_aligned): Likewise. + * config/arm/arm-builtins.c (arm_expand_neon_builtin): Likewise. + (arm_expand_builtin): Likewise. + * config/arm/arm.c (arm_option_check_internal): Likewise. + (arm_configure_build_target): Likewise. + (arm_option_override): Likewise. + (arm_options_perform_arch_sanity_checks): Likewise. + (arm_handle_cmse_nonsecure_entry): Likewise. + (arm_handle_cmse_nonsecure_call): Likewise. + (arm_tls_referenced_p): Likewise. + (thumb1_expand_prologue): Likewise. + * config/avr/avr.c (avr_option_override): Likewise. + * config/bfin/bfin.c (bfin_option_override): Likewise. + * config/c6x/c6x.c (c6x_option_override): Likewise. + * config/cr16/cr16.c (cr16_override_options): Likewise. + * config/cris/cris.c (cris_option_override): Likewise. + * config/csky/csky.c (csky_handle_isr_attribute): Likewise. + * config/darwin-c.c (macosx_version_as_macro): Likewise. + * config/darwin.c (darwin_override_options): Likewise. + * config/frv/frv.c (frv_expand_builtin): Likewise. + * config/h8300/h8300.c (h8300_option_override): Likewise. + * config/i386/i386.c (parse_mtune_ctrl_str): Likewise. + (ix86_option_override_internal): Likewise. + (warn_once_call_ms2sysv_xlogues): Likewise. + (ix86_expand_prologue): Likewise. + (split_stack_prologue_scratch_regno): Likewise. + (ix86_warn_parameter_passing_abi): Likewise. + * config/ia64/ia64.c (fix_range): Likewise. + * config/m68k/m68k.c (m68k_option_override): Likewise. + * config/microblaze/microblaze.c (microblaze_option_override): Likewise. + * config/mips/mips.c (mips_emit_probe_stack_range): Likewise. + (mips_set_compression_mode): Likewise. + * config/mmix/mmix.c (mmix_option_override): Likewise. + * config/mn10300/mn10300.c (mn10300_option_override): Likewise. + * config/msp430/msp430.c (msp430_option_override): Likewise. + * config/nds32/nds32.c (nds32_option_override): Likewise. + * config/nios2/nios2.c (nios2_custom_check_insns): Likewise. + (nios2_option_override): Likewise. + (nios2_expand_custom_builtin): Likewise. + * config/nvptx/mkoffload.c (main): Likewise. + * config/nvptx/nvptx.c (diagnose_openacc_conflict): Likewise. + * config/pa/pa.c (fix_range): Likewise. + (pa_option_override): Likewise. + * config/riscv/riscv.c (riscv_parse_cpu): Likewise. + (riscv_option_override): Likewise. + * config/rl78/rl78.c (rl78_option_override): Likewise. + * config/rs6000/aix61.h: Likewise. + * config/rs6000/aix71.h: Likewise. + * config/rs6000/aix72.h: Likewise. + * config/rs6000/driver-rs6000.c (elf_platform): Likewise. + * config/rs6000/freebsd64.h: Likewise. + * config/rs6000/linux64.h: Likewise. + * config/rs6000/rs6000.c (rs6000_option_override_internal): Likewise. + (rs6000_expand_zeroop_builtin): Likewise. + (rs6000_expand_mtfsb_builtin): Likewise. + (rs6000_expand_set_fpscr_rn_builtin): Likewise. + (rs6000_expand_set_fpscr_drn_builtin): Likewise. + (rs6000_invalid_builtin): Likewise. + (rs6000_expand_split_stack_prologue): Likewise. + * config/rs6000/rtems.h: Likewise. + * config/rx/rx.c (valid_psw_flag): Likewise. + (rx_expand_builtin): Likewise. + * config/s390/s390-c.c (s390_resolve_overloaded_builtin): Likewise. + * config/s390/s390.c (s390_expand_builtin): Likewise. + (s390_function_profiler): Likewise. + (s390_option_override_internal): Likewise. + (s390_option_override): Likewise. + * config/sh/sh.c (sh_option_override): Likewise. + (sh_builtin_saveregs): Likewise. + (sh_fix_range): Likewise. + * config/sh/vxworks.h: Likewise. + * config/sparc/sparc.c (sparc_option_override): Likewise. + * config/spu/spu.c (spu_option_override): Likewise. + (fix_range): Likewise. + * config/visium/visium.c (visium_option_override): Likewise. + (visium_handle_interrupt_attr): Likewise. + * config/xtensa/xtensa.c (xtensa_option_override): Likewise. + * dbgcnt.c (dbg_cnt_set_limit_by_name): Likewise. + (dbg_cnt_process_opt): Likewise. + * dwarf2out.c (output_dwarf_version): Likewise. + * except.c (expand_eh_return): Likewise. + * gcc.c (defined): Likewise. + (driver_handle_option): Likewise. + (process_command): Likewise. + (compare_files): Likewise. + (driver::prepare_infiles): Likewise. + (driver::do_spec_on_infiles): Likewise. + (driver::maybe_run_linker): Likewise. + * omp-offload.c (oacc_parse_default_dims): Likewise. + * opts-global.c (handle_common_deferred_options): Likewise. + * opts.c (parse_sanitizer_options): Likewise. + (common_handle_option): Likewise. + (enable_warning_as_error): Likewise. + * passes.c (enable_disable_pass): Likewise. + * plugin.c (parse_plugin_arg_opt): Likewise. + (default_plugin_dir_name): Likewise. + * targhooks.c (default_expand_builtin_saveregs): Likewise. + (default_pch_valid_p): Likewise. + * toplev.c (init_asm_output): Likewise. + (process_options): Likewise. + (toplev::run_self_tests): Likewise. + * tree-cfg.c (verify_gimple_call): Likewise. + * tree-inline.c (inline_forbidden_p_stmt): Likewise. + (tree_inlinable_function_p): Likewise. + * var-tracking.c (vt_find_locations): Likewise. + +2019-03-11 Andreas Krebbel <krebbel@linux.ibm.com> + + * config/s390/s390.c (s390_expand_builtin): Do the copy_to_reg not + only on the else branch. + +2019-03-11 Martin Liska <mliska@suse.cz> + + * gcov.c (output_intermediate_json_line): Print function + name of each line. + (output_json_intermediate_file): Add new argument. + * doc/gcov.texi: Document the change. + +2019-03-11 Eric Botcazou <ebotcazou@adacore.com> + + PR rtl-optimization/89588 + * loop-unroll.c (decide_unroll_constant_iterations): Make guard for + explicit unrolling factor more robust. + +2019-03-11 Richard Biener <rguenther@suse.de> + + PR tree-optimization/89649 + * tree-vectorizer.h (vect_loop_versioning): Adjust prototype. + * tree-vect-loop-manip.c (vect_do_peeling): Unset force_vectorize + on the prolog and epilog loops. + (vect_loop_versioning): Return copy of loop. + * tree-vect-loop.c (vect_transform_loop): Unset force_vectorize + on the non-vectorized version of the loop. + +2019-03-10 Uroš Bizjak <ubizjak@gmail.com> + + PR target/68924 + * config/i386/sse.md (*vec_extractv2di_0_sse): + Add (=r,x) alternative and corresponding splitter. + +2019-03-10 Martin Jambor <mjambor@suse.cz> + + PR tree-optimization/85762 + PR tree-optimization/87008 + PR tree-optimization/85459 + * tree-sra.c (contains_vce_or_bfcref_p): New parameter, set the bool + it points to if there is a type changing MEM_REF. Adjust all callers. + (build_accesses_from_assign): Disable total scalarization if + contains_vce_or_bfcref_p returns true through the new parameter, for + both rhs and lhs. + +2019-03-09 Jakub Jelinek <jakub@redhat.com> + + PR c/88568 + * attribs.c (handle_dll_attribute): Don't clear TREE_STATIC for + dllimport on VAR_DECLs with RECORD_TYPE or UNION_TYPE DECL_CONTEXT. + + PR target/79645 + * common.opt (fdiagnostics-show-labels, + fdiagnostics-show-line-numbers, fdiagnostics-format=, + fdiagnostics-minimum-margin-width=, fgnat-encodings=, gas-loc-support, + gas-locview-support, ginline-points, ginternal-reset-location-views): + Terminate description text with a dot. + * config/microblaze/microblaze.opt (mxl-prefetch): Likewise. + * config/mcore/mcore.opt (m210, m340): Likewise. + * config/epiphany/epiphany.opt (mprefer-short-insn-regs, mcmove, + mnops=): Start description text with a capital letter. + * config/arc/arc.opt (msize-level=): Likewise. + * config/sh/sh.opt (minline-ic_invalidate): Likewise. + * config/rs6000/sysv4.opt (mno-toc, mtoc, mno-traceback, mshlib, + mnewlib): Likewise. + * config/ft32/ft32.opt (msim): Likewise. + (mft32b, mcompress): Likewise. Terminate description text with a dot. + (mnodiv, mnopm): Terminate description text with a dot. + * config/c6x/c6x.opt (c6x_sdata): Terminate Enum description with + a colon. + * config/i386/i386.opt (prefer_vector_width, instrument_return): + Likewise. + * config/rx/rx.opt (nofpu): Remove trailing spaces from description + text. + + PR rtl-optimization/89634 + * cfgcleanup.c (thread_jump): Punt if registers mentioned in cond1 + are modified in BB_END (e->src) instruction. + +2019-03-08 David Malcolm <dmalcolm@redhat.com> + + PR target/79926 + * config/i386/i386.c (ix86_set_current_function): Make "sorry" + messages more amenable to translation, and improve wording. + +2019-03-08 Bill Schmidt <wschmidt@linux.ibm.com> + + * config/rs6000/rs6000-p8swap.c (rs6000_analyze_swaps): Rebuild + ud- and du-chains between phases. + +2019-03-08 Richard Sandiford <richard.sandiford@arm.com> + + PR debug/89631 + * dwarf2cfi.c (dwarf2out_frame_debug_expr): Use CONST_POLY_INT + instead of POLY_INT_CST. + +2019-03-08 Andre Vieira <andre.simoesdiasvieira@arm.com> + + * config/arm/arm.h (TARGET_FP16_TO_DOUBLE): Add TARGET_VFP_DOUBLE + requirement. + +2019-03-08 Uroš Bizjak <ubizjak@gmail.com> + + PR target/68924 + PR target/78782 + PR target/87558 + * config/i386/emmintrin.h (_mm_loadu_si64): New intrinsic. + (_mm_storeu_si64): Ditto. + +2019-03-08 Martin Liska <mliska@suse.cz> + + PR target/86952 + * config/i386/i386.c (ix86_option_override_internal): Disable + jump tables when retpolines are used. + +2019-03-08 Jan Hubicka <hubicka@ucw.cz> + + PR go/63560 + * ipa-split.c (execute_split_functions): Do not split + 'noinline' or 'section' function. + +2019-03-08 Jakub Jelinek <jakub@redhat.com> + + PR target/79846 + * config/s390/s390.c (s390_const_operand_ok): Use %wu instead of + HOST_WIDE_INT_PRINT_UNSIGNED and %wd instead of + HOST_WIDE_INT_PRINT_DEC. Formatting fixes. + + PR ipa/80000 + * ipa-devirt.c (compare_virtual_tables): Remove two trailing spaces + from diagnostics. Formatting fixes. + + PR target/85665 + * ipa-devirt.c (odr_types_equivalent_p): Fix grammar in + warn_odr diagnostics. + + PR other/80058 + * lra-constraints.c (process_alt_operands): Avoid one space before + " at the end of line and another after " on another line in a string + literal. + * attribs.c (handle_dll_attribute): Likewise. + * config/avr/avr-devices.c (avr_texinfo): Likewise. + + * gimple-ssa-warn-alloca.c (pass_walloca::execute): Don't wrap + warning_at or inform messages in G_() if there is no ?:. + + PR tree-optimization/89550 + * builtins.c (c_strlen): Only set TREE_NO_WARNING if warning_at + returned true. Formatting fixes. + (expand_builtin_strnlen): Formatting fixes. + * tree-vrp.c (vrp_prop::check_mem_ref): Only set TREE_NO_WARNING + if warning_at returned true. + * tree-cfg.c (pass_warn_function_return::execute): Likewise. + +2019-03-08 Richard Biener <rguenther@suse.de> + + PR middle-end/89578 + * cfgloop.h (struct loop): Add owned_clique field. + * cfgloopmanip.c (copy_loop_info): Copy it. + * tree-cfg.c (gimple_duplicate_bb): Do not remap owned_clique + cliques. + * tree-inline.c (copy_loops): Remap owned_clique. + * lto-streamer-in.c (input_cfg): Stream owned_clique. + * lto-streamer-out.c (output_cfg): Likewise. + +2019-03-08 Jakub Jelinek <jakub@redhat.com> + + PR target/80190 + * config/darwin.c: Include intl.h. + (darwin_build_constant_cfstring): Improve i18n of diagnostics by not + composing the message out of two separate parts. + +2019-03-07 Jakub Jelinek <jakub@redhat.com> + + PR target/80003 + * config/i386/i386.c (ix86_set_func_type): Make sure diagnostics + doesn't start with a capital letter and doesn't end with a dot. + (ix86_function_arg_boundary): Make sure diagnostics doesn't start + with a capital letter. + (ix86_mangle_function_version_assembler_name): Likewise. + (ix86_generate_version_dispatcher_body): Likewise. + (fold_builtin_cpu): Likewise. + (get_builtin_code_for_version): Likewise. Remove extraneous space. + (ix86_handle_interrupt_attribute): Make the diagnostics easier for + translators, wrap full type name in %qs. + + PR translation/79999 + * gimplify.c (gimplify_omp_ordered): Reword diagnostics to talk about + depend clause with source (or sink) modifier. + * omp-expand.c (expand_omp_ordered_sink): Likewise. + + PR target/89602 + * config/i386/sse.md (avx512f_mov<ssescalarmodelower>_mask, + *avx512f_load<mode>_mask, avx512f_store<mode>_mask): New define_insns. + (avx512f_load<mode>_mask): New define_expand. + * config/i386/i386-builtin.def (__builtin_ia32_loadsd_mask, + __builtin_ia32_loadss_mask, __builtin_ia32_storesd_mask, + __builtin_ia32_storess_mask, __builtin_ia32_movesd_mask, + __builtin_ia32_movess_mask): New builtins. + * config/i386/avx512fintrin.h (_mm_mask_load_ss, _mm_maskz_load_ss, + _mm_mask_load_sd, _mm_maskz_load_sd, _mm_mask_move_ss, + _mm_maskz_move_ss, _mm_mask_move_sd, _mm_maskz_move_sd, + _mm_mask_store_ss, _mm_mask_store_sd): New intrinsics. + +2019-03-07 Martin Jambor <mjambor@suse.cz> + + PR lto/87525 + * ipa-cp.c (perform_estimation_of_a_value): Account zero time benefit + for extern inline functions. + +2019-03-07 Martin Jambor <mjambor@suse.cz> + + PR ipa/88235 + * cgraph.h (cgraph_node): New inline method former_thunk_p. + * cgraph.c (cgraph_node::dump): Dump a note if node is a former thunk. + (clone_of_p): Treat expanded thunks like thunks, be optimistic if they + have multiple callees. At the end check if declarations match as + opposed to cgraph_nodes. + +2019-03-07 Martin Liska <mliska@suse.cz> + + * cgraph.c (cgraph_node::verify_node): Verify with a neighbour + which is equivalent to searching for this in clones chain. + * symtab.c (symtab_node::verify_base): Similarly compare ASM + names with a neighbour and special case first node in a chain. + +2019-01-25 Jason Merrill <jason@redhat.com> + + PR c++/80916 - spurious "static but not defined" warning. + * gimple-fold.c (can_refer_decl_in_current_unit_p): Return false + for an internal symbol with DECL_EXTERNAL. + +2019-04-07 Richard Biener <rguenther@suse.de> + + PR middle-end/89618 + * cfgloopmanip.c (copy_loop_info): Copy forgotten fields. + * tree-inline.c (copy_loops): Simplify. + +2019-03-07 Martin Liska <mliska@suse.cz> + + * dwarf2out.c (add_AT_vms_delta): Revert function removal. + +2019-03-07 Richard Biener <rguenther@suse.de> + + PR tree-optimization/89595 + * tree-ssa-dom.c (dom_opt_dom_walker::optimize_stmt): Take + stmt iterator as reference, take boolean output parameter to + indicate whether the stmt was removed and thus the iterator + already advanced. + (dom_opt_dom_walker::before_dom_children): Re-iterate over + stmts created by folding. + +2019-03-07 Jakub Jelinek <jakub@redhat.com> + + PR c++/89585 + * doc/extend.texi (Basic Asm): Document qualifiers are not allowed + at toplevel. + +2019-03-06 Peter Bergner <bergner@linux.ibm.com> + + PR rtl-optimization/88845 + * config/rs6000/rs6000.c (rs6000_emit_move_si_sf_subreg): Enable during + LRA. + * lra.c (remove_scratches_1): New function. + (remove_scratches): Use it. + (lra_emit_move): Likewise. + +2019-03-06 Claudiu Zissulescu <claziss@synopsys.com> + + * config/arc/arc-c.def (__ARC_UNALIGNED__): Set it on + unaligned_access variable. + * config/arc/arc.c (arc_override_options): Set unaligned access + default on for HS CPUs. + * config/arc/arc.h (STRICT_ALIGNMENT): Fix logic. + +2019-03-06 Martin Liska <mliska@suse.cz> + + PR gcov-profile/89577 + * doc/gcov.texi: Prefer to use --coverage. + * doc/sourcebuild.texi: Likewise. + +2019-03-02 Jason Merrill <jason@redhat.com> + + PR c++/86485 - -Wmaybe-unused with empty class ?: + * gimplify.c (gimplify_cond_expr): Use INIT_EXPR. + +2019-03-05 Jakub Jelinek <jakub@redhat.com> + + PR target/89587 + * config/rs6000/t-linux (MULTIARCH_DIRNAME): Set to non-empty only + if_multiarch. + + PR middle-end/89590 + * builtins.c (maybe_emit_free_warning): Punt if free doesn't have + exactly one argument. + +2019-03-05 Jakub Jelinek <jakub@redhat.com> + Richard Sandiford <richard.sandiford@arm.com> + + PR tree-optimization/89570 + * match.pd (vec_cond into cond_op simplification): Don't use + get_conditional_internal_fn, use as_internal_fn (cond_op). + +2019-03-05 Wilco Dijkstra <wdijkstr@arm.com> + + PR target/89222 + * config/arm/arm.md (movsi): Use targetm.cannot_force_const_mem + to decide when to split off a non-zero offset from a symbol. + * config/arm/arm.c (arm_cannot_force_const_mem): Disallow offsets + in function symbols. + +2019-03-05 Richard Biener <rguenther@suse.de> + + PR tree-optimization/89594 + * tree-if-conv.c (pass_if_conversion::execute): Handle + case where .LOOP_VECTORIZED_FUNCTION was removed. + +2019-03-05 Jakub Jelinek <jakub@redhat.com> + + PR bootstrap/89560 + * fold-const.c (fold_checksum_tree): Don't use fixed size buffer, + instead alloca it only when needed with the needed size. + + PR tree-optimization/89570 + * match.pd (vec_cond into cond_op simplification): Guard with + vectorized_internal_fn_supported_p test and #if GIMPLE. + + PR tree-optimization/89566 + * gimple-ssa-sprintf.c (sprintf_dom_walker::handle_gimple_call): + Set info.fncode to BUILT_IN_NONE if gimple_call_builtin_p failed. + Punt if get_user_idx_format succeeds, but idx_format argument is + not provided or doesn't have pointer type, or if idx_args is above + number of provided arguments. + +2019-03-04 Wilco Dijkstra <wdijkstr@arm.com> + + PR tree-optimization/89437 + * match.pd: Use lt in sin(atan(x)) and cos(atan(x)) simplifications. + +2019-03-04 Richard Biener <rguenther@suse.de> + + PR middle-end/89572 + * tree-scalar-evolution.c: (get_loop_exit_condition): Use + safe_dyn_cast. + +2019-03-04 Bin Cheng <bin.cheng@linux.alibaba.com> + + PR tree-optimization/89487 + * tree-loop-distribution.c (has_nonaddressable_dataref_p): New. + (create_rdg_vertices): Compute has_nonaddressable_dataref_p. + (distribute_loop): Don't do runtime alias check if there is non- + addressable data reference. + * tree-ssa-loop-ivopts.c (may_be_nonaddressable_p): Check if VAR_DECL + is a register variable. + +2019-03-02 Jakub Jelinek <jakub@redhat.com> + + PR target/89506 + * config/arm/arm.md (cmpsi2_addneg): Use + trunc_int_for_mode (-INTVAL (...), SImode) instead of -INTVAL (...). + If operands[2] is 0 or INT_MIN, force use of subs. + (*compare_scc splitter): Use gen_int_mode. + (*negscc): Likewise. + * config/arm/thumb2.md (*thumb2_negscc): Likewise. + +2019-03-01 Kito Cheng <kito.cheng@gmail.com> + Monk Chiang <sh.chiang04@gmail.com> + + * common/config/riscv/riscv-common.c: Include sstream. + (riscv_subset_list::to_string): New. + (riscv_arch_str): Likewise. + * config.gcc (riscv*-*-*): Handle --with-riscv-attribute= + * config.in: Regen. + * config/riscv/riscv-protos.h (riscv_arch_str): New. + * config/riscv/riscv.c (INCLUDE_STRING): Defined. + (riscv_emit_attribute): New. + (riscv_file_start): Emit attribute if needed. + (riscv_option_override): Init riscv_emit_attribute_p. + * config/riscv/riscv.opt (mriscv-attribute): New option. + * configure.ac (riscv*-*-*): Check binutils is supporting ELF + * configure: Regen. + * doc/install.texi: Document --with-riscv-attribute. + * doc/invoke.texi: Document -mriscv-attribute. + + * common/config/riscv/riscv-common.c: + Include config/riscv/riscv-protos.h. + (INCLUDE_STRING): Defined. + (RISCV_DONT_CARE_VERSION): Defined. + (riscv_subset_t): Declare. + (riscv_subset_t::riscv_subset_t): New. + (riscv_subset_list): Declare. + (riscv_subset_list::riscv_subset_list): New. + (riscv_subset_list::~riscv_subset_list): Likewise. + (riscv_subset_list::parsing_subset_version): Likewise. + (riscv_subset_list::parse_std_ext): Likewise. + (riscv_subset_list::parse_sv_or_non_std_ext): Likewise. + (riscv_subset_list::add): Likewise. + (riscv_subset_list::lookup): Likewise. + (riscv_subset_list::xlen): Likewise. + (riscv_subset_list::parse): Likewise. + (riscv_supported_std_ext): Likewise. + (current_subset_list): Likewise. + (riscv_parse_arch_string): Using riscv_subset_list::parse to + parse. + +2019-03-01 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/rs6000.c (rs6000_option_override_internal): If + rs6000_dejagnu_cpu_index is set, use that to override rs6000_cpu_index. + * config/rs6000/rs6000.opt (mdejagnu-cpu=): New option. + +2019-03-01 Alexander Monakov <amonakov@ispras.ru> + + PR rtl-optimization/85899 + * haifa-sched.c (find_fallthru_edge_from): Relax assert to account for + fallthru edges leading to the exit block. + +2019-03-01 Tamar Christina <tamar.christina@arm.com> + + PR target/89517 + * config/aarch64/aarch64-option-extensions.def (fp, simd, crypto, fp16, + rdma, dotprod, sha2, sha3, sm4, fp16fml, sve): Collapse line. + +2019-03-01 Richard Sandiford <richard.sandiford@arm.com> + + PR tree-optimization/89535 + * tree-vect-stmts.c (vectorizable_call): Record the vector types + for each operand. Calculate the fallback choice for mask operands + and pass it to vect_get_vec_def_for_operand. + +2019-03-01 Richard Biener <rguenther@suse.de> + + PR middle-end/89541 + * tree-ssa-operands.c (add_stmt_operand): CONST_DECL may + get virtual operands. + (get_expr_operands): Handle CONST_DECL like other decls. + +2019-03-01 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/89503 + * fold-const.c (fold_checksum_tree): Ignore TREE_NO_WARNING bit + on DECL_P and EXPR_P. + +2019-03-01 Richard Biener <rguenther@suse.de> + + PR middle-end/89497 + * tree-cfgcleanup.h (cleanup_tree_cfg): Add SSA update flags + argument, defaulted to zero. + * passes.c (execute_function_todo): Pass down SSA update flags + to cleanup_tree_cfg. + * tree-cfgcleanup.c: Include tree-into-ssa.h and tree-cfgcleanup.h. + (cleanup_tree_cfg_noloop): After cleanup_control_flow_pre update SSA + form if requested. + (cleanup_tree_cfg): Get and pass down SSA update flags. + +2019-03-01 Jakub Jelinek <jakub@redhat.com> + + PR bootstrap/89539 + * dwarf2out.c (output_comdat_type_unit): Add ATTRIBUTE_UNUSED to + early_lto_debug argument. + +2019-02-28 Eric Botcazou <ebotcazou@adacore.com> + + PR tree-optimization/89536 + * tree-ssa-dom.c (edge_info::derive_equivalences) <BIT_NOT_EXPR>: Test + only whether bit #0 of the value is 0 instead of the entire value. + +2019-02-28 Marek Polacek <polacek@redhat.com> + + PR c++/87068 - missing diagnostic with fallthrough statement. + * gimplify.c (expand_FALLTHROUGH_r): If IFN_FALLTHROUGH was found + at the end of a seq, save its location to walk_stmt_info. + (expand_FALLTHROUGH): Warn if IFN_FALLTHROUGH is at the end of + a switch. + +2019-02-28 Jan Hubicka <hubicka@ucw.cz> + + PR lto/88585 + * tree.c (find_atomic_core_type): Move ahead in file. + (check_base_type): Correctly compare alignments of atomic types. + +2019-02-28 H.J. Lu <hongjiu.lu@intel.com> + + PR target/89455 + * config/i386/i386.c (get_builtin_code_for_version): Identify + Westmere from PCLMUL, instead of AES. + +2019-02-28 Jakub Jelinek <jakub@redhat.com> + + PR target/89434 + * config/arm/arm.md (*subsi3_carryin_compare_const): Use + trunc_int_for_mode (-INTVAL (...), SImode), just instead of + -UINTVAL (...). + +2019-02-28 Tamar Christina <tamar.christina@arm.com> + + PR target/88530 + * config/aarch64/aarch64-option-extensions.def: Document it. + * config/aarch64/driver-aarch64.c (host_detect_local_cpu): Skip feature + if empty hwcaps. + +2019-02-28 Jakub Jelinek <jakub@redhat.com> + + PR c/89520 + * convert.c (convert_to_real_1, convert_to_integer_1): Punt for + builtins if they don't have a single scalar floating point argument. + Formatting fixes. + +2019-02-27 Bernd Edlinger <bernd.edlinger@hotmail.de> + + PR rtl-optimization/89490 + * varasm.c (get_block_for_section): Bail out for mergeable sections. + (default_use_anchors_for_symbol_p, output_object_block): Assert the + block section is not mergeable. + +2019-02-27 Jakub Jelinek <jakub@redhat.com> + + PR target/70341 + * config/arm/arm.md (arm_casesi_internal): New define_expand. Rename + old define_insn to ... + (*arm_casesi_internal): ... this. Add mode to LABEL_REFs. + * config/arm/thumb2.md (thumb2_casesi_internal): New define_expand. + Rename old define_insn to ... + (*thumb2_casesi_internal): ... this. Add mode to LABEL_REFs. + (thumb2_casesi_internal_pic): New define_expand. Rename old + define_insn to ... + (*thumb2_casesi_internal_pic): ... this. Add mode to LABEL_REFs. + * config/aarch64/aarch64.md (casesi): Create the casesi_dispatch + MEM manually here, set MEM_READONLY_P and MEM_NOTRAP_P on it. + +2019-02-27 Richard Biener <rguenther@suse.de> + + PR debug/88878 + * dwarf2out.c (use_debug_types): Disable when in_lto_p. + +2019-02-27 Richard Biener <rguenther@suse.de> + + * passes.c (should_skip_pass_p): Do not skip cgraph-edge + building. + +2019-02-27 Richard Biener <rguenther@suse.de> + + PR debug/88878 + * dwarf2out.c (output_comdat_type_unit): Add early_lto_debug + parameter, prefix section name with .gnu.debuglto_ if true. + (dwarf2out_finish): Pass false to output_comdat_type_unit. + (dwarf2out_early_finish): Pass true to output_comdat_type_unit. + +2019-02-27 Richard Biener <rguenther@suse.de> + + PR debug/89514 + * dwarf2out.c (size_of_die): Key on AT_ref (a)->comdat_type_p + rather than on use_debug_types, doing what output_die does. + (value_format): Likewise. + +2019-02-27 Martin Jambor <mjambor@suse.cz> + Martin Sebor <msebor@redhat.com> + + * doc/invoke.texi (Warning Options): Reword description of + -Wno-absolute-value. + +2019-02-27 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/89280 + * tree-cfgcleanup.c (maybe_dead_abnormal_edge_p, + builtin_setjmp_setup_bb): New functions. + (cleanup_control_flow_pre): Ignore maybe_dead_abnormal_edge_p edges. + When visiting __builtin_setjmp_setup block, queue in special + setjmp_vec vector edges from .ABNORMAL_DISPATCHER to corresponding + __builtin_setjmp_receiver. Remove .ABNORMAL_DISPATCHER basic blocks + from visited after the loop if they don't have any visited successor + blocks. + +2018-02-26 Steve Ellcey <sellcey@marvell.com> + + * config/aarch64/aarch64.c (aarch64_get_multilib_abi_name): + New function. + (TARGET_GET_MULTILIB_ABI_NAME): New macro. + +2019-02-26 Jakub Jelinek <jakub@redhat.com> + + PR c++/89507 + * tree.c (valid_constant_size_p): Deal with size INTEGER_CSTs + with types other than sizetype/ssizetype. + +2019-02-26 Eric Botcazou <ebotcazou@adacore.com> + + * config/sparc/sparc-opts.h (enum processor_type): Rename to... + (enum sparc_processor_type): ...this. + (enum sparc_code_model_type): New enumeration type. + (enum sparc_memory_model_type): Tweak comments. + * config/sparc/sparc.opt (mcpu): Adjust to above renaming. + (mtune): Likewise. + (mcmodel): Use sparc_code_model enumeration and variable. + (sparc_code_model): New enumeration. + (mdebug): Add Undocumented marker. + * config/sparc/sparc.h (enum cmodel): Delete. + (sparc_cmodel): Likewise. + (TARGET_CM_MEDLOW): Adjust to above renaming. + (TARGET_CM_MEDMID): Likewise. + (TARGET_CM_MEDANY): Likewise. + (TARGET_CM_EMBMEDANY): Likewise. + * config/sparc/sparc.c (sparc_cmodel): Delete. + (sparc_option_override): Remove string/value mapping support for the + code model. Move code and memory model support to after the handling + of target flags. Do private machine setup last. + (sparc_emit_set_symbolic_const64): Use sparc_code_model. + (sparc_legitimize_reload_address): Likewise. + (sparc_output_mi_thunk): Likewise. + * config/sparc/sparc.md (cpu): Adjust comment to above renaming. + +2019-02-26 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/89500 + * tree-ssa-strlen.c (stridx_strlenloc): Adjust comment. + (handle_builtin_strlen): Remove noncst_bound variable. Always + optimize strnlen (x, 0) to 0. Optimize strnlen (x, cst) to + cst if the first cst bytes starting at x are known to be non-zero, + even if the string is not zero terminated. Don't try to modify + *si for strnlen. Update strlen_to_stridx only for strlen or if + we can prove strnlen returns the same value as strlen would. + +2019-02-26 Martin Liska <mliska@suse.cz> + + * alloc-pool.h (struct pool_usage): Remove extra + print_dash_line. + * bitmap.h (struct bitmap_usage): Likewise. + * ggc-common.c (struct ggc_usage): Likewise. + * mem-stats.h (struct mem_usage): Likewise. + (mem_alloc_description::dump): Print dash lines + here and repeat header at the end of a table report. + It's then more readable. + * tree-phinodes.c (phinodes_print_statistics): Make + horizontal alignment. + * tree-ssanames.c (ssanames_print_statistics): Likewise. + * vec.c (struct vec_usage): Remove extra print_dash_line. + * vec.h (vec_safe_grow_cleared): Pass PASS_MEM_STAT. + +2019-02-26 Uroš Bizjak <ubizjak@gmail.com> + + * doc/extend.texi (__builtin_object_size): + Use @pxref instead of @xref inside parenthesis. + (__builtin_has_attribute): Add missing comma after @xref. + (__builtin_object_size): Ditto. + * doc/md.texi (cond_*{mode}): Use @samp instead of @var around op1[i]. + +2019-02-26 Jeff Law <law@redhat.com> + + PR rtl-optimization/87761 + * regcprop.c (copyprop_hardreg_forward_1): Use REG_UNUSED notes to + detect obviously dead insns and delete them. + +2019-02-26 Richard Biener <rguenther@suse.de> + + PR tree-optimization/89505 + * tree-ssa-structalias.c (compute_dependence_clique): Make sure + to handle restrict pointed-to vars with multiple subvars + correctly. + +2019-02-26 Richard Biener <rguenther@suse.de> + + PR tree-optimization/89489 + * tree-parloops.c (create_loop_fn): Copy over last_clique. + +2019-02-26 Eric Botcazou <ebotcazou@adacore.com> + + * tree-ssa-dom.c (edge_info::derive_equivalences) <BIT_IOR_EXPR>: Fix + and move around comment. + <BIT_AND_EXPR>: Likewise. + <BIT_NOT_EXPR>: Add specific handling for boolean types. + +2019-02-26 Jakub Jelinek <jakub@redhat.com> + + PR target/89474 + * config/i386/i386.c (remove_partial_avx_dependency): Call + df_analyze etc. before creation of the v4sf_const0 pseudo, rather than + after changing possibly many instructions to use that pseudo. Fix up + insertion of v4sf_const0 setter at the start of bb. + +2019-02-25 Sandra Loosemore <sandra@codesourcery.com> + + PR c/80409 + * doc/extend.texi (Variadic Pointer Args): New section. + +2019-02-25 Sandra Loosemore <sandra@codesourcery.com> + Martin Sebor <msebor@gmail.com> + + * common.opt (Wattribute-alias): Likewise. + * doc/invoke.texi (Option Summary): List general form of + -Wattribute-alias=. List positive form of -Wmissing-attributes. + (-Wmissing-attributes): Invert entry, rewrite and correct default. + Add cross-references. + (-Wattribute-alias): Rewrite and correct default. Mention + considered attributes (same as for -Wmissing-attributes). + +2019-02-25 Paul A. Clarke <pc@us.ibm.com> + + * config/rs6000/emmintrin.h (_mm_cvtpd_epi32): Fix big endian. + (_mm_cvtpd_ps): Likewise. + (_mm_cvttpd_epi32): Likewise. + + PR target/89338 + * config/rs6000/xmmintrin.h (_mm_cvtss_f32): Fix type mismatch. + (_mm_cvt_ss2si): Fix type mismatch and 32-bit. + + PR target/89339 + * config/rs6000/xmmintrin.h (_mm_movemask_pi8): Fix 32-bit. + +2019-02-25 Tamar Christina <tamar.christina@arm.com> + + PR target/88530 + * common/config/aarch64/aarch64-common.c + (struct aarch64_option_extension): Add is_synthetic. + (all_extensions): Use it. + (TARGET_OPTION_INIT_STRUCT): Define hook. + (struct gcc_targetm_common): Moved to end. + (all_extensions_by_on): New. + (opt_ext_cmp, typedef opt_ext): New. + (aarch64_option_init_struct): New. + (aarch64_contains_opt): New. + (aarch64_get_extension_string_for_isa_flags): Output smallest set. + * config/aarch64/aarch64-option-extensions.def + (AARCH64_OPT_EXTENSION): Explicitly include AES and SHA2 in crypto. + (fp, simd, crc, lse, fp16, rcpc, rdma, dotprod, aes, sha2, sha3, + sm4, fp16fml, sve, profile, rng, memtag, sb, ssbs, predres): + Set is_synthetic to false. + (crypto): Set is_synthetic to true. + * config/aarch64/driver-aarch64.c (AARCH64_OPT_EXTENSION): Add + SYNTHETIC. + +2019-02-25 Tamar Christina <tamar.christina@arm.com> + + * config/arm/arm_neon.h (vfmlal_low_u32, vfmlsl_low_u32, + vfmlal_high_u32, vfmlsl_high_u32, vfmlalq_low_u32, vfmlslq_low_u32, + vfmlalq_high_u32, vfmlslq_high_u32, vfmlal_lane_low_u32, + vfmlal_lane_high_u32, vfmlalq_laneq_low_u32, vfmlalq_lane_low_u32, + vfmlal_laneq_low_u32, vfmlalq_laneq_high_u32, vfmlalq_lane_high_u32, + vfmlal_laneq_high_u32, vfmlsl_lane_low_u32, vfmlsl_lane_high_u32, + vfmlslq_laneq_low_u32, vfmlslq_lane_low_u32, vfmlsl_laneq_low_u32, + vfmlslq_laneq_high_u32, vfmlslq_lane_high_u32, vfmlsl_laneq_high_u32): + Rename ... + (vfmlal_low_f16, vfmlsl_low_f16, vfmlal_high_f16, vfmlsl_high_f16, + vfmlalq_low_f16, vfmlslq_low_f16, vfmlalq_high_f16, vfmlslq_high_f16, + vfmlal_lane_low_f16, vfmlal_lane_high_f16, vfmlalq_laneq_low_f16, + vfmlalq_lane_low_f16, vfmlal_laneq_low_f16, vfmlalq_laneq_high_f16, + vfmlalq_lane_high_f16, vfmlal_laneq_high_f16, vfmlsl_lane_low_f16, + vfmlsl_lane_high_f16, vfmlslq_laneq_low_f16, vfmlslq_lane_low_f16, + vfmlsl_laneq_low_f16, vfmlslq_laneq_high_f16, vfmlslq_lane_high_f16, + vfmlsl_laneq_high_f16): ... To this. + * config/arm/neon.md: Update comments. + +2019-02-25 Tamar Christina <tamar.christina@arm.com> + + * config/aarch64/arm_neon.h (vfmlal_low_u32, vfmlsl_low_u32, + vfmlalq_low_u32, vfmlslq_low_u32, vfmlal_high_u32, vfmlsl_high_u32, + vfmlalq_high_u32, vfmlslq_high_u32, vfmlal_lane_low_u32, + vfmlsl_lane_low_u32, vfmlal_laneq_low_u32, vfmlsl_laneq_low_u32, + vfmlalq_lane_low_u32, vfmlslq_lane_low_u32, vfmlalq_laneq_low_u32, + vfmlslq_laneq_low_u32, vfmlal_lane_high_u32, vfmlsl_lane_high_u32, + vfmlal_laneq_high_u32, vfmlsl_laneq_high_u32, vfmlalq_lane_high_u32, + vfmlslq_lane_high_u32, vfmlalq_laneq_high_u32, vfmlslq_laneq_high_u32): + Rename ... + (vfmlal_low_f16, vfmlsl_low_f16, vfmlalq_low_f16, vfmlslq_low_f16, + vfmlal_high_f16, vfmlsl_high_f16, vfmlalq_high_f16, vfmlslq_high_f16, + vfmlal_lane_low_f16, vfmlsl_lane_low_f16, vfmlal_laneq_low_f16, + vfmlsl_laneq_low_f16, vfmlalq_lane_low_f16, vfmlslq_lane_low_f16, + vfmlalq_laneq_low_f16, vfmlslq_laneq_low_f16, vfmlal_lane_high_f16, + vfmlsl_lane_high_f16, vfmlal_laneq_high_f16, vfmlsl_laneq_high_f16, + vfmlalq_lane_high_f16, vfmlslq_lane_high_f16, vfmlalq_laneq_high_f16, + vfmlslq_laneq_high_f16): ... To this. + +2019-02-25 Alexander Monakov <amonakov@ispras.ru> + + PR rtl-optimization/86096 + * df-scan.c (df_mw_compare): Do not check mw_reg fields when + comparing mw_order values. + +2019-02-25 Jakub Jelinek <jakub@redhat.com> + + PR target/89434 + * config/arm/arm.md (*subsi3_carryin_const): Use + arm_neg_immediate_operand predicate instead of + arm_not_immediate_operand, "L" constraint instead of "K" and + print it using %n2 instead of %B2. + (*subsi3_carryin_const0): New define_insn. + (*subsi3_carryin_compare_const): Use const_int_I_operand predicate + instead of arm_not_operand and "I" constraint instead of "K" and + print it using %n3 instead of %B2. Instead of using match_dup 2 add + another match_operand and in the condition check that it is negation + of operands[2]. + (*subsi3_carryin_compare_const0): New define_ins. + (*subdi_di_zesidi): Adjust to use *subsi3_carryin_const0 instead of + *subsi3_carryin_const. + (*arm_cmpdi_insn): Fix splitting into *subsi3_carryin_compare_const, + split into *subsi3_carryin_compare_const0 if the highpart is zero. + + PR target/89438 + * config/arm.vfp.md (*negdf2_vfp): Use + gen_int_mode (0x80000000, SImode) instead of GEN_INT (0x80000000). + * config/arm/neon.md (neon_copysignf<mode>): Likewise. + +2019-02-24 Jakub Jelinek <jakub@redhat.com> + + PR rtl-optimization/89445 + * simplify-rtx.c (simplify_ternary_operation): Don't use + simplify_merge_mask on operands that may trap. + * rtlanal.c (may_trap_p_1): Use FLOAT_MODE_P instead of + SCALAR_FLOAT_MODE_P checks. For integral division by zero, if + second operand is CONST_VECTOR, check if any element could be zero. + Don't expect traps for VEC_{MERGE,SELECT,CONCAT,DUPLICATE} unless + their operands can trap. + +2019-02-23 Martin Sebor <msebor@redhat.com> + + * gimple-ssa-sprintf.c (target_strtol): Rename... + (target_strtohwi): ...to this. Handle values up to HOST_WIDE_INT_MAX. + (parse_directive): Adjust to name change. Use HOST_WIDE_INT_MAX to + check for range error. + +2019-02-23 H.J. Lu <hongjiu.lu@intel.com> + + PR driver/69471 + * opts-common.c (prune_options): Also prune joined switches + with Negative and RejectNegative. + * config/i386/i386.opt (march=): Add Negative(march=). + (mtune=): Add Negative(mtune=). + * doc/options.texi: Document Negative used together with Joined + and RejectNegative. + +2019-02-22 Martin Sebor <msebor@redhat.com> + + * doc/extend.texi (Other Builtins): Add + __builtin_is_constant_evaluated. + +2019-02-22 Richard Biener <rguenther@suse.de> + + PR tree-optimization/87609 + * tree-cfg.c (gimple_duplicate_bb): Only remap inlined cliques. + +2019-02-22 Jeff Law <law@redhat.com> + + PR rtl-optimization/87761 + * config/mips/mips.md: Add new combiner pattern to recognize + a bitfield extraction using (ashiftrt (truncate (ashift (...)))). + +2019-02-22 Matthew Malcomson <matthew.malcomson@arm.com> + + PR target/89324 + * config/aarch64/aarch64.md: Use aarch64_general_reg predicate on + destination register in peepholes generating patterns for ADDS/SUBS. + (add<mode>3_compare0, + *addsi3_compare0_uxtw, add<mode>3_compareC, + add<mode>3_compareV_imm, add<mode>3_compareV, + *adds_<optab><ALLX:mode>_<GPI:mode>, + *subs_<optab><ALLX:mode>_<GPI:mode>, + *adds_<optab><ALLX:mode>_shift_<GPI:mode>, + *subs_<optab><ALLX:mode>_shift_<GPI:mode>, + *adds_<optab><mode>_multp2, *subs_<optab><mode>_multp2, + *sub<mode>3_compare0, *subsi3_compare0_uxtw, + sub<mode>3_compare1): Allow stack pointer for source register. + * config/aarch64/predicates.md (aarch64_general_reg): New predicate. + +2019-02-22 Martin Sebor <msebor@redhat.com> + + PR tree-optimization/88993 + PR tree-optimization/88853 + * gimple-ssa-sprintf.c (sprintf_dom_walker::call_info::is_file_func): + New helper. + (sprintf_dom_walker::call_info::is_string_func): New helper. + (format_directive): Only issue "may exceed" 4095/INT_MAX warnings + for formatted string functions. + (sprintf_dom_walker::handle_gimple_call): Fix a typo in a comment. + +2019-02-22 Martin Sebor <msebor@redhat.com> + + PR c/89425 + * c-parser.c (sizeof_ptr_memacc_comptypes): Avoid warning in + unreachable subexpressions. + +2019-02-22 H.J. Lu <hongjiu.lu@intel.com> + Hongtao Liu <hongtao.liu@intel.com> + Sunil K Pandey <sunil.k.pandey@intel.com> + + PR target/87007 + * config/i386/i386-passes.def: Add + pass_remove_partial_avx_dependency. + * config/i386/i386-protos.h + (make_pass_remove_partial_avx_dependency): New. + * config/i386/i386.c (make_pass_remove_partial_avx_dependency): + New function. + (pass_data_remove_partial_avx_dependency): New. + (pass_remove_partial_avx_dependency): Likewise. + (make_pass_remove_partial_avx_dependency): Likewise. + * config/i386/i386.md (avx_partial_xmm_update): New attribute. + (*extendsfdf2): Add avx_partial_xmm_update. + (truncdfsf2): Likewise. + (*float<SWI48:mode><MODEF:mode>2): Likewise. + (SF/DF conversion splitters): Disabled for TARGET_AVX. + +2019-02-22 Aldy Hernandez <aldyh@redhat.com> + + PR middle-end/85598 + * gimple-ssa-sprintf.c (pass_sprintf_length::execute): Enable loop + analysis for pass. + +2019-02-22 Thiago Macieira <thiago.macieira@intel.com> + + PR target/89444 + * config/i386/i386.h (PTA_WESTMERE): Remove PTA_AES. + (PTA_SKYLAKE): Add PTA_AES. + (PTA_GOLDMONT): Likewise. + +2019-02-22 Sudakshina Das <sudi.das@arm.com> + + * config/aarch64/aarch64.c (aarch64_output_mi_thunk): Add bti + instruction if enabled. + (aarch64_override_options): Remove reference to return address key. + +2019-02-22 Richard Biener <rguenther@suse.de> + + PR tree-optimization/89440 + * tree-vect-loop.c (vect_create_epilog_for_reduction): Remove + not necessary assert. + +2019-02-22 Thomas Schwinge <thomas@codesourcery.com> + + PR fortran/72741 + * omp-general.c (oacc_replace_fn_attrib): Mostly split out into... + (oacc_replace_fn_attrib_attr): ... this new function. + * omp-general.h (oacc_replace_fn_attrib_attr): New prototype. + * config/nvptx/nvptx.c (nvptx_goacc_validate_dims_1): Revert workaround. + +2019-02-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/arm-cpus.in (ares): Rename to... + (neoverse-n1): ... This. Add ares as alias. + * config/arm/arm-tables.opt: Regenerate. + * config/arm/arm-tune.md: Likewise. + * doc/invoke.txt (ARM Options): Document neoverse-n1. + +2019-02-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/aarch64/aarch64-cores.def (neoverse-e1): Define. + * config/aarch64/aarch64-tune.md: Regenerate. + * doc/invoke.texi (AArch64 Options): Document neoverse-e1 -mcpu option. + +2019-02-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/aarch64/aarch64.c (ares_tunings): Rename to... + (neoversen1_tunings): ... This. + * config/aarch64/aarch64-cores.def (ares): Change tuning to the above. + (neoverse-n1): New CPU. + * config/aarch64/aarch64-tune.md: Regenerate. + * doc/invoke.txt (AArch64 Options): Document neoverse-n1. + +2019-02-22 Richard Biener <rguenther@suse.de> + + PR middle-end/87609 + * cfghooks.h (dependence_hash): New typedef. + (struct copy_bb_data): New type. + (cfg_hooks::duplicate_block): Adjust to take a copy_bb_data argument. + (duplicate_block): Likewise. + * cfghooks.c (duplicate_block): Pass down copy_bb_data. + (copy_bbs): Create and pass down copy_bb_data. + * cfgrtl.c (cfg_layout_duplicate_bb): Adjust. + (rtl_duplicate_bb): Likewise. + * tree-cfg.c (gimple_duplicate_bb): If the copy_bb_data arg is not NULL + remap dependence info. + +2019-02-22 Richard Biener <rguenther@suse.de> + + PR tree-optimization/87609 + * tree-core.h (tree_base): Document special clique values. + * tree-inline.c (remap_dependence_clique): Do not use the + special clique value of one. + (maybe_set_dependence_info): Use clique one. + (clear_dependence_clique): New callback. + (compute_dependence_clique): Clear clique one from all refs + before assigning it (again). + +2019-02-21 Martin Sebor <msebor@redhat.com> + + * doc/extend.texi (__clear_cache): Correct signature. + +2019-02-21 Ian Lance Taylor <iant@golang.org> + + PR go/89170 + * varasm.c (decode_addr_const): Call lookup_constant_def rather + than output_constant_def. + (add_constant_to_table): New static function. + (output_constant_def): Call add_constant_to_table. + (tree_output_constant_def): Likewise. + +2019-02-21 Jakub Jelinek <jakub@redhat.com> + + PR c++/89285 + * builtins.c (fold_builtin_arith_overflow): If first two args are + INTEGER_CSTs, set intres and ovfres to constants rather than calls + to ifn. + +2019-02-21 H.J. Lu <hongjiu.lu@intel.com> + + PR target/87412 + * config/i386/i386.c (ix86_set_indirect_branch_type): Issue an + error for -mindirect-branch/-mfunction-return with incompatible + -fcf-protection. + +2019-02-21 Jakub Jelinek <jakub@redhat.com> + + PR bootstrap/88714 + * constraints.md (q): Remove. + * config/arm/ldrdstrd.md (*arm_ldrd, *arm_strd): Use rk constraint + instead of q. + +2019-02-21 Martin Jambor <mjambor@suse.cz> + + PR hsa/89302 + * omp-general.c (omp_extract_for_data): Removed a duplicate call + to omp_adjust_for_condition, moved NE_EXPR code_cond processing... + (omp_adjust_for_condition): ...here. Added necessary parameters. + * omp-general.h (omp_adjust_for_condition): Updated declaration. + * omp-grid.c (grid_attempt_target_gridification): Adjust to pass + proper values to new parameters of omp_adjust_for_condition. + +2019-02-20 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/89412 + * expr.c (expand_assignment): If result is a MEM, use change_address + instead of simplify_gen_subreg. + +2019-02-20 Jakub Jelinek <jakub@redhat.com> + David Malcolm <dmalcolm@redhat.com> + + PR middle-end/89091 + * fold-const.c (decode_field_reference): Return NULL_TREE if + lang_hooks.types.type_for_size returns NULL. Check it before + overwriting *exp_. Use return NULL_TREE instead of return 0. + +2019-02-20 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/88074 + PR middle-end/89415 + * toplev.c (do_compile): Double the emin/emax exponents to workaround + buggy mpc_norm. + +2019-02-20 Uroš Bizjak <ubizjak@gmail.com> + + PR target/89397 + * config/i386/i386.c (ix86_atomic_assign_expand_fenv): Check + TARGET_SSE in addition to TARGET_SSE_MATH. + + (ix86_excess_precision): Ditto. + (ix86_float_exceptions_rounding_supported_p): Ditto. + (use_rsqrt_p): Ditto. + * config/i386/sse.md (rsqrt<mode>2): Ditto. + +2019-02-20 David Malcolm <dmalcolm@redhat.com> + + PR c/89410 + * diagnostic-show-locus.c (layout::calculate_line_spans): Use + linenum_arith_t when determining if two adjacent line spans are + close enough to merge. + (diagnostic_show_locus): Use linenum_arith_t when iterating over + lines within each line_span. + +2019-02-20 Andre Vieira <andre.simoesdiasvieira@arm.com> + + PR target/86487 + * lra-constraints.c(uses_hard_regs_p): Fix handling of + paradoxical SUBREGS. + +2019-02-20 Li Jia He <helijia@linux.ibm.com> + + PR target/88100 + * config/rs6000/rs6000.c (rs6000_gimple_fold_builtin) + <case ALTIVEC_BUILTIN_VSPLTISB, ALTIVEC_BUILTIN_VSPLTISH, + ALTIVEC_BUILTIN_VSPLTISW>: Don't convert the operand before + range checking it. + +2019-02-19 Jonathan Wakely <jwakely@redhat.com> + + * config/gcn/gcn.c (print_operand): Fix typo. + +2019-02-19 Richard Biener <rguenther@suse.de> + + PR middle-end/88074 + * toplev.c (do_compile): Initialize mpfr's exponent range + based on available float modes. + +2019-02-19 Eric Botcazou <ebotcazou@adacore.com> + + * rtlanal.c (get_initial_register_offset): Fall back to the estimate + as long as the epilogue isn't completed. + +2019-02-18 Martin Sebor <msebor@redhat.com> + + * doc/cpp.texi (Conditional syntax): Add __has_attribute, + __has_cpp_attribute, and __has_include. + +2019-02-18 Martin Sebor <msebor@redhat.com> + + * doc/invoke.texi (-Wreturn-type): Correct and expand. + +2019-02-18 Martin Sebor <msebor@redhat.com> + + PR middle-end/89294 + * tree.c (valid_constant_size_p): Avoid assuming size is a constant + expression. + * tree.h (cst_size_error): Add the cst_size_not_constant enumerator. + +2019-02-18 Richard Biener <rguenther@suse.de> + + PR tree-optimization/89296 + * tree-ssa-loop-ch.c (ch_base::copy_headers): Restrict setting + of no-warning flag to cases that might emit the bogus warning. + +2019-02-18 Jakub Jelinek <jakub@redhat.com> + + PR bootstrap/88714 + * config/arm/arm.md (*arm_movdi, *movdf_soft_insn): Use "r" instead of + "q" constraint. + * config/arm/vfp.md (*movdi_vfp): Likewise. + * config/arm/ldrdstrd.md (*arm_ldrd, *arm_strd): Use "r" instead of + "q" constraint for operands[0]. + + PR target/89369 + * config/s390/s390.md (*r<noxa>sbg_<mode>_srl_bitmask, + *r<noxa>sbg_<mode>_sll, *r<noxa>sbg_<mode>_srl): Don't construct + pattern in a temporary buffer. + (*r<noxa>sbg_sidi_srl): Likewise. Always use 32 as I3 rather + than 64-operands[2]. + + PR target/89361 + * config/s390/s390.c (s390_indirect_branch_attrvalue, + s390_indirect_branch_settings): Define unconditionally. + (s390_set_current_function): Likewise, but guard the whole body except + the s390_indirect_branch_settings call with + #if S390_USE_TARGET_ATTRIBUTE. + (TARGET_SET_CURRENT_FUNCTION): Redefine unconditionally. + + * config/s390/s390.md (*<risbg_n>_ior_and_sr_ze, + *<risbg_n>_<mode>_ior_and_lshiftrt, *<risbg_n>_sidi_ior_and_lshiftrt): + Use HOST_WIDE_INT_M1U instead of ~(0ULL). + (*<risbg_n>_and_subregdi_rotr, *<risbg_n>_and_subregdi_rotl): Use + HOST_WIDE_INT_1U instead of 1ULL. + (*pre_z10_extzv<mode>, *pre_z10_extv<mode>): Change mask type from int + to unsigned HOST_WIDE_INT, use HOST_WIDE_INT_1U instead of 1ul. + (*insv<mode><clobbercc_or_nocc>_appendbitsleft, + z = (x << c) | (y >> d) splitters): Use HOST_WIDE_INT_1U + instead of 1UL. + (*insv<mode>_mem_reg, *insvdi_mem_reghigh): Use HOST_WIDE_INT_1U + instead of 1ul. + +2019-02-18 Martin Jambor <mjambor@suse.cz> + + PR tree-optimization/89209 + * tree-sra.c (create_access_replacement): New optional parameter + reg_tree. Use it as a type if non-NULL and access type is not of + a register type. + (get_repl_default_def_ssa_name): New parameter REG_TYPE, pass it + to create_access_replacement. + (sra_modify_assign): Pass LHS type to get_repl_default_def_ssa_name. + Check lacc is non-NULL before attempting to re-create it on the RHS. + +2019-02-18 Martin Liska <mliska@suse.cz> + + PR ipa/89306 + * cgraph.c (symbol_table::create_edge): Set m_summary_id to -1 + by default. + (symbol_table::free_edge): Recycle m_summary_id. + * cgraph.h (get_summary_id): New. + (symbol_table::release_symbol): Set m_summary_id to -1 + by default. + (symbol_table::allocate_cgraph_symbol): Recycle m_summary_id. + * ipa-fnsummary.c (ipa_fn_summary_t): Switch from + function_summary to fast_function_summary. + * ipa-fnsummary.h (ipa_fn_summary_t): Likewise. + * ipa-pure-const.c (class funct_state_summary_t): + Switch from function_summary to fast_function_summary. + * ipa-reference.c (class ipa_ref_var_info_summary_t): Likewise. + (class ipa_ref_opt_summary_t): Switch from function_summary + to fast_function_summary. + * symbol-summary.h (class function_summary_base): New class + that is created from base of former function_summary. + (function_summary_base::unregister_hooks): New. + (class function_summary): Inherit from function_summary_base. + (class call_summary_base): New class + that is created from base of former call_summary. + (class call_summary): Inherit from call_summary_base. + (struct is_same): New. + (class fast_function_summary): New summary class. + (class fast_call_summary): New summary class. + * vec.h (vec_safe_grow_cleared): New function. + +2019-02-18 Martin Liska <mliska@suse.cz> + + * config/i386/i386.c (ix86_get_multilib_abi_name): New function. + (TARGET_GET_MULTILIB_ABI_NAME): New macro defined. + * doc/tm.texi: Document new target hook. + * doc/tm.texi.in: Likewise. + * target.def: Add new target macro. + * gcc.c (find_fortran_preinclude_file): Do not search multilib + suffixes. + +2019-02-17 Alan Modra <amodra@gmail.com> + + PR target/89271 + * config/rs6000/rs6000.md (<bd>_<mode> split): Check for an int + output reg on add insn. + (<bd>tf_<mode> split): Likewise. Match predicates with insn. + +2019-02-16 H.J. Lu <hongjiu.lu@intel.com> + + PR target/89372 + * config/i386/sse.md (ssedoublemode): Remove V4HI. + (PMULHRSW): Likewise. + (<ssse3_avx2>_pmulhrsw<mode>3): Require TARGET_SSSE3, not + TARGET_AVX2. + (ssse3_pmulhrswv4hi3): New expander. + +2019-02-16 H.J. Lu <hongjiu.lu@intel.com> + + * config/i386/mmx.md (*vec_extractv2si_zext_mem): Doesn't require + MMX. Add isa attribute. + +2019-02-16 Jakub Jelinek <jakub@redhat.com> + + PR rtl-optimization/66152 + * builtins.h (c_readstr): Declare. + * builtins.c (c_readstr): Remove forward declaration. Add + null_terminated_p argument, if false, read all bytes from the + string instead of stopping after '\0'. + * expr.c (string_cst_read_str): New function. + (store_expr): Use string_cst_read_str instead of + builtin_strncpy_read_str. Try to store by pieces the whole + exp_len first, and only if that fails, split it up into + store by pieces followed by clear_storage. Formatting fix. + + * config/i386/i386.md (*movqi_internal): Remove static from + buf variable. Use output_asm_insn (buf, operands); return ""; + instead of return buf;. + * config/i386/sse.md (<sse>_andnot<mode>3<mask_name>, + *<code><mode>3<mask_name>, *andnot<mode>3, *andnottf3, *<code><mode>3, + *<code>tf3, <mask_codefor><code><mode>3<mask_name>): Likewise. + +2019-02-15 Eric Botcazou <ebotcazou@adacore.com> + + * config/sparc/linux.h (ASAN_CC1_SPEC): Define. + (CC1_SPEC): Use GNU_USER_TARGET_CC1_SPEC and ASAN_CC1_SPEC. + * config/sparc/linux64.h (ASAN_CC1_SPEC): Likewise. + (CC1_SPEC): Likewise. + * config/sparc/sparc.c (sparc_asan_shadow_offset): Adjust for 64-bit. + +2019-02-15 Eric Botcazou <ebotcazou@adacore.com> + + * asan.c (asan_emit_stack_protection): Use full-sized mask to align + the base address on 64-bit strict-alignment platforms. + +2019-02-15 H.J. Lu <hongjiu.lu@intel.com> + + * config/i386/i386.h (VALID_MMX_REG_MODE): Correct the misplaced ')'. + +2019-02-15 Uroš Bizjak <ubizjak@gmail.com> + + * config/i386/darwin.h (TARGET_FPMATH_DEFAULT_P): New define. + +2019-02-15 Aaron Sawdey <acsawdey@linux.ibm.com> + + PR rtl-optimization/88308 + * shrink-wrap.c (move_insn_for_shrink_wrap): Fix LABEL_NUSES counts + on copied instruction. + +2019-02-15 Eric Botcazou <ebotcazou@adacore.com> + + * final.c (insn_current_reference_address): Replace test on JUMP_P + with test on jump_to_label_p. + * config/visium/visium-passes.def: New file. + * config/visium/t-visium (PASSES_EXTRA): Define. + * config/visium/visium-protos.h (make_pass_visium_reorg): Declare. + * config/visium/visium.h (TRAMPOLINE_SIZE): Adjust. + (TRAMPOLINE_ALIGNMENT): Define. + * config/visium/visium.c (visium_option_override): Do not register + the machine-specific reorg pass here. + (visium_trampoline_init): Align the BRA insn on a 64-bit boundary + for the GR6. + (output_branch): Adjust threshold for long branch instruction. + * config/visium/visium.md (cpu): Move around. + (length): Adjust for the GR6. + +2019-02-15 Richard Biener <rguenther@suse.de> + Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/89278 + * tree-loop-distribution.c: Include tree-eh.h. + (generate_memset_builtin, generate_memcpy_builtin): Call + rewrite_to_non_trapping_overflow on builtin->size before passing it + to force_gimple_operand_gsi. + +2019-02-15 Jakub Jelinek <jakub@redhat.com> + + PR other/89342 + * optc-save-gen.awk: Handle optimize_fast like optimize_size or + optimize_debug. + * opth-gen.awk: Likewise. + +2019-02-15 Uroš Bizjak <ubizjak@gmail.com> + + * config/i386/i386.h (TARGET_SUBTARGET64_ISA_DEFAULT): + Enable MMX, SSE and SSE2 by default. + * config/i386/i386.c (ix86_option_override_internal): Do not + explicitly set MMX, SSE and SSE2 flags for TARGET_64BIT here. + +2019-02-14 Jakub Jelinek <jakub@redhat.com> + + PR rtl-optimization/89354 + * combine.c (make_extraction): Punt if extraction_mode is narrower + than len bits. + +2019-02-14 Maya Rashish <coypu@sdf.org> + + * config.gcc (*-*-netbsd*): Add netbsd-d.o. + * config/netbsd-d.c: New file. + * config/t-netbsd: Add netbsd-d.o + +2018-02-14 Steve Ellcey <sellcey@marvell.com> + + * config/aarch64/aarch64.c (aarch64_attribute_table): Change + affects_type_identity to true for aarch64_vector_pcs. + (aarch64_comp_type_attributes): New function. + (TARGET_COMP_TYPE_ATTRIBUTES): New macro. + +2019-02-14 Tamar Christina <tamar.christina@arm.com> + + PR target/88850 + * config/arm/iterators.md (ANY64): Add V4HF. + +2019-02-14 Martin Liska <mliska@suse.cz> + + PR rtl-optimization/89242 + * dce.c (delete_unmarked_insns): Call free_dominance_info we + process a transformation. + +2019-02-14 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/89314 + * fold-const.c (fold_binary_loc): Cast strlen argument to + const char * before dereferencing it. Formatting fixes. + + PR middle-end/89284 + * passes.def: Swap pass_ubsan and pass_early_warn_uninitialized. + +2019-02-13 Ian Lance Taylor <iant@golang.org> + + * optc-save-gen.awk: Set var_opt_hash for initial optimizations + and set current index for other optimizations. + +2019-02-13 Uroš Bizjak <ubizjak@gmail.com> + + * config/i386/sse.md (vec_set<VI4F_256_512:mode>_0): Use + nonimmediate_operand as operand 2 predicate. + (vec_set<VF2_512_256:mode>_0): Ditto. + (vec_set<VI8_AVX_AVX512F:mode>_0): Ditto. + (*vec_concatv2si): Remove alternative 2. + (*vec_concatv4si_0): Use vm constraint for alternative 0. + (*vec_concatv4si_0): Remove preferred_for_speed attribute. + (vec_concatv2di): Split alternatives 4,5,6 to ... + (*vec_concatv2di_0) ... new pattern. + +2019-02-13 Wilco Dijkstra <wdijkstr@arm.com> + + PR target/89190 + * config/arm/arm.c (ldm_stm_operation_p) Set + addr_reg_in_reglist correctly for first register. + (load_multiple_sequence): Remove dead base check. + (gen_ldm_seq): Correctly set write_back for Thumb-1. + +2019-02-13 Tamar Christina <tamar.christina@arm.com> + + PR target/88847 + * config/aarch64/aarch64-sve.md (*pred_mov<mode>, pred_mov<mode>): + Expose as @aarch64_pred_mov. + * config/aarch64/aarch64.c (aarch64_classify_address): + Use expand_insn which legitimizes operands. + +2019-02-13 Martin Liska <mliska@suse.cz> + + * builtins.h (expand_builtin_with_bounds): Remove declaration. + * calls.c (struct arg_data): Remove special_slot, pointer_arg + and pointer_offset fields. + (initialize_argument_information): Remove usage of dead + fields. + * cgraph.h (struct cgraph_thunk_info): Remove + add_pointer_bounds_args. + * cgraphunit.c (cgraph_node::expand_thunk): Remove usage of dead + fields. + (cgraph_node::assemble_thunks_and_aliases): Remove usage of dead + fields. + * config/i386/i386.c (ix86_function_arg_advance): Remove + unrelated comment. + (struct builtin_isa): Remove leaf_p and nothrow_p fields. + (def_builtin): Remove usage of dead fields. + (ix86_add_new_builtins): Likewise. + * ipa-fnsummary.c (compute_fn_summary): Likewise. + * ipa-icf.c (sem_function::equals_wpa): Likewise. + (sem_function::init): Likewise. + (sem_variable::merge): Likewise. + * ipa-visibility.c (function_and_variable_visibility): Likewise. + * ipa.c (symbol_table::remove_unreachable_nodes): Likewise. + * lto-cgraph.c (lto_output_node): Likewise. + (lto_output_varpool_node): Likewise. + (input_node): Likewise. + (input_varpool_node): Likewise. + * lto-streamer-out.c (lto_output): Likewise. + * tree-inline.c (expand_call_inline): Remove usage of + assign_stmts. + * tree-inline.h (struct copy_body_data): Likewise. + * varpool.c (varpool_node::dump): Likewise. + +2019-02-13 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/89303 + * tree-ssa-structalias.c (set_uids_in_ptset): Or in vi->is_heap_var + into pt->vars_contains_escaped_heap instead of setting + pt->vars_contains_escaped_heap to it. + + PR middle-end/89281 + * optabs.c (prepare_cmp_insn): Use UINTVAL (size) instead of + INTVAL (size), compare it to GET_MODE_MASK instead of + 1 << GET_MODE_BITSIZE. + + PR target/89290 + * config/i386/predicates.md (x86_64_immediate_operand): Allow + TLS UNSPECs offsetted by signed 32-bit CONST_INT even with + -mcmodel=large. + +2019-02-13 Martin Liska <mliska@suse.cz> + + PR lto/88858 + * cfgrtl.c (remove_barriers_from_footer): New function. + (try_redirect_by_replacing_jump): Use it. + (cfg_layout_redirect_edge_and_branch): Likewise. + +2019-02-13 Xiong Hu Luo <luoxhu@linux.vnet.ibm.com> + + * config/rs6000/altivec.h (vec_sbox_be, vec_cipher_be, + vec_cipherlast_be, vec_ncipher_be, vec_ncipherlast_be): New #defines. + * config/rs6000/crypto.md (CR_vqdi): New define_mode_iterator. + (crypto_vsbox_<mode>, crypto_<CR_insn>_<mode>): New define_insns. + * config/rs6000/rs6000-builtin.def (VSBOX_BE): New BU_CRYPTO_1. + (VCIPHER_BE, VCIPHERLAST_BE, VNCIPHER_BE, VNCIPHERLAST_BE): + New BU_CRYPTO_2. + * config/rs6000/rs6000.c (builtin_function_type) + <CRYPTO_BUILTIN_VSBOX_BE, CRYPTO_BUILTIN_VCIPHER_BE, + CRYPTO_BUILTIN_VCIPHERLAST_BE, CRYPTO_BUILTIN_VNCIPHER_BE, + CRYPTO_BUILTIN_VNCIPHERLAST_BE>: New switch options. + * doc/extend.texi (vec_sbox_be, vec_cipher_be, vec_cipherlast_be, + vec_ncipher_be, vec_ncipherlast_be): New builtin functions. + +2019-02-12 Pat Haugen <pthaugen@us.ibm.com> + + * doc/invoke.texi (RS/6000 and PowerPC Options): Remove duplicate + -maltivec. Delete -maltivec=be and -maltivec=le documentation. + +2019-02-12 H.J. Lu <hongjiu.lu@intel.com> + + PR target/89229 + * config/i386/i386.md (*movoi_internal_avx): Revert revision + 268678 and revision 268657. + (*movti_internal): Likewise. + +2019-02-12 Ilya Leoshkevich <iii@linux.ibm.com> + + PR target/89233 + * config/s390/s390.c (s390_decompose_address): Update comment. + (s390_check_qrst_address): Reject invalid address forms after + LRA. + +2019-02-12 Martin Liska <mliska@suse.cz> + + PR lto/88876 + * ipa-pure-const.c (propagate_pure_const): Revert hunk as + we need default values of funct_state for a function that + is not optimized. + +2019-02-12 Eric Botcazou <ebotcazou@adacore.com> + + * asan.c (asan_expand_mark_ifn): Take into account the alignment of + the object to pick the size of stores on strict-alignment platforms. + + * config/sparc/sparc.md (*movsi_insn): Minor tweak. + (*movdi_insn_sp32): Likewise. + (*movdi_insn_sp64): Likewise. + +2019-02-12 Jan Hubicka <hubicka@ucw.cz> + + PR lto/88677 + * cgraphunit.c (analyze_functions): Clear READONLY flag for external + types that needs constructiong. + * tree.h (may_be_aliased): Do not check TYPE_NEEDS_CONSTRUCTING. + +2019-02-12 Richard Biener <rguenther@suse.de> + + PR tree-optimization/89253 + * tree-ssa-loop-split.c (tree_ssa_split_loops): Check we can + duplicate the loop. + +2019-02-11 David Malcolm <dmalcolm@redhat.com> + + PR lto/88147 + * input.c (selftest::test_line_offset_overflow): New selftest. + (selftest::input_c_tests): Call it. + +2019-02-11 Martin Sebor <msebor@redhat.com> + + PR tree-optimization/88771 + * gimple-ssa-warn-restrict.c (pass_wrestrict::gate): Also enable + when -Wstringop-overflow is set. + (builtin_memref::builtin_memref): Adjust excessive upper bound + only when lower bound is not excessive. + (maybe_diag_overlap): Detect and diagnose excessive bounds via + -Wstringop-ovefflow. + (maybe_diag_offset_bounds): Rename... + (maybe_diag_access_bounds): ...to this. + (check_bounds_or_overlap): Adjust for name change above. + +2019-02-11 Martin Sebor <msebor@redhat.com> + + PR c++/87996 + * builtins.c (max_object_size): Move from here... + * builtins.h (max_object_size): ...and here... + * tree.c (max_object_size): ...to here... + * tree.h (max_object_size): ...and here. + +2019-02-11 Bill Schmidt <wschmidt@linux.ibm.com> + + * config/rs6000/rs6000.c (rs6000_gimple_fold_builtin): Shift-right + and shift-left vector built-ins need to include a TRUNC_MOD_EXPR + for correct semantics. + +2019-02-11 Alan Modra <amodra@gmail.com> + + * doc/invoke.texi (man page RS/6000 and PowerPC Options): Mention + -mlongcall and -mpltseq. + (RS/6000 and PowerPC Options <-mlongcall>): Mention inline PLT calls. + (RS/6000 and PowerPC Options <-mpltseq>): Document. + * config/rs6000/rs6000.h (TARGET_PLTSEQ): Define. + * config/rs6000/sysv4.opt (mpltseq): New option. + * config/rs6000/sysv4.h (TARGET_PLTSEQ): Redefine. + (SUBTARGET_OVERRIDE_OPTIONS): Error if given -mpltseq when assembler + support is lacking. Don't allow -mpltseq with -mbss-plt. + * config/rs6000/linux64.h (SUBSUBTARGET_OVERRIDE_OPTIONS): Warn if + -mpltseq given for ELFv1. + * config/rs6000/rs6000.c (rs6000_call_aix): Comment on UNSPEC_PLTSEQ. + Only use UNSPEC_PLTSEQ for inline PLT calls. + (rs6000_call_sysv, rs6000_sibcall_sysv): Expand comments. Only + use UNSPEC_PLTSEQ for inline PLT calls. + (rs6000_indirect_call_template_1, rs6000_longcall_ref), + (rs6000_call_aix, rs6000_call_sysv, rs6000_sibcall_sysv): Replace + uses of HAVE_AS_PLTSEQ with TARGET_PLTSEQ, simplifying. + * config/rs6000/rs6000.md (pltseq_tocsave_<mode>), + (pltseq_plt16_ha_<mode>, pltseq_plt16_lo_<mode>), + (pltseq_mtctr_<mode>): Likewise. + +2019-02-11 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> + + * acinclude.m4 (gcc_AC_INITFINI_ARRAY): Use 8-byte strings with + Solaris ld. + * configure: Regenerate. + +2019-02-11 Jakub Jelinek <jakub@redhat.com> + + PR bootstrap/88714 + * config/arm/ldrdstrd.md (*arm_ldrd, *arm_strd): Use q constraint + instead of r. + +2019-02-11 Hans-Peter Nilsson <hp@axis.com> + + * function.c (assign_parm_setup_block): Use the stored + size, not the passed size, when allocating stack-space, + also for a parameter with alignment larger than + MAX_SUPPORTED_STACK_ALIGNMENT. + +2019-02-11 Martin Liska <mliska@suse.cz> + + PR ipa/89009 + * ipa-cp.c (build_toporder_info): Remove usage of a param. + * ipa-inline.c (inline_small_functions): Likewise. + * ipa-pure-const.c (propagate_pure_const): Likewise. + (propagate_nothrow): Likewise. + * ipa-reference.c (propagate): Likewise. + * ipa-utils.c (struct searchc_env): Remove unused field. + (searchc): Always search across AVAIL_INTERPOSABLE. + (ipa_reduced_postorder): Always allow AVAIL_INTERPOSABLE as + the only called IPA pure const can properly not propagate + across interposable boundary. + * ipa-utils.h (ipa_reduced_postorder): Remove param. + +2019-02-11 Chung-Ju Wu <jasonwucj@gmail.com> + + * config/nds32/nds32.md (call_internal, call_value_internal, + sibcall_internal, sibcall_value_internal): Use SImode for mem rtx. + +2019-02-11 Hans-Peter Nilsson <hp@axis.com> + + * config/cris/cris.c (cris_preferred_minimum_alignment): Fix name + typo. + +2019-02-10 H.J. Lu <hongjiu.lu@intel.com> + + * config/i386/constraints.md (Yd): Replace AVX512BW with AVX512DQ + in comments + +2019-02-10 Chung-Ju Wu <jasonwucj@gmail.com> + + * config.gcc (with_nds32_lib): Set default --with-nds32-lib correctly. + +2019-02-10 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/89268 + * tree-if-conv.c (version_loop_for_if_conversion): Push to preds only + if preds is non-NULL. + +2019-02-09 Jan Hubicka <hubicka@ucw.cz> + + PR lto/89272 + * tree.c (fld_simplified_type_name): Also keep TYPE_DECL for + polymorphic types. + +2019-02-10 Monk Chiang <sh.chiang04@gmail.com> + + * config/nds32/nds32.md (trap): New pattern. + +2019-02-10 Monk Chiang <sh.chiang04@gmail.com> + + * config/nds32/nds32.c (nds32_dwarf_register_span): Refine register + dwarf span. + +2019-02-10 Chung-Ju Wu <jasonwucj@gmail.com> + + * config/nds32/nds32-md-auxiliary.c (nds32_spilt_doubleword): Support + to split POST_INC. + +2019-02-09 Jan Hubicka <hubicka@ucw.cz> + + * ipa-visibility.c (localize_node): Also do not localize + LDPR_PREVAILING_DEF_IRONLY_EXP. + +2019-02-09 Jan Hubicka <hubicka@ucw.cz> + + PR lto/87957 + * tree.c (fld_simplified_type_name): Use DECL_ASSEMBLER_NAME_SET_P + instead of type_with_linkage. + +2019-02-09 Jan Hubicka <hubicka@ucw.cz> + + PR ipa/88755 + * params.def (uninlined-function-insns, uninlined-function-time, + uninlined-thunk-insns, uninlined-thunk-time): Add artificial upper + bound so we don't get overflows. + +2019-02-09 Aaron Sawdey <acsawdey@linux.ibm.com> + + * config/rs6000/rs6000-string.c (expand_compare_loop, + expand_block_compare): Insert REG_BR_PROB notes in inline expansion of + memcmp/strncmp. + +2019-02-09 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/89246 + * config/i386/i386.c (ix86_simd_clone_compute_vecsize_and_simdlen): + If !node->definition and TYPE_ARG_TYPES is non-NULL, use + TYPE_ARG_TYPES instead of DECL_ARGUMENTS. + +2019-02-09 Alan Modra <amodra@gmail.com> + + PR target/88343 + * config/rs6000/rs6000.c (save_reg_p): Correct calls_eh_return + case. Match logic in rs6000_emit_prologue emitting pic_offset_table + setup. + +2019-02-08 Vladimir Makarov <vmakarov@redhat.com> + + PR middle-end/88560 + * lra-constraints.c (process_alt_operands): Don't increase reject + for memory when offset memory is required. + +2019-02-08 Robin Dapp <rdapp@linux.ibm.com> + + * config/s390/vector.md: Implement vector copysign. + +2019-02-08 H.J. Lu <hongjiu.lu@intel.com> + + * expr.c (expand_constructor): Correct indentations. + +2019-02-08 Richard Biener <rguenther@suse.de> + + PR tree-optimization/89247 + * tree-if-conv.c: Include tree-cfgcleanup.h. + (version_loop_for_if_conversion): Record LOOP_VECTORIZED call. + (tree_if_conversion): Pass through predicate vector. + (pass_if_conversion::execute): Do CFG cleanup and SSA update + inline, see if any if-converted loops we refrece in + LOOP_VECTORIZED calls vanished and fixup. + * tree-if-conv.h (tree_if_conversion): Adjust prototype. + +2019-02-08 Ilya Leoshkevich <iii@linux.ibm.com> + + * config/s390/constraints.md (jdd): New constraint. + +2019-02-08 H.J. Lu <hongjiu.lu@intel.com> + + PR target/89229 + * config/i386/i386.md (*movoi_internal_avx): Set mode to XI for + upper 16 vector registers without TARGET_AVX512VL. + (*movti_internal): Likewise. + +2019-02-08 Jakub Jelinek <jakub@redhat.com> + + PR rtl-optimization/89234 + * except.c (copy_reg_eh_region_note_forward): Return if note_or_insn + is a NOTE, CODE_LABEL etc. - rtx_insn * other than INSN_P. + (copy_reg_eh_region_note_backward): Likewise. + +2019-02-08 Richard Biener <rguenther@suse.de> + + PR middle-end/89223 + * tree-data-ref.c (initialize_matrix_A): Fail if constant + doesn't fit in HWI. + (analyze_subscript_affine_affine): Handle failure from + initialize_matrix_A. + +2019-02-08 Jakub Jelinek <jakub@redhat.com> + + * cfganal.c (pre_and_rev_post_order_compute_fn): Use fn instead of + cfun everywhere. + +2019-02-07 David Malcolm <dmalcolm@redhat.com> + + PR tree-optimization/86637 + PR tree-optimization/89235 + * tree-vect-loop.c (optimize_mask_stores): Add an + auto_purge_vect_location sentinel to ensure that vect_location is + purged on exit. + * tree-vectorizer.c + (auto_purge_vect_location::~auto_purge_vect_location): New dtor. + (try_vectorize_loop_1): Add an auto_purge_vect_location sentinel + to ensure that vect_location is purged on exit. + (pass_slp_vectorize::execute): Likewise, replacing the manual + reset. + * tree-vectorizer.h (class auto_purge_vect_location): New class. + +2019-02-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/aarch64/iterators.md (max_opp): New code_attr. + (USMAX): New code iterator. + * config/aarch64/predicates.md (aarch64_smin): New predicate. + (aarch64_smax): Likewise. + * config/aarch64/aarch64-simd.md (abd<mode>_3): Rename to... + (*aarch64_<su>abd<mode>_3): ... Change RTL representation to + MINUS (MAX MIN). + +2019-02-07 H.J. Lu <hongjiu.lu@intel.com> + + PR target/89229 + * config/i386/i386.md (*movoi_internal_avx): Set mode to OI + for TARGET_AVX512VL. + (*movti_internal): Set mode to TI for TARGET_AVX512VL. + +2019-02-07 Andreas Krebbel <krebbel@linux.ibm.com> + + * config/s390/s390-builtin-types.def: Add new types. + * config/s390/s390-builtins.def: (s390_vec_xl, s390_vec_xld2) + (s390_vec_xlw4): Make the memory operand into a const pointer. + (s390_vec_xld2, s390_vec_xlw4): Add a variant for single precision + float. + * config/s390/s390-c.c (s390_expand_overloaded_builtin): Generate + a new vector type with the alignment of the scalar memory operand. + +2019-02-07 Matthew Malcomson <matthew.malcomson@arm.com> + Jakub Jelinek <jakub@redhat.com> + + PR bootstrap/88714 + * config/arm/arm-protos.h (valid_operands_ldrd_strd, + arm_count_ldrdstrd_insns): New declarations. + * config/arm/arm.c (mem_ok_for_ldrd_strd): Remove broken handling of + MINUS. + (valid_operands_ldrd_strd): New function. + (arm_count_ldrdstrd_insns): New function. + * config/arm/ldrdstrd.md: Change peepholes to generate PARALLEL SImode + sets instead of single DImode set and define new insns to match this. + +2019-02-07 Tamar Christina <tamar.christina@arm.com> + + * config/aarch64/aarch64-builtins.c (aarch64_fcmla_lane_builtin_data): + Make it a C initializer. + +2019-02-07 Tamar Christina <tamar.christina@arm.com> + + PR/target 88850 + * config/arm/neon.md (*neon_mov<mode>): Add r -> r case. + +2019-02-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/neon.md (neon_<sup>dot<vsi2qi>): + Use neon_dot<q> for type. + (neon_<sup>dot_lane<vsi2qi>): Likewise. + +2019-02-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/aarch64/aarch64-simd.md (aarch64_<sur>dot<vsi2qi>): + Use neon_dot<q> for type. + (aarch64_<sur>dot_lane<vsi2qi>): Likewise. + (aarch64_<sur>dot_laneq<vsi2qi>): Likewise. + +2019-02-06 Vladimir Makarov <vmakarov@redhat.com> + + PR rtl-optimization/89225 + * lra-constaints.c (simplify_operand_subreg): Add subreg mode + sizes check. + +2019-02-06 Eric Botcazou <ebotcazou@adacore.com> + + * config/i386/i386.c (ix86_expand_prologue): Emit a memory blockage + after restoring registers saved to allocate the frame on Windows. + +2019-02-06 Richard Biener <rguenther@suse.de> + + PR tree-optimization/89182 + * graphite.h (cached_scalar_evolution_in_region): Declare. + * graphite.c (struct seir_cache_key): New. + (struct sese_scev_hash): Likewise. + (seir_cache): New global. + (cached_scalar_evolution_in_region): New function. + (graphite_transform_loops): Allocate and release seir_cache. + * graphite-isl-ast-to-gimple.c (get_rename_from_scev): Use + cached_scalar_evolution_in_region. + * graphite-scop-detection.c (scop_detection::can_represent_loop): + Simplify. + (scop_detection::graphite_can_represent_expr: Use + cached_scalar_evolution_in_region. + (scop_detection::stmt_simple_for_scop_p): Likewise. + (find_params_in_bb): Likewise. + (gather_bbs::before_dom_children): Likewise. + * graphite-sese-to-poly.c (create_pw_aff_from_tree): Likewise. + (add_loop_constraints): Likewise. + +2019-02-06 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/89210 + * fold-const-call.c (fold_const_vec_convert): Pass true as last + operand to new_unary_operation only if both element types are integral + and it isn't a widening conversion. Return NULL_TREE if + new_unary_operation failed. + +2019-02-05 Andreas Krebbel <krebbel@linux.ibm.com> + + PR target/88856 + * config/s390/s390.md: Remove load and test FP splitter. + +2019-02-05 Aaron Sawdey <acsawdey@linux.ibm.com> + + PR target/89112 + * config/rs6000/rs6000-string.c (do_ifelse, expand_cmp_vec_sequence, + expand_compare_loop, expand_block_compare_gpr, + expand_strncmp_align_check, expand_strncmp_gpr_sequence): Insert + REG_BR_PROB notes in inline expansion of memcmp/strncmp. Add + #include "profile-count.h" and "predict.h" for types and functions + needed to work with REG_BR_PROB notes. + +2019-02-05 Aaron Sawdey <acsawdey@linux.ibm.com> + + PR target/89112 + * config/rs6000/rs6000.md (<bd>tf_<mode>): Generate a local label + for the long branch case. + +2019-02-05 Jakub Jelinek <jakub@redhat.com> + + PR target/89188 + * dce.c (delete_unmarked_insns): Don't remove no-op moves if they + can throw, non-call exceptions are enabled and we can't delete + dead exceptions or alter cfg. Set must_clean if + delete_insn_and_edges returns true, don't set it blindly for calls. + Assert that delete_unreachable_blocks is called only if can_alter_cfg. + + PR rtl-optimization/89195 + * combine.c (make_extraction): For MEMs, don't extract bytes outside + of the original MEM. + +2019-02-05 Martin Liska <mliska@suse.cz> + + PR gcov-profile/89000 + * gcov.c (function_summary): Remove argument. + (file_summary): New function. + (print_usage): Replace tabs with spaces. + (generate_results): Use new function file_summary. + +2019-02-05 Jakub Jelinek <jakub@redhat.com> + + PR target/89186 + * optabs.c (prepare_cmp_insn): Pass x and y to + emit_block_comp_via_libcall rather than XEXP (x, 0) and XEXP (y, 0). + +2019-02-05 Richard Biener <rguenther@suse.de> + + PR middle-end/89150 + * bitmap.h (struct bitmap_obstack): Do not mark GTY. + (struct bitmap_element): Drop chain_prev so we properly recurse on + the prev member, supporting tree views. + (struct bitmap_head): GTY skip the obstack member. + +2019-02-04 Alexander Monakov <amonakov@ispras.ru> + + PR c/88698 + * doc/extend.texi (Vector Extensions): Add an example of using vector + types together with x86 intrinsics. + +2019-02-04 Alan Modra <amodra@gmail.com> + + * config/rs6000/rs6000.c (rs6000_indirect_call_template_1): Increase + str[] size to 160, and comment. + +2019-02-04 Alan Modra <amodra@gmail.com> + + * config/rs6000/rs6000.c (rs6000_indirect_call_template_1), + (rs6000_pltseq_template): Guard output of TLS markers with + TARGET_TLS_MARKERS. + (rs6000_longcall_ref, rs6000_call_aix, rs6000_call_sysv), + (rs6000_sibcall_sysv): Ignore TARGET_TLS_MARKERS when deciding + to use inline PLT sequences. + * config/rs6000/rs6000.md (pltseq_tocsave_<mode>), + (pltseq_plt16_ha_<mode>, pltseq_plt16_lo_<mode>), + (pltseq_mtctr_<mode>): Don't test TARGET_TLS_MARKERS in predicate. + +2019-02-04 Martin Liska <mliska@suse.cz> + + PR ipa/88985 + * ipa-fnsummary.c (estimate_edge_devirt_benefit): Bail + out when ipa_fn_summaries does not contain entry for callee. + +2019-02-04 Eric Botcazou <ebotcazou@adacore.com> + + * config/sparc/sparc.h: Remove superfluous blank lines. + * config/sparc/sparc.c (global_offset_table_rtx): Rename into... + (got_register_rtx): ...this. + (sparc_got): Adjust to above renaming. + (sparc_tls_got): Likewise. + (sparc_delegitimize_address): Likewise. + (sparc_output_mi_thunk): Likewise. + (sparc_init_pic_reg): Likewise. + (save_local_or_in_reg_p): Fix test on the GOT register. + (USE_HIDDEN_LINKONCE): Move around. + (get_pc_thunk_name): Likewise. + (gen_load_pcrel_sym): Likewise. + (load_got_register): Likewise. + +2019-02-04 Kito Cheng <kito.cheng@gmail.com> + + * config/nds32/linux.h (GLIBC_DYNAMIC_LINKER): Define the naming rule + of the dynamic linker: "ld-linux-nds32[le|be][f].so.1". + +2019-02-04 Chung-Ju Wu <jasonwucj@gmail.com> + + * config/nds32/nds32.c (nds32_legitimate_address_p): Add TLS model + into consideration. + +2019-02-04 Chung-Ju Wu <jasonwucj@gmail.com> + + * config.gcc (with_nds32_lib, glibc): + Remove TARGET_DEFAULT_TLSDESC_TRAMPOLINE=0 setting. + * config/nds32/linux.h (TARGET_DEFAULT_TLSDESC_TRAMPOLINE): Delete. + (NDS32_TLSDESC_TRAMPOLINE_SPEC): Delete. + +2019-02-03 Uroš Bizjak <ubizjak@gmail.com> + + PR target/89071 + * config/i386/i386.md (*sqrt<mode>2_sse): Add (v,0) alternative. + Do not prefer (v,v) alternative for non-AVX targets and (m,v) + alternative for speed when TARGET_SSE_PARTIAL_REG_DEPENDENCY is set. + (*rcpsf2_sse): Ditto. + (*rsqrtsf2_sse): Ditto. + (sse4_1_round<mode<2): Ditto. + +2019-02-03 Richard Biener <rguenther@suse.de> + + PR debug/87295 + * dwarf2out.c (copy_ancestor_tree): Register non-stubs as + orig. + +2019-02-02 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/87887 + * config/i386/i386.c (ix86_simd_clone_compute_vecsize_and_simdlen): + Punt with warning on aggregate return or argument types. Ignore + type/mode checking for uniform arguments. + +2019-02-01 Segher Boessenkool <segher@kernel.crashing.org> + + * combine.c (try_combine): Do not print "Can't combine" messages unless + printing failed combination attempts. + +2019-02-01 Martin Jambor <mjambor@suse.cz> + + PR hsa/87863 + * omp-grid.c (grid_mark_variable_segment): Set assembler name of group + segment and global segment variables before making them static. + +2019-02-01 Martin Jambor <mjambor@suse.cz> + + * omp-grid.c (grid_target_follows_gridifiable_pattern): Guard two + missed optimization dump with dump_enabled_p. + +2019-02-01 Richard Biener <rguenther@suse.de> + + PR middle-end/88597 + * tree-scalar-evolution.c (analyze_scalar_evolution): Set up + the instantiate cache. + (instantiate_scev_binary): Elide second operand procesing + if equal to the first. + * tree-chrec.c (chrec_contains_symbols): Add visited set. + (chrec_contains_undetermined): Likewise. + (tree_contains_chrecs): Likewise. + +2019-02-01 Jan Hubicka <hubicka@ucw.cz> + + * parms.def (MAX_INLINE_INSNS_SINGLE): Reduce from 400 to 200. + +2019-02-01 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/89143 + * wide-int-range.h (wide_int_range_absu): Declare. + * wide-int-range.cc (wide_int_range_absu): New function. + * tree-vrp.c (extract_range_from_unary_expr): Handle ABSU_EXPR. + + PR tree-optimization/88107 + * tree-cfg.c (find_outermost_region_in_block): Add ALL argument, + instead of assertion that eh_region_outermost is non-NULL, if it + is NULL, set *ALL to true and return NULL. + (move_sese_region_to_fn): Adjust caller, if all is set, call + duplicate_eh_regions with NULL region. + +2019-02-01 Richard Biener <rguenth@suse.de> + + PR rtl-optimization/88593 + * mode-switching.c (optimize_mode_switching): Free dominators before + calling cleanup_cfg. + +2019-02-01 Bin Cheng <bin.cheng@linux.alibaba.com> + + PR tree-optimization/88932 + * tree-predcom.c (try_combine_chains): Get loop bbs in dom order. + +2019-01-31 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/89137 + * omp-low.c (lower_omp_task_reductions): Drop redundant test to avoid + bogus clang warning. + +2019-01-31 Uroš Bizjak <ubizjak@gmail.com> + + PR target/89071 + * config/i386/i386.md (*extendsfdf2): Split out reg->reg + alternative to avoid partial SSE register stall for TARGET_AVX. + (truncdfsf2): Ditto. + (sse4_1_round<mode>2): Ditto. + +2018-01-31 Bill Schmidt <wschmidt@linux.ibm.com> + + PR tree-optimization/89008 + * gimple-ssa-strength-reduction.c (slsr_process_mul): Don't + process anything of the form X * 0. + +2019-01-31 Richard Biener <rguenther@suse.de> + + PR tree-optimization/89135 + * tree-ssa-phiprop.c (pass_phiprop::execute): Skip blocks + with abnormal preds. + +2019-01-31 Jakub Jelinek <jakub@redhat.com> + + PR sanitizer/89124 + * ipa-inline.c (sanitize_attrs_match_for_inline_p): Allow inlining + always_inline callees into no_sanitize_address callers. + +2019-01-31 Richard Biener <rguenther@suse.de> + + PR rtl-optimization/89115 + * lra.c (lra_rtx_hash): Properly hash CONST_INT values. + +2019-01-30 Martin Sebor <msebor@redhat.com> + + PR other/89106 + * doc/extend.texi (cast to a union): Correct and expand. + +2019-01-30 Vladimir Makarov <vmakarov@redhat.com> + + PR rtl-optimization/87246 + * lra-constraints.c (simplify_operand_subreg): Reload memory + in subreg if the address became invalid. + +2019-01-30 Bill Schmidt <wschmidt@linux.ibm.com> + + PR target/87064 + * config/rs6000/vsx.md (*vsx_reduc_<VEC_reduc_name>_v4sf_scalar): + Disable for little-endian. + +2019-01-30 Richard Biener <rguenther@suse.de> + + PR rtl-optimization/89115 + * opts.c (default_options_optimization): Reduce + PARAM_MAX_DSE_ACTIVE_LOCAL_STORES by a factor of 10 at -O1. + Make PARAM_LOOP_INVARIANT_MAX_BBS_IN_LOOP reduction relative + to the default. + +2019-01-30 Kelvin Nilsen <kelvin@gcc.gnu.org> + + * config/rs6000/rs6000-c.c (altivec-resolve_overloaded_builtin): + Change handling of ALTIVEC_BUILTIN_VEC_EXTRACT. Coerce result to + type of vector element when vec_extract is implemented by direct + move. + +2019-01-30 Thomas Schwinge <thomas@codesourcery.com> + + * doc/invoke.texi (C Language Options): List "-fopenacc-dim". + +2019-01-30 Richard Biener <rguenther@suse.de> + + PR tree-optimization/89111 + * tree-ssa-loop-im.c (gather_mem_refs_stmt): Restrict + canonicalization to appropriately sized access types. + +2019-01-30 Jakub Jelinek <jakub@redhat.com> + + PR c++/89105 + * config/i386/i386.c (ix86_warn_parameter_passing_abi): Don't warn + for arguments to functions that are TU-local and shouldn't be + referenced by assembly. + +2019-01-30 Ulrich Drepper <drepper@redhat.com> + + * dumpfile.c (opt_info_switch_p_1): Ignore '-' if it appears + after '='. + +2019-01-29 Martin Sebor <msebor@redhat.com> + + PR c/88956 + * gimple-fold.c (fold_array_ctor_reference): Avoid zero-length arrays. + +2019-01-29 Jakub Jelinek <jakub@redhat.com> + + PR c++/66676 + PR ipa/89104 + * omp-simd-clone.c (simd_clone_clauses_extract) + <case OMP_CLAUSE_ALIGNED>: Ignore clauses with NULL + OMP_CLAUSE_ALIGNED_ALIGNMENT. + +2019-01-29 Vineet Gupta <vgupta@synopsys.com> + + * config.gcc: Force .init_array for ARC. + +2019-01-29 Richard Biener <rguenther@suse.de> + + PR debug/87295 + * dwarf2out.c (collect_skeleton_dies): New helper. + (copy_decls_for_unworthy_types): Call it. + (build_abbrev_table): Assert we do not try to replace + DW_AT_signature refs with local refs. + +2019-01-28 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/89002 + * gimplify.c (gimplify_omp_for): When adding OMP_CLAUSE_*_GIMPLE_SEQ + for lastprivate/linear IV, push gimplify context around gimplify_assign + and, if it needed any temporaries, pop it into a gimple bind around the + sequence. + +2019-01-28 Bernd Edlinger <bernd.edlinger@hotmail.de> + + * common.opt (-Wattribute-alias): Remove "no-" from name. + Make -Wattribute-alias command line option and + #pragma GCC diagnostic ignored "-Wattribute-alias" work again. + +2019-01-28 Jakub Jelinek <jakub@redhat.com> + + PR target/89073 + * doc/invoke.texi (-mclwb, -mprfchw, -mrdpid, -mrdseed, -msgx, + -madx, -mhle, -mavx5124fmaps, -mavx512vnni, -mavx5124vnniw): Document + x86 ISA options. + (bmi2): Add missing @opindex. + * doc/extend.texi (x86 target attribute): Move fma4, lwp, ssse3 + options alphabetically. Add missing 3dnow, 3dnowa, adx, avx, avx2, + avx5124fmaps, avx5124vnniw, avx512bitalg, avx512bw, avx512cd, + avx512dq, avx512er, avx512f, avx512ifma, avx512pf, avx512vbmi, + avx512vbmi2, avx512vl, avx512vnni, avx512vpopcntdq, bmi, bmi2, + cldemote, clflushopt, clwb, clzero, crc32, cx16, f16c, fma, fsgsbase, + fxsr, gfni, hle, lzcnt, movbe, movdir64b, movdiri, mwaitx, pconfig, + pku, prefetchwt1, prfchw, ptwrite, rdpid, rdrnd, rdseed, rtm, sahf, + sgx, sha, shstk, tbm, vaes, vpclmulqdq, waitpkg, wbnoinvd, xsave, + xsavec, xsaveopt and xsaves options. + +2019-01-28 Richard Biener <rguenther@suse.de> + + PR debug/89076 + * dwarf2out.c (gen_subprogram_die): Remove leftover from MPX + support removal. + +2019-01-28 Richard Biener <rguenther@suse.de> + + PR tree-optimization/88739 + * tree-cfg.c (verify_types_in_gimple_reference): Verify + BIT_FIELD_REFs only are applied to mode-precision operands + when they are integral. + (verify_gimple_assign_ternary): Likewise for BIT_INSERT_EXPR. + * tree-ssa-sccvn.c (vn_reference_lookup_3): Avoid generating + BIT_FIELD_REFs of non-mode-precision integral operands. + +2019-01-27 Jakub Jelinek <jakub@redhat.com> + + PR target/87214 + * config/i386/sse.md + (<mask_codefor>avx512dq_shuf_<shuffletype>64x2_1<mask_name>, + avx512f_shuf_<shuffletype>64x2_1<mask_name>): Ensure the + first constants in pairs are multiples of 2. Formatting fixes. + (avx512vl_shuf_<shuffletype>32x4_1<mask_name>, + avx512vl_shuf_<shuffletype>32x4_1<mask_name>): Ensure the + first constants in each quadruple are multiples of 4. Formatting fixes. + +2019-01-26 Martin Jambor <mjambor@suse.cz> + + PR ipa/88933 + * tree-inline.c: Include tree-cfgcleanup.h. + (delete_unreachable_blocks_update_callgraph): Move... + * tree-cfgcleanup.c (delete_unreachable_blocks_update_callgraph): + ...here, make externally visible, make second argument bool, adjust + all callers. + * tree-cfgcleanup.c: Include cgraph.h. + * tree-cfgcleanup.h (delete_unreachable_blocks_update_callgraph): + Declare. + * ipa-prop.c: Include tree-cfgcleanup.h. + (ipcp_transform_function): Call + delete_unreachable_blocks_update_callgraph instead of cleaning uo CFG. + +2019-01-25 Vladimir Makarov <vmakarov@redhat.com> + + PR rtl-optimization/88846 + * ira.c (process_set_for_memref_referenced_p): New. + (memref_referenced_p): Add new param. Use + process_set_for_memref_referenced_p. Add new switch cases. + (memref_used_between_p): Pass new arg to memref_referenced_p. + +2019-01-25 Richard Earnshaw <rearnsha@arm.com> + + PR target/88469 + * config/aarch64/aarch64.c (aarch64_function_arg_alignment): Add new + argument ABI_BREAK. Set to true if the calculated alignment has + changed in gcc-9. Check bit-fields for their base type alignment. + (aarch64_layout_arg): Warn if argument passing has changed in gcc-9. + (aarch64_function_arg_boundary): Likewise. + (aarch64_gimplify_va_arg_expr): Likewise. + +2019-01-25 Richard Sandiford <richard.sandiford@arm.com> + + PR middle-end/89037 + * varasm.c (output_constructor_bitfield): Use wi::extract_uhwi + instead of accessing TREE_INT_CST_ELT directly. + +2019-01-25 Christophe Lyon <christophe.lyon@linaro.org> + + * doc/sourcebuild.texi (Environment attributes): Add fenv and + fenv_exceptions description. + +2019-01-25 Wilco Dijkstra <wdijkstr@arm.com> + + PR rtl-optimization/87763 + * config/aarch64/aarch64.c (aarch64_select_cc_mode): + Allow SUBREG when matching CC_NZmode compare. + +2019-01-25 Richard Biener <rguenther@suse.de> + + PR tree-optimization/89049 + * tree-vect-loop.c (vect_compute_single_scalar_iteration_cost): + Look at the pattern stmt to determine if the stmt is vectorized. + +2019-01-25 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/aarch64-sve.md (*pred_mov<mode>) + (pred_mov<mode>): Handle all-register forms using both a new + alternative and a split. + +2019-01-25 Richard Biener <rguenther@suse.de> + + PR tree-optimization/86865 + * graphite-scop-detection.c (scop_detection::can_represent_loop): + Reject non-do-while loops. + +2019-01-24 Peter Bergner <bergner@linux.ibm.com> + + * config/rs6000/altivec.md (build_vector_mask_for_load): Use MEM_P. + * config/rs6000/constraints.md (Q constraint): Use REG_P. + * config/rs6000/darwin.h (PREFERRED_RELOAD_CLASS): Use SYMBOL_REF_P. + * config/rs6000/freebsd64.h (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P): Use + SYMBOL_REF_P, CONST_INT_P and CONST_DOUBLE_P. + * config/rs6000/linux64.h (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P): Likewise. + * config/rs6000/predicates.md (altivec_register_operand, vint_operand, + vsx_register_operand, vsx_reg_sfsubreg_ok, vfloat_operand, + vlogical_operand, gpc_reg_operand, int_reg_operand, + int_reg_operand_not_pseudo): Use SUBREG_P and HARD_REGISTER_P. + (ca_operand, base_reg_operand, htm_spr_reg_operand, cc_reg_operand, + cc_reg_not_cr0_operand, input_operand): Use SUBREG_P. + (save_world_operation, restore_world_operation, lmw_operation, + stmw_operation): Use MEM_P and REG_P. + (tie_operand): Use MEM_P. + (vrsave_operation, crsave_operation): Use REG_P. + (mfcr_operation, mtcrf_operation): Use REG_P and CONST_INT_P. + (fpr_reg_operand): Use SUBREG_P and HARD_REGISTER_NUM_P. + (quad_int_reg_operand): Use HARD_REGISTER_NUM_P. + (call_operand): Use HARD_REGISTER_P. + (indexed_or_indirect_operand, altivec_indexed_or_indirect_operand): + Use CONST_INT_P. + (lwa_operand): Use SUBREG_P, REG_P and CONST_INT_P. + * config/rs6000/rs6000-p8swap.c (insn_is_load_p, insn_is_store_p, + quad_aligned_load_p, replace_swapped_aligned_store, + recombine_lvx_pattern, replace_swapped_aligned_load, + recombine_stvx_pattern): Use MEM_P. + (const_load_sequence_p, adjust_vperm, replace_swapped_load_constant): + Use MEM_P and SYMBOL_REF_P. + (rtx_is_swappable_p): Use REG_P and CONST_INT_P. + (insn_is_swappable_p): Use REG_P and MEM_P. + (insn_is_swap_p, (alignment_mask): Use CONST_INT_P. + * config/rs6000/rs6000-string.c (expand_block_clear, expand_block_move): + Use CONST_INT_P. + * config/rs6000/rs6000.c (rs6000_secondary_reload, rs6000_emit_cmove): + Use CONST_DOUBLE_P. + (rs6000_output_move_128bit): Use CONST_DOUBLE_P, CONST_INT_P and + CONST_WIDE_INT_P. + (rs6000_legitimize_address): Use CONST_DOUBLE_P, CONST_INT_P, + CONST_WIDE_INT_P, REG_P and SYMBOL_REF_P. + (rs6000_emit_move): Use CONST_DOUBLE_P, CONST_INT_P, HARD_REGISTER_P, + HARD_REGISTER_NUM_P, MEM_P, REG_P, SUBREG_P, SYMBOL_REF_P and + reg_or_subregno: + (output_toc): Use CONST_DOUBLE_P, CONST_INT_P and SYMBOL_REF_P. + (easy_altivec_constant, rs6000_legitimate_offset_address_p, + rs6000_mode_dependent_address, rs6000_expand_mtfsf_builtin, + rs6000_expand_set_fpscr_rn_builtin, rs6000_expand_set_fpscr_drn_builtin, + rs6000_expand_unop_builtin, INT_P, rs6000_generate_compare, + rs6000_machopic_legitimize_pic_address, rs6000_split_logical_inner, + rs6000_split_logical_di): Use CONST_INT_P. + (rs6000_legitimize_reload_address): Use CONST_INT_P, HARD_REGISTER_P, + REG_P and SYMBOL_REF_P. + (setup_incoming_varargs, rs6000_rtx_costs): Use CONST_INT_P and MEM_P. + (print_operand): Use CONST_INT_P, MEM_P and REG_P. + (virtual_stack_registers_memory_p, rs6000_legitimate_address_p, + mems_ok_for_quad_peep): Use CONST_INT_P and REG_P. + (rs6000_secondary_reload_memory): Use CONST_INT_P and SUBREG_P. + (small_data_operand, print_operand_address): Use CONST_INT_P and + SYMBOL_REF_P. + (split_stack_arg_pointer_used_p): Use HARD_REGISTER_P. + (rs6000_init_hard_regno_mode_ok, direct_move_p): + Use HARD_REGISTER_NUM_P. + (rs6000_secondary_reload_gpr): Use HARD_REGISTER_NUM_P and MEM_P. + (rs6000_secondary_reload_class): Use HARD_REGISTER_NUM_P, REG_P, + SUBREG_P and SYMBOL_REF_P. + (register_to_reg_type, rs6000_secondary_reload_inner): Use SUBREG_P + and HARD_REGISTER_NUM_P. + (rs6000_adjust_vec_address): Use HARD_REGISTER_NUM_P and + reg_or_subregno. + (rs6000_adjust_cost, find_mem_ref): Use MEM_P. + (macho_lo_sum_memory_operand, rs6000_eliminate_indexed_memrefs): Use + MEM_P and REG_P. + (legitimate_indirect_address_p, legitimate_lo_sum_address_p, + registers_ok_for_quad_peep, rs6000_output_function_epilogue, + find_addr_reg): Use REG_P. + (altivec_expand_vec_perm_const): Use REG_P and SUBREG_P. + (rs6000_emit_le_vsx_move): Use SUBREG_P. + (offsettable_ok_by_alignment, constant_pool_expr_p, + legitimate_small_data_p, rs6000_output_dwarf_dtprel, + rs6000_delegitimize_address, rs6000_const_not_ok_for_debug_p, + rs6000_cannot_force_const_mem, rs6000_output_addr_const_extra, + rs6000_assemble_integer, create_TOC_reference, + rs6000_emit_allocate_stack, rs6000_xcoff_encode_section_info, + rs6000_call_aix, rs6000_call_aix): Use SYMBOL_REF_P. + (rs6000_split_vec_extract_var): Use reg_or_subregno. + * config/rs6000/rtems.h (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P): Use + CONST_DOUBLE_P, CONST_INT_P and SYMBOL_REF_P. + * config/rs6000/sysv4.h (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P): Likewise. + * config/rs6000/xcoff.h (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P): Likewise. + * config/rs6000/rs6000.h (RS6000_SYMBOL_REF_TLS_P): Use SYMBOL_REF_P. + (REGNO_OK_FOR_INDEX_P, REGNO_OK_FOR_BASE_P): Use HARD_REGISTER_NUM_P. + (INT_REG_OK_FOR_INDEX_P, INT_REG_OK_FOR_BASE_P): Use HARD_REGISTER_P. + (CONSTANT_ADDRESS_P): Use CONST_INT_P and SYMBOL_REF_P. + * config/rs6000/rs6000.md (define_expands strlensi, mod<mode>3 + and cbranch<mode>4): Use CONST_INT_P. + (multiple define_splits): Use REG_P and SUBREG_P. + (define_expands call, call_value): Use MEM_P. + (define_expands sibcall, sibcall_value): Use CONST_INT_P and MEM_P. + (define insn *mtcrfsi): Use CONST_INT_P and REG_P. + * config/rs6000/vsx.md (*vsx_le_perm_load_<mode>, + *vsx_le_perm_load_v8hi, *vsx_le_perm_load_v16qi): Use HARD_REGISTER_P + and HARD_REGISTER_NUM_P. + (multiple define_splits): Use HARD_REGISTER_NUM_P. + +2019-01-24 Uroš Bizjak <ubizjak@gmail.com> + + PR rtl-optimization/88948 + * rtl.h (prepare_copy_insn): New prototype. + * gcse.c (prepare_copy_insn): New function, split out from + process_insert_insn. + (process_insert_insn): Use prepare_copy_insn. + * store-motion.c (replace_store_insn): Use prepare_copy_insn + instead of gen_move_insn. + +2019-01-24 Jakub Jelinek <jakub@redhat.com> + + PR debug/89006 + * config/i386/i386.c (ix86_pic_register_p): Return true for + UNSPEC_SET_GOT too. + + PR tree-optimization/88964 + * gimple-loop-interchange.cc (loop_cand::analyze_induction_var): Also + punt if HONOR_SNANS (chrec). + + PR middle-end/89015 + * tree-nested.c (convert_nonlocal_reference_stmt, + convert_local_reference_stmt, convert_tramp_reference_stmt, + convert_gimple_call) <case GIMPLE_OMP_TEAMS>: Treat + gimple_omp_teams_host teams stmts like GIMPLE_OMP_PARALLEL + or GIMPLE_OMP_TASK. + + PR tree-optimization/89027 + * tree-inline.c (add_clobbers_to_eh_landing_pad): Don't add clobbers + for "omp simd array" variables. + +2019-01-24 Richard Earnshaw <rearnsha@arm.com> + + PR target/88469 + * profile-count.h (profile_count): On ARM systems using GCC 6/7/8 + force the alignment of m_val. + +2019-01-24 Richard Biener <rguenther@suse.de> + + PR lto/87187 + * tree-streamer-out.c (write_ts_decl_common_tree_pointers): + When in "legacy" debug mode make sure to reset self-origins. + +2019-01-24 Martin Liska <mliska@suse.cz> + + PR gcov-profile/88994 + * gcov-io.c (mangle_path): Do not allocate a bigger buffer, + result will be always smaller or equal to the original. + * gcov.c (mangle_name): Fix else branch where we should + also copy to PTR and shift the pointer. + +2019-01-24 Xiong Hu Luo <luoxhu@linux.vnet.ibm.com> + + * tree-ssa-dom.c (test_for_singularity): Fix a comment typo. + * vr-values.c (find_case_label_ranges): Fix a comment typo. + +2019-01-23 Xuepeng Guo <xuepeng.guo@intel.com> + + * common/config/i386/i386-common.c + (OPTION_MASK_ISA_ENQCMD_SET, + OPTION_MASK_ISA_ENQCMD_UNSET): New macros. + (ix86_handle_option): Handle -menqcmd. + * config.gcc (enqcmdintrin.h): New header file. + * config/i386/cpuid.h (bit_ENQCMD): New bit. + * config/i386/driver-i386.c (host_detect_local_cpu): Handle + -menqcmd. + * config/i386/i386-builtin-types.def ((INT, PVOID, PCVOID)): New + function type. + * config/i386/i386-builtin.def (__builtin_ia32_enqcmd, + __builtin_ia32_enqcmds): New builtins. + * config/i386/i386-c.c (__ENQCMD__): New macro. + * config/i386/i386-option.c (ix86_target_string): Add + -menqcmd. + (ix86_valid_target_attribute_inner_p): Likewise. + * config/i386/i386-expand.c + (ix86_expand_builtin): Expand IX86_BUILTIN_ENQCMD and + IX86_BUILTIN_ENQCMDS. + * config/i386/i386.h (TARGET_ENQCMD): New. + * config/i386/i386.md (UNSPECV_ENQCMD, UNSPECV_ENQCMDS): New. + (@enqcmd<enqcmd_sfx>_<mode>): New insn pattern. + (movdir64b_<mode>): Parameterize to enable share expansion code + with ENQCMD in function ix86_expand_builtin. + * config/i386/i386.opt: Add -menqcmd. + * config/i386/immintrin.h: Include enqcmdintrin.h. + * config/i386/enqcmdintrin.h: New intrinsic file. + * doc/invoke.texi: Add -menqcmd. + +2019-01-23 Bin Cheng <bin.cheng@arm.com> + Steve Ellcey <sellcey@marvell.com> + + PR target/85711 + * recog.c (address_operand): Return false on wrong mode for address. + (constrain_operands): Check for mode with 'p' constraint. + +2019-01-23 Uroš Bizjak <ubizjak@gmail.com> + + PR target/88998 + * config/i386/sse.md (sse2_cvtpi2pd): Add SSE alternatives. + Disparage MMX alternative. + (sse2_cvtpd2pi): Ditto. + (sse2_cvttpd2pi): Ditto. + +2019-01-23 David Malcolm <dmalcolm@redhat.com> + + PR driver/89014 + * config/aarch64/driver-aarch64.c (host_detect_local_cpu): Fix + use-after-free of the result of + aarch64_get_extension_string_for_isa_flags. + +2019-01-23 Jakub Jelinek <jakub@redhat.com> + + PR c/44715 + * doc/extend.texi: Document break and continue behavior in + statement expressions. + +2019-01-23 Richard Biener <rguenther@suse.de> + + PR tree-optimization/89008 + * tree-ssa-reassoc.c (eliminate_using_constants): For * 0 do + not leave another stray operand. + +2019-01-23 Jakub Jelinek <jakub@redhat.com> + + * BASE-VER: Bump to 9.0.1. + +2019-01-23 Eric Botcazou <ebotcazou@adacore.com> + + * cgraphunit.c (cgraph_node::expand_thunk): When expanding a GIMPLE + thunk that returns by reference, use the type of the return object + of the thunk instead of that of the alias to build the dereference. + +2019-01-23 Vineet Gupta <vgupta@synopsys.com> + + * config/arc/atomic.md: Add operand to DMB instruction. + +2019-01-23 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/88964 + * gimple-loop-interchange.cc (loop_cand::analyze_induction_var): Use + build_zero_cst instead of build_int_cst. Return false for loop + invariants which honor signed zeros. + +2019-01-22 Segher Boessenkool <segher@kernel.crashing.org> + + * doc/invoke.texi (-fsplit-paths): This is enabled by default at -O3. + +2019-01-22 Jakub Jelinek <jakub@redhat.com> + + PR target/88965 + * config/rs6000/rs6000.c: Include tree-vrp.h and tree-ssanames.h. + (rs6000_gimple_fold_builtin): If MEM_REF address doesn't satisfy + is_gimple_mem_ref_addr predicate, force it into a SSA_NAME first. + + PR middle-end/88968 + * gimplify.c (gimplify_omp_atomic): Handle bitfield atomics with + non-integral DECL_BIT_FIELD_REPRESENTATIVEs. + + PR target/87064 + * config/rs6000/vsx.md (*vsx_reduc_<VEC_reduc_name>_v2df_scalar): + Disable for little endian. + +2019-01-22 Richard Earnshaw <rearnsha@arm.com> + + PR target/88469 + * config/arm/arm.c (arm_needs_double_word_align): Check + DECL_BIT_FIELD_TYPE. + +2019-01-22 Hongtao Liu <hongtao.liu@intel.com> + H.J. Lu <hongjiu.lu@intel.com> + + PR target/88909 + * config/i386/i386-builtin.def: Add mask2 to all builtin + initializations. Merge ARGS2 and SPECIAL_ARGS2 into ARGS and + SPECIAL_ARGS. + * config/i386/i386.c (BDESC): Add mask2 to the definition. + (BDESC_FIRST): Likewise. + (define_builtin): Add an argument for mask2. Updated to handle + both ix86_isa_flags and ix86_isa_flags2. + (define_builtin_const): Likewise. + (define_builtin_pure): Likewise. + (define_builtin2): Deleted. + (define_builtin_const2): Likewise. + (builtin_description): Add a member, mask2. + (bdesc_*): Add mask2 to builtin initializations. + (ix86_init_mmx_sse_builtins): Update calls to def_builtin, + def_builtin_const and def_builtin_pure. Remove SPECIAL_ARGS2 + support. + (ix86_get_builtin_func_type): Remove SPECIAL_ARGS2 support. + +2019-01-22 H.J. Lu <hongjiu.lu@intel.com> + + PR target/88954 + * config/i386/i386.c (ix86_force_load_from_GOT_p): Also check + noplt attribute. + +2019-01-22 Richard Earnshaw <rearnsha@arm.com> + + PR target/88469 + * config/arm/arm.c (arm_needs_doubleword_align): Return 2 if a record's + alignment is dominated by a bitfield with 64-bit aligned base type. + (arm_function_arg): Emit a warning if the alignment has changed since + earlier GCC releases. + (arm_function_arg_boundary): Likewise. + (arm_setup_incoming_varargs): Likewise. + +2019-01-22 Richard Biener <rguenther@suse.de> + + PR tree-optimization/88862 + * graphite-scop-detection.c + (scop_detection::graphite_can_represent_scev): Reject ADDR_EXPR. + +2019-01-22 Andrew Stubbs <ams@codesourcery.com> + + * doc/extend.tex (AMD GCN Function Attributes): New section. + * doc/install.texi (amdgcn-unknown-amdhsa): New instructions. + * doc/invoke.texi (AMD GCN Options): New section. + * doc/md.texi (Constraints for Particular Machines): Add AMD GCN. + +2019-01-22 Eric Botcazou <ebotcazou@adacore.com> + + * config/sparc/sparc.c (parc_delegitimize_address): Recognize the GOT + register and decoded HIGH/LO_SUM combinations for labels in PIC mode. + +2019-01-22 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/88044 + * tree-ssa-loop-niter.c (number_of_iterations_cond): If condition + is false in the first iteration, but !every_iteration, return false + instead of true with niter->niter zero. + + PR rtl-optimization/88904 + * cfgcleanup.c (thread_jump): Verify cond2 doesn't mention + any nonequal registers before processing BB_END (b). + + PR target/88905 + * optabs.c (add_equal_note): Add op0_mode argument, use it instead of + GET_MODE (op0). + (expand_binop_directly, expand_doubleword_clz, + expand_doubleword_popcount, expand_ctz, expand_ffs, + expand_unop_direct, maybe_emit_unop_insn): Adjust callers. + + PR rtl-optimization/49429 + PR target/49454 + PR rtl-optimization/86334 + PR target/88906 + * expr.c (emit_block_move_hints): Move marking of MEM_EXPRs + addressable from here... + (emit_block_op_via_libcall): ... to here. + +2019-01-22 Richard Biener <rguenther@suse.de> + + * tree-vect-loop.c (vect_analyze_loop_operations): Use + auto_vec for cost vector to fix memleak. + (vectorize_fold_left_reduction): Properly gather SLP defs. + (vectorizable_comparison): Do not swap operands to properly + gather SLP defs. + +2019-01-22 Alan Modra <amodra@gmail.com> + + PR target/88614 + * config/rs6000/predicates.md (unspec_tls): Ensure GOT reg + stays a reg. Allow a const_int. + * config/rs6000/rs6000-protos.h (rs6000_output_tlsargs): Declare. + * config/rs6000/rs6000.h (IS_V4_FP_ARGS): Define. + (IS_NOMARK_TLSGETADDR): Define. + * config/rs6000/rs6000.c (edit_tls_call_insn): Delete. + (rs6000_output_tlsargs): New function. + (rs6000_legitimize_tls_address): Don't say a !TARGET_TLS_MARKERS + __tls_get_addr call takes an arg. + (rs6000_call_sysv): Generate sysv4 secure plt call pattern here.. + * config/rs6000/rs6000.md (call_nonlocal_sysv): ..rather than here, + delete split.. + (call_value_nonlocal_sysv): ..or here, delete split. + (tls_gdld_nomark): Delete. + (call_value_indirect_nonlocal_sysv): Use unspec_tls as operand2 + predicate. Call rs6000_output_tlsargs. Adjust length to suit. + (call_value_nonlocal_sysv): Likewise. + (call_value_nonlocal_sysv_secure): Likewise. + (call_value_nonlocal_aix): Likewise. + (call_value_indirect_aix): Likewise. + (call_value_indirect_elfv2): Likewise. + (call_value_local32, call_value_local64): Disable for no-mark tls. + (call_value_local_aix): Likewise. + +2019-01-21 Uroš Bizjak <ubizjak@gmail.com> + + PR target/88938 + * config/i386/i386.c (ix86_expand_builtin) [case IX86_BUILTIN_BEXTRI32, + case IX86_BUILTIN_BEXTRI64]: Sanitize operands. + +2019-01-21 Michael Ploujnikov <michael.ploujnikov@oracle.com> + + * hash-map-tests.c (test_map_of_strings_to_int): Show how to use + string contents as hash_map keys. + +2019-01-21 Bernd Edlinger <bernd.edlinger@hotmail.de> + + PR c/88928 + * c-warn.c (check_alignment_of_packed_member): Add a boolean parameter + for rvalue context. Handle rvalues correctly. Use min_align_of_type + instead of TYPE_ALIGN. + (check_address_or_pointer_of_packed_member): Handle rvalues coorrectly. + Use min_align_of_type instead of TYPE_ALIGN_UNIT. Check for NULL + pointer from TYPE_STUB_DECL. + +2019-01-21 Richard Biener <rguenther@suse.de> + + PR tree-optimization/88934 + * tree-vect-slp.c (vect_mask_constant_operand_p): Always look + at the possibly non-constant operand. + (vect_get_constant_vectors): Adjust. + +2019-01-21 H.J. Lu <hongjiu.lu@intel.com> + + PR target/71659 + * config/i386/adxintrin.h: Just check _IMMINTRIN_H_INCLUDED. + * config/i386/clflushoptintrin.h: Check _IMMINTRIN_H_INCLUDED + instead of _X86INTRIN_H_INCLUDED. + * onfig/i386/clwbintrin.h: Likewise. + * config/i386/pkuintrin.h: Likewise. + * config/i386/prfchwintrin.h: Likewise. + * config/i386/rdseedintrin.h: Likewise. + * config/i386/wbnoinvdintrin.h: Likewise. + * config/i386/xsavecintrin.h: Likewise. + * config/i386/xsavesintrin.h: Likewise. + * config/i386/fxsrintrin.h: Enable _IMMINTRIN_H_INCLUDED check. + * config/i386/xsaveintrin.h: Likewise. + * config/i386/xsaveoptintrin.h: Likewise. + * config/i386/x86intrin.h: Move "#include" <rdseedintrin.h>, + <prfchwintrin.h>, <fxsrintrin.h>, <xsaveintrin.h>, + <xsaveoptintrin.h>, <adxintrin.h>, <clwbintrin.h>, + <clflushoptintrin.h>, <xsavesintrin.h>, <xsavecintrin.h>, + <wbnoinvdintrin.h> and <pkuintrin.h> to ... + * config/i386/immintrin.h: Here. + +2019-01-20 Martin Jambor <mjambor@suse.cz> + + PR ipa/87615 + * ipa-prop.h (struct ipa_func_body_info): Replaced field aa_walked + with aa_walk_budget. + * cgraph.h (ipa_polymorphic_call_context::get_dynamic_type): Add + aa_walk_budget_p parameter. + * ipa-fnsummary.c (unmodified_parm_1): New parameter fbi. Limit AA + walk. Updated all callers. + (unmodified_parm): New parameter fbi, pass it to unmodified_parm_1. + (eliminated_by_inlining_prob): New parameter fbi, pass it on to + unmodified_parm. + (will_be_nonconstant_expr_predicate): New parameter fbi, removed + parameter info. Extract info from fbi. Pass fbi to recursive calls + and to unmodified_parm. + (phi_result_unknown_predicate): New parameter fbi, removed parameter + info, updated call to will_be_nonconstant_expr_predicate. + (param_change_prob): New parameter fbi, limit AA walking. + (analyze_function_body): Initialize aa_walk_budget in fbi. Update + calls to various above functions. + * ipa-polymorphic-call.c (get_dynamic_type): Add aa_walk_budget_p + parameter. Use it to limit AA walking. + * ipa-prop.c (detect_type_change_from_memory_writes): New parameter + fbi, limit AA walk. + (detect_type_change): New parameter fbi, pass it on to + detect_type_change_from_memory_writes. + (detect_type_change_ssa): Likewise. + (aa_overwalked): Removed. + (parm_preserved_before_stmt_p): Assume fbi is never NULL, stream line + accordingly, adjust to the neew AA limiting scheme. + (parm_ref_data_preserved_p): Likewise. + (ipa_compute_jump_functions_for_edge): Adjust call to + get_dynamic_type. + (ipa_analyze_call_uses): Likewise. + (ipa_analyze_virtual_call_uses): Pass fbi to detect_type_change_ssa. + (ipa_analyze_node): Initialize aa_walk_budget. + (ipcp_transform_function): Likewise. + * tree-ssa-sccvn.c (eliminate_dom_walker::eliminate_stmt): Update call + to get_dynamic_type. + +2019-01-19 Jakub Jelinek <jakub@redhat.com> + + * config/aarch64/aarch64.c (aarch64_stack_protect_guard): Move + outside of #if CHECKING_P code. + +2019-01-19 Richard Sandiford <richard.sandiford@arm.com> + + * gimple-loop-versioning.cc (loop_versioning::dump_inner_likelihood): + New function, split out from... + (loop_versioning::analyze_stride): ...here. + (loop_versioning::find_per_loop_multiplication): Use gassign. + (loop_versioning::analyze_term_using_scevs): Return a success code. + (loop_versioning::analyze_arbitrary_term): New function. + (loop_versioning::analyze_address_fragment): Use + analyze_arbitrary_term if all else fails. + +2019-01-18 Segher Boessenkool <segher@kernel.crashing.org> + + PR target/88892 + * config/rs6000/rs6000.md (*movsi_from_df): Allow only register + operands. + +2019-01-18 Richard Biener <rguenther@suse.de> + + PR tree-optimization/88903 + * tree-vect-stmts.c (vectorizable_shift): Verify we see all + scalar stmts a SLP shift amount is composed of when detecting + shifts by scalars. + +2019-01-18 Richard Earnshaw <rearnsha@arm.com> + + PR target/88799 + * config/arm/arm-cpus.in (mp): New feature. + (sec): New feature. + (fgroup ARMv7ve): Add mp and sec features. + (arch armv7-a): Add options to allow mp and sec extensions. + (cpu generic-armv7-a): Add options to allow mp and sec extensions. + (cpu cortex-a5, cpu cortex-7, cpu cortex-a9): Add mp and sec + extenstions to the base architecture. + (cpu cortex-a8): Add sec extension to the base architecture. + (cpu marvell-pj4): Add mp and sec extensions to the base architecture. + * config/arm/t-aprofile (MULTILIB_MATCHES): Map all armv7-a arch + variants down to the base v7-a varaint. + * config/arm/t-multilib (v7_a_arch_variants): New variable. + * doc/invoke.texi (ARM Options): Add +mp and +sec to the list + of permitted extensions for -march=armv7-a and for + -mcpu=generic-armv7-a. + +2019-01-18 Martin Liska <mliska@suse.cz> + + * params.def: Fix comment. + * tree-profile.c (gimple_init_gcov_profiler): Bump function + name. + (gimple_gen_ic_func_profiler): Likewise. + +2019-01-18 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> + + * config/aarch64/aarch64-opts.h (enum stack_protector_guard): New + * config/aarch64/aarch64.c (aarch64_override_options_internal): Handle + and put in error checks for stack protector guard options. + (aarch64_stack_protect_guard): New. + (TARGET_STACK_PROTECT_GUARD): Define. + * config/aarch64/aarch64.md (UNSPEC_SSP_SYSREG): New. + (reg_stack_protect_address<mode>): New. + (stack_protect_set): Adjust for SSP_GLOBAL. + (stack_protect_test): Likewise. + * config/aarch64/aarch64.opt (-mstack-protector-guard-reg): New. + (-mstack-protector-guard): Likewise. + (-mstack-protector-guard-offset): Likewise. + +2019-01-18 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/86214 + * tree-inline.h (struct copy_body_data): Add + add_clobbers_to_eh_landing_pads member. + * tree-inline.c (add_clobbers_to_eh_landing_pad): New function. + (copy_edges_for_bb): Call it if EH edge destination is < + id->add_clobbers_to_eh_landing_pads. Fix a comment typo. + (expand_call_inline): Set id->add_clobbers_to_eh_landing_pads + if flag_stack_reuse != SR_NONE and clear it afterwards. + +2019-01-18 Christophe Lyon <christophe.lyon@linaro.org> + + PR target/85596 + * doc/install.texi (with-multilib-list): Document for aarch64. + +2019-01-18 Jakub Jelinek <jakub@redhat.com> + + PR target/88734 + * config/arm/arm_neon.h: Fix #pragma GCC target syntax - replace + (("..."))) with ("..."). + +2019-01-18 Sebastian Huber <sebastian.huber@embedded-brains.de> + + * doc/extend.texi (Built-in Functions for Memory Model Aware + Atomic Operations): Document atomic fetch and nand. + +2019-01-18 Martin Liska <mliska@suse.cz> + Richard Biener <rguenther@suse.de> + + PR middle-end/88587 + * cgraph.h (create_version_clone_with_body): Add new argument + with attributes. + * cgraphclones.c (cgraph_node::create_version_clone): Add + DECL_ATTRIBUTES to a newly created decl. And call + valid_attribute_p so that proper cl_target_optimization_node + is set for the newly created declaration. + * multiple_target.c (create_target_clone): Set DECL_ATTRIBUTES + for declaration. + (expand_target_clones): Do not call valid_attribute_p, it must + be already done. + * tree-inline.c (copy_decl_for_dup_finish): Reset mode for + vector types. + +2019-01-17 Jakub Jelinek <jakub@redhat.com> + + PR target/88734 + * config/aarch64/arm_neon.h: Fix #pragma GCC target syntax - replace + (("..."))) with ("..."). Use arch=armv8.2-a+sha3 instead of + arch=armv8.2-a+crypto for vsha512hq_u64 etc. intrinsics. + +2019-01-17 Martin Sebor <msebor@redhat.com> + + PR middle-end/88273 + * gimple-ssa-warn-restrict.c (builtin_memref::extend_offset_range): + Handle anti-ranges the same as no range at all. + +2018-01-17 Steve Ellcey <sellcey@cavium.com> + + * config/aarch64/aarch64.c (cgraph.h): New include. + (intl.h): New include. + (supported_simd_type): New function. + (currently_supported_simd_type): Ditto. + (aarch64_simd_clone_compute_vecsize_and_simdlen): Ditto. + (aarch64_simd_clone_adjust): Ditto. + (aarch64_simd_clone_usable): Ditto. + (TARGET_SIMD_CLONE_COMPUTE_VECSIZE_AND_SIMDLEN): New macro. + (TARGET_SIMD_CLONE_ADJUST): Ditto. + (TARGET_SIMD_CLONE_USABLE): Ditto. + * config/i386/i386.c (ix86_simd_clone_adjust): Add definition check. + * omp-simd-clone.c (expand_simd_clones): Add targetm.simd_clone.adjust + call. + +2019-01-17 Martin Sebor <msebor@redhat.com> + + PR tree-optimization/88800 + * gimple-fold.c (gimple_fold_builtin_memory_op): Avoid checking + NO_WARNING bit here. Avoid folding out-of-bounds calls. + * gimple-ssa-warn-restrict.c (maybe_diag_offset_bounds): Remove + redundant argument. Add new argument and issue diagnostics under + its control. Detect out-of-bounds access even with warnings + disabled. + (check_bounds_or_overlap): Change return type. Add argument. + (wrestrict_dom_walker::check_call): Adjust. + * gimple-ssa-warn-restrict.h (check_bounds_or_overlap): Add argument. + * tree-ssa-strlen.c (handle_builtin_strcpy): Adjust to change in + check_bounds_or_overlap's return value. + (handle_builtin_stxncpy): Same. + (handle_builtin_strcat): Same. + +2019-01-17 Andrew Stubbs <ams@codesourcery.com> + Kwok Cheung Yeung <kcy@codesourcery.com> + Julian Brown <julian@codesourcery.com> + Tom de Vries <tom@codesourcery.com> + + * doc/sourcebuild.texi: Document dg-add-options sqrt_insn. + +2019-01-17 Andrew Stubbs <ams@codesourcery.com> + + * doc/sourcebuild.texi: Document dg-require-effective-target + llvm_binutils and offload_gcn. + +2019-01-17 Andrew Stubbs <ams@codesourcery.com> + Kwok Cheung Yeung <kcy@codesourcery.com> + Julian Brown <julian@codesourcery.com> + Tom de Vries <tom@codesourcery.com> + + * doc/sourcebuild.texi: Document dg-required-effective-target + exceptions. + +2019-01-17 Andrew Stubbs <ams@codesourcery.com> + Kwok Cheung Yeung <kcy@codesourcery.com> + Julian Brown <julian@codesourcery.com> + Tom de Vries <tom@codesourcery.com> + Jan Hubicka <hubicka@ucw.cz> + Martin Jambor <mjambor@suse.cz> + + * config.gcc: Add amdgcn*-*-amdhsa configuration. + * configure.ac: Check for dlopen. + * configure: Regenerate. + +2019-01-17 Andrew Stubbs <ams@codesourcery.com> + Kwok Cheung Yeung <kcy@codesourcery.com> + Julian Brown <julian@codesourcery.com> + Tom de Vries <tom@codesourcery.com> + Jan Hubicka <hubicka@ucw.cz> + Martin Jambor <mjambor@suse.cz> + + * common/config/gcn/gcn-common.c: New file. + * config/gcn/driver-gcn.c: New file. + * config/gcn/gcn-builtins.def: New file. + * config/gcn/gcn-hsa.h: New file. + * config/gcn/gcn-modes.def: New file. + * config/gcn/gcn-opts.h: New file. + * config/gcn/gcn-passes.def: New file. + * config/gcn/gcn-protos.h: New file. + * config/gcn/gcn-run.c: New file. + * config/gcn/gcn-tree.c: New file. + * config/gcn/gcn.c: New file. + * config/gcn/gcn.h: New file. + * config/gcn/gcn.opt: New file. + * config/gcn/t-gcn-hsa: New file. + +2019-01-17 Andrew Stubbs <ams@codesourcery.com> + Kwok Cheung Yeung <kcy@codesourcery.com> + Julian Brown <julian@codesourcery.com> + Tom de Vries <tom@codesourcery.com> + Jan Hubicka <hubicka@ucw.cz> + Martin Jambor <mjambor@suse.cz> + + * config/gcn/constraints.md: New file. + * config/gcn/gcn-valu.md: New file. + * config/gcn/gcn.md: New file. + * config/gcn/predicates.md: New file. + +2019-01-17 Eric Botcazou <ebotcazou@adacore.com> + + * gimple-ssa-isolate-paths.c (stmt_uses_name_in_undefined_way): Replace + flag_non_call_exceptions with cfun->can_throw_non_call_exceptions. + (stmt_uses_0_or_null_in_undefined_way): Likewise. + * tree-ssa-alias.c (same_addr_size_stores_p): Likewise. + +2019-01-17 Tamar Christina <tamar.christina@arm.com> + + PR target/88851 + * config/aarch64/aarch64.md (STACK_CLASH_SVE_CFA_REGNUM): New. + * config/aarch64/aarch64.c (aarch64_allocate_and_probe_stack_space): Use + it and document registers. + +2019-01-17 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/aarch64/aarch64.c (ares_tunings): Define. + * config/aarch64/aarch64-cores.def (ares): Use the above. + +2019-01-17 Wei Xiao <wei3.xiao@intel.com> + + PR target/88794 + Revert: + 2018-11-06 Wei Xiao <wei3.xiao@intel.com> + + * config/i386/avx512fintrin.h: Update VFIXUPIMM* intrinsics. + (_mm512_fixupimm_round_pd): Update parameters and builtin. + (_mm512_maskz_fixupimm_round_pd): Ditto. + (_mm512_fixupimm_round_ps): Ditto. + (_mm512_maskz_fixupimm_round_ps): Ditto. + (_mm_fixupimm_round_sd): Ditto. + (_mm_maskz_fixupimm_round_sd): Ditto. + (_mm_fixupimm_round_ss): Ditto. + (_mm_maskz_fixupimm_round_ss): Ditto. + (_mm512_fixupimm_pd): Ditto. + (_mm512_maskz_fixupimm_pd): Ditto. + (_mm512_fixupimm_ps): Ditto. + (_mm512_maskz_fixupimm_ps): Ditto. + (_mm_fixupimm_sd): Ditto. + (_mm_maskz_fixupimm_sd): Ditto. + (_mm_fixupimm_ss): Ditto. + (_mm_maskz_fixupimm_ss): Ditto. + (_mm512_mask_fixupimm_round_pd): Update builtin. + (_mm512_mask_fixupimm_round_ps): Ditto. + (_mm_mask_fixupimm_round_sd): Ditto. + (_mm_mask_fixupimm_round_ss): Ditto. + (_mm512_mask_fixupimm_pd): Ditto. + (_mm512_mask_fixupimm_ps): Ditto. + (_mm_mask_fixupimm_sd): Ditto. + (_mm_mask_fixupimm_ss): Ditto. + * config/i386/avx512vlintrin.h: + (_mm256_fixupimm_pd): Update parameters and builtin. + (_mm256_maskz_fixupimm_pd): Ditto. + (_mm256_fixupimm_ps): Ditto. + (_mm256_maskz_fixupimm_ps): Ditto. + (_mm_fixupimm_pd): Ditto. + (_mm_maskz_fixupimm_pd): Ditto. + (_mm_fixupimm_ps): Ditto. + (_mm_maskz_fixupimm_ps): Ditto. + (_mm256_mask_fixupimm_pd): Update builtin. + (_mm256_mask_fixupimm_ps): Ditto. + (_mm_mask_fixupimm_pd): Ditto. + (_mm_mask_fixupimm_ps): Ditto. + * config/i386/i386-builtin-types.def: Add new types and remove + useless ones. + * config/i386/i386-builtin.def: Update builtin definitions. + * config/i386/i386.c: Handle new builtin types and remove useless ones. + * config/i386/sse.md: Update VFIXUPIMM* patterns. + (<avx512>_fixupimm<mode>_maskz<round_saeonly_expand_name>): Update. + (<avx512>_fixupimm<mode><sd_maskz_name><round_saeonly_name>): Update. + (<avx512>_fixupimm<mode>_mask<round_saeonly_name>): Update. + (avx512f_sfixupimm<mode>_maskz<round_saeonly_expand_name>): Update. + (avx512f_sfixupimm<mode><sd_maskz_name><round_saeonly_name>): Update. + (avx512f_sfixupimm<mode>_mask<round_saeonly_name>): Update. + * config/i386/subst.md: + (round_saeonly_sd_mask_operand4): Add new subst_attr. + (round_saeonly_sd_mask_op4): Ditto. + (round_saeonly_expand_operand5): Ditto. + (round_saeonly_expand): Update. + +2019-01-17 Wei Xiao <wei3.xiao@intel.com> + + PR target/88794 + Revert: + 2018-11-12 Wei Xiao <wei3.xiao@intel.com> + + * config/i386/sse.md: Combine VFIXUPIMM* patterns + (<avx512>_fixupimm<mode>_maskz<round_saeonly_expand_name>): Update. + (<avx512>_fixupimm<mode><sd_maskz_name><round_saeonly_name>): Update. + (<avx512>_fixupimm<mode>_mask<round_saeonly_name>): Remove. + (avx512f_sfixupimm<mode>_maskz<round_saeonly_expand_name>): Update. + (avx512f_sfixupimm<mode><sd_maskz_name><round_saeonly_name>): Update. + (avx512f_sfixupimm<mode>_mask<round_saeonly_name>): Remove. + +2019-01-17 Wei Xiao <wei3.xiao@intel.com> + + PR target/88794 + Revert: + 2018-12-15 Jakub Jelinek <jakub@redhat.com> + + PR target/88489 + * config/i386/sse.md (UNSPEC_SFIXUPIMM): New unspec enumerator. + (avx512f_sfixupimm<mode><mask_name><round_saeonly_name>): Use it + instead of UNSPEC_FIXUPIMM. + +2019-01-17 Richard Biener <rguenther@suse.de> + + PR lto/86736 + * dwarf2out.c (want_pubnames): Never generate pubnames sections + and friends for the LTO part of debug info. + +2019-01-17 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/86214 + * cfgexpand.c (add_stack_var_conflict): Don't add any conflicts + if x == y. + + PR rtl-optimization/88870 + * dce.c (deletable_insn_p): Never delete const/pure calls that can + throw if we can't alter the cfg or delete dead exceptions. + (mark_insn): Don't call find_call_stack_args for such calls. + +2019-01-17 Kewen Lin <linkw@gcc.gnu.org> + + * doc/extend.texi: Add four new prototypes for vec_ld and seven new + prototypes for vec_st. + * config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Add entries + for scalar address type variants of altivec_vec_ld/altivec_vec_st, + mainly on signed/unsigned long long and double. + +2019-01-16 David Malcolm <dmalcolm@redhat.com> + + PR target/88861 + * combine.c (delete_noop_moves): Convert to "bool" return, + returning true if any edges are eliminated. + (combine_instructions): Also return true if delete_noop_moves + returns true. + +2019-01-16 Tamar Christina <tamar.christina@arm.com> + + * config/aarch64/aarch64-builtins.c (aarch64_simd_expand_args): Use + correct max nunits for endian swap. + (aarch64_expand_fcmla_builtin): Correct subreg code. + * config/aarch64/aarch64-simd.md (aarch64_fcmla_lane<rot><mode>, + aarch64_fcmla_laneq<rot>v4hf, aarch64_fcmlaq_lane<rot><mode>): Correct + lane endianness. + +2019-01-16 Uroš Bizjak <ubizjak@gmail.com> + + * config/alpha/alpha.c (alpha_gimplify_va_arg): + Handle split indirect COMPLEX_TYPE arguments. + +2019-01-16 Richard Earnshaw <rearnsha@arm.com> + + PR target/86891 + * config/aarch64/aarch64-modes.def: Add comment about how the carry + bit is set by add and compare. + (CC_ADC): New CC_MODE. + * config/aarch64/aarch64.c (aarch64_select_cc_mode): Use variables + to cache the code and mode of X. Adjust the shape of a CC_Cmode + comparison. Add detection for CC_ADCmode. + (aarch64_get_condition_code_1): Update code support for CC_Cmode. Add + CC_ADCmode. + * config/aarch64/aarch64.md (uaddv<mode>4): Use LTU with CCmode. + (uaddvti4): Comparison result is in CC_ADCmode and the condition is GEU. + (add<mode>3_compareC_cconly_imm): Delete. Merge into... + (add<mode>3_compareC_cconly): ... this. Restructure the comparison + to eliminate the need for zero-extending the operands. + (add<mode>3_compareC_imm): Delete. Merge into ... + (add<mode>3_compareC): ... this. Restructure the comparison to + eliminate the need for zero-extending the operands. + (add<mode>3_carryin): Use LTU for the overflow detection. + (add<mode>3_carryinC): Use CC_ADCmode for the result of the carry out. + Reexpress comparison for overflow. + (add<mode>3_carryinC_zero): Update for change to add<mode>3_carryinC. + (add<mode>3_carryinC): Likewise. + (add<mode>3_carryinV): Use LTU for carry between partials. + * config/aarch64/predicates.md (aarch64_carry_operation): Update + handling of CC_Cmode and add CC_ADCmode. + (aarch64_borrow_operation): Likewise. + +2019-01-16 Tamar Christina <tamar.christina@arm.com> + + * config/arm/arm-protos.h (neon_vcmla_lane_prepare_operands): + Remove patternmode. + * config/arm/arm.c (neon_vcmla_lane_prepare_operands): Likewise. + * config/arm/neon.md (neon_vcmla_lane<rot><mode>, + neon_vcmla_laneq<rot><mode>, neon_vcmlaq_lane<rot><mode>): + Remove endianness conversion. + +2019-01-16 Martin Liska <mliska@suse.cz> + + * Makefile.in: Set TOOL_INCLUDE_DIR and NATIVE_SYSTEM_HEADER_DIR + for GCC driver. + * config/gnu-user.h (TARGET_F951_OPTIONS): Add 'finclude%s/' as + a new argument. + * gcc.c (add_sysrooted_hdrs_prefix): New function. + (path_prefix_reset): Move up in the source file. + (find_fortran_preinclude_file): Make complex search for the + fortran header files. + +2019-01-15 Nikhil Benesch <nikhil.benesch@gmail.com> + + * godump.c (go_output_typedef): When outputting a typedef, refer + to the underlying type by its name and not its structure. + +2019-01-15 David Malcolm <dmalcolm@redhat.com> + + PR c++/88795 + * tree.c (build_function_type): Assert that arg_types is not + error_mark_node. + +2019-01-15 Richard Sandiford <richard.sandiford@arm.com> + + PR inline-asm/52813 + * doc/extend.texi: Document that listing the stack pointer in the + clobber list of an asm is a deprecated feature. + * common.opt (Wdeprecated): Moved from c-family/c.opt. + * cfgexpand.c (asm_clobber_reg_is_valid): Issue a -Wdeprecated + warning instead of an error for clobbers of the stack pointer. + Add a note explaining why. + +2019-01-15 Richard Biener <rguenther@suse.de> + + PR debug/88046 + * dwarf2out.c (gen_member_die): Do not generate inheritance + DIEs late. + +2019-01-15 Richard Biener <rguenther@suse.de> + + PR tree-optimization/88855 + * tree-if-conv.c (combine_blocks): Collect + SSA_NAME_OCCURS_IN_ABNORMAL_PHI from propagated out virtuals. + +2019-01-15 Tom de Vries <tdevries@suse.de> + + PR target/80547 + * config/nvptx/nvptx.c (nvptx_goacc_reduction_init): Handle + lhs == NULL_TREE for gang-level reduction. + +2019-01-15 Richard Biener <rguenther@suse.de> + Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org> + + PR ipa/88788 + * ipa-pure-const.c (malloc_candidate_p_1): Add parameter visited and + return true if SSA_NAME is already marked in visited bitmap. + (malloc_candidate_p): Pass visited to malloc_candidate_p_1. + +2019-01-15 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/88775 + * match.pd (cmp (convert1?@2 addr@0) (convert2? addr@1)): Optimize + equal == 0 equality pointer comparisons some more if compared in + integral types and either one points to an automatic var and the + other to a global, or we can prove at least one points to the middle + or both point to start or both point to end. + +2019-01-14 Andi Kleen <ak@linux.intel.com> + + * Makefile.in: Lower autofdo sampling rate by 10x. + * Makefile.tpl: Dito. + +2019-01-14 Tom Honermann <tom@honermann.net> + + * defaults.h: Define CHAR8_TYPE. + +2019-01-14 Martin Sebor <msebor@redhat.com> + + PR target/88638 + * doc/extend.texi (Darwin Format Checks): Clarify. + +2019-01-14 Richard Biener <rguenther@suse.de> + + * genmatch.c (dt_simplify::gen_1): Change dumping dependent on + whether we are in (simplify ...) or (match ...) context. + +2019-01-14 Jakub Jelinek <jakub@redhat.com> + + PR rtl-optimization/88796 + * emit-rtl.h (struct rtl_data): Add stack_protect_guard_decl field. + * cfgexpand.c (stack_protect_prologue): Initialize + crtl->stack_protect_guard_decl. + * function.c (stack_protect_epilogue): Use it instead of calling + targetm.stack_protect_guard again. + * dse.c (check_mem_read_rtx): Ignore MEM_VOLATILE_P reads from + MEMs with MEM_EXPR equal to crtl->stack_protect_guard or + crtl->stack_protect_guard_decl. + * config/i386/i386.c (ix86_stack_protect_guard): Set TREE_THIS_VOLATILE + on the returned MEM_EXPR. + +2019-01-12 Tom de Vries <tdevries@suse.de> + + * config/nvptx/nvptx.c (nvptx_goacc_validate_dims_1): Alow setting + vector length using -fopenacc-dim. + +2019-01-12 Tom de Vries <tdevries@suse.de> + + * config/nvptx/nvptx.c (nvptx_goacc_validate_dims): Take larger vector + lengths into account. + +2019-01-12 Svante Signell <svante.signell@gmail.com> + + * config/i386/gnu.h (TARGET_THREAD_SSP_OFFSET): Define. + (TARGET_CAN_SPLIT_STACK): Define. + (TARGET_THREAD_SPLIT_STACK_OFFSET): Define. + +2019-01-05 Jan Hubicka <hubicka@ucw.cz> + + * params.def (inline-unit-growth): Set to 40. + +2019-01-12 Jakub Jelinek <jakub@redhat.com> + + * tree-ssa-loop-ivopts.c (find_inv_vars): Fix a comment typo. + +2019-01-12 Tom de Vries <tdevries@suse.de> + + * config/nvptx/nvptx.c (nvptx_goacc_validate_dims_1): In offloading + region calling vector-partitionable routine, set default_vector_length + to WARP_SIZE. + +2019-01-12 Tom de Vries <tdevries@suse.de> + + * config/nvptx/nvptx.c (nvptx_goacc_validate_dims_1): Add an use new + variable default_vector_length. + +2019-01-12 Tom de Vries <tdevries@suse.de> + + PR middle-end/88703 + * config/nvptx/nvptx.c (nvptx_goacc_validate_dims_1): Apply defaults + from oacc_default_dims, as oacc_validate_dims would do it, and apply + dimensions limits. + +2019-01-12 Tom de Vries <tdevries@suse.de> + + * config/nvptx/nvptx.c (nvptx_goacc_validate_dims_1) + (nvptx_goacc_validate_dims): Add used parameter. + * doc/tm.texi: Regenerate. + * omp-offload.c (oacc_parse_default_dims, oacc_validate_dims): Add + argument to call to targetm.goacc.validate_dims. + (default_goacc_validate_dims): Add used + parameter. + * target.def (validate_dims): Add used parameter in DEFHOOK. + * targhooks.h (default_goacc_validate_dims): Add used parameter. + +2019-01-11 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/85956 + PR lto/88733 + * tree-inline.h (struct copy_body_data): Add adjust_array_error_bounds + field. + * tree-inline.c (remap_type_1): Formatting fix. If TYPE_MAX_VALUE of + ARRAY_TYPE's TYPE_DOMAIN is newly error_mark_node, replace it with + a dummy "omp dummy var" variable if id->adjust_array_error_bounds. + * omp-low.c (new_omp_context): Set cb.adjust_array_error_bounds. + +2019-01-11 Vladimir Makarov <vmakarov@redhat.com> + + PR rtl-optimization/87305 + * lra-assigns.c + (setup_live_pseudos_and_spill_after_risky_transforms): Add code + for little endian pseudos used as paradoxical subreg. + +2019-01-11 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/88693 + * tree-ssa-strlen.c (get_min_string_length): Don't set *full_string_p + for STRING_CSTs that don't contain any NUL characters in the first + TREE_STRING_LENGTH bytes. + +2019-01-11 Alan Modra <amodra@gmail.com> + + PR 88777 + PR 88614 + * genattrtab.c (min_fn): Don't translate values. + (min_attr_value): Return INT_MAX when the value can't be calculated. + Return minimum among any values that can be calculated. + (max_attr_value): Adjust. + +2019-01-11 Jakub Jelinek <jakub@redhat.com> + + * Makefile.in (PLUGIN_HEADERS): Add $(INSN_ATTR_H). + +2019-01-11 Steve Ellcey <sellcey@marvell.com> + + * config/aarch64/aarch64.c (aarch64_simd_call_p): New function. + (aarch64_hard_regno_call_part_clobbered): Add insn argument. + (aarch64_return_call_with_max_clobbers): New function. + (TARGET_RETURN_CALL_WITH_MAX_CLOBBERS): New macro. + * config/avr/avr.c (avr_hard_regno_call_part_clobbered): Add insn + argument. + * config/i386/i386.c (ix86_hard_regno_call_part_clobbered): Ditto. + * config/mips/mips.c (mips_hard_regno_call_part_clobbered): Ditto. + * config/rs6000/rs6000.c (rs6000_hard_regno_call_part_clobbered): Ditto. + * config/s390/s390.c (s390_hard_regno_call_part_clobbered): Ditto. + * cselib.c (cselib_process_insn): Add argument to + targetm.hard_regno_call_part_clobbered call. + * ira-conflicts.c (ira_build_conflicts): Ditto. + * ira-costs.c (ira_tune_allocno_costs): Ditto. + * lra-constraints.c (inherit_reload_reg): Ditto. + * lra-int.h (struct lra_reg): Add call_insn field, remove call_p field. + * lra-lives.c (check_pseudos_live_through_calls): Add call_insn + argument. Call targetm.return_call_with_max_clobbers. + Add argument to targetm.hard_regno_call_part_clobbered call. + (calls_have_same_clobbers_p): New function. + (process_bb_lives): Add call_insn and last_call_insn variables. + Pass call_insn to check_pseudos_live_through_calls. + Modify if stmt to check targetm.return_call_with_max_clobbers. + Update setting of flush variable. + (lra_create_live_ranges_1): Set call_insn to NULL instead of call_p + to false. + * lra.c (initialize_lra_reg_info_element): Set call_insn to NULL. + * regcprop.c (copyprop_hardreg_forward_1): Add argument to + targetm.hard_regno_call_part_clobbered call. + * reginfo.c (choose_hard_reg_mode): Ditto. + * regrename.c (check_new_reg_p): Ditto. + * reload.c (find_equiv_reg): Ditto. + * reload1.c (emit_reload_insns): Ditto. + * sched-deps.c (deps_analyze_insn): Ditto. + * sel-sched.c (init_regs_for_mode): Ditto. + (mark_unavailable_hard_regs): Ditto. + * targhooks.c (default_dwarf_frame_reg_mode): Ditto. + * target.def (hard_regno_call_part_clobbered): Add insn argument. + (return_call_with_max_clobbers): New target function. + * doc/tm.texi: Regenerate. + * doc/tm.texi.in (TARGET_RETURN_CALL_WITH_MAX_CLOBBERS): New hook. + * hooks.c (hook_bool_uint_mode_false): Change to + hook_bool_insn_uint_mode_false. + * hooks.h (hook_bool_uint_mode_false): Ditto. + +2019-01-11 Steve Ellcey <sellcey@marvell.com> + + * config/aarch64/aarch64.c (aarch64_simd_call_p): New function. + (aarch64_remove_extra_call_preserved_regs): New function. + (TARGET_REMOVE_EXTRA_CALL_PRESERVED_REGS): New macro. + * doc/tm.texi.in (TARGET_REMOVE_EXTRA_CALL_PRESERVED_REGS): New hook. + * doc/tm.texi: Regenerate. + * final.c (get_call_reg_set_usage): Call new hook. + * target.def (remove_extra_call_preserved_regs): New hook. + * targhooks.c (default_remove_extra_call_preserved_regs): New function. + * targhooks.h (default_remove_extra_call_preserved_regs): New function. + +2019-01-11 Jakub Jelinek <jakub@redhat.com> + + PR bootstrap/88714 + * passes.c (finish_optimization_passes): Call print_combine_total_stats + inside of pass_combine_1 dump rather than pass_profile_1. + +2019-01-11 Tom de Vries <tdevries@suse.de> + + * config/nvptx/nvptx.c (PTX_CTA_NUM_BARRIERS, PTX_PER_CTA_BARRIER) + (PTX_NUM_PER_CTA_BARRIER, PTX_FIRST_PER_WORKER_BARRIER) + (PTX_NUM_PER_WORKER_BARRIERS): Define. + (nvptx_apply_dim_limits): Prevent vector_length 64 and + num_workers 16. + +2019-01-11 Tom de Vries <tdevries@suse.de> + + * config/nvptx/nvptx.c (PTX_CTA_SIZE): Move up. + +2019-01-11 Jan Beulich <jbeulich@suse.com> + + * config/i386/i386.md (rex64suffix): Add L suffix for SI. + * config/i386/sse.md (cvtusi2<ssescalarmodesuffix>32<round_name>, + sse2_cvtsi2sd): Add {l}. + (sse2_cvtsi2sdq<round_name>): Make q conditional upon AT&T + syntax. + +2019-01-10 Jakub Jelinek <jakub@redhat.com> + + PR target/88785 + * config/i386/sse.md (float<floatunssuffix>v2div2sf2): Turn into + define_expand. + (*float<floatunssuffix>v2div2sf2): New define_insn. + (float<floatunssuffix>v2div2sf2_mask): Turn into define_expand. + (*float<floatunssuffix>v2div2sf2_mask): New define_insn. + (*float<floatunssuffix>v2div2sf2_mask_1): Replace + subrtxes (const_vector:V2SF [(const_int 0) (const_int 0)]) with + match_operands with "const0_operand" "C". + +2019-01-10 Tamar Christina <tamar.christina@arm.com> + + * config/aarch64/aarch64-builtins.c + (aarch64_init_builtins): Move aarch64_init_fcmla_laneq_builtins... + (aarch64_init_simd_builtins): ...Here + +2019-01-10 Vladimir Makarov <vmakarov@redhat.com> + + PR rtl-optimization/87305 + * lra-assigns.c + (setup_live_pseudos_and_spill_after_risky_transforms): Check + allocation for big endian pseudos used as paradoxical subregs and + spill them if it is wrong. + * lra-constraints.c (lra_constraints): Add a comment. + +2019-01-10 Richard Biener <rguenther@suse.de> + + PR tree-optimization/88792 + * tree-ssa-pre.c (get_representative_for): Do not return a + value-number here. + +2019-01-10 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/84877 + PR bootstrap/88450 + * function.c (assign_stack_local_1): Revert the 2018-11-21 changes. + (assign_parm_setup_block): Do the argument slot realignment here + instead. + +2019-01-10 Stefan Agner <stefan@agner.ch> + + PR target/88648 + * config/arm/arm.c (arm_option_override_internal): Force + opts->x_inline_asm_unified to true only if TARGET_THUMB2_P. + +2019-01-10 Jakub Jelinek <jakub@redhat.com> + + PR c/88568 + * attribs.c (handle_dll_attribute): Clear TREE_STATIC after setting + DECL_EXTERNAL. + +2019-01-10 Tamar Christina <tamar.christina@arm.com> + + * config/arm/arm-builtins.c + (enum arm_type_qualifiers): Add qualifier_lane_pair_index. + (MAC_LANE_PAIR_QUALIFIERS): New. + (arm_expand_builtin_args): Use it. + (arm_expand_builtin_1): Likewise. + * config/arm/arm-protos.h (neon_vcmla_lane_prepare_operands): New. + * config/arm/arm.c (neon_vcmla_lane_prepare_operands): New. + * config/arm/arm-c.c (arm_cpu_builtins): Add __ARM_FEATURE_COMPLEX. + * config/arm/arm_neon.h: + (vcadd_rot90_f16): New. + (vcaddq_rot90_f16): New. + (vcadd_rot270_f16): New. + (vcaddq_rot270_f16): New. + (vcmla_f16): New. + (vcmlaq_f16): New. + (vcmla_lane_f16): New. + (vcmla_laneq_f16): New. + (vcmlaq_lane_f16): New. + (vcmlaq_laneq_f16): New. + (vcmla_rot90_f16): New. + (vcmlaq_rot90_f16): New. + (vcmla_rot90_lane_f16): New. + (vcmla_rot90_laneq_f16): New. + (vcmlaq_rot90_lane_f16): New. + (vcmlaq_rot90_laneq_f16): New. + (vcmla_rot180_f16): New. + (vcmlaq_rot180_f16): New. + (vcmla_rot180_lane_f16): New. + (vcmla_rot180_laneq_f16): New. + (vcmlaq_rot180_lane_f16): New. + (vcmlaq_rot180_laneq_f16): New. + (vcmla_rot270_f16): New. + (vcmlaq_rot270_f16): New. + (vcmla_rot270_lane_f16): New. + (vcmla_rot270_laneq_f16): New. + (vcmlaq_rot270_lane_f16): New. + (vcmlaq_rot270_laneq_f16): New. + (vcadd_rot90_f32): New. + (vcaddq_rot90_f32): New. + (vcadd_rot270_f32): New. + (vcaddq_rot270_f32): New. + (vcmla_f32): New. + (vcmlaq_f32): New. + (vcmla_lane_f32): New. + (vcmla_laneq_f32): New. + (vcmlaq_lane_f32): New. + (vcmlaq_laneq_f32): New. + (vcmla_rot90_f32): New. + (vcmlaq_rot90_f32): New. + (vcmla_rot90_lane_f32): New. + (vcmla_rot90_laneq_f32): New. + (vcmlaq_rot90_lane_f32): New. + (vcmlaq_rot90_laneq_f32): New. + (vcmla_rot180_f32): New. + (vcmlaq_rot180_f32): New. + (vcmla_rot180_lane_f32): New. + (vcmla_rot180_laneq_f32): New. + (vcmlaq_rot180_lane_f32): New. + (vcmlaq_rot180_laneq_f32): New. + (vcmla_rot270_f32): New. + (vcmlaq_rot270_f32): New. + (vcmla_rot270_lane_f32): New. + (vcmla_rot270_laneq_f32): New. + (vcmlaq_rot270_lane_f32): New. + (vcmlaq_rot270_laneq_f32): New. + * config/arm/arm_neon_builtins.def (vcadd90, vcadd270, vcmla0, vcmla90, + vcmla180, vcmla270, vcmla_lane0, vcmla_lane90, vcmla_lane180, + vcmla_lane270, vcmla_laneq0, vcmla_laneq90, vcmla_laneq180, + vcmla_laneq270, vcmlaq_lane0, vcmlaq_lane90, vcmlaq_lane180, + vcmlaq_lane270): New. + * config/arm/neon.md (neon_vcmla_lane<rot><mode>, + neon_vcmla_laneq<rot><mode>, neon_vcmlaq_lane<rot><mode>): New. + * config/arm/arm.c (arm_arch8_3, arm_arch8_4): New. + * config/arm/arm.h (TARGET_COMPLEX, arm_arch8_3, arm_arch8_4): New. + (arm_option_reconfigure_globals): Use them. + * config/arm/iterators.md (VDF, VQ_HSF): New. + (VCADD, VCMLA): New. + (VF_constraint, rot, rotsplit1, rotsplit2): Add V4HF and V8HF. + * config/arm/neon.md (neon_vcadd<rot><mode>, neon_vcmla<rot><mode>): + New. + * config/arm/unspecs.md (UNSPEC_VCADD90, UNSPEC_VCADD270, + UNSPEC_VCMLA, UNSPEC_VCMLA90, UNSPEC_VCMLA180, UNSPEC_VCMLA270): New. + +2019-01-10 Tamar Christina <tamar.christina@arm.com> + + * config/aarch64/aarch64-builtins.c (enum aarch64_type_qualifiers): + Add qualifier_lane_pair_index. + (emit-rtl.h): Include. + (TYPES_QUADOP_LANE_PAIR): New. + (aarch64_simd_expand_args): Use it. + (aarch64_simd_expand_builtin): Likewise. + (AARCH64_SIMD_FCMLA_LANEQ_BUILTINS, aarch64_fcmla_laneq_builtin_datum): + New. + (FCMLA_LANEQ_BUILTIN, AARCH64_SIMD_FCMLA_LANEQ_BUILTIN_BASE, + AARCH64_SIMD_FCMLA_LANEQ_BUILTINS, aarch64_fcmla_lane_builtin_data, + aarch64_init_fcmla_laneq_builtins, aarch64_expand_fcmla_builtin): New. + (aarch64_init_builtins): Add aarch64_init_fcmla_laneq_builtins. + (aarch64_expand_buildin): Add AARCH64_SIMD_BUILTIN_FCMLA_LANEQ0_V2SF, + AARCH64_SIMD_BUILTIN_FCMLA_LANEQ90_V2SF, + AARCH64_SIMD_BUILTIN_FCMLA_LANEQ180_V2SF, + AARCH64_SIMD_BUILTIN_FCMLA_LANEQ2700_V2SF, + AARCH64_SIMD_BUILTIN_FCMLA_LANEQ0_V4HF, + AARCH64_SIMD_BUILTIN_FCMLA_LANEQ90_V4HF, + AARCH64_SIMD_BUILTIN_FCMLA_LANEQ180_V4HF, + AARCH64_SIMD_BUILTIN_FCMLA_LANEQ270_V4HF. + * config/aarch64/iterators.md (FCMLA_maybe_lane): New. + * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): + Add __ARM_FEATURE_COMPLEX. + * config/aarch64/aarch64-simd-builtins.def (fcadd90, fcadd270, fcmla0, + fcmla90, fcmla180, fcmla270, fcmla_lane0, fcmla_lane90, fcmla_lane180, + fcmla_lane270, fcmla_laneq0, fcmla_laneq90, fcmla_laneq180, + fcmla_laneq270, fcmlaq_lane0, fcmlaq_lane90, fcmlaq_lane180, + fcmlaq_lane270): New. + * config/aarch64/aarch64-simd.md (aarch64_fcmla_lane<rot><mode>, + aarch64_fcmla_laneq<rot>v4hf, aarch64_fcmlaq_lane<rot><mode>, + aarch64_fcadd<rot><mode>, aarch64_fcmla<rot><mode>): New. + * config/aarch64/arm_neon.h: + (vcadd_rot90_f16): New. + (vcaddq_rot90_f16): New. + (vcadd_rot270_f16): New. + (vcaddq_rot270_f16): New. + (vcmla_f16): New. + (vcmlaq_f16): New. + (vcmla_lane_f16): New. + (vcmla_laneq_f16): New. + (vcmlaq_lane_f16): New. + (vcmlaq_rot90_lane_f16): New. + (vcmla_rot90_laneq_f16): New. + (vcmla_rot90_lane_f16): New. + (vcmlaq_rot90_f16): New. + (vcmla_rot90_f16): New. + (vcmlaq_laneq_f16): New. + (vcmla_rot180_laneq_f16): New. + (vcmla_rot180_lane_f16): New. + (vcmlaq_rot180_f16): New. + (vcmla_rot180_f16): New. + (vcmlaq_rot90_laneq_f16): New. + (vcmlaq_rot270_laneq_f16): New. + (vcmlaq_rot270_lane_f16): New. + (vcmla_rot270_laneq_f16): New. + (vcmlaq_rot270_f16): New. + (vcmla_rot270_f16): New. + (vcmlaq_rot180_laneq_f16): New. + (vcmlaq_rot180_lane_f16): New. + (vcmla_rot270_lane_f16): New. + (vcadd_rot90_f32): New. + (vcaddq_rot90_f32): New. + (vcaddq_rot90_f64): New. + (vcadd_rot270_f32): New. + (vcaddq_rot270_f32): New. + (vcaddq_rot270_f64): New. + (vcmla_f32): New. + (vcmlaq_f32): New. + (vcmlaq_f64): New. + (vcmla_lane_f32): New. + (vcmla_laneq_f32): New. + (vcmlaq_lane_f32): New. + (vcmlaq_laneq_f32): New. + (vcmla_rot90_f32): New. + (vcmlaq_rot90_f32): New. + (vcmlaq_rot90_f64): New. + (vcmla_rot90_lane_f32): New. + (vcmla_rot90_laneq_f32): New. + (vcmlaq_rot90_lane_f32): New. + (vcmlaq_rot90_laneq_f32): New. + (vcmla_rot180_f32): New. + (vcmlaq_rot180_f32): New. + (vcmlaq_rot180_f64): New. + (vcmla_rot180_lane_f32): New. + (vcmla_rot180_laneq_f32): New. + (vcmlaq_rot180_lane_f32): New. + (vcmlaq_rot180_laneq_f32): New. + (vcmla_rot270_f32): New. + (vcmlaq_rot270_f32): New. + (vcmlaq_rot270_f64): New. + (vcmla_rot270_lane_f32): New. + (vcmla_rot270_laneq_f32): New. + (vcmlaq_rot270_lane_f32): New. + (vcmlaq_rot270_laneq_f32): New. + * config/aarch64/aarch64.h (TARGET_COMPLEX): New. + * config/aarch64/iterators.md (UNSPEC_FCADD90, UNSPEC_FCADD270, + UNSPEC_FCMLA, UNSPEC_FCMLA90, UNSPEC_FCMLA180, UNSPEC_FCMLA270): New. + (FCADD, FCMLA): New. + (rot): New. + * config/arm/types.md (neon_fcadd, neon_fcmla): New. + +2019-01-09 Sandra Loosemore <sandra@codesourcery.com> + + PR other/16615 + + * config/pa/pa.c: Change "can not" to "cannot". + * gimple-ssa-evrp-analyze.c: Likewise. + * ipa-icf.c: Likewise. + * ipa-polymorphic-call.c: Likewise. + * ipa-pure-const.c: Likewise. + * lra-constraints.c: Likewise. + * lra-remat.c: Likewise. + * reload1.c: Likewise. + * reorg.c: Likewise. + * tree-ssa-uninit.c: Likewise. + +2019-01-09 Sandra Loosemore <sandra@codesourcery.com> + + PR other/16615 + + * Makefile.in: Mechanically replace "can not" with "cannot". + * alias.c: Likewise. + * builtins.c: Likewise. + * calls.c: Likewise. + * cgraph.c: Likewise. + * cgraph.h: Likewise. + * cgraphclones.c: Likewise. + * cgraphunit.c: Likewise. + * combine-stack-adj.c: Likewise. + * combine.c: Likewise. + * common/config/i386/i386-common.c: Likewise. + * config/aarch64/aarch64.c: Likewise. + * config/alpha/sync.md: Likewise. + * config/arc/arc.c: Likewise. + * config/arc/predicates.md: Likewise. + * config/arm/arm-c.c: Likewise. + * config/arm/arm.c: Likewise. + * config/arm/arm.h: Likewise. + * config/arm/arm.md: Likewise. + * config/arm/cortex-r4f.md: Likewise. + * config/csky/csky.c: Likewise. + * config/csky/csky.h: Likewise. + * config/darwin-f.c: Likewise. + * config/epiphany/epiphany.md: Likewise. + * config/i386/i386.c: Likewise. + * config/i386/sol2.h: Likewise. + * config/m68k/m68k.c: Likewise. + * config/mcore/mcore.h: Likewise. + * config/microblaze/microblaze.md: Likewise. + * config/mips/20kc.md: Likewise. + * config/mips/sb1.md: Likewise. + * config/nds32/nds32.c: Likewise. + * config/nds32/predicates.md: Likewise. + * config/pa/pa.c: Likewise. + * config/rs6000/e300c2c3.md: Likewise. + * config/rs6000/rs6000.c: Likewise. + * config/s390/s390.h: Likewise. + * config/sh/sh.c: Likewise. + * config/sh/sh.md: Likewise. + * config/spu/vmx2spu.h: Likewise. + * cprop.c: Likewise. + * dbxout.c: Likewise. + * df-scan.c: Likewise. + * doc/cfg.texi: Likewise. + * doc/extend.texi: Likewise. + * doc/fragments.texi: Likewise. + * doc/gty.texi: Likewise. + * doc/invoke.texi: Likewise. + * doc/lto.texi: Likewise. + * doc/md.texi: Likewise. + * doc/objc.texi: Likewise. + * doc/rtl.texi: Likewise. + * doc/tm.texi: Likewise. + * dse.c: Likewise. + * emit-rtl.c: Likewise. + * emit-rtl.h: Likewise. + * except.c: Likewise. + * expmed.c: Likewise. + * expr.c: Likewise. + * fold-const.c: Likewise. + * genautomata.c: Likewise. + * gimple-fold.c: Likewise. + * hard-reg-set.h: Likewise. + * ifcvt.c: Likewise. + * ipa-comdats.c: Likewise. + * ipa-cp.c: Likewise. + * ipa-devirt.c: Likewise. + * ipa-fnsummary.c: Likewise. + * ipa-icf.c: Likewise. + * ipa-inline-transform.c: Likewise. + * ipa-inline.c: Likewise. + * ipa-polymorphic-call.c: Likewise. + * ipa-profile.c: Likewise. + * ipa-prop.c: Likewise. + * ipa-pure-const.c: Likewise. + * ipa-reference.c: Likewise. + * ipa-split.c: Likewise. + * ipa-visibility.c: Likewise. + * ipa.c: Likewise. + * ira-build.c: Likewise. + * ira-color.c: Likewise. + * ira-conflicts.c: Likewise. + * ira-costs.c: Likewise. + * ira-int.h: Likewise. + * ira-lives.c: Likewise. + * ira.c: Likewise. + * ira.h: Likewise. + * loop-invariant.c: Likewise. + * loop-unroll.c: Likewise. + * lower-subreg.c: Likewise. + * lra-assigns.c: Likewise. + * lra-constraints.c: Likewise. + * lra-eliminations.c: Likewise. + * lra-lives.c: Likewise. + * lra-remat.c: Likewise. + * lra-spills.c: Likewise. + * lra.c: Likewise. + * lto-cgraph.c: Likewise. + * lto-streamer-out.c: Likewise. + * postreload-gcse.c: Likewise. + * predict.c: Likewise. + * profile-count.h: Likewise. + * profile.c: Likewise. + * recog.c: Likewise. + * ree.c: Likewise. + * reload.c: Likewise. + * reload1.c: Likewise. + * reorg.c: Likewise. + * resource.c: Likewise. + * rtl.def: Likewise. + * rtl.h: Likewise. + * rtlanal.c: Likewise. + * sched-deps.c: Likewise. + * sched-ebb.c: Likewise. + * sched-rgn.c: Likewise. + * sel-sched-ir.c: Likewise. + * sel-sched.c: Likewise. + * shrink-wrap.c: Likewise. + * simplify-rtx.c: Likewise. + * symtab.c: Likewise. + * target.def: Likewise. + * toplev.c: Likewise. + * tree-call-cdce.c: Likewise. + * tree-cfg.c: Likewise. + * tree-complex.c: Likewise. + * tree-core.h: Likewise. + * tree-eh.c: Likewise. + * tree-inline.c: Likewise. + * tree-loop-distribution.c: Likewise. + * tree-nrv.c: Likewise. + * tree-profile.c: Likewise. + * tree-sra.c: Likewise. + * tree-ssa-alias.c: Likewise. + * tree-ssa-dce.c: Likewise. + * tree-ssa-dom.c: Likewise. + * tree-ssa-forwprop.c: Likewise. + * tree-ssa-loop-im.c: Likewise. + * tree-ssa-loop-ivcanon.c: Likewise. + * tree-ssa-loop-ivopts.c: Likewise. + * tree-ssa-loop-niter.c: Likewise. + * tree-ssa-phionlycprop.c: Likewise. + * tree-ssa-phiopt.c: Likewise. + * tree-ssa-propagate.c: Likewise. + * tree-ssa-threadedge.c: Likewise. + * tree-ssa-threadupdate.c: Likewise. + * tree-ssa-uninit.c: Likewise. + * tree-ssanames.c: Likewise. + * tree-streamer-out.c: Likewise. + * tree.c: Likewise. + * tree.h: Likewise. + * vr-values.c: Likewise. + +2019-01-09 Uroš Bizjak <ubizjak@gmail.com> + + * config/i386/i386-protos.h (ix86_expand_xorsign): New prototype. + (ix86_split_xorsign): Ditto. + * config/i386/i386.c (ix86_expand_xorsign): New function. + (ix86_split_xorsign): Ditto. + * config/i386/i386.md (UNSPEC_XORSIGN): New unspec. + (xorsign<mode>3): New expander. + (xorsign<mode>3_1): New insn_and_split pattern. + * config/i386/sse.md (xorsign<mode>3): New expander. + +2019-01-09 Eric Botcazou <ebotcazou@adacore.com> + + * config/sparc/sparc.md (*tablejump_sp32): Merge into... + (*tablejump_sp64): Likewise. + (*tablejump<P:mode>): ...this. + (*call_address_sp32): Merge into... + (*call_address_sp64): Likewise. + (*call_address<P:mode>): ...this. + (*call_symbolic_sp32): Merge into... + (*call_symbolic_sp64): Likewise. + (*call_symbolic<P:mode>): ...this. + (call_value): Remove constraint and add predicate. + (*call_value_address_sp32): Merge into... + (*call_value_address_sp64): Likewise. + (*call_value_address<P:mode>): ...this. + (*call_value_symbolic_sp32): Merge into... + (*call_value_symbolic_sp64): Likewise. + (*call_value_symbolic<P:mode>): ...this. + (*sibcall_symbolic_sp32): Merge into... + (*sibcall_symbolic_sp64): Likewise. + (*sibcall_symbolic<P:mode>): ...this. + (sibcall_value): Remove constraint and add predicate. + (*sibcall_value_symbolic_sp32): Merge into... + (*sibcall_value_symbolic_sp64): Likewise. + (*sibcall_value_symbolic<P:mode>): ...this. + (window_save): Minor tweak. + (*branch_sp32): Merge into... + (*branch_sp64): Likewise. + (*branch<P:mode>): ...this. + +2019-01-09 Eric Botcazou <ebotcazou@adacore.com> + James Clarke <jrtc27@jrtc27.com> + + PR target/84010 + * config/sparc/sparc.c (sparc_legitimize_tls_address): Only use Pmode + consistently in TLS address generation and adjust code to the renaming + of patterns. Mark calls to __tls_get_addr as const. + * config/sparc/sparc.md (tgd_hi22): Turn into... + (tgd_hi22<P:mode>): ...this and use Pmode throughout. + (tgd_lo10): Turn into... + (tgd_lo10<P:mode>): ...this and use Pmode throughout. + (tgd_add32): Merge into... + (tgd_add64): Likewise. + (tgd_add<P:mode>): ...this and use Pmode throughout. + (tldm_hi22): Turn into... + (tldm_hi22<P:mode>): ...this and use Pmode throughout. + (tldm_lo10): Turn into... + (tldm_lo10<P:mode>): ...this and use Pmode throughout. + (tldm_add32): Merge into... + (tldm_add64): Likewise. + (tldm_add<P:mode>): ...this and use Pmode throughout. + (tldm_call32): Merge into... + (tldm_call64): Likewise. + (tldm_call<P:mode>): ...this and use Pmode throughout. + (tldo_hix22): Turn into... + (tldo_hix22<P:mode>): ...this and use Pmode throughout. + (tldo_lox10): Turn into... + (tldo_lox10<P:mode>): ...this and use Pmode throughout. + (tldo_add32): Merge into... + (tldo_add64): Likewise. + (tldo_add<P:mode>): ...this and use Pmode throughout. + (tie_hi22): Turn into... + (tie_hi22<P:mode>): ...this and use Pmode throughout. + (tie_lo10): Turn into... + (tie_lo10<P:mode>): ...this and use Pmode throughout. + (tie_ld64): Use DImode throughout. + (tie_add32): Merge into... + (tie_add64): Likewise. + (tie_add<P:mode>): ...this and use Pmode throughout. + (tle_hix22_sp32): Merge into... + (tle_hix22_sp64): Likewise. + (tle_hix22<P:mode>): ...this and use Pmode throughout. + (tle_lox22_sp32): Merge into... + (tle_lox22_sp64): Likewise. + (tle_lox22<P:mode>): ...this and use Pmode throughout. + (*tldo_ldub_sp32): Merge into... + (*tldo_ldub_sp64): Likewise. + (*tldo_ldub<P:mode>): ...this and use Pmode throughout. + (*tldo_ldub1_sp32): Merge into... + (*tldo_ldub1_sp64): Likewise. + (*tldo_ldub1<P:mode>): ...this and use Pmode throughout. + (*tldo_ldub2_sp32): Merge into... + (*tldo_ldub2_sp64): Likewise. + (*tldo_ldub2<P:mode>): ...this and use Pmode throughout. + (*tldo_ldsb1_sp32): Merge into... + (*tldo_ldsb1_sp64): Likewise. + (*tldo_ldsb1<P:mode>): ...this and use Pmode throughout. + (*tldo_ldsb2_sp32): Merge into... + (*tldo_ldsb2_sp64): Likewise. + (*tldo_ldsb2<P:mode>): ...this and use Pmode throughout. + (*tldo_ldub3_sp64): Use DImode throughout. + (*tldo_ldsb3_sp64): Likewise. + (*tldo_lduh_sp32): Merge into... + (*tldo_lduh_sp64): Likewise. + (*tldo_lduh<P:mode>): ...this and use Pmode throughout. + (*tldo_lduh1_sp32): Merge into... + (*tldo_lduh1_sp64): Likewise. + (*tldo_lduh1<P:mode>): ...this and use Pmode throughout. + (*tldo_ldsh1_sp32): Merge into... + (*tldo_ldsh1_sp64): Likewise. + (*tldo_ldsh1<P:mode>): ...this and use Pmode throughout. + (*tldo_lduh2_sp64): Use DImode throughout. + (*tldo_ldsh2_sp64): Likewise. + (*tldo_lduw_sp32): Merge into... + (*tldo_lduw_sp64): Likewise. + (*tldo_lduw<P:mode>): ...this and use Pmode throughout. + (*tldo_lduw1_sp64): Use DImode throughout. + (*tldo_ldsw1_sp64): Likewise. + (*tldo_ldx_sp64): Likewise. + (*tldo_stb_sp32): Merge into... + (*tldo_stb_sp64): Likewise. + (*tldo_stb<P:mode>): ...this and use Pmode throughout. + (*tldo_sth_sp32): Merge into... + (*tldo_sth_sp64): Likewise. + (*tldo_sth<P:mode>): ...this and use Pmode throughout. + (*tldo_stw_sp32): Merge into... + (*tldo_stw_sp64): Likewise. + (*tldo_stw<P:mode>): ...this and use Pmode throughout. + (*tldo_stx_sp64): Use DImode throughout. + +2018-01-09 Sudakshina Das <sudi.das@arm.com> + + * config/aarch64/aarch64.c (aarch64_override_options): Add case to + check configure option to set BTI and Return Address Signing. + * configure.ac: Add --enable-standard-branch-protection and + --disable-standard-branch-protection. + * configure: Regenerated. + * doc/install.texi: Document the same. + +2018-01-09 Sudakshina Das <sudi.das@arm.com> + Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> + + * config.gcc (aarch64*-*-*): Add aarch64-bti-insert.o. + * config/aarch64/aarch64.h: Update comment for TRAMPOLINE_SIZE. + * config/aarch64/aarch64.c (aarch64_asm_trampoline_template): Update + if bti is enabled. + * config/aarch64/aarch64-bti-insert.c: New file. + * config/aarch64/aarch64-passes.def (INSERT_PASS_BEFORE): Insert bti + pass. + * config/aarch64/aarch64-protos.h (make_pass_insert_bti): Declare the + new bti pass. + * config/aarch64/aarch64.md (unspecv): Add UNSPECV_BTI_NOARG, + UNSPECV_BTI_C, UNSPECV_BTI_J and UNSPECV_BTI_JC. + (bti_noarg, bti_j, bti_c, bti_jc): New define_insns. + * config/aarch64/t-aarch64: Add rule for aarch64-bti-insert.o. + +2018-01-09 Sudakshina Das <sudi.das@arm.com> + + * config/aarch64/aarch64-protos.h (aarch64_bti_enabled): Declare. + * config/aarch64/aarch64.c (aarch64_handle_no_branch_protection): + Disable bti for -mbranch-protection=none. + (aarch64_handle_standard_branch_protection): Enable bti for + -mbranch-protection=standard. + (aarch64_handle_bti_protection): Enable bti for "bti" in the string to + -mbranch-protection. + (aarch64_bti_enabled): Check if bti is enabled. + * config/aarch64/aarch64.opt: Declare target variable. + * doc/invoke.texi: Add bti to the -mbranch-protection documentation. + +2018-01-09 Sudakshina Das <sudi.das@arm.com> + + * config/aarch64/aarch64.c (aarch64_expand_prologue): Use new + epilogue/prologue scratch registers EP0_REGNUM and EP1_REGNUM. + (aarch64_expand_epilogue): Likewise. + (aarch64_output_mi_thunk): Likewise. + * config/aarch64/aarch64.h (REG_CLASS_CONTENTS): Change + TAILCALL_ADDR_REGS to x16 and x17. + * config/aarch64/aarch64.md: Define EP0_REGNUM and EP1_REGNUM. + +2018-01-09 Sudakshina Das <sudi.das@arm.com> + + * config/aarch64/aarch64-option-extensions.def: Define + AARCH64_OPT_EXTENSION for memtag, rng, sb, ssbs and predres. + * config/aarch64/aarch64.h (AARCH64_FL_RNG): New. + (AARCH64_FL_MEMTAG, ARCH64_FL_SB, AARCH64_FL_SSBS): New. + (AARCH64_FL_PREDRES): New. + (AARCH64_FL_FOR_ARCH8_5): Add AARCH64_FL_SB, AARCH64_FL_SSBS and + AARCH64_FL_PREDRES by default. + * doc/invoke.texi: Document rng, memtag, sb, ssbs and predres. + +2018-01-09 Sudakshina Das <sudi.das@arm.com> + + * config/aarch64/aarch64-arches.def: Define AARCH64_ARCH for + ARMv8.5-A. + * config/aarch64/aarch64.h (AARCH64_FL_V8_5): New. + (AARCH64_FL_FOR_ARCH8_5, AARCH64_ISA_V8_5): New. + * doc/invoke.texi: Document ARMv8.5-A. + +2019-01-09 Alejandro Martinez <alejandro.martinezvicente@arm.com> + + * config/aarch64/aarch64-sve.md (copysign<mode>3): New define_expand. + (xorsign<mode>3): Likewise. + +2019-01-09 Jelinek <jakub@redhat.com> + + PR middle-end/88758 + * tree.c (initializer_each_zero_or_onep) <case VECTOR_CST>: Use + vector_cst_elt instead of VECTOR_CST_ENCODED_ELT. + + PR rtl-optimization/88331 + * function.c (assign_stack_local_1): Don't set dynamic_align_addr if + not currently_expanding_to_rtl. + +2019-01-09 Eric Botcazou <ebotcazou@adacore.com> + + * doc/invoke.texi (-Os): Remove trailing spaces. + (-finline-functions): Remove reference to -O2. + +2019-01-08 Jakub Jelinek <jakub@redhat.com> + + PR rtl-optimization/79593 + * config/i386/i386.md (reg = mem; mem = reg): New define_peephole2. + + * config/rs6000/rs6000.c (rs6000_delegitimize_address): Delegitimize + UNSPEC_FUSION_GPR to its argument. Formatting fixes. + +2019-01-08 Eric Botcazou <ebotcazou@adacore.com> + + PR bootstrap/88721 + * config/sparc/sparc.c (function_arg_slotno): Set *PPREGNO & *PPADDING + to -1 on entry. + + PR debug/88723 + * config/sparc/sparc.c (sparc_delegitimize_address): Deal with naked + UNSPECs and UNSPEC_MOVE_GOTDATA specifically. + +2019-01-08 H.J. Lu <hongjiu.lu@intel.com> + + PR target/88717 + * config/i386/i386.c (ix86_avx_u128_mode_exit): Call + ix86_avx_u128_mode_entry. + +2019-01-08 Martin Liska <mliska@suse.cz> + + PR tree-optimization/88753 + * tree-switch-conversion.c (switch_conversion::build_one_array): + Come up with local variable constructor. Convert first to + type of constructor values. + +2019-01-08 Richard Biener <rguenther@suse.de> + + PR tree-optimization/86554 + * tree-ssa-sccvn.c (eliminate_dom_walker, rpo_elim, + rpo_avail): Move earlier. + (visit_nary_op): When value-numbering to expressions + with different overflow behavior make sure there's an + available expression on the path. + +2019-01-08 Sam Tebbs <sam.tebbs@arm.com> + + * config/aarch64/aarch64.c (BRANCH_PROTECT_STR_MAX, + aarch64_parse_branch_protection, + struct aarch64_branch_protect_type, + aarch64_handle_no_branch_protection, + aarch64_handle_standard_branch_protection, + aarch64_validate_mbranch_protection, + aarch64_handle_pac_ret_protection, + aarch64_handle_attr_branch_protection, + accepted_branch_protection_string, + aarch64_pac_ret_subtypes, + aarch64_branch_protect_types, + aarch64_handle_pac_ret_leaf): Define. + (aarch64_override_options_after_change_1, aarch64_override_options): + Add check for accepted_branch_protection_string. + (aarch64_option_save): Save accepted_branch_protection_string. + (aarch64_option_restore): Save accepted_branch_protection_string. + * config/aarch64/aarch64.c (aarch64_attributes): Add branch-protection. + * config/aarch64/aarch64.opt: Add mbranch-protection. Deprecate + msign-return-address. + * doc/invoke.texi: Add mbranch-protection. + +2019-01-08 Alan Modra <amodra@gmail.com> + + PR target/88614 + * genattrtab.c (max_attr_value, min_attr_value, or_attr_value): + Delete "unknownp" parameter. Adjust callers. Handle + CONST_INT, PLUS, MINUS, and MULT. + (attr_value_aligned): Renamed from or_attr_value. + (min_attr_value): Return INT_MIN for unhandled rtl case.. + (min_fn): ..and translate to INT_MAX here. + (write_length_unit_log): Modify to cope without "unknown". + (write_attr_value): Handle IF_THEN_ELSE. + +2019-01-07 Richard Sandiford <richard.sandiford@arm.com> + + * tree-vect-stmts.c (vectorizable_store): Don't use the dataref_offset + optimization for masked stores. + +2019-01-07 Richard Sandiford <richard.sandiford@arm.com> + + PR middle-end/88567 + * tree-vect-loop.c (get_initial_defs_for_reduction): Pass the + output vector directly to duplicate_and_interleave instead of + going through a temporary. Postpone insertion of ctor_seq to + the end of the loop. + +2019-01-07 Richard Earnshaw <rearnsha@arm.com> + + PR target/86891 + * config/aarch64/aarch64.c (aarch64_expand_subvti): New parameter + unsigned_p. Handle signed and unsigned overflow correction as + required. + * config/aarch64/aarch64-protos.h (aarch64_expand_subvti): Update + prototype. + * config/aarch64/aarch64.md (addv<mode>4): Use aarch64_plus_operand + for operand 2. + (add<mode>3_compareV_imm): Make this callable for expanding. + (subv<GPI:mode>4): Use register_operand for operand 1. Use + aarch64_plus_operand for operand 2. + (subv<GPI:mode>_insn): New insn pattern. + (subv<GPI:mode>_imm): Likewise. + (negv<GPI:mode>3): New expand pattern. + (negv<GPI:mode>_insn): New insn pattern. + (negv<GPI:mode>_cmp_only): Likewise. + (cmpv<GPI:mode>_insn): Likewise. + (subvti4): Use register_operand for operand 1. Update call to + aarch64_expand_subvti. + (usubvti4): Likewise. + (negvti3): New expand pattern. + (negdi_carryout): New insn pattern. + (negvdi_carryinV): New insn pattern. + (sub<mode3>_compare1_imm): Delete named insn pattern, make anonymous + version the named version. + (peepholes to convert to sub<mode3>_compare1_imm): Adjust order of + operands. + (usub<GPI:mode>3_carryinC, usub<GPI:mode>3_carryinC_z1): New insn + patterns. + (usub<GPI:mode>3_carryinC_z2, usub<GPI:mode>3_carryinC): New insn + patterns. + (sub<mode>3_carryinCV, sub<mode>3_carryinCV_z1_z2): Delete. + (sub<mode>3_carryinCV_z1, sub<mode>3_carryinCV_z2): Delete. + (sub<mode>3_carryinCV): Delete. + (sub<GPI:mode>3_carryinV): New expand pattern. + sub<mode>3_carryinV, sub<mode>3_carryinV_z2): New insn patterns. + +2019-01-07 Richard Biener <rguenther@suse.de> + + * tree-ssa-uncprop.c (ssa_equip_hash_traits): Remove in favor + of tree_operand_hash. + +2019-01-07 Richard Sandiford <richard.sandiford@arm.com> + + PR tree-optimization/88598 + * tree.h (single_nonzero_element): Declare. + * tree.c (single_nonzero_element): New function. + * match.pd: Fold certain reductions of X & CST to X[I] & CST[I] + if I is the only nonzero element of CST. + +2019-01-07 Richard Sandiford <richard.sandiford@arm.com> + + PR tree-optimization/88598 + * tree.h (initializer_each_zero_or_onep): Declare. + * tree.c (initializer_each_zero_or_onep): New function. + (signed_or_unsigned_type_for): Handle float types too. + (unsigned_type_for, signed_type_for): Update comments accordingly. + * match.pd: Fold x * { 0 or 1, 0 or 1, ...} to + x & { 0 or -1, 0 or -1, ... }. + +2019-01-07 Jonathan Wakely <jwakely@redhat.com> + + * doc/install.texi: Replace references to x86_64-unknown-linux-gnu + with x86_64-pc-linux-gnu. + +2019-01-07 Tom de Vries <tdevries@suse.de> + + PR target/85486 + * config/nvptx/nvptx.c (has_vector_partitionable_routine_calls_p): New + function. + (nvptx_goacc_validate_dims): Force vl32 if calling vector-partitionable + routines. + +2019-01-07 Jakub Jelinek <jakub@redhat.com> + + * config/i386/sse.md (vec_extract<mode><ssehalfvecmodelower>): Use + V_256_512 iterator instead of V_512 and TARGET_AVX instead of + TARGET_AVX512F as condition. + + PR debug/88723 + * dwarf2out.c (const_ok_for_output_1): Remove redundant call to + const_not_ok_for_debug_p target hook. + (mem_loc_descriptor) <case UNSPEC>: Only call const_ok_for_output_1 + on UNSPEC and subexpressions thereof if all subexpressions of the + UNSPEC are CONSTANT_P. + + PR tree-optimization/88676 + * tree-ssa-phiopt.c (two_value_replacement): New function. + (tree_ssa_phiopt_worker): Call it. + + PR sanitizer/88619 + * cfgexpand.c (expand_stack_vars): Only align prev_offset to + ASAN_MIN_RED_ZONE_SIZE, not to maximum of that and alignb. + + PR c++/85052 + * tree-vect-generic.c: Include insn-config.h and recog.h. + (expand_vector_piecewise): Add defaulted ret_type argument, + if non-NULL, use that in preference to type for the result type. + (expand_vector_parallel): Formatting fix. + (do_vec_conversion, do_vec_narrowing_conversion, + expand_vector_conversion): New functions. + (expand_vector_operations_1): Call expand_vector_conversion + for VEC_CONVERT ifn calls. + * internal-fn.def (VEC_CONVERT): New internal function. + * internal-fn.c (expand_VEC_CONVERT): New function. + * fold-const-call.c (fold_const_vec_convert): New function. + (fold_const_call): Use it for CFN_VEC_CONVERT. + * doc/extend.texi (__builtin_convertvector): Document. + +2019-01-07 Tom de Vries <tdevries@suse.de> + + * config/nvptx/nvptx-protos.h (nvptx_output_red_partition): Declare. + * config/nvptx/nvptx.c (vector_red_size, vector_red_align, + vector_red_partition, vector_red_sym): New global variables. + (nvptx_option_override): Initialize vector_red_sym. + (nvptx_declare_function_name): Restore red_partition register. + (nvptx_file_end): Emit code to declare the vector reduction variables. + (nvptx_output_red_partition): New function. + (nvptx_expand_shared_addr): Add vector argument. Use it to handle + large vector reductions. + (enum nvptx_builtins): Add NVPTX_BUILTIN_VECTOR_ADDR. + (nvptx_init_builtins): Add VECTOR_ADDR. + (nvptx_expand_builtin): Update call to nvptx_expand_shared_addr. + Handle nvptx_expand_shared_addr. + (nvptx_get_shared_red_addr): Add vector argument and handle large + vectors. + (nvptx_goacc_reduction_setup): Add offload_attrs argument and handle + large vectors. + (nvptx_goacc_reduction_init): Likewise. + (nvptx_goacc_reduction_fini): Likewise. + (nvptx_goacc_reduction_teardown): Likewise. + (nvptx_goacc_reduction): Update calls to nvptx_goacc_reduction_{setup, + init,fini,teardown}. + (nvptx_init_axis_predicate): Initialize vector_red_partition. + (nvptx_set_current_function): Init vector_red_partition. + * config/nvptx/nvptx.md (UNSPECV_RED_PART): New unspecv. + (nvptx_red_partition): New insn. + * config/nvptx/nvptx.h (struct machine_function): Add red_partition. + +2019-01-07 Tom de Vries <tdevries@suse.de> + + PR target/85381 + * config/nvptx/nvptx.c (nvptx_process_pars): Don't emit barriers for + empty loops. + +2019-01-07 Tom de Vries <tdevries@suse.de> + + * config/nvptx/nvptx.c (oacc_bcast_partition): Declare. + (nvptx_option_override): Init oacc_bcast_partition. + (nvptx_init_oacc_workers): New function. + (nvptx_declare_function_name): Call nvptx_init_oacc_workers. + (nvptx_needs_shared_bcast): New function. + (nvptx_find_par): Generalize to enable vectors to use shared-memory + to propagate state. + (nvptx_shared_propagate): Initialize vector bcast partition and + synchronization state. + (nvptx_single): Generalize to enable vectors to use shared-memory + to propagate state. + (nvptx_process_pars): Likewise. + (nvptx_set_current_function): Initialize oacc_broadcast_partition. + * config/nvptx/nvptx.h (struct machine_function): Add + bcast_partition and sync_bar members. + +2019-01-07 Tom de Vries <tdevries@suse.de> + + * config/nvptx/nvptx.c (nvptx_welformed_vector_length_p) + (nvptx_apply_dim_limits): New function. + (nvptx_goacc_validate_dims_1): Allow PTX_MAX_VECTOR_LENGTH larger than + PTX_WARP_SIZE. + +2019-01-07 Tom de Vries <tdevries@suse.de> + + * config/nvptx/nvptx.c (nvptx_goacc_validate_dims_1): Move warnings to + as late as possible. + +2019-01-07 Tom de Vries <tdevries@suse.de> + + * config/nvptx/nvptx.c (PTX_VECTOR_LENGTH): Remove. + (PTX_DEFAULT_VECTOR_LENGTH, PTX_MAX_VECTOR_LENGTH): Define. + (nvptx_goacc_validate_dims_1, nvptx_dim_limit) + (nvptx_goacc_reduction_fini): Use PTX_DEFAULT_VECTOR_LENGTH, + PTX_MAX_VECTOR_LENGTH and PTX_WARP_SIZE instead of PTX_VECTOR_LENGTH. + +2019-01-07 Tom de Vries <tdevries@suse.de> + + * config/nvptx/nvptx.c (nvptx_goacc_validate_dims): Add asserts. + +2019-01-07 Tom de Vries <tdevries@suse.de> + + * omp-offload.c (oacc_get_min_dim): New function. + * omp-offload.h (oacc_get_min_dim): Declare. + +2018-12-26 Mateusz B <mateuszb@poczta.onet.pl> + + PR target/88521 + * config/i386/i386.c (function_value_ms_64): Return small sturct in + AX_REG and float/double in FIRST_SSE_REG for 4 or 8 byte modes. + +2019-01-05 Jan Hubicka <hubicka@ucw.cz> + + PR tree-opt/86020 + Revert: + 2017-05-22 Jan Hubicka <hubicka@ucw.cz> + + * ipa-inline.c (edge_badness): Use inlined_time instead of + inline_summaries->get. + +2019-01-05 Jan Hubicka <hubicka@ucw.cz> + + * opts.c (enable_fdo_optimizations): Enable + version-loops-for-strides, loop-interchange, unrol-and-jam + and tree-loop-distribution. + * invoke.texi: Document newly enabled options. + +2019-01-05 Jan Hubicka <hubicka@ucw.cz> + + * doc/invoke.texi (max-inline-insns-small): New parameters. + * ipa-inline.c (want_early_inline_function_p): simplify. + (want_inline_small_function_p): Fix pasto from previous patch; + use max-inline-insns-small bound. + * params.def (max-inline-insns-small): New param. + * ipa-fnsummary.c (analyze_function_body): Initialize time/size + variables correctly. + +2019-01-05 Jan Hubicka <hubicka@ucw.cz> + + * doc/invoke.texi: Document max-inline-insns-size, + uninlined-function-insns, uninlined-function-time, + uninlined-thunk-insns and uninlined-thunk-time. + * params.def: Add max-inline-insns-size, + uninlined-function-insns, uninlined-function-time, + uninlined-thunk-insns and uninlined-thunk-time. + * ipa-fnsummary.c (compute_fn_summary, analyze_function_body): Use + new parameters. + * ipa-inline.c (can_inline_edge_by_limits_p, + want_inline_small_function_p): Use new parameters. + +2019-01-05 Jan Hubicka <hubicka@ucw.cz> + + * ipa-fnsummary.c (analyze_function_body): Fix accounting of time. + +2019-01-05 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/82564 + PR target/88620 + * expr.c (expand_assignment): For calls returning VLA structures + if to_rtx is not a MEM, force it into a stack temporary. + + PR debug/88635 + * dwarf2out.c (const_ok_for_output_1): Reject MINUS that contains + SYMBOL_REF, CODE_LABEL or UNSPEC in subexpressions of second argument. + Reject PLUS that contains SYMBOL_REF, CODE_LABEL or UNSPEC in + subexpressions of both operands. + (mem_loc_descriptor): Handle UNSPEC if target hook acks it and all the + subrtxes are CONSTANT_P. + * config/i386/i386.c (ix86_const_not_ok_for_debug_p): Revert + 2018-11-09 changes. + +2019-01-04 Jan Hubicka <hubicka@ucw.cz> + + * params.def (hot-bb-count-ws-permille): Set to 990. + +2019-01-04 Martin Sebor <msebor@redhat.com> + + PR c/88546 + * attribs.c (decls_mismatched_attributes): Avoid warning for attribute + leaf. + +2019-01-04 Martin Sebor <msebor@redhat.com> + + PR c/88363 + * doc/extend.texi (attribute alloc_align, alloc_size): Update. + +2019-01-04 Jakub Jelinek <jakub@redhat.com> + + * gdbinit.in: Turn off pagination for the skip commands, restore + it to previous state afterwards. + +2019-01-04 Jakub Jelinek <jakub@redhat.com> + + PR target/88594 + * config/i386/i386.c (ix86_expand_divmod_libfunc): Use mode instead + of GET_MODE (opN) as modes of the libcall arguments. + +2019-01-04 Jan Beulich <jbeulich@suse.com> + + * config/i386/sse.md + (<avx512>_cmp<mode>3<mask_scalar_merge_name><round_saeonly_name>, + <avx512>_cmp<mode>3<mask_scalar_merge_name>, + <avx512>_ucmp<mode>3<mask_scalar_merge_name>, + <avx512>_ucmp<mode>3<mask_scalar_merge_name>, + avx512f_vmcmp<mode>3<round_saeonly_name>, + avx512f_vmcmp<mode>3_mask<round_saeonly_name>, + avx512f_maskcmp<mode>3, + <avx512>_cvt<ssemodesuffix>2mask<mode>, + <avx512>_cvt<ssemodesuffix>2mask<mode>, + *<avx512>_cvtmask2<ssemodesuffix><mode>, + *<avx512>_cvtmask2<ssemodesuffix><mode>, + <avx512>_eq<mode>3<mask_scalar_merge_name>_1, + <avx512>_eq<mode>3<mask_scalar_merge_name>_1, + <avx512>_gt<mode>3<mask_scalar_merge_name>, + <avx512>_gt<mode>3<mask_scalar_merge_name>, + <avx512>_testm<mode>3<mask_scalar_merge_name>, + <avx512>_testnm<mode>3<mask_scalar_merge_name>, + *<avx512>_testm<VI1248_AVX512VLBW:mode>3_zext, + *<avx512>_testm<VI1248_AVX512VLBW:mode>3_zext_mask, + *<avx512>_testnm<VI1248_AVX512VLBW:mode>3_zext, + *<avx512>_testnm<VI1248_AVX512VLBW:mode>3_zext_mask, + avx512cd_maskb_vec_dup<mode>, + avx512cd_maskw_vec_dup<mode>, + avx512dq_fpclass<mode><mask_scalar_merge_name>, + avx512dq_vmfpclass<mode>, + avx512vl_vpshufbitqmb<mode><mask_scalar_merge_name>): Use =k + instead of =Yk. + +2019-01-03 Martin Sebor <msebor@redhat.com> + + PR tree-optimization/88659 + * calls.c (maybe_warn_nonstring_arg): Avoid assuming maxlen is set. + +2019-01-03 Aaron Sawdey <acsawdey@linux.ibm.com> + + * config/rs6000/rs6000-string.c (expand_block_move): Don't use + unaligned vsx and avoid lxvd2x/stxvd2x. + (gen_lvx_v4si_move): New function. + +2019-01-03 Tom de Vries <tdevries@suse.de> + + * config/nvptx/nvptx.c (MACH_VECTOR_LENGTH, MACH_MAX_WORKERS): Define. + (init_axis_dim, nvptx_mach_max_workers, nvptx_mach_vector_length): New + function. + * config/nvptx/nvptx.h (struct machine_function): Add axis_dims. + +2019-01-03 Tom de Vries <tdevries@suse.de> + + * config/nvptx/nvptx.c (struct offload_attrs): New. + (populate_offload_attrs): New function. Factor mask extraction out of + nvptx_reorg. Add extraction of dimensions. + (nvptx_reorg): Use populate_offload_attrs. + +2019-01-03 Tom de Vries <tdevries@suse.de> + + * config/nvptx/nvptx.c (nvptx_goacc_validate_dims_1): Add early-out + cases for oacc_min_dims_p and routine_p. Add asserts for + oacc_default_dims_p and offload_region_p. + +2019-01-03 Tom de Vries <tdevries@suse.de> + + * config/nvptx/nvptx.c (nvptx_goacc_validate_dims_1): New function, + factored out of ... + (nvptx_goacc_validate_dims): ... here. + +2019-01-03 Jan Hubicka <hubicka@ucw.cz> + + PR tree-optimization/85574 + * tree-ssa-uncprop.c (struct equiv_hash_elt): Remove unused + structure. + (struct ssa_equip_hash_traits): Declare. + (val_ssa_equiv): Use custom hash traits using operand_equal_p. + +2019-01-03 Jakub Jelinek <jakub@redhat.com> + + PR debug/88644 + * dwarf2out.c (modified_type_die): If type is equal to sizetype, + change it to qualified_type. + +2019-01-03 Jan Hubicka <hubicka@ucw.cz> + + * ipa-utils.c (scale_ipa_profile_for_fn): Break out from ... + (ipa_merge_profiles): ... here; do not ICE on thunks and aliases. + +2019-01-02 Martin Sebor <msebor@redhat.com> + Jeff Law <law@redhat.com> + + * gimple-fold.c (strlen_range_kind): Remove SRK_LENRANGE_2. + (get_range_strlen_tree): Update appropriately. + (get_range_strlen) + * gimple-fold.h (get_range_strlen): Drop unused last argument. + + * gimple-fold.c (gimple_fold_builtin_strlen): Use set_strlen_range + rather than set_range_info. + * tree-ssa-strlen.c (set_strlen_range): Extracted from + maybe_set_strlen_range. Handle potentially boundary crossing + cases more conservatively. + (maybe_set_strlen_range): Parts refactored into set_strlen_range. + Call set_strlen_range. + * tree-ssa-strlen.h (set_strlen_range): Add prototype. + + PR middle-end/88663 + * gimple-fold.c (get_range_strlen): Update prototype to no longer + need the flexp argument. + (get_range_strlen_tree): Drop flexp argument. Drop flexp argument + from calls to get_range_strlen. Update comments. Just update + VAL for an unterminated const char array and let the reset of the + code handle it normally. No longer try to set *flexp. Adjust + return value. + (get_range_strlen): Update for the new get_range_strlen API. + (get_maxval_strlen): Similarly. + (gimple_fold_builtin_strlen): Handle update meaning of return value + from get_range_strlen. + * gimple-ssa-sprintf.c (get_string_length): Update for the new + get_range_strlen API. + +2019-01-02 Jan Hubicka <hubicka@ucw.cz> + + PR lto/88130 + * varpool.c (varpool_node::ctor_useable_for_folding_p): Also return + false at WPA time when body was removed. + +2019-01-02 Martin Liska <mliska@suse.cz> + + PR tree-optimization/88650 + * predict.c (set_even_probabilities): Calculate probability + remainer only when really used. + +2019-01-02 Richard Biener <rguenther@suse.de> + + PR middle-end/88651 + * tree-data-ref.c (analyze_subscript_affine_affine): Use + widest_ints when mangling max_stmt_execution results. + +2019-01-02 Richard Biener <rguenther@suse.de> + + PR tree-optimization/88621 + * tree-ssa-loop-im.c (gather_mem_refs_stmt): Fix pastos, avoid + bitfields when canoncalizing. + +2019-01-02 Richard Biener <rguenther@suse.de> + + PR target/87545 + * config/i386/x86-tune-costs.h (intel_cost): Adjust + cost of cheap SSE instruction. + +2019-01-02 Richard Biener <rguenther@suse.de> + + PR ipa/85574 + * ipa-icf.h (sem_item_optimizer::sort_congruence_split): Declare. + * ipa-icf.c (sem_item_optimizer::sort_congruence_split): New + function. + (sem_item_optimizer::do_congruence_step_f): Sort the congruence + set after UIDs before splitting them. + +2019-01-01 Martin Sebor <msebor@redhat.com> + Jeff Law <law@redhat.com> + + * gimple-fold.c (get_range_strlen_tree): Record if the computed + length is optimistic. If it is, then arrange to compute the + conservative length as well. + + * gimple-fold.h (get_range_strlen): Update prototype. + * builtins.c (check_access): Update call to get_range_strlen to use + c_strlen_data pointer. Change various variable accesses to instead + pull data from the c_strlen_data structure. + (check_strncat_sizes, expand_builtin_strncat): Likewise. + * calls.c (maybe_warn_nonstring_arg): Likewise. + * tree-ssa-strlen.c (maybe_diag_stxncpy_trunc): Likewise. Reset + minimum length if maximum lengh is unknown. + * gimple-ssa-sprintf.c (get_string_length): Likewise. Drop code + that used c_strlen, it's no longer needed. Restructure slightly. + (format_string): Set unlikely range appropriately. + * gimple-fold.c (get_range_strlen): Update comments. Fix minor + formatting issues. + (get_range_strlen): Accept c_strlen_data pointer for external + call sites as well. Pass through to call to internal get_range_strlen. + Adjust minlen, maxlen and maxbound as needed. + (get_maxval_strlen): Update comments. + (gimple_fold_builtin_strlen): Update call to get_range_strlen + to use c_strlen_data pointer. Change variable accesses to instead + use c_strlen_data data members. + + * gimple-fold.c (get_range_strlen): Update prototype. + (get_range_strlen_tree): Update prototype. Drop minlen/maxlen + local variables. Use pdata to return information to caller. + Update calls to get_range_strlen. Update pdata->maxbound. + (get_range_strlen -- static version): Similarly. + (get_range_strlen -- extern version): Update for internal + get_range_strlen API change. Convert to external data format. + (get_maxval_strlen): Similarly. + +2019-01-01 Jan Hubicka <hubicka@ucw.cz> + + * coverage.c (get_coverage_counts): Use current_function_decl. + * profile.c (read_thunk_profile): New function. + (branch_prob): Add THUNK parameter. + * tree-profile.c (tree_profiling): Handle thunks. + * value-prof.c (init_node_map): Handle thunks. + * value-prof.h (branch_prob): Upate prototype. + (read_thunk_profile): Declare. + +2019-01-01 Jakub Jelinek <jakub@redhat.com> + + Update copyright years. + + * gcc.c (process_command): Update copyright notice dates. + * gcov-dump.c (print_version): Ditto. + * gcov.c (print_version): Ditto. + * gcov-tool.c (print_version): Ditto. + * gengtype.c (create_file): Ditto. + * doc/cpp.texi: Bump @copying's copyright year. + * doc/cppinternals.texi: Ditto. + * doc/gcc.texi: Ditto. + * doc/gccint.texi: Ditto. + * doc/gcov.texi: Ditto. + * doc/install.texi: Ditto. + * doc/invoke.texi: Ditto. + +Copyright (C) 2019 Free Software Foundation, Inc. + +Copying and distribution of this file, with or without modification, +are permitted in any medium without royalty provided the copyright +notice and this notice are preserved. |