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| author | Uros Bizjak <ubizjak@gmail.com> | 2021-07-06 19:27:34 +0200 |
|---|---|---|
| committer | Uros Bizjak <ubizjak@gmail.com> | 2021-07-06 19:28:35 +0200 |
| commit | f65878178ab05180a5937f11f8fdb755678a82ce (patch) | |
| tree | 7ac7267296f21e9246f3ac19a4b5b81687cf633e /fixincludes | |
| parent | 6b096c17314a46f285fa26670048f287a399573f (diff) | |
| download | gcc-f65878178ab05180a5937f11f8fdb755678a82ce.zip gcc-f65878178ab05180a5937f11f8fdb755678a82ce.tar.gz gcc-f65878178ab05180a5937f11f8fdb755678a82ce.tar.bz2 | |
i386: Add variable vec_set for 32bit vectors [PR97194]
To generate sane code a SSE4.1 variable PBLENDV instruction is needed.
Also enable variable vec_set through vec_setm_operand predicate
for TARGET_SSE4_1 instead of TARGET_AVX2. ix86_expand_vector_init_duplicate
is able to emulate vpbroadcast{b,w} with pxor/pshufb.
2021-07-06 Uroš Bizjak <ubizjak@gmail.com>
gcc/
PR target/97194
* config/i386/predicates.md (vec_setm_operand): Enable
register_operand for TARGET_SSE4_1.
* config/i386/mmx.md (vec_setv2hi): Use vec_setm_operand
as operand 2 predicate. Call ix86_expand_vector_set_var
for non-constant index operand.
(vec_setv4qi): Use vec_setm_mmx_operand as operand 2 predicate.
Call ix86_expand_vector_set_var for non-constant index operand.
gcc/testsuite/
PR target/97194
* gcc.target/i386/sse4_1-vec-set-1a.c: New test.
* gcc.target/i386/sse4_1-vec-set-2a.c: Ditto.
Diffstat (limited to 'fixincludes')
0 files changed, 0 insertions, 0 deletions