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| author | Haochen Jiang <haochen.jiang@intel.com> | 2022-12-16 14:07:16 +0800 |
|---|---|---|
| committer | liuhongt <hongtao.liu@intel.com> | 2023-09-22 10:30:44 +0800 |
| commit | ca2bfb3e1733256d250c2f83725466e1239c13a7 (patch) | |
| tree | cfee6dbd87ddf8c84860acd1fd24cdc8fb4a3ad9 /contrib/gcc-changelog/git_commit.py | |
| parent | a017564d99e3e070df8b1669793c95809d7531a0 (diff) | |
| download | gcc-ca2bfb3e1733256d250c2f83725466e1239c13a7.zip gcc-ca2bfb3e1733256d250c2f83725466e1239c13a7.tar.gz gcc-ca2bfb3e1733256d250c2f83725466e1239c13a7.tar.bz2 | |
Support -mevex512 for AVX512DQ intrins
gcc/ChangeLog:
* config/i386/i386-expand.cc (ix86_expand_sse2_mulvxdi3):
Add TARGET_EVEX512 for 512 bit usage.
* config/i386/i386.cc (standard_sse_constant_opcode): Ditto.
* config/i386/sse.md (VF1_VF2_AVX512DQ): Ditto.
(VF1_128_256VL): Ditto.
(VF2_AVX512VL): Ditto.
(VI8_256_512): Ditto.
(<mask_codefor>fixuns_trunc<mode><sseintvecmodelower>2<mask_name>):
Ditto.
(AVX512_VEC): Ditto.
(AVX512_VEC_2): Ditto.
(VI4F_BRCST32x2): Ditto.
(VI8F_BRCST64x2): Ditto.
Diffstat (limited to 'contrib/gcc-changelog/git_commit.py')
0 files changed, 0 insertions, 0 deletions