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| author | Jakub Jelinek <jakub@redhat.com> | 2022-11-15 08:14:45 +0100 |
|---|---|---|
| committer | Jakub Jelinek <jakub@redhat.com> | 2022-11-15 08:14:45 +0100 |
| commit | 4a7a846687e076eae58ad3ea959245b2bf7fdc07 (patch) | |
| tree | 4fd2d998cea2d0f56ef21f6297d55e1af8f42066 /contrib/gcc-changelog/git_commit.py | |
| parent | 7cf165de63c5d2726bba9f0809a233bd63b84842 (diff) | |
| download | gcc-4a7a846687e076eae58ad3ea959245b2bf7fdc07.zip gcc-4a7a846687e076eae58ad3ea959245b2bf7fdc07.tar.gz gcc-4a7a846687e076eae58ad3ea959245b2bf7fdc07.tar.bz2 | |
libatomic: Handle AVX+CX16 AMD like Intel for 16b atomics [PR104688]
We got a response from AMD in
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104688#c10
so the following patch starts treating AMD with AVX and CMPXCHG16B
ISAs like Intel by using vmovdqa for atomic load/store in libatomic.
We still don't have confirmation from Zhaoxin and VIA (anything else
with CPUs featuring AVX and CX16?).
2022-11-15 Jakub Jelinek <jakub@redhat.com>
PR target/104688
* config/x86/init.c (__libat_feat1_init): Don't clear
bit_AVX on AMD CPUs.
Diffstat (limited to 'contrib/gcc-changelog/git_commit.py')
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