IRA: Revert 11b8091fb to fix PR 93221

A previous change to simplify LRA introduced in 11b809 (From-SVN: r279550)
disabled hard register splitting for -O0. This causes a problem on aarch64 in
cases where parameters are passed in multiple registers (in the bug report an OI
passed in 2 V4SI registers). This is mandated by the AAPCS.

gcc/ChangeLog:
2020-01-29  Joel Hutton  <Joel.Hutton@arm.com>

	PR target/93221
	* ira.c (ira): Revert use of simplified LRA algorithm.

gcc/testsuite/ChangeLog:
2020-01-29  Joel Hutton  <Joel.Hutton@arm.com>

	PR target/93221
	* gcc.target/aarch64/pr93221.c: New test.

5 files changed, 49 insertions, 23 deletions

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index f8fe5ba..67d24c7 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2020-01-29  Joel Hutton  <Joel.Hutton@arm.com>
+
+	PR target/93221
+	* ira.c (ira): Revert use of simplified LRA algorithm.
+
 2020-01-29  Martin Jambor  <mjambor@suse.cz>
 
 	PR tree-optimization/92706
diff --git a/gcc/ira.c b/gcc/ira.c
index 46091ad..c8b5f86 100644
--- a/gcc/ira.c
+++ b/gcc/ira.c
@@ -5205,35 +5205,27 @@ ira (FILE *f)
   /* Perform target specific PIC register initialization.  */
   targetm.init_pic_reg ();
 
-  if (optimize)
-    {
-      ira_conflicts_p = true;
-
-      /* Determine the number of pseudos actually requiring coloring.  */
-      unsigned int num_used_regs = 0;
-      for (unsigned int i = FIRST_PSEUDO_REGISTER; i < DF_REG_SIZE (df); i++)
-	if (DF_REG_DEF_COUNT (i) || DF_REG_USE_COUNT (i))
-	  num_used_regs++;
-
-      /* If there are too many pseudos and/or basic blocks (e.g. 10K
-	 pseudos and 10K blocks or 100K pseudos and 1K blocks), we will
-	 use simplified and faster algorithms in LRA.  */
-      lra_simple_p
-	= ira_use_lra_p
-	  && num_used_regs >= (1U << 26) / last_basic_block_for_fn (cfun);
-    }
-  else
-    {
-      ira_conflicts_p = false;
-      lra_simple_p = ira_use_lra_p;
-    }
+  ira_conflicts_p = optimize > 0;
+
+  /* Determine the number of pseudos actually requiring coloring.  */
+  unsigned int num_used_regs = 0;
+  for (unsigned int i = FIRST_PSEUDO_REGISTER; i < DF_REG_SIZE (df); i++)
+    if (DF_REG_DEF_COUNT (i) || DF_REG_USE_COUNT (i))
+      num_used_regs++;
+
+  /* If there are too many pseudos and/or basic blocks (e.g. 10K
+     pseudos and 10K blocks or 100K pseudos and 1K blocks), we will
+     use simplified and faster algorithms in LRA.  */
+  lra_simple_p
+    = ira_use_lra_p
+      && num_used_regs >= (1U << 26) / last_basic_block_for_fn (cfun);
 
   if (lra_simple_p)
     {
       /* It permits to skip live range splitting in LRA.  */
       flag_caller_saves = false;
       /* There is no sense to do regional allocation when we use
-	 simplified LRA.  */
+	simplified LRA.  */
       flag_ira_region = IRA_REGION_ONE;
       ira_conflicts_p = false;
     }
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 33b5a6a..7b369d5 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2020-01-29  Joel Hutton  <Joel.Hutton@arm.com>
+
+	PR target/93221
+	* gcc.target/aarch64/pr93221.c: New test.
+
 2020-01-29  Martin Jambor  <mjambor@suse.cz>
 
 	PR tree-optimization/92706
diff --git a/gcc/testsuite/gcc.dg/vect/pr92429.c b/gcc/testsuite/gcc.dg/vect/pr92429.c
new file mode 100644
index 0000000..7885cd6
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/vect/pr92429.c
@@ -0,0 +1,14 @@
+/* PR92429 */
+/* { dg-do compile } */
+/* { dg-additional-options "-O1 -fno-tree-fre" } */
+/* { dg-additional-options "-mavx2" { target { x86_64-*-* i?86-*-* } } } */
+
+void
+as (int *gl, int k1)
+{
+  while (k1 < 1)
+    {
+      gl[k1] = gl[k1] * gl[k1] / 2;
+      ++k1;
+    }
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/pr93221.c b/gcc/testsuite/gcc.target/aarch64/pr93221.c
new file mode 100644
index 0000000..4dc2c3d0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/pr93221.c
@@ -0,0 +1,10 @@
+/* PR target/93221 */
+/* { dg-do compile } */
+/* { dg-options "-O0 -mno-omit-leaf-frame-pointer" } */
+
+struct S { __Int32x4_t b[2]; };
+
+void
+foo (struct S x)
+{
+}