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| author | Lulu Cheng <chenglulu@loongson.cn> | 2024-07-04 10:37:26 +0800 |
|---|---|---|
| committer | Lulu Cheng <chenglulu@loongson.cn> | 2024-07-12 10:23:01 +0800 |
| commit | abeb6c8a62758faa0719e818e6e8a7db15a6793b (patch) | |
| tree | 339d0d2da4a26bf20aabfb9cea705c57616b3631 | |
| parent | d7318f4cf89c2a934fcd1f87d711081285fad242 (diff) | |
| download | gcc-abeb6c8a62758faa0719e818e6e8a7db15a6793b.zip gcc-abeb6c8a62758faa0719e818e6e8a7db15a6793b.tar.gz gcc-abeb6c8a62758faa0719e818e6e8a7db15a6793b.tar.bz2 | |
LoongArch: TFmode is not allowed to be stored in the float register.
PR target/115752
gcc/ChangeLog:
* config/loongarch/loongarch.cc
(loongarch_hard_regno_mode_ok_uncached): Replace
UNITS_PER_FPVALUE with UNITS_PER_HWFPVALUE.
* config/loongarch/loongarch.h (UNITS_PER_FPVALUE): Delete.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/pr115752.c: New test.
| -rw-r--r-- | gcc/config/loongarch/loongarch.cc | 2 | ||||
| -rw-r--r-- | gcc/config/loongarch/loongarch.h | 7 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/loongarch/pr115752.c | 8 |
3 files changed, 9 insertions, 8 deletions
diff --git a/gcc/config/loongarch/loongarch.cc b/gcc/config/loongarch/loongarch.cc index 27f3dbd..5d894a3 100644 --- a/gcc/config/loongarch/loongarch.cc +++ b/gcc/config/loongarch/loongarch.cc @@ -6763,7 +6763,7 @@ loongarch_hard_regno_mode_ok_uncached (unsigned int regno, machine_mode mode) if (mclass == MODE_FLOAT || mclass == MODE_COMPLEX_FLOAT || mclass == MODE_VECTOR_FLOAT) - return size <= UNITS_PER_FPVALUE; + return size <= UNITS_PER_HWFPVALUE; /* Allow integer modes that fit into a single register. We need to put integers into FPRs when using instructions like CVT diff --git a/gcc/config/loongarch/loongarch.h b/gcc/config/loongarch/loongarch.h index b9323ab..5efeae5 100644 --- a/gcc/config/loongarch/loongarch.h +++ b/gcc/config/loongarch/loongarch.h @@ -146,13 +146,6 @@ along with GCC; see the file COPYING3. If not see #define UNITS_PER_HWFPVALUE \ (TARGET_SOFT_FLOAT ? 0 : UNITS_PER_FP_REG) -/* The largest size of value that can be held in floating-point - registers. */ -#define UNITS_PER_FPVALUE \ - (TARGET_SOFT_FLOAT ? 0 \ - : TARGET_SINGLE_FLOAT ? UNITS_PER_FP_REG \ - : LA_LONG_DOUBLE_TYPE_SIZE / BITS_PER_UNIT) - /* The number of bytes in a double. */ #define UNITS_PER_DOUBLE (TYPE_PRECISION (double_type_node) / BITS_PER_UNIT) diff --git a/gcc/testsuite/gcc.target/loongarch/pr115752.c b/gcc/testsuite/gcc.target/loongarch/pr115752.c new file mode 100644 index 0000000..df4bae5 --- /dev/null +++ b/gcc/testsuite/gcc.target/loongarch/pr115752.c @@ -0,0 +1,8 @@ +/* { dg-do compile } */ + +long double +test (long double xx) +{ + __asm ("" :: "f"(xx)); /* { dg-error "inconsistent operand constraints in an 'asm'" } */ + return xx + 1; +} |