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authorJeff Law <jlaw@ventanamicro.com>2024-07-11 21:37:34 -0600
committerJeff Law <jlaw@ventanamicro.com>2024-07-11 21:37:34 -0600
commita91c51c187a78e4164bc4039ebdb543848e379d2 (patch)
treee188baefe1d59423bd5d919ad36038d6bb28d531
parentbf406a53693ef664b7ee0c77c4940a71a83866c5 (diff)
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[committed] Fix m68k bootstrap segfault with late-combine
So the m68k port has failed to bootstrap since the introduction of late-combine. My suspicion has been this is a backend problem. Sure enough after bisecting things down (thank goodness for the debug counter!) I'm happy to report m68k (after this patch) has moved into its stage3 build for the first time in a month. Basically late-combine propagated an address calculation to its use points, generating this insn (dwarf2out.c, I forget what function): > (insn 653 652 655 (parallel [ > (set (mem/j:DI (plus:SI (plus:SI (reg/f:SI 9 %a1 [orig:64 _67 ] [64]) > (reg:SI 0 %d0 [321])) > (const_int 20 [0x14])) [0 slot_204->dw_attr_val.v.val_unsigned+0 S8 A16]) > (sign_extend:DI (mem/c:SI (plus:SI (reg/f:SI 14 %a6) > (const_int -28 [0xffffffffffffffe4])) [870 %sfp+-28 S4 A16]))) > (clobber (reg:SI 0 %d0)) > ]) "../../../gcc/gcc/dwarf2out.cc":24961:23 93 {extendsidi2} > (expr_list:REG_DEAD (reg/f:SI 9 %a1 [orig:64 _67 ] [64]) > (expr_list:REG_DEAD (reg:SI 0 %d0 [321]) > (expr_list:REG_UNUSED (reg:SI 0 %d0) > (nil))))) Note how the output uses d0 in the address calculation and the clobber uses d0. It matches this insn in the md file: > (define_insn "extendsidi2" > [(set (match_operand:DI 0 "nonimmediate_operand" "=d,o,o,<") > (sign_extend:DI > (match_operand:SI 1 "nonimmediate_src_operand" "rm,rm,r<Q>,rm"))) > (clobber (match_scratch:SI 2 "=X,&d,&d,&d"))] > "" > { > if (which_alternative == 0) > /* Handle alternative 0. */ > { > if (TARGET_68020 || TARGET_COLDFIRE) > return "move%.l %1,%R0\;smi %0\;extb%.l %0"; > else > return "move%.l %1,%R0\;smi %0\;ext%.w %0\;ext%.l %0"; > } > > /* Handle alternatives 1, 2 and 3. We don't need to adjust address by 4 > in alternative 3 because autodecrement will do that for us. */ > operands[3] = adjust_address (operands[0], SImode, > which_alternative == 3 ? 0 : 4); > operands[0] = adjust_address (operands[0], SImode, 0); > > if (TARGET_68020 || TARGET_COLDFIRE) > return "move%.l %1,%3\;smi %2\;extb%.l %2\;move%.l %2,%0"; > else > return "move%.l %1,%3\;smi %2\;ext%.w %2\;ext%.l %2\;move%.l %2,%0"; > } > [(set_attr "ok_for_coldfire" "yes,no,yes,yes")]) Note the smi/ext instruction pair in the case for alternatives 1..3. Those clobber the scratch register before we're done consuming inputs. The scratch register really needs to be marked as an earlyclobber. That fixes the bootstrap problem, but a cursory review of m68k.md is not encouraging. I will not be surprised at all if there's more of this kind of problem lurking. But happy to at least have m68k bootstrapping again. It's failing the comparison test, but definitely progress. * config/m68k/m68k.md (extendsidi2): Add missing early clobbers.
-rw-r--r--gcc/config/m68k/m68k.md2
1 files changed, 1 insertions, 1 deletions
diff --git a/gcc/config/m68k/m68k.md b/gcc/config/m68k/m68k.md
index 037978d..e5c2528 100644
--- a/gcc/config/m68k/m68k.md
+++ b/gcc/config/m68k/m68k.md
@@ -1887,7 +1887,7 @@
[(set (match_operand:DI 0 "nonimmediate_operand" "=d,o,o,<")
(sign_extend:DI
(match_operand:SI 1 "nonimmediate_src_operand" "rm,rm,r<Q>,rm")))
- (clobber (match_scratch:SI 2 "=X,d,d,d"))]
+ (clobber (match_scratch:SI 2 "=X,&d,&d,&d"))]
""
{
if (which_alternative == 0)