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| author | H.J. Lu <hongjiu.lu@intel.com> | 2019-05-15 15:28:04 +0000 |
|---|---|---|
| committer | H.J. Lu <hjl@gcc.gnu.org> | 2019-05-15 08:28:04 -0700 |
| commit | 9c1d1db27d421ab7c5ac1ca9b23cae002f13380e (patch) | |
| tree | 73618ba04354c7659206c863ffbfbc0c8eb6bdc3 | |
| parent | d3838596c4efb830affe201ec2e6509674dedd02 (diff) | |
| download | gcc-9c1d1db27d421ab7c5ac1ca9b23cae002f13380e.zip gcc-9c1d1db27d421ab7c5ac1ca9b23cae002f13380e.tar.gz gcc-9c1d1db27d421ab7c5ac1ca9b23cae002f13380e.tar.bz2 | |
i386: Emulate MMX abs<mode>2 with SSE
Emulate MMX abs<mode>2 with SSE. Only SSE register source operand is
allowed.
PR target/89021
* config/i386/sse.md (abs<mode>2): Add SSE emulation.
From-SVN: r271248
| -rw-r--r-- | gcc/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/config/i386/sse.md | 15 |
2 files changed, 14 insertions, 6 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index f773f24..24babbce 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,6 +1,11 @@ 2019-05-15 H.J. Lu <hongjiu.lu@intel.com> PR target/89021 + * config/i386/sse.md (abs<mode>2): Add SSE emulation. + +2019-05-15 H.J. Lu <hongjiu.lu@intel.com> + + PR target/89021 * config/i386/sse.md (ssse3_palignrdi): Changed to define_insn_and_split to support SSE emulation. diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index b68da8a..11875ad 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -16420,16 +16420,19 @@ }) (define_insn "abs<mode>2" - [(set (match_operand:MMXMODEI 0 "register_operand" "=y") + [(set (match_operand:MMXMODEI 0 "register_operand" "=y,Yv") (abs:MMXMODEI - (match_operand:MMXMODEI 1 "nonimmediate_operand" "ym")))] - "TARGET_SSSE3" - "pabs<mmxvecsize>\t{%1, %0|%0, %1}"; - [(set_attr "type" "sselog1") + (match_operand:MMXMODEI 1 "register_mmxmem_operand" "ym,Yv")))] + "(TARGET_MMX || TARGET_MMX_WITH_SSE) && TARGET_SSSE3" + "@ + pabs<mmxvecsize>\t{%1, %0|%0, %1} + %vpabs<mmxvecsize>\t{%1, %0|%0, %1}" + [(set_attr "mmx_isa" "native,x64") + (set_attr "type" "sselog1") (set_attr "prefix_rep" "0") (set_attr "prefix_extra" "1") (set (attr "prefix_rex") (symbol_ref "x86_extended_reg_mentioned_p (insn)")) - (set_attr "mode" "DI")]) + (set_attr "mode" "DI,TI")]) ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;; |