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author | Ulrich Weigand <uweigand@de.ibm.com> | 2011-07-13 19:19:35 +0000 |
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committer | Ulrich Weigand <uweigand@gcc.gnu.org> | 2011-07-13 19:19:35 +0000 |
commit | 4dfe3ad52b122093cde02739950a8c7077b817d8 (patch) | |
tree | 0721be8077e2a408794af4290c038b455ca94b7b | |
parent | dddc67624e835dc20f82346b7a624ea47df88495 (diff) | |
download | gcc-4dfe3ad52b122093cde02739950a8c7077b817d8.zip gcc-4dfe3ad52b122093cde02739950a8c7077b817d8.tar.gz gcc-4dfe3ad52b122093cde02739950a8c7077b817d8.tar.bz2 |
spu.c (spu_init_libfuncs): Install __clrsbdi2.
* config/spu/spu.c (spu_init_libfuncs): Install __clrsbdi2.
* config/spu/spu.md ("clrsb<mode>2"): New expander.
From-SVN: r176249
-rw-r--r-- | gcc/ChangeLog | 5 | ||||
-rw-r--r-- | gcc/config/spu/spu.c | 1 | ||||
-rw-r--r-- | gcc/config/spu/spu.md | 15 |
3 files changed, 21 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 67e7cc9..46df27b 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2011-07-13 Ulrich Weigand <Ulrich.Weigand@de.ibm.com> + + * config/spu/spu.c (spu_init_libfuncs): Install __clrsbdi2. + * config/spu/spu.md ("clrsb<mode>2"): New expander. + 2011-07-13 Thomas Schwinge <thomas@schwinge.name> * acinclude.m4 (gcc_GAS_CHECK_FEATURE): Use AS_ECHO instead of echo. diff --git a/gcc/config/spu/spu.c b/gcc/config/spu/spu.c index 6d168fa..7d9be5e 100644 --- a/gcc/config/spu/spu.c +++ b/gcc/config/spu/spu.c @@ -5630,6 +5630,7 @@ spu_init_libfuncs (void) set_optab_libfunc (ffs_optab, DImode, "__ffsdi2"); set_optab_libfunc (clz_optab, DImode, "__clzdi2"); set_optab_libfunc (ctz_optab, DImode, "__ctzdi2"); + set_optab_libfunc (clrsb_optab, DImode, "__clrsbdi2"); set_optab_libfunc (popcount_optab, DImode, "__popcountdi2"); set_optab_libfunc (parity_optab, DImode, "__paritydi2"); diff --git a/gcc/config/spu/spu.md b/gcc/config/spu/spu.md index 79d0757..426437a 100644 --- a/gcc/config/spu/spu.md +++ b/gcc/config/spu/spu.md @@ -2232,6 +2232,21 @@ operands[5] = spu_const(<MODE>mode, 31); }) +(define_expand "clrsb<mode>2" + [(set (match_dup 2) + (gt:VSI (match_operand:VSI 1 "spu_reg_operand" "") (match_dup 5))) + (set (match_dup 3) (not:VSI (xor:VSI (match_dup 1) (match_dup 2)))) + (set (match_dup 4) (clz:VSI (match_dup 3))) + (set (match_operand:VSI 0 "spu_reg_operand") + (plus:VSI (match_dup 4) (match_dup 5)))] + "" + { + operands[2] = gen_reg_rtx (<MODE>mode); + operands[3] = gen_reg_rtx (<MODE>mode); + operands[4] = gen_reg_rtx (<MODE>mode); + operands[5] = spu_const(<MODE>mode, -1); + }) + (define_expand "ffs<mode>2" [(set (match_dup 2) (neg:VSI (match_operand:VSI 1 "spu_reg_operand" ""))) |