m32r.c (TARGET_TRAMPOLINE_INIT): New.

        * config/m32r/m32r.c (TARGET_TRAMPOLINE_INIT): New.
        (m32r_trampoline_init): New.
        * config/m32r/m32r.h (INITIALIZE_TRAMPOLINE): Move code to
        m32r_trampoline_init.

From-SVN: r151997

3 files changed, 40 insertions, 32 deletions

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 43ca740..a8e0a1d 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -130,6 +130,11 @@
 	adjust for hook parameters.
 	* config/m32c/m32c.h (INITIALIZE_TRAMPOLINE): Remove.
 
+	* config/m32r/m32r.c (TARGET_TRAMPOLINE_INIT): New.
+	(m32r_trampoline_init): New.
+	* config/m32r/m32r.h (INITIALIZE_TRAMPOLINE): Move code to
+	m32r_trampoline_init.
+
 2009-09-22  Jakub Jelinek  <jakub@redhat.com>
 
 	* config/rs6000/rs6000.c (bdesc_2arg): Fix CODE_FOR_vector_gt* codes
diff --git a/gcc/config/m32r/m32r.c b/gcc/config/m32r/m32r.c
index fdd89bc..36a652a 100644
--- a/gcc/config/m32r/m32r.c
+++ b/gcc/config/m32r/m32r.c
@@ -88,6 +88,7 @@ static bool m32r_pass_by_reference (CUMULATIVE_ARGS *, enum machine_mode,
 static int m32r_arg_partial_bytes (CUMULATIVE_ARGS *, enum machine_mode,
 				   tree, bool);
 static bool m32r_can_eliminate (const int, const int);
+static void m32r_trampoline_init (rtx, tree, rtx);
 
 /* M32R specific attributes.  */
 
@@ -155,6 +156,9 @@ static const struct attribute_spec m32r_attribute_table[] =
 #undef TARGET_CAN_ELIMINATE
 #define TARGET_CAN_ELIMINATE m32r_can_eliminate
 
+#undef TARGET_TRAMPOLINE_INIT
+#define TARGET_TRAMPOLINE_INIT m32r_trampoline_init
+
 struct gcc_target targetm = TARGET_INITIALIZER;
 
 /* Implement TARGET_HANDLE_OPTION.  */
@@ -2630,3 +2634,34 @@ m32r_return_addr (int count)
 
   return get_hard_reg_initial_val (Pmode, RETURN_ADDR_REGNUM);
 }
+
+static void
+m32r_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value)
+{
+  emit_move_insn (adjust_address (m_tramp, SImode, 0),
+		  gen_int_mode (TARGET_LITTLE_ENDIAN ?
+				0x017e8e17 : 0x178e7e01, SImode));
+  emit_move_insn (adjust_address (m_tramp, SImode, 4),
+		  gen_int_mode (TARGET_LITTLE_ENDIAN ?
+				0x0c00ae86 : 0x86ae000c, SImode));
+  emit_move_insn (adjust_address (m_tramp, SImode, 8),
+		  gen_int_mode (TARGET_LITTLE_ENDIAN ?
+				0xe627871e : 0x1e8727e6, SImode));
+  emit_move_insn (adjust_address (m_tramp, SImode, 12),
+		  gen_int_mode (TARGET_LITTLE_ENDIAN ?
+				0xc616c626 : 0x26c61fc6, SImode));
+  emit_move_insn (adjust_address (m_tramp, SImode, 16),
+		  chain_value);
+  emit_move_insn (adjust_address (m_tramp, SImode, 20),
+		  XEXP (DECL_RTL (fndecl), 0));
+
+  if (m32r_cache_flush_trap >= 0)
+    emit_insn (gen_flush_icache
+	       (validize_mem (adjust_address (m_tramp, SImode, 0)),
+		gen_int_mode (m32r_cache_flush_trap, SImode)));
+  else if (m32r_cache_flush_func && m32r_cache_flush_func[0])
+    emit_library_call (m32r_function_symbol (m32r_cache_flush_func),
+		       LCT_NORMAL, VOIDmode, 3, XEXP (m_tramp, 0), Pmode,
+		       gen_int_mode (TRAMPOLINE_SIZE, SImode), SImode,
+		       GEN_INT (3), SImode);
+}
diff --git a/gcc/config/m32r/m32r.h b/gcc/config/m32r/m32r.h
index da6a105..7b6237a 100644
--- a/gcc/config/m32r/m32r.h
+++ b/gcc/config/m32r/m32r.h
@@ -990,38 +990,6 @@ L2:     .word STATIC
 /* Length in bytes of the trampoline for entering a nested function.  */
 #define TRAMPOLINE_SIZE 24
 
-/* Emit RTL insns to initialize the variable parts of a trampoline.
-   FNADDR is an RTX for the address of the function's pure code.
-   CXT is an RTX for the static chain value for the function.  */
-#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT)				\
-  do										\
-    {										\
-      emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 0)),		\
-		      gen_int_mode (TARGET_LITTLE_ENDIAN ?			\
-				    0x017e8e17 : 0x178e7e01, SImode));		\
-      emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 4)),		\
-		      gen_int_mode (TARGET_LITTLE_ENDIAN ?			\
-				    0x0c00ae86 : 0x86ae000c, SImode));		\
-      emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 8)),		\
-		      gen_int_mode (TARGET_LITTLE_ENDIAN ?			\
-				    0xe627871e : 0x1e8727e6, SImode));		\
-      emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 12)),		\
-		      gen_int_mode (TARGET_LITTLE_ENDIAN ?			\
-				    0xc616c626 : 0x26c61fc6, SImode));		\
-      emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 16)),		\
-		      (CXT));							\
-      emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 20)),		\
-		      (FNADDR));						\
-      if (m32r_cache_flush_trap >= 0)						\
-	emit_insn (gen_flush_icache (validize_mem (gen_rtx_MEM (SImode, TRAMP)),\
-				     gen_int_mode (m32r_cache_flush_trap, SImode))); \
-      else if (m32r_cache_flush_func && m32r_cache_flush_func[0])		\
-	emit_library_call (m32r_function_symbol (m32r_cache_flush_func),	\
-			   LCT_NORMAL, VOIDmode, 3, TRAMP, Pmode,		\
-			   gen_int_mode (TRAMPOLINE_SIZE, SImode), SImode,	\
-			   GEN_INT (3), SImode);				\
-    }										\
-  while (0)
 
 #define RETURN_ADDR_RTX(COUNT, FRAME) m32r_return_addr (COUNT)