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| author | Jan Beulich <jbeulich@suse.com> | 2018-01-03 10:42:08 +0000 |
|---|---|---|
| committer | Jan Beulich <jbeulich@gcc.gnu.org> | 2018-01-03 10:42:08 +0000 |
| commit | b853346e2c2ea98e35c6043712303a5fc8b87dd8 (patch) | |
| tree | 26c96624b0d0ddcb91294085689f0404c1ebfba1 | |
| parent | 85ec4feb11167c9e4489361bf2399a20afbe52c8 (diff) | |
| download | gcc-b853346e2c2ea98e35c6043712303a5fc8b87dd8.zip gcc-b853346e2c2ea98e35c6043712303a5fc8b87dd8.tar.gz gcc-b853346e2c2ea98e35c6043712303a5fc8b87dd8.tar.bz2 | |
x86: don't use AVX512BW vmovdqu variants without -mavx512bw
Simply mirror the MODE_XI logic of handling unaligned operands in
mov<mode>_internal into MODE_TI / MODE_OI handling.
gcc/
2018-01-03 Jan Beulich <jbeulich@suse.com>
* sse.md (mov<mode>_internal): Tighten condition for when to use
vmovdqu<ssescalarsize> for TI and OI modes.
gcc/testsuite/
2018-01-03 Jan Beulich <jbeulich@suse.com>
* gcc.target/i386/avx512vl-no-vmovdqu8.c,
gcc.target/i386/avx512vl-no-vmovdqu16.c: New.
From-SVN: r256170
| -rw-r--r-- | gcc/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/config/i386/sse.md | 10 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/i386/avx512vl-no-vmovdqu16.c | 24 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/i386/avx512vl-no-vmovdqu8.c | 24 |
5 files changed, 66 insertions, 2 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 812a0b5..d9c4c6a 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2018-01-03 Jan Beulich <jbeulich@suse.com> + + * sse.md (mov<mode>_internal): Tighten condition for when to use + vmovdqu<ssescalarsize> for TI and OI modes. + 2018-01-03 Jakub Jelinek <jakub@redhat.com> Update copyright years. diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index acaada2..b0ba91e 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -1021,8 +1021,14 @@ case MODE_TI: if (misaligned_operand (operands[0], <MODE>mode) || misaligned_operand (operands[1], <MODE>mode)) - return TARGET_AVX512VL ? "vmovdqu<ssescalarsize>\t{%1, %0|%0, %1}" - : "%vmovdqu\t{%1, %0|%0, %1}"; + return TARGET_AVX512VL + && (<MODE>mode == V4SImode + || <MODE>mode == V2DImode + || <MODE>mode == V8SImode + || <MODE>mode == V4DImode + || TARGET_AVX512BW) + ? "vmovdqu<ssescalarsize>\t{%1, %0|%0, %1}" + : "%vmovdqu\t{%1, %0|%0, %1}"; else return TARGET_AVX512VL ? "vmovdqa64\t{%1, %0|%0, %1}" : "%vmovdqa\t{%1, %0|%0, %1}"; diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 3a5b770..2c179b1 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2018-01-03 Jan Beulich <jbeulich@suse.com> + + * gcc.target/i386/avx512vl-no-vmovdqu8.c, + gcc.target/i386/avx512vl-no-vmovdqu16.c: New. + 2018-01-03 Jakub Jelinek <jakub@redhat.com> Update copyright years. diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-no-vmovdqu16.c b/gcc/testsuite/gcc.target/i386/avx512vl-no-vmovdqu16.c new file mode 100644 index 0000000..29b3141 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-no-vmovdqu16.c @@ -0,0 +1,24 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512vl -mno-avx512bw" } */ + +typedef unsigned int __attribute__((mode(HI), vector_size(16))) v8hi_t; +typedef unsigned int __attribute__((mode(HI), vector_size(32))) v16hi_t; + +struct s8hi { + int i; + v8hi_t __attribute__((packed)) v; +}; +struct s16hi { + int i; + v16hi_t __attribute__((packed)) v; +}; + +void f8hi(struct s8hi*p1, const struct s8hi*p2) { + p1->v += p2->v; +} + +void f16hi(struct s16hi*p1, const struct s16hi*p2) { + p1->v += p2->v; +} + +/* { dg-final { scan-assembler-not "^\[ \t\]*vmovdq\[au\](8|16)" } } */ diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-no-vmovdqu8.c b/gcc/testsuite/gcc.target/i386/avx512vl-no-vmovdqu8.c new file mode 100644 index 0000000..f48d773 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-no-vmovdqu8.c @@ -0,0 +1,24 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512vl -mno-avx512bw" } */ + +typedef unsigned int __attribute__((mode(QI), vector_size(16))) v16qi_t; +typedef unsigned int __attribute__((mode(QI), vector_size(32))) v32qi_t; + +struct s16qi { + int i; + v16qi_t __attribute__((packed)) v; +}; +struct s32qi { + int i; + v32qi_t __attribute__((packed)) v; +}; + +void f16qi(struct s16qi*p1, const struct s16qi*p2) { + p1->v += p2->v; +} + +void f32qi(struct s32qi*p1, const struct s32qi*p2) { + p1->v += p2->v; +} + +/* { dg-final { scan-assembler-not "^\[ \t\]*vmovdq\[au\](8|16)" } } */ |