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author | Peter Bergner <bergner@vnet.ibm.com> | 2018-01-10 14:19:26 -0600 |
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committer | Peter Bergner <bergner@gcc.gnu.org> | 2018-01-10 14:19:26 -0600 |
commit | 9e0fa36ae82efe128f5dcbc85dc24365f7390fe1 (patch) | |
tree | b5d03bf32e2ae60925de37cea0d6275f296a5f58 | |
parent | d90a25424a1aee87c7b5d56545c971fa89577ee3 (diff) | |
download | gcc-9e0fa36ae82efe128f5dcbc85dc24365f7390fe1.zip gcc-9e0fa36ae82efe128f5dcbc85dc24365f7390fe1.tar.gz gcc-9e0fa36ae82efe128f5dcbc85dc24365f7390fe1.tar.bz2 |
x86intrin.h: Change #warning to #error.
* config/rs6000/x86intrin.h: Change #warning to #error. Update message.
* config/rs6000/emmintrin.h: Likewise.
* config/rs6000/mmintrin.h: Likewise.
* config/rs6000/xmmintrin.h: Likewise.
From-SVN: r256452
-rw-r--r-- | gcc/ChangeLog | 7 | ||||
-rw-r--r-- | gcc/config/rs6000/emmintrin.h | 2 | ||||
-rw-r--r-- | gcc/config/rs6000/mmintrin.h | 2 | ||||
-rw-r--r-- | gcc/config/rs6000/x86intrin.h | 2 | ||||
-rw-r--r-- | gcc/config/rs6000/xmmintrin.h | 2 |
5 files changed, 11 insertions, 4 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index a292768..ab2c2cc 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2018-01-10 Peter Bergner <bergner@vnet.ibm.com> + + * config/rs6000/x86intrin.h: Change #warning to #error. Update message. + * config/rs6000/emmintrin.h: Likewise. + * config/rs6000/mmintrin.h: Likewise. + * config/rs6000/xmmintrin.h: Likewise. + 2018-01-10 David Malcolm <dmalcolm@redhat.com> PR c++/43486 diff --git a/gcc/config/rs6000/emmintrin.h b/gcc/config/rs6000/emmintrin.h index 2f457c9..3dcda0d 100644 --- a/gcc/config/rs6000/emmintrin.h +++ b/gcc/config/rs6000/emmintrin.h @@ -53,7 +53,7 @@ the PowerISA FPSCR / VSCR registers. We recommend applications replace direct access to the MXSCR with the more portable <fenv.h> Posix APIs. */ -#warning "Please read comment above. Use -DNO_WARN_X86_INTRINSICS to disable this warning." +#error "Please read comment above. Use -DNO_WARN_X86_INTRINSICS to disable this error." #endif #ifndef EMMINTRIN_H_ diff --git a/gcc/config/rs6000/mmintrin.h b/gcc/config/rs6000/mmintrin.h index 20f5471..9001e57 100644 --- a/gcc/config/rs6000/mmintrin.h +++ b/gcc/config/rs6000/mmintrin.h @@ -49,7 +49,7 @@ C language 64-bit scalar operation or optimized to use the newer 128-bit SSE/Altivec operations. We recomend this for new applications. */ -#warning "Please read comment above. Use -DNO_WARN_X86_INTRINSICS to disable this warning." +#error "Please read comment above. Use -DNO_WARN_X86_INTRINSICS to disable this error." #endif #ifndef _MMINTRIN_H_INCLUDED diff --git a/gcc/config/rs6000/x86intrin.h b/gcc/config/rs6000/x86intrin.h index 871086b..28bfdde 100644 --- a/gcc/config/rs6000/x86intrin.h +++ b/gcc/config/rs6000/x86intrin.h @@ -29,7 +29,7 @@ Note that much code that uses Intel intrinsics can be rewritten in standard C or GNU C extensions, which are more portable and better optimized across multiple targets. */ -#warning "Please read comment above. Use -DNO_WARN_X86_INTRINSICS to disable this warning." +#error "Please read comment above. Use -DNO_WARN_X86_INTRINSICS to disable this error." #endif #ifndef _X86INTRIN_H_INCLUDED diff --git a/gcc/config/rs6000/xmmintrin.h b/gcc/config/rs6000/xmmintrin.h index 445abb8..4f3660a 100644 --- a/gcc/config/rs6000/xmmintrin.h +++ b/gcc/config/rs6000/xmmintrin.h @@ -51,7 +51,7 @@ the PowerISA FPSCR / VSCR registers. We recommend applications replace direct access to the MXSCR with the more portable <fenv.h> Posix APIs. */ -#warning "Please read comment above. Use -DNO_WARN_X86_INTRINSICS to disable this warning." +#error "Please read comment above. Use -DNO_WARN_X86_INTRINSICS to disable this error." #endif #ifndef _XMMINTRIN_H_INCLUDED |