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| author | Dragan Mladjenovic <dmladjenovic@wavecomp.com> | 2019-11-13 18:50:15 +0000 |
|---|---|---|
| committer | Dragan Mladjenovic <draganm@gcc.gnu.org> | 2019-11-13 18:50:15 +0000 |
| commit | 425ea30f79e236c187430749be994309968e1dbd (patch) | |
| tree | 4d56ead1d6f5b07f81c6db7fee6f5fa748c998b8 | |
| parent | d51dd316a2dde3df062bd16b41567350adc3427e (diff) | |
| download | gcc-425ea30f79e236c187430749be994309968e1dbd.zip gcc-425ea30f79e236c187430749be994309968e1dbd.tar.gz gcc-425ea30f79e236c187430749be994309968e1dbd.tar.bz2 | |
Sanitize the constant argument for rotr<mode>3
This was dormant for quite some time, but it started happening for me
on gcc.c-torture/compile/pr65153.c sometime after r276645 for -mabi=32 linux runs.
The pattern accepts any SMALL_OPERAND constant value while it asserts during the final
that the value is in the mode size range. I this case it happens that combine_and_move_insns
during ira makes a pattern with negative "shift count" which fails at final stage.
This simple fix just truncates the constant operand to mode size the same as shift patterns.
gcc/ChangeLog:
2019-11-13 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
* config/mips/mips.md (rotr<mode>3): Sanitize the constant argument
instead of asserting its value.
From-SVN: r278152
| -rw-r--r-- | gcc/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/config/mips/mips.md | 4 |
2 files changed, 7 insertions, 2 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 0047112..3ffe1d7 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2019-11-13 Dragan Mladjenovic <dmladjenovic@wavecomp.com> + + * config/mips/mips.md (rotr<mode>3): Sanitize the constant argument + instead of asserting its value. + 2019-11-13 Aldy Hernandez <aldyh@redhat.com> * gimple-fold.c (size_must_be_zero_p): Rewrite use of value_range diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md index 658f5e6..4de9731 100644 --- a/gcc/config/mips/mips.md +++ b/gcc/config/mips/mips.md @@ -5845,8 +5845,8 @@ "ISA_HAS_ROR" { if (CONST_INT_P (operands[2])) - gcc_assert (INTVAL (operands[2]) >= 0 - && INTVAL (operands[2]) < GET_MODE_BITSIZE (<MODE>mode)); + operands[2] = GEN_INT (INTVAL (operands[2]) + & (GET_MODE_BITSIZE (<MODE>mode) - 1)); return "<d>ror\t%0,%1,%2"; } |