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| author | Jozef Lawrynowicz <jozef.l@mittosystems.com> | 2020-04-13 10:28:01 +0100 |
|---|---|---|
| committer | Jozef Lawrynowicz <jozef.l@mittosystems.com> | 2020-04-13 10:47:26 +0100 |
| commit | 14f27ee6c97c585018882ac8f1f5f2d64618ba66 (patch) | |
| tree | d86d20c6c095b1b8aaf3bdce6bd52a04c1c5f490 | |
| parent | a1ccbae63cdf25b8ff66da18ed0d081cb9411ccf (diff) | |
| download | gcc-14f27ee6c97c585018882ac8f1f5f2d64618ba66.zip gcc-14f27ee6c97c585018882ac8f1f5f2d64618ba66.tar.gz gcc-14f27ee6c97c585018882ac8f1f5f2d64618ba66.tar.bz2 | |
MSP430: Fix memory offsets used by %C and %D asm output operand modifiers
The %C and %D operand modifiers are supposed to access the 3rd and 4th
words of a 64-bit value, so for memory references they need to offset
the given address by 4 and 6 bytes respectively.
gcc/ChangeLog:
2020-04-13 Jozef Lawrynowicz <jozef.l@mittosystems.com>
* config/msp430/msp430.c (msp430_print_operand): Offset a %C memory
reference by 4 bytes, and %D memory reference by 6 bytes.
gcc/testsuite/ChangeLog:
2020-04-13 Jozef Lawrynowicz <jozef.l@mittosystems.com>
* gcc.target/msp430/operand-modifiers.c: New test.
| -rw-r--r-- | gcc/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/config/msp430/msp430.c | 4 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 4 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/msp430/operand-modifiers.c | 30 |
4 files changed, 41 insertions, 2 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index f3a226c..c0ac32d 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2020-04-13 Jozef Lawrynowicz <jozef.l@mittosystems.com> + + * config/msp430/msp430.c (msp430_print_operand): Offset a %C memory + reference by 4 bytes, and %D memory reference by 6 bytes. + 2020-04-11 Uroš Bizjak <ubizjak@gmail.com> PR target/94494 diff --git a/gcc/config/msp430/msp430.c b/gcc/config/msp430/msp430.c index e0d2d73..9653274 100644 --- a/gcc/config/msp430/msp430.c +++ b/gcc/config/msp430/msp430.c @@ -3492,7 +3492,7 @@ msp430_print_operand (FILE * file, rtx op, int letter) switch (GET_CODE (op)) { case MEM: - op = adjust_address (op, Pmode, 3); + op = adjust_address (op, Pmode, 4); break; case REG: op = gen_rtx_REG (Pmode, REGNO (op) + 2); @@ -3510,7 +3510,7 @@ msp430_print_operand (FILE * file, rtx op, int letter) switch (GET_CODE (op)) { case MEM: - op = adjust_address (op, Pmode, 4); + op = adjust_address (op, Pmode, 6); break; case REG: op = gen_rtx_REG (Pmode, REGNO (op) + 3); diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 1343b8b..b1f232e 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,7 @@ +2020-04-13 Jozef Lawrynowicz <jozef.l@mittosystems.com> + + * gcc.target/msp430/operand-modifiers.c: New test. + 2020-04-12 Thomas Koenig <tkoenig@gcc.gnu.org> PR fortran/94091 diff --git a/gcc/testsuite/gcc.target/msp430/operand-modifiers.c b/gcc/testsuite/gcc.target/msp430/operand-modifiers.c new file mode 100644 index 0000000..ad0a531 --- /dev/null +++ b/gcc/testsuite/gcc.target/msp430/operand-modifiers.c @@ -0,0 +1,30 @@ +volatile unsigned long si = 0x89abcdef; +volatile unsigned long long di = 0xfedcba9876543210; + +unsigned int a, b, c, d; + +int +main (void) +{ + /* Check that %A and %B extract the low and high words of a 32-bit value, + respectively. */ + __asm__("mov %A1, %0\n" : "=m" (a) : "m" (si)); + __asm__("mov %B1, %0\n" : "=m" (b) : "m" (si)); + if (a != ((unsigned)si) + || b != ((unsigned)(si >> 16))) + return 1; + + /* Check that %A, %B, %C and %D extract the 1st, 2nd, 3rd and 4th words of a + 64-bit value, respectively. */ + __asm__("mov %A1, %0\n" : "=m" (a) : "m" (di)); + __asm__("mov %B1, %0\n" : "=m" (b) : "m" (di)); + __asm__("mov %C1, %0\n" : "=m" (c) : "m" (di)); + __asm__("mov %D1, %0\n" : "=m" (d) : "m" (di)); + if (a != ((unsigned)di) + || b != ((unsigned)(di >> 16)) + || c != ((unsigned)(di >> 32)) + || d != ((unsigned)(di >> 48))) + return 1; + + return 0; +} |