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authorUlrich Weigand <uweigand@de.ibm.com>2011-08-16 18:39:55 +0000
committerUlrich Weigand <uweigand@gcc.gnu.org>2011-08-16 18:39:55 +0000
commit0b01f61969d2595b11f988ef2a97d3b2b986d175 (patch)
tree5fc172635b28458f88080830c4be8ecf8cb549e8
parent2ea0be597eaacb6ca34f0fc8a9249949bcf97d64 (diff)
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spu.c (spu_emit_branch_or_set): Avoid reverse tests when generating an integer result where possible.
* config/spu/spu.c (spu_emit_branch_or_set): Avoid reverse tests when generating an integer result where possible. Short-cut comparison against 0 also for QImode. From-SVN: r177795
-rw-r--r--gcc/ChangeLog6
-rw-r--r--gcc/config/spu/spu.c24
2 files changed, 29 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 67ae4ed8..1a43c12 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,11 @@
2011-08-16 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>
+ * config/spu/spu.c (spu_emit_branch_or_set): Avoid reverse tests
+ when generating an integer result where possible. Short-cut
+ comparison against 0 also for QImode.
+
+2011-08-16 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>
+
* config/spu/spu.h (LEGITIMIZE_RELOAD_ADDRESS): New macro.
* config/spu/spu-protos.h (spu_legitimize_reload_address): Add
prototype.
diff --git a/gcc/config/spu/spu.c b/gcc/config/spu/spu.c
index 7868c7f..b8e3fb3 100644
--- a/gcc/config/spu/spu.c
+++ b/gcc/config/spu/spu.c
@@ -982,6 +982,27 @@ spu_emit_branch_or_set (int is_set, rtx cmp, rtx operands[])
}
}
+ /* However, if we generate an integer result, performing a reverse test
+ would require an extra negation, so avoid that where possible. */
+ if (GET_CODE (op1) == CONST_INT && is_set == 1)
+ {
+ HOST_WIDE_INT val = INTVAL (op1) + 1;
+ if (trunc_int_for_mode (val, GET_MODE (op0)) == val)
+ switch (code)
+ {
+ case LE:
+ op1 = GEN_INT (val);
+ code = LT;
+ break;
+ case LEU:
+ op1 = GEN_INT (val);
+ code = LTU;
+ break;
+ default:
+ break;
+ }
+ }
+
comp_mode = SImode;
op_mode = GET_MODE (op0);
@@ -1113,7 +1134,8 @@ spu_emit_branch_or_set (int is_set, rtx cmp, rtx operands[])
if (is_set == 0 && op1 == const0_rtx
&& (GET_MODE (op0) == SImode
- || GET_MODE (op0) == HImode) && scode == SPU_EQ)
+ || GET_MODE (op0) == HImode
+ || GET_MODE (op0) == QImode) && scode == SPU_EQ)
{
/* Don't need to set a register with the result when we are
comparing against zero and branching. */