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| author | Ilya Leoshkevich <iii@linux.ibm.com> | 2019-09-30 17:40:02 +0000 |
|---|---|---|
| committer | Ilya Leoshkevich <iii@gcc.gnu.org> | 2019-09-30 17:40:02 +0000 |
| commit | 021f65807164b2770e8f113b0f85b1bb193020ef (patch) | |
| tree | 0bd502e04ec087c50a13b5973caa13fad203bec5 | |
| parent | 6b34d5ff5563916c52582a4c7473689bb0086c19 (diff) | |
| download | gcc-021f65807164b2770e8f113b0f85b1bb193020ef.zip gcc-021f65807164b2770e8f113b0f85b1bb193020ef.tar.gz gcc-021f65807164b2770e8f113b0f85b1bb193020ef.tar.bz2 | |
S/390: Remove code duplication in vec_unordered<mode>
vec_unordered<mode> is vec_ordered<mode> plus a negation at the end.
Reuse vec_unordered<mode> logic.
gcc/ChangeLog:
2019-09-30 Ilya Leoshkevich <iii@linux.ibm.com>
PR target/77918
* config/s390/vector.md (vec_unordered<mode>): Call
gen_vec_ordered<mode>.
From-SVN: r276360
| -rw-r--r-- | gcc/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/config/s390/vector.md | 14 |
2 files changed, 13 insertions, 7 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 0d90ef4..28296d5 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2019-09-30 Ilya Leoshkevich <iii@linux.ibm.com> + + PR target/77918 + * config/s390/vector.md (vec_unordered<mode>): Call + gen_vec_ordered<mode>. + 2019-09-30 Yuliang Wang <yuliang.wang@arm.com> * config/aarch64/aarch64-sve.md (sdiv_pow2<mode>3): diff --git a/gcc/config/s390/vector.md b/gcc/config/s390/vector.md index 0702e1d..961d2c6 100644 --- a/gcc/config/s390/vector.md +++ b/gcc/config/s390/vector.md @@ -1546,15 +1546,15 @@ ; UNORDERED (a, b): !ORDERED (a, b) (define_expand "vec_unordered<mode>" - [(set (match_operand:<tointvec> 0 "register_operand" "=v") - (ge:<tointvec> (match_operand:VFT 1 "register_operand" "v") - (match_operand:VFT 2 "register_operand" "v"))) - (set (match_dup 3) (gt:<tointvec> (match_dup 2) (match_dup 1))) - (set (match_dup 0) (ior:<tointvec> (match_dup 0) (match_dup 3))) - (set (match_dup 0) (not:<tointvec> (match_dup 0)))] + [(match_operand:<tointvec> 0 "register_operand" "=v") + (match_operand:VFT 1 "register_operand" "v") + (match_operand:VFT 2 "register_operand" "v")] "TARGET_VX" { - operands[3] = gen_reg_rtx (<tointvec>mode); + emit_insn (gen_vec_ordered<mode> (operands[0], operands[1], operands[2])); + emit_insn (gen_rtx_SET (operands[0], + gen_rtx_NOT (<tointvec>mode, operands[0]))); + DONE; }) (define_expand "vec_unordered" |