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| author | Kyrylo Tkachov <kyrylo.tkachov@arm.com> | 2015-01-16 14:50:39 +0000 |
|---|---|---|
| committer | Kyrylo Tkachov <ktkachov@gcc.gnu.org> | 2015-01-16 14:50:39 +0000 |
| commit | f2a03a7264db18a8098b958063e3e0ed0c9cafcd (patch) | |
| tree | 7d9c95c807a621fd56505f3cff59dd45bff22ecb | |
| parent | e989e68d934ac328137abc8a2d08b110fac96872 (diff) | |
| download | gcc-f2a03a7264db18a8098b958063e3e0ed0c9cafcd.zip gcc-f2a03a7264db18a8098b958063e3e0ed0c9cafcd.tar.gz gcc-f2a03a7264db18a8098b958063e3e0ed0c9cafcd.tar.bz2 | |
[AArch64] Fix PR 64263: Do not try to split constants when destination is SIMD reg
PR target/64263
* config/aarch64/aarch64.md (*movsi_aarch64): Don't split if the
destination is not a GP reg.
(*movdi_aarch64): Likewise.
* gcc.target/aarch64/pr64263_1.c: New test.
Co-Authored-By: Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
From-SVN: r219745
| -rw-r--r-- | gcc/ChangeLog | 8 | ||||
| -rw-r--r-- | gcc/config/aarch64/aarch64.md | 6 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/aarch64/pr64263_1.c | 23 |
4 files changed, 40 insertions, 2 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 66d6552..8990f49 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2015-01-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> + + PR target/64263 + * config/aarch64/aarch64.md (*movsi_aarch64): Don't split if the + destination is not a GP reg. + (*movdi_aarch64): Likewise. + 2015-01-16 David Edelsohn <dje.gcc@gmail.com> PR target/64623 diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md index faf9cf3..fde5e4f 100644 --- a/gcc/config/aarch64/aarch64.md +++ b/gcc/config/aarch64/aarch64.md @@ -859,7 +859,8 @@ fmov\\t%s0, %w1 fmov\\t%w0, %s1 fmov\\t%s0, %s1" - "CONST_INT_P (operands[1]) && !aarch64_move_imm (INTVAL (operands[1]), SImode)" + "CONST_INT_P (operands[1]) && !aarch64_move_imm (INTVAL (operands[1]), SImode) + && GP_REGNUM_P (REGNO (operands[0]))" [(const_int 0)] "{ aarch64_expand_mov_immediate (operands[0], operands[1]); @@ -891,7 +892,8 @@ fmov\\t%x0, %d1 fmov\\t%d0, %d1 movi\\t%d0, %1" - "(CONST_INT_P (operands[1]) && !aarch64_move_imm (INTVAL (operands[1]), DImode))" + "(CONST_INT_P (operands[1]) && !aarch64_move_imm (INTVAL (operands[1]), DImode)) + && GP_REGNUM_P (REGNO (operands[0]))" [(const_int 0)] "{ aarch64_expand_mov_immediate (operands[0], operands[1]); diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index a6a316e..231b947 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2015-01-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + PR target/64263 + * gcc.target/aarch64/pr64263_1.c: New test. + 2015-01-16 Yuri Rumyantsev <ysrumyan@gmail.com> PR tree-optimization/64434 diff --git a/gcc/testsuite/gcc.target/aarch64/pr64263_1.c b/gcc/testsuite/gcc.target/aarch64/pr64263_1.c new file mode 100644 index 0000000..047e623 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/pr64263_1.c @@ -0,0 +1,23 @@ +/* { dg-do compile } */ +/* { dg-options "-O1" } */ + +#include "arm_neon.h" + +extern long int vget_lane_s64_1 (int64x1_t, const int); + +void +foo () +{ + int8x8_t val14; + int8x8_t val15; + uint8x8_t val16; + uint32x4_t val40; + val14 = vcreate_s8 (0xff0080f6807f807fUL); + val15 = vcreate_s8 (0x10807fff7f808080UL); + val16 = vcgt_s8 (val14, val15); + val40 = vreinterpretq_u32_u64 ( + vdupq_n_u64 ( + vget_lane_s64_1 ( + vreinterpret_s64_u8 (val16), 0) + )); +} |