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author | Jeffrey A Law <law@cygnus.com> | 1999-09-07 07:38:56 +0000 |
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committer | Jeff Law <law@gcc.gnu.org> | 1999-09-07 01:38:56 -0600 |
commit | d47ac78b9bcc2da2a9a2dd6aa6bbe213d569c6fc (patch) | |
tree | f0d1f28e9b4fd8df43fe2296fb0d50f806a4ede1 | |
parent | 35d35f91e0094425492d935931224c7411c1650f (diff) | |
download | gcc-d47ac78b9bcc2da2a9a2dd6aa6bbe213d569c6fc.zip gcc-d47ac78b9bcc2da2a9a2dd6aa6bbe213d569c6fc.tar.gz gcc-d47ac78b9bcc2da2a9a2dd6aa6bbe213d569c6fc.tar.bz2 |
cse.c (fold_rtx): Work around bug in Sun V5.0 compilers.
Fri Aug 27 15:35:24 1999 Jeffrey A Law (law@cygnus.com)
* cse.c (fold_rtx): Work around bug in Sun V5.0 compilers.
* pa.c (emit_move_sequence): Do not stop on SUBREG_WORD of an
operand.
Tue Aug 31 11:51:06 1999 Jim Kingdon <http://developer.redhat.com>
* i386.c (output_strlen_unroll): Don't write xops[7]
label if it wasn't set.
From-SVN: r29156
-rw-r--r-- | gcc/ChangeLog | 9 | ||||
-rw-r--r-- | gcc/config/i386/i386.c | 5 | ||||
-rw-r--r-- | gcc/config/pa/pa.c | 16 | ||||
-rw-r--r-- | gcc/cse.c | 10 |
4 files changed, 35 insertions, 5 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 53555ea..22403c9 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,14 @@ Tue Sep 7 01:27:21 1999 Jeffrey A Law (law@cygnus.com) + Fri Aug 27 15:35:24 1999 Jeffrey A Law (law@cygnus.com) + * cse.c (fold_rtx): Work around bug in Sun V5.0 compilers. + * pa.c (emit_move_sequence): Do not stop on SUBREG_WORD of an + operand. + + Tue Aug 31 11:51:06 1999 Jim Kingdon <http://developer.redhat.com> + * i386.c (output_strlen_unroll): Don't write xops[7] + label if it wasn't set. + Fri Aug 27 09:36:17 1999 Andreas Schwab <schwab@suse.de> * function.c (assign_stack_temp_for_type): Fix change of Mar 5 for the fact that ALIGN is measured in bits, not bytes. diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 3efedb6..0333b19 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -5234,6 +5234,9 @@ output_strlen_unroll (operands) output_asm_insn (AS1 (je,%l12), xops); output_asm_insn (AS1 (inc%L0,%0), xops); + /* Not needed with an alignment of 2 */ + if (GET_CODE (operands[1]) != CONST_INT || INTVAL (operands[1]) != 2) + { ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "L", CODE_LABEL_NUMBER (xops[7])); output_asm_insn (AS2 (cmp%B13,%2,%13), xops); @@ -5242,6 +5245,8 @@ output_strlen_unroll (operands) ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "L", CODE_LABEL_NUMBER (xops[6])); + } + output_asm_insn (AS2 (cmp%B13,%2,%13), xops); } diff --git a/gcc/config/pa/pa.c b/gcc/config/pa/pa.c index fa1287e..66ea980 100644 --- a/gcc/config/pa/pa.c +++ b/gcc/config/pa/pa.c @@ -1129,8 +1129,12 @@ emit_move_sequence (operands, mode, scratch_reg) && GET_CODE (SUBREG_REG (operand0)) == REG && REGNO (SUBREG_REG (operand0)) >= FIRST_PSEUDO_REGISTER) { - SUBREG_REG (operand0) = reg_equiv_mem[REGNO (SUBREG_REG (operand0))]; - operand0 = alter_subreg (operand0); + /* We must not alter SUBREG_WORD (operand0) since that would confuse + the code which tracks sets/uses for delete_output_reload. */ + rtx temp = gen_rtx_SUBREG (GET_MODE (operand0), + reg_equiv_mem [REGNO (SUBREG_REG (operand0))], + SUBREG_WORD (operand0)); + operand0 = alter_subreg (temp); } if (scratch_reg @@ -1142,8 +1146,12 @@ emit_move_sequence (operands, mode, scratch_reg) && GET_CODE (SUBREG_REG (operand1)) == REG && REGNO (SUBREG_REG (operand1)) >= FIRST_PSEUDO_REGISTER) { - SUBREG_REG (operand1) = reg_equiv_mem[REGNO (SUBREG_REG (operand1))]; - operand1 = alter_subreg (operand1); + /* We must not alter SUBREG_WORD (operand0) since that would confuse + the code which tracks sets/uses for delete_output_reload. */ + rtx temp = gen_rtx_SUBREG (GET_MODE (operand1), + reg_equiv_mem [REGNO (SUBREG_REG (operand1))], + SUBREG_WORD (operand1)); + operand1 = alter_subreg (temp); } if (scratch_reg && reload_in_progress && GET_CODE (operand0) == MEM @@ -5861,7 +5861,15 @@ fold_rtx (x, insn) hence not save anything) or be incorrect. */ if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT && INTVAL (const_arg1) < 0 - && - INTVAL (const_arg1) >= 0 + /* This used to test + + - INTVAL (const_arg1) >= 0 + + But The Sun V5.0 compilers mis-compiled that test. So + instead we test for the problematic value in a more direct + manner and hope the Sun compilers get it correct. */ + && INTVAL (const_arg1) != + ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1)) && GET_CODE (folded_arg1) == REG) { rtx new_const = GEN_INT (- INTVAL (const_arg1)); |