diff options
| author | Jerry Quinn <jlquinn@optonline.net> | 2004-06-15 18:02:40 +0000 |
|---|---|---|
| committer | Jerry Quinn <jlquinn@gcc.gnu.org> | 2004-06-15 18:02:40 +0000 |
| commit | f8cfc6aa070047007c18468b54996c116e593642 (patch) | |
| tree | 59650bc9433b72fce58b94b5d3cd187f0dde42a0 | |
| parent | 347b63a2c9e48740e8d79c9be8d620d22e1eb40f (diff) | |
| download | gcc-f8cfc6aa070047007c18468b54996c116e593642.zip gcc-f8cfc6aa070047007c18468b54996c116e593642.tar.gz gcc-f8cfc6aa070047007c18468b54996c116e593642.tar.bz2 | |
alias.c (record_set, [...]): Use REG_P.
2004-06-15 Jerry Quinn <jlquinn@optonline.net>
* alias.c (record_set, record_base_value, canon_rtx, get_addr,
nonlocal_mentioned_p_1, init_alias_analysis): Use REG_P.
* bt-load.c (find_btr_reference, insn_sets_btr_p, note_btr_set):
Likewise.
* builtins.c (expand_builtin_setjmp, expand_builtin_apply,
expand_builtin_mathfn, expand_builtin_strlen, expand_builtin_memcmp,
expand_builtin_strcmp, expand_builtin_strncmp,
expand_builtin_frame_address): Likewise.
* caller-save.c (mark_set_regs, add_stored_regs, mark_referenced_regs,
insert_one_insn): Likewise.
* calls.c (prepare_call_address, precompute_register_parameters,
precompute_arguments, expand_call, emit_library_call_value_1): Likewise.
* cfganal.c (flow_active_insn_p): Likewise.
* combine.c (set_nonzero_bits_and_sign_copies, can_combine_p,
combinable_i3pat, try_combine, find_split_point, COMBINE_RTX_EQUAL_P,
subst, combine_simplify_rtx, simplify_if_then_else, simplify_set,
make_extraction, recog_for_combine, gen_lowpart_for_combine,
simplify_comparison, record_dead_and_set_regs_1,
record_dead_and_set_regs, record_promoted_value,
check_promoted_subreg, get_last_value_validate, get_last_value,
reg_dead_at_p_1, reg_bitfield_target_p, distribute_notes,
unmentioned_reg_p_1): Likewise.
* conflict.c (mark_reg): Likewise.
* cse.c (HASH, COST, COST_IN, approx_reg_cost_1, notreg_cost,
mention_regs, insert_regs, lookup, lookup_for_remove, insert,
merge_equiv_classes, flush_hash_table, invalidate,
remove_invalid_refs, remove_invalid_subreg_refs, rehash_using_reg,
invalidate_for_call, use_related_value, canon_hash, exp_equiv_p,
cse_rtx_varies_p, canon_reg, find_best_addr, fold_rtx, equiv_constant,
record_jump_cond, cse_insn, addr_affects_sp_p,
invalidate_from_clobbers, cse_process_notes, cse_around_loop,
cse_set_around_loop, count_reg_usage, set_live_p, cse_change_cc_mode,
cse_cc_succs, cse_condition_code_reg): Likewise.
* cselib.c (cselib_reg_set_mode, rtx_equal_for_cselib_p,
cselib_lookup, cselib_invalidate_regno, cselib_invalidate_rtx,
cselib_record_set, cselib_record_sets): Likewise.
* dbxout.c (dbxout_symbol_location, dbxout_parms, dbxout_reg_parms,
dbxout_block): Likewise.
* df.c (df_ref_record, df_def_record_1, df_uses_record): Likewise.
* dojump.c (do_jump): Likewise.
* dwarf2out.c (dwarf2out_frame_debug_expr, is_pseudo_reg,
is_based_loc, rtl_for_decl_location): Likewise.
* emit-rtl.c (set_reg_attrs_for_parm, set_decl_rtl,
set_decl_incoming_rtl, mark_user_reg): Likewise.
* explow.c (copy_all_regs, copy_all_regs, memory_address, force_reg,
copy_to_suggested_reg, allocate_dynamic_stack_space,
probe_stack_range, hard_function_value): Likewise.
* expmed.c (store_bit_field, store_fixed_bit_field,
store_split_bit_field, extract_bit_field, extract_fixed_bit_field,
extract_split_bit_field, expand_divmod, emit_store_flag_force):
Likewise.
* expr.c (convert_move, convert_modes,
block_move_libcall_safe_for_call_parm, emit_group_load, use_reg,
use_group_regs, emit_move_insn, emit_move_insn_1,
compress_float_constant, push_block, emit_single_push_insn,
emit_push_insn, get_subtarget, expand_assignment, store_expr,
store_constructor, store_field, force_operand, safe_from_p,
expand_expr_real_1, expand_increment, do_store_flag, do_tablejump):
Likewise.
* final.c (profile_function, final_scan_insn, alter_subreg,
get_mem_expr_from_op, output_asm_operand_names, output_operand,
only_leaf_regs_used, leaf_renumber_regs_insn): Likewise.
* flow.c (verify_wide_reg_1, mark_regs_live_at_end,
find_regno_partial, propagate_one_insn, init_propagate_block_info,
insn_dead_p, libcall_dead_p, mark_set_1, not_reg_cond,
attempt_auto_inc, find_auto_inc, mark_used_regs,
count_or_remove_death_notes_bb): Likewise.
* function.c (find_temp_slot_from_address, update_temp_slot_address,
preserve_temp_slots, put_var_into_stack, fixup_var_refs_insn,
fixup_var_refs_1, fixup_stack_1, optimize_bit_field, flush_addressof,
put_addressof_into_stack, purge_addressof_1, insns_for_mem_walk,
purge_single_hard_subreg_set, instantiate_decl,
instantiate_virtual_regs_1, aggregate_value_p, assign_parms,
promoted_input_arg, setjmp_vars_warning, setjmp_args_warning,
setjmp_protect, setjmp_protect_args, fix_lexical_addr,
expand_function_start, diddle_return_value, clobber_return_register,
expand_function_end, keep_stack_depressed, handle_epilogue_set,
update_epilogue_consts): Likewise.
* genemit.c (gen_exp, gen_insn): Likewise.
* genrecog.c (make_insn_sequence): Likewise.
* global.c (global_conflicts, expand_preferences, mark_reg_store,
mark_reg_conflicts, set_preference, reg_becomes_live,
build_insn_chain, mark_reg_change): Likewise.
* haifa_sched.c (CONST_BASED_ADDRESS_P, find_set_reg_weight):
Likewise.
* ifcvt.c (noce_try_abs, noce_get_condition, noce_process_if_block):
Likewise.
* integrate.c (copy_rtx_and_substitute, try_constants,
subst_constants, mark_stores, allocate_initial_values): Likewise.
* jump.c (reversed_comparison_code_parts, delete_prior_computation,
delete_computation, rtx_renumbered_equal_p, true_regnum,
reg_or_subregno): Likewise.
* lcm.c (reg_dies, reg_becomes_live): Likewise.
* local-alloc.c (validate_equiv_mem_from_store, validate_equiv_mem,
update_equiv_regs, no_equiv, block_alloc, combine_regs, reg_is_set,
wipe_dead_reg, no_conflict_p): Likewise.
* loop-iv.c (simple_reg_p, simple_set_p, kill_sets,
iv_get_reaching_def, iv_analyze_biv, altered_reg_used, mark_altered,
simple_rhs_p, simplify_using_assignment, implies_p): Likewise.
* loop.c (scan_loop, combine_movables, rtx_equal_for_loop_p,
move_movables, note_set_pseudo_multiple_uses, consec_sets_invariant_p,
find_single_use_in_loop, count_one_set, loop_bivs_init_find,
loop_givs_rescan, check_insn_for_bivs, check_insn_for_givs,
valid_initial_value_p, simplify_giv_expr, consec_sets_giv,
loop_regs_update, check_dbra_loop, maybe_eliminate_biv,
maybe_eliminate_biv_1, record_initial, update_reg_last_use,
canonicalize_condition, loop_regs_scan, load_mems, try_copy_prop,
try_swap_copy_prop): Likewise.
* optabs.c (expand_binop, expand_vector_binop, expand_vector_unop,
expand_abs, emit_no_conflict_block, emit_libcall_block, expand_float):
Likewise.
* postreload.c (reload_cse_simplify, reload_cse_simplify_set,
reload_cse_simplify_operands, reload_combine,
reload_combine_note_store, reload_combine_note_use,
reload_cse_move2add, move2add_note_store): Likewise.
* print-rtl.c (print_rtx): Likewise.
* ra-build.c (copy_insn_p, remember_move, init_one_web_common,
contains_pseudo, handle_asm_insn): Likewise.
* ra-debug.c (ra_print_rtx_object, dump_constraints,
dump_static_insn_cost): Likewise.
* ra-rewrite.c (slots_overlap_p, emit_colors,
remove_suspicious_death_notes): Likewise.
* recog.c (validate_replace_rtx_1, find_single_use_1, find_single_use,
register_operand, scratch_operand, nonmemory_operand,
constrain_operands): Likewise.
* reg-stack (check_asm_stack_operands, remove_regno_note,
emit_swap_insn, swap_rtx_condition, subst_stack_regs_pat,
subst_asm_stack_regs): Likewise.
* regclass.c (scan_one_insn, record_reg_classes, copy_cost,
record_address_regs, reg_scan_mark_refs): Likewise.
* regmove.c (discover_flags_reg, replacement_quality,
copy_src_to_dest, reg_is_remote_constant_p, regmove_optimize,
fixup_match_1): Likewise.
* regrename.c (note_sets, clear_dead_regs, build_def_use, kill_value,
kill_set_value, copyprop_hardreg_forward_1): Likewise.
* reload.c (MATCHES, push_secondary_reload, find_reusable_reload,
reload_inner_reg_of_subreg, can_reload_into, push_reload,
combine_reloads, find_dummy_reload, hard_reg_set_here_p,
operands_match_p, decompose, find_reloads, find_reloads_toplev,
find_reloads_address, subst_indexed_address, find_reloads_address_1,
find_reloads_subreg_address, find_replacement,
refers_to_regno_for_reload_p, reg_overlap_mentioned_for_reload_p,
refers_to_mem_for_reload_p, find_equiv_reg, regno_clobbered_p): Likewise.
* reload1.c (replace_pseudos_in, reload, calculate_needs_all_insns,
find_reg, delete_dead_insn, alter_reg, eliminate_regs,
elimination_effects, eliminate_regs_in_insn, scan_paradoxical_subregs,
forget_old_reloads_1, reload_reg_free_for_value_p, choose_reload_regs,
emit_input_reload_insns, emit_output_reload_insns, do_input_reload,
do_output_reload, emit_reload_insns, gen_reload,
delete_address_reloads_1, inc_for_reload): Likewise.
* reorg.c (update_reg_dead_notes, fix_reg_dead_note,
update_reg_unused_notes, fill_slots_from_thread): Likewise.
* resource.c (update_live_status, mark_referenced_resources,
mark_set_resources, mark_target_live_regs): Likewise.
* rtlanal.c (nonzero_address_p, get_jump_table_offset,
global_reg_mentioned_p_1, reg_mentioned_p, reg_referenced_p,
reg_set_p, set_noop_p, find_last_value, refers_to_regno_p,
note_stores, dead_or_set_p, dead_or_set_regno_p, find_regno_note,
find_reg_fusage, find_regno_fusage, replace_regs, regno_use_in,
parms_set, find_first_parameter_load, keep_with_call_p,
hoist_test_store, hoist_update_store, address_cost, nonzero_bits1,
num_sign_bit_copies1): Likewise.
* rtlhooks.c (gen_lowpart_general): Likewise.
* sched-deps.c (deps_may_trap_p, sched_analyze_1, sched_analyze_insn,
sched_analyze): Likewise.
* sched-rgn.c (check_live_1, update_live_1, sets_likely_spilled_1):
Likewise.
* sdbout.c (sdbout_symbol, sdbout_parms, sdbout_reg_parms): Likewise.
* simplify-rtx.c (simplify_replace_rtx, simplify_unary_operation,
simplify_binary_operation, simplify_const_relational_operation,
simplify_subreg): Likewise.
* stmt.c (decl_conflicts_with_clobbers_p, expand_asm_operands,
expand_end_stmt_expr, expand_return, expand_decl,
expand_anon_union_decl): Likewise.
* unroll.c (precondition_loop_p, calculate_giv_inc, copy_loop_body,
find_splittable_regs, find_splittable_givs, find_common_reg_term,
loop_iterations): Likewise.
* var-tracking.c (variable_union, variable_part_different_p,
variable_different_p, count_uses, add_uses, add_stores,
compute_bb_dataflow, set_variable_part, delete_variable_part,
emit_notes_in_bb, vt_get_decl_and_offset, vt_add_function_parameters):
Likewise.
* varasm.c (assemble_variable): Likewise.
From-SVN: r83195
58 files changed, 1154 insertions, 967 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 86d984b..c03a523 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,189 @@ +2004-06-15 Jerry Quinn <jlquinn@optonline.net> + + * alias.c (record_set, record_base_value, canon_rtx, get_addr, + nonlocal_mentioned_p_1, init_alias_analysis): Use REG_P. + * bt-load.c (find_btr_reference, insn_sets_btr_p, note_btr_set): + Likewise. + * builtins.c (expand_builtin_setjmp, expand_builtin_apply, + expand_builtin_mathfn, expand_builtin_strlen, expand_builtin_memcmp, + expand_builtin_strcmp, expand_builtin_strncmp, + expand_builtin_frame_address): Likewise. + * caller-save.c (mark_set_regs, add_stored_regs, mark_referenced_regs, + insert_one_insn): Likewise. + * calls.c (prepare_call_address, precompute_register_parameters, + precompute_arguments, expand_call, emit_library_call_value_1): Likewise. + * cfganal.c (flow_active_insn_p): Likewise. + * combine.c (set_nonzero_bits_and_sign_copies, can_combine_p, + combinable_i3pat, try_combine, find_split_point, COMBINE_RTX_EQUAL_P, + subst, combine_simplify_rtx, simplify_if_then_else, simplify_set, + make_extraction, recog_for_combine, gen_lowpart_for_combine, + simplify_comparison, record_dead_and_set_regs_1, + record_dead_and_set_regs, record_promoted_value, + check_promoted_subreg, get_last_value_validate, get_last_value, + reg_dead_at_p_1, reg_bitfield_target_p, distribute_notes, + unmentioned_reg_p_1): Likewise. + * conflict.c (mark_reg): Likewise. + * cse.c (HASH, COST, COST_IN, approx_reg_cost_1, notreg_cost, + mention_regs, insert_regs, lookup, lookup_for_remove, insert, + merge_equiv_classes, flush_hash_table, invalidate, + remove_invalid_refs, remove_invalid_subreg_refs, rehash_using_reg, + invalidate_for_call, use_related_value, canon_hash, exp_equiv_p, + cse_rtx_varies_p, canon_reg, find_best_addr, fold_rtx, equiv_constant, + record_jump_cond, cse_insn, addr_affects_sp_p, + invalidate_from_clobbers, cse_process_notes, cse_around_loop, + cse_set_around_loop, count_reg_usage, set_live_p, cse_change_cc_mode, + cse_cc_succs, cse_condition_code_reg): Likewise. + * cselib.c (cselib_reg_set_mode, rtx_equal_for_cselib_p, + cselib_lookup, cselib_invalidate_regno, cselib_invalidate_rtx, + cselib_record_set, cselib_record_sets): Likewise. + * dbxout.c (dbxout_symbol_location, dbxout_parms, dbxout_reg_parms, + dbxout_block): Likewise. + * df.c (df_ref_record, df_def_record_1, df_uses_record): Likewise. + * dojump.c (do_jump): Likewise. + * dwarf2out.c (dwarf2out_frame_debug_expr, is_pseudo_reg, + is_based_loc, rtl_for_decl_location): Likewise. + * emit-rtl.c (set_reg_attrs_for_parm, set_decl_rtl, + set_decl_incoming_rtl, mark_user_reg): Likewise. + * explow.c (copy_all_regs, copy_all_regs, memory_address, force_reg, + copy_to_suggested_reg, allocate_dynamic_stack_space, + probe_stack_range, hard_function_value): Likewise. + * expmed.c (store_bit_field, store_fixed_bit_field, + store_split_bit_field, extract_bit_field, extract_fixed_bit_field, + extract_split_bit_field, expand_divmod, emit_store_flag_force): + Likewise. + * expr.c (convert_move, convert_modes, + block_move_libcall_safe_for_call_parm, emit_group_load, use_reg, + use_group_regs, emit_move_insn, emit_move_insn_1, + compress_float_constant, push_block, emit_single_push_insn, + emit_push_insn, get_subtarget, expand_assignment, store_expr, + store_constructor, store_field, force_operand, safe_from_p, + expand_expr_real_1, expand_increment, do_store_flag, do_tablejump): + Likewise. + * final.c (profile_function, final_scan_insn, alter_subreg, + get_mem_expr_from_op, output_asm_operand_names, output_operand, + only_leaf_regs_used, leaf_renumber_regs_insn): Likewise. + * flow.c (verify_wide_reg_1, mark_regs_live_at_end, + find_regno_partial, propagate_one_insn, init_propagate_block_info, + insn_dead_p, libcall_dead_p, mark_set_1, not_reg_cond, + attempt_auto_inc, find_auto_inc, mark_used_regs, + count_or_remove_death_notes_bb): Likewise. + * function.c (find_temp_slot_from_address, update_temp_slot_address, + preserve_temp_slots, put_var_into_stack, fixup_var_refs_insn, + fixup_var_refs_1, fixup_stack_1, optimize_bit_field, flush_addressof, + put_addressof_into_stack, purge_addressof_1, insns_for_mem_walk, + purge_single_hard_subreg_set, instantiate_decl, + instantiate_virtual_regs_1, aggregate_value_p, assign_parms, + promoted_input_arg, setjmp_vars_warning, setjmp_args_warning, + setjmp_protect, setjmp_protect_args, fix_lexical_addr, + expand_function_start, diddle_return_value, clobber_return_register, + expand_function_end, keep_stack_depressed, handle_epilogue_set, + update_epilogue_consts): Likewise. + * genemit.c (gen_exp, gen_insn): Likewise. + * genrecog.c (make_insn_sequence): Likewise. + * global.c (global_conflicts, expand_preferences, mark_reg_store, + mark_reg_conflicts, set_preference, reg_becomes_live, + build_insn_chain, mark_reg_change): Likewise. + * haifa_sched.c (CONST_BASED_ADDRESS_P, find_set_reg_weight): + Likewise. + * ifcvt.c (noce_try_abs, noce_get_condition, noce_process_if_block): + Likewise. + * integrate.c (copy_rtx_and_substitute, try_constants, + subst_constants, mark_stores, allocate_initial_values): Likewise. + * jump.c (reversed_comparison_code_parts, delete_prior_computation, + delete_computation, rtx_renumbered_equal_p, true_regnum, + reg_or_subregno): Likewise. + * lcm.c (reg_dies, reg_becomes_live): Likewise. + * local-alloc.c (validate_equiv_mem_from_store, validate_equiv_mem, + update_equiv_regs, no_equiv, block_alloc, combine_regs, reg_is_set, + wipe_dead_reg, no_conflict_p): Likewise. + * loop-iv.c (simple_reg_p, simple_set_p, kill_sets, + iv_get_reaching_def, iv_analyze_biv, altered_reg_used, mark_altered, + simple_rhs_p, simplify_using_assignment, implies_p): Likewise. + * loop.c (scan_loop, combine_movables, rtx_equal_for_loop_p, + move_movables, note_set_pseudo_multiple_uses, consec_sets_invariant_p, + find_single_use_in_loop, count_one_set, loop_bivs_init_find, + loop_givs_rescan, check_insn_for_bivs, check_insn_for_givs, + valid_initial_value_p, simplify_giv_expr, consec_sets_giv, + loop_regs_update, check_dbra_loop, maybe_eliminate_biv, + maybe_eliminate_biv_1, record_initial, update_reg_last_use, + canonicalize_condition, loop_regs_scan, load_mems, try_copy_prop, + try_swap_copy_prop): Likewise. + * optabs.c (expand_binop, expand_vector_binop, expand_vector_unop, + expand_abs, emit_no_conflict_block, emit_libcall_block, expand_float): + Likewise. + * postreload.c (reload_cse_simplify, reload_cse_simplify_set, + reload_cse_simplify_operands, reload_combine, + reload_combine_note_store, reload_combine_note_use, + reload_cse_move2add, move2add_note_store): Likewise. + * print-rtl.c (print_rtx): Likewise. + * ra-build.c (copy_insn_p, remember_move, init_one_web_common, + contains_pseudo, handle_asm_insn): Likewise. + * ra-debug.c (ra_print_rtx_object, dump_constraints, + dump_static_insn_cost): Likewise. + * ra-rewrite.c (slots_overlap_p, emit_colors, + remove_suspicious_death_notes): Likewise. + * recog.c (validate_replace_rtx_1, find_single_use_1, find_single_use, + register_operand, scratch_operand, nonmemory_operand, + constrain_operands): Likewise. + * reg-stack (check_asm_stack_operands, remove_regno_note, + emit_swap_insn, swap_rtx_condition, subst_stack_regs_pat, + subst_asm_stack_regs): Likewise. + * regclass.c (scan_one_insn, record_reg_classes, copy_cost, + record_address_regs, reg_scan_mark_refs): Likewise. + * regmove.c (discover_flags_reg, replacement_quality, + copy_src_to_dest, reg_is_remote_constant_p, regmove_optimize, + fixup_match_1): Likewise. + * regrename.c (note_sets, clear_dead_regs, build_def_use, kill_value, + kill_set_value, copyprop_hardreg_forward_1): Likewise. + * reload.c (MATCHES, push_secondary_reload, find_reusable_reload, + reload_inner_reg_of_subreg, can_reload_into, push_reload, + combine_reloads, find_dummy_reload, hard_reg_set_here_p, + operands_match_p, decompose, find_reloads, find_reloads_toplev, + find_reloads_address, subst_indexed_address, find_reloads_address_1, + find_reloads_subreg_address, find_replacement, + refers_to_regno_for_reload_p, reg_overlap_mentioned_for_reload_p, + refers_to_mem_for_reload_p, find_equiv_reg, regno_clobbered_p): Likewise. + * reload1.c (replace_pseudos_in, reload, calculate_needs_all_insns, + find_reg, delete_dead_insn, alter_reg, eliminate_regs, + elimination_effects, eliminate_regs_in_insn, scan_paradoxical_subregs, + forget_old_reloads_1, reload_reg_free_for_value_p, choose_reload_regs, + emit_input_reload_insns, emit_output_reload_insns, do_input_reload, + do_output_reload, emit_reload_insns, gen_reload, + delete_address_reloads_1, inc_for_reload): Likewise. + * reorg.c (update_reg_dead_notes, fix_reg_dead_note, + update_reg_unused_notes, fill_slots_from_thread): Likewise. + * resource.c (update_live_status, mark_referenced_resources, + mark_set_resources, mark_target_live_regs): Likewise. + * rtlanal.c (nonzero_address_p, get_jump_table_offset, + global_reg_mentioned_p_1, reg_mentioned_p, reg_referenced_p, + reg_set_p, set_noop_p, find_last_value, refers_to_regno_p, + note_stores, dead_or_set_p, dead_or_set_regno_p, find_regno_note, + find_reg_fusage, find_regno_fusage, replace_regs, regno_use_in, + parms_set, find_first_parameter_load, keep_with_call_p, + hoist_test_store, hoist_update_store, address_cost, nonzero_bits1, + num_sign_bit_copies1): Likewise. + * rtlhooks.c (gen_lowpart_general): Likewise. + * sched-deps.c (deps_may_trap_p, sched_analyze_1, sched_analyze_insn, + sched_analyze): Likewise. + * sched-rgn.c (check_live_1, update_live_1, sets_likely_spilled_1): + Likewise. + * sdbout.c (sdbout_symbol, sdbout_parms, sdbout_reg_parms): Likewise. + * simplify-rtx.c (simplify_replace_rtx, simplify_unary_operation, + simplify_binary_operation, simplify_const_relational_operation, + simplify_subreg): Likewise. + * stmt.c (decl_conflicts_with_clobbers_p, expand_asm_operands, + expand_end_stmt_expr, expand_return, expand_decl, + expand_anon_union_decl): Likewise. + * unroll.c (precondition_loop_p, calculate_giv_inc, copy_loop_body, + find_splittable_regs, find_splittable_givs, find_common_reg_term, + loop_iterations): Likewise. + * var-tracking.c (variable_union, variable_part_different_p, + variable_different_p, count_uses, add_uses, add_stores, + compute_bb_dataflow, set_variable_part, delete_variable_part, + emit_notes_in_bb, vt_get_decl_and_offset, vt_add_function_parameters): + Likewise. + * varasm.c (assemble_variable): Likewise. + 2004-06-15 Chris Demetriou <cgd@broadcom.com> * config/mips/linux.h (ASM_PREFERRED_EH_DATA_FORMAT): Remove diff --git a/gcc/alias.c b/gcc/alias.c index 3e2bbbb..8e168c2 100644 --- a/gcc/alias.c +++ b/gcc/alias.c @@ -942,7 +942,7 @@ record_set (rtx dest, rtx set, void *data ATTRIBUTE_UNUSED) rtx src; int n; - if (GET_CODE (dest) != REG) + if (!REG_P (dest)) return; regno = REGNO (dest); @@ -1063,7 +1063,7 @@ record_base_value (unsigned int regno, rtx val, int invariant) if (regno >= VARRAY_SIZE (reg_base_value)) VARRAY_GROW (reg_base_value, max_reg_num ()); - if (GET_CODE (val) == REG) + if (REG_P (val)) { VARRAY_RTX (reg_base_value, regno) = REG_BASE_VALUE (val); @@ -1156,7 +1156,7 @@ rtx canon_rtx (rtx x) { /* Recursively look for equivalences. */ - if (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER) + if (REG_P (x) && REGNO (x) >= FIRST_PSEUDO_REGISTER) { rtx t = get_reg_known_value (REGNO (x)); if (t == x) @@ -1595,7 +1595,7 @@ get_addr (rtx x) if (CONSTANT_P (l->loc)) return l->loc; for (l = v->locs; l; l = l->next) - if (GET_CODE (l->loc) != REG && GET_CODE (l->loc) != MEM) + if (!REG_P (l->loc) && GET_CODE (l->loc) != MEM) return l->loc; if (v->locs) return v->locs->loc; @@ -2411,7 +2411,7 @@ nonlocal_mentioned_p_1 (rtx *loc, void *data ATTRIBUTE_UNUSED) switch (GET_CODE (x)) { case SUBREG: - if (GET_CODE (SUBREG_REG (x)) == REG) + if (REG_P (SUBREG_REG (x))) { /* Global registers are not local. */ if (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER @@ -2552,9 +2552,9 @@ nonlocal_referenced_p_1 (rtx *loc, void *data ATTRIBUTE_UNUSED) mentioned in the destination. */ if (GET_CODE (SET_DEST (x)) != CC0 && GET_CODE (SET_DEST (x)) != PC - && GET_CODE (SET_DEST (x)) != REG + && !REG_P (SET_DEST (x)) && ! (GET_CODE (SET_DEST (x)) == SUBREG - && GET_CODE (SUBREG_REG (SET_DEST (x))) == REG + && REG_P (SUBREG_REG (SET_DEST (x))) && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (SET_DEST (x)))) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD) == ((GET_MODE_SIZE (GET_MODE (SET_DEST (x))) @@ -2921,7 +2921,7 @@ init_alias_analysis (void) set = single_set (insn); if (set != 0 - && GET_CODE (SET_DEST (set)) == REG + && REG_P (SET_DEST (set)) && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER) { unsigned int regno = REGNO (SET_DEST (set)); @@ -2943,7 +2943,7 @@ init_alias_analysis (void) } else if (REG_N_SETS (regno) == 1 && GET_CODE (src) == PLUS - && GET_CODE (XEXP (src, 0)) == REG + && REG_P (XEXP (src, 0)) && (t = get_reg_known_value (REGNO (XEXP (src, 0)))) && GET_CODE (XEXP (src, 1)) == CONST_INT) { @@ -3004,7 +3004,7 @@ init_alias_analysis (void) for (ui = 0; ui < maxreg; ui++) { rtx base = VARRAY_RTX (reg_base_value, ui); - if (base && GET_CODE (base) == REG) + if (base && REG_P (base)) { unsigned int base_regno = REGNO (base); if (base_regno == ui) /* register set from itself */ diff --git a/gcc/bt-load.c b/gcc/bt-load.c index 7ab8c18..ae8c2e0 100644 --- a/gcc/bt-load.c +++ b/gcc/bt-load.c @@ -195,7 +195,7 @@ find_btr_reference (rtx *px, void *preg) if (px == preg) return -1; x = *px; - if (GET_CODE (x) != REG) + if (!REG_P (x)) return 0; regno = REGNO (x); for (i = hard_regno_nregs[regno][GET_MODE (x)] - 1; i >= 0; i--) @@ -234,7 +234,7 @@ insn_sets_btr_p (rtx insn, int check_const, int *regno) if (GET_CODE (dest) == SUBREG) dest = XEXP (dest, 0); - if (GET_CODE (dest) == REG + if (REG_P (dest) && TEST_HARD_REG_BIT (all_btrs, REGNO (dest))) { if (btr_referenced_p (src, NULL)) @@ -427,7 +427,7 @@ note_btr_set (rtx dest, rtx set ATTRIBUTE_UNUSED, void *data) defs_uses_info *info = data; int regno, end_regno; - if (GET_CODE (dest) != REG) + if (!REG_P (dest)) return; regno = REGNO (dest); end_regno = regno + hard_regno_nregs[regno][GET_MODE (dest)]; diff --git a/gcc/builtins.c b/gcc/builtins.c index 78611ca..2ae99ba 100644 --- a/gcc/builtins.c +++ b/gcc/builtins.c @@ -645,7 +645,7 @@ expand_builtin_setjmp (tree arglist, rtx target) if (!validate_arglist (arglist, POINTER_TYPE, VOID_TYPE)) return NULL_RTX; - if (target == 0 || GET_CODE (target) != REG + if (target == 0 || !REG_P (target) || REGNO (target) < FIRST_PSEUDO_REGISTER) target = gen_reg_rtx (TYPE_MODE (integer_type_node)); @@ -1336,7 +1336,7 @@ expand_builtin_apply (rtx function, rtx arguments, rtx argsize) rtx value = gen_reg_rtx (Pmode); emit_move_insn (value, adjust_address (arguments, Pmode, size)); emit_move_insn (struct_value, value); - if (GET_CODE (struct_value) == REG) + if (REG_P (struct_value)) use_reg (&call_fusage, struct_value); size += GET_MODE_SIZE (Pmode); } @@ -1831,7 +1831,7 @@ expand_builtin_mathfn (tree exp, rtx target, rtx subtarget) rtx operand = XEXP (XEXP (XEXP (note, 0), 1), 0); /* Check operand is a register with expected mode. */ if (operand - && GET_CODE (operand) == REG + && REG_P (operand) && GET_MODE (operand) == mode) { /* Replace the REG_EQUAL note with a SQRT rtx. */ @@ -2404,7 +2404,7 @@ expand_builtin_strlen (tree arglist, rtx target, /* Make a place to write the result of the instruction. */ result = target; if (! (result != 0 - && GET_CODE (result) == REG + && REG_P (result) && GET_MODE (result) == insn_mode && REGNO (result) >= FIRST_PSEUDO_REGISTER)) result = gen_reg_rtx (insn_mode); @@ -3415,7 +3415,7 @@ expand_builtin_memcmp (tree exp ATTRIBUTE_UNUSED, tree arglist, rtx target, /* Make a place to write the result of the instruction. */ result = target; if (! (result != 0 - && GET_CODE (result) == REG && GET_MODE (result) == insn_mode + && REG_P (result) && GET_MODE (result) == insn_mode && REGNO (result) >= FIRST_PSEUDO_REGISTER)) result = gen_reg_rtx (insn_mode); @@ -3570,7 +3570,7 @@ expand_builtin_strcmp (tree exp, rtx target, enum machine_mode mode) /* Make a place to write the result of the instruction. */ result = target; if (! (result != 0 - && GET_CODE (result) == REG && GET_MODE (result) == insn_mode + && REG_P (result) && GET_MODE (result) == insn_mode && REGNO (result) >= FIRST_PSEUDO_REGISTER)) result = gen_reg_rtx (insn_mode); @@ -3741,7 +3741,7 @@ expand_builtin_strncmp (tree exp, rtx target, enum machine_mode mode) /* Make a place to write the result of the instruction. */ result = target; if (! (result != 0 - && GET_CODE (result) == REG && GET_MODE (result) == insn_mode + && REG_P (result) && GET_MODE (result) == insn_mode && REGNO (result) >= FIRST_PSEUDO_REGISTER)) result = gen_reg_rtx (insn_mode); @@ -4654,7 +4654,7 @@ expand_builtin_frame_address (tree fndecl, tree arglist) if (DECL_FUNCTION_CODE (fndecl) == BUILT_IN_FRAME_ADDRESS) return tem; - if (GET_CODE (tem) != REG + if (!REG_P (tem) && ! CONSTANT_P (tem)) tem = copy_to_mode_reg (Pmode, tem); return tem; diff --git a/gcc/caller-save.c b/gcc/caller-save.c index da083da..606a762 100644 --- a/gcc/caller-save.c +++ b/gcc/caller-save.c @@ -504,12 +504,12 @@ mark_set_regs (rtx reg, rtx setter ATTRIBUTE_UNUSED, if (GET_CODE (reg) == SUBREG) { rtx inner = SUBREG_REG (reg); - if (GET_CODE (inner) != REG || REGNO (inner) >= FIRST_PSEUDO_REGISTER) + if (!REG_P (inner) || REGNO (inner) >= FIRST_PSEUDO_REGISTER) return; regno = subreg_hard_regno (reg, 1); } - else if (GET_CODE (reg) == REG + else if (REG_P (reg) && REGNO (reg) < FIRST_PSEUDO_REGISTER) regno = REGNO (reg); else @@ -535,7 +535,7 @@ add_stored_regs (rtx reg, rtx setter, void *data) if (GET_CODE (setter) == CLOBBER) return; - if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG) + if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg))) { offset = subreg_regno_offset (REGNO (SUBREG_REG (reg)), GET_MODE (SUBREG_REG (reg)), @@ -544,7 +544,7 @@ add_stored_regs (rtx reg, rtx setter, void *data) reg = SUBREG_REG (reg); } - if (GET_CODE (reg) != REG || REGNO (reg) >= FIRST_PSEUDO_REGISTER) + if (!REG_P (reg) || REGNO (reg) >= FIRST_PSEUDO_REGISTER) return; regno = REGNO (reg) + offset; @@ -570,7 +570,7 @@ mark_referenced_regs (rtx x) code = GET_CODE (x); if ((code == REG && REGNO (x) < FIRST_PSEUDO_REGISTER) || code == PC || code == CC0 - || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG + || (code == SUBREG && REG_P (SUBREG_REG (x)) && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER /* If we're setting only part of a multi-word register, we shall mark it as referenced, because the words @@ -824,7 +824,7 @@ insert_one_insn (struct insn_chain *chain, int before_p, int code, rtx pat) rtx reg = XEXP (link, 0); int regno, i; - if (GET_CODE (reg) != REG) + if (!REG_P (reg)) abort (); regno = REGNO (reg); diff --git a/gcc/calls.c b/gcc/calls.c index f5969fe..c443542 100644 --- a/gcc/calls.c +++ b/gcc/calls.c @@ -305,7 +305,7 @@ prepare_call_address (rtx funexp, rtx static_chain_value, { emit_move_insn (static_chain_rtx, static_chain_value); - if (GET_CODE (static_chain_rtx) == REG) + if (REG_P (static_chain_rtx)) use_reg (call_fusage, static_chain_rtx); } @@ -811,9 +811,9 @@ precompute_register_parameters (int num_actuals, struct arg_data *args, int *reg register parameters. This is to avoid reload conflicts while loading the parameters registers. */ - if ((! (GET_CODE (args[i].value) == REG + if ((! (REG_P (args[i].value) || (GET_CODE (args[i].value) == SUBREG - && GET_CODE (SUBREG_REG (args[i].value)) == REG))) + && REG_P (SUBREG_REG (args[i].value))))) && args[i].mode != BLKmode && rtx_cost (args[i].value, SET) > COSTS_N_INSNS (1) && ((SMALL_REGISTER_CLASSES && *reg_parm_seen) @@ -1412,7 +1412,7 @@ precompute_arguments (int flags, int num_actuals, struct arg_data *args) /* CSE will replace this only if it contains args[i].value pseudo, so convert it down to the declared mode using a SUBREG. */ - if (GET_CODE (args[i].value) == REG + if (REG_P (args[i].value) && GET_MODE_CLASS (args[i].mode) == MODE_INT) { args[i].initial_value @@ -2254,7 +2254,7 @@ expand_call (tree exp, rtx target, int ignore) is not a REG, we must always copy it into a register. If it is virtual_outgoing_args_rtx, we must copy it to another register in some cases. */ - rtx temp = (GET_CODE (structure_value_addr) != REG + rtx temp = (!REG_P (structure_value_addr) || (ACCUMULATE_OUTGOING_ARGS && stack_arg_under_construction && structure_value_addr == virtual_outgoing_args_rtx) @@ -2904,7 +2904,7 @@ expand_call (tree exp, rtx target, int ignore) force_operand (structure_value_addr, NULL_RTX))); - if (GET_CODE (struct_value) == REG) + if (REG_P (struct_value)) use_reg (&call_fusage, struct_value); } @@ -3162,7 +3162,7 @@ expand_call (tree exp, rtx target, int ignore) { /* If we promoted this return value, make the proper SUBREG. TARGET might be const0_rtx here, so be careful. */ - if (GET_CODE (target) == REG + if (REG_P (target) && TYPE_MODE (TREE_TYPE (exp)) != BLKmode && GET_MODE (target) != TYPE_MODE (TREE_TYPE (exp))) { @@ -3643,7 +3643,7 @@ emit_library_call_value_1 (int retval, rtx orgfun, rtx value, nargs++; /* Make sure it is a reasonable operand for a move or push insn. */ - if (GET_CODE (addr) != REG && GET_CODE (addr) != MEM + if (!REG_P (addr) && GET_CODE (addr) != MEM && ! (CONSTANT_P (addr) && LEGITIMATE_CONSTANT_P (addr))) addr = force_operand (addr, NULL_RTX); @@ -3689,7 +3689,7 @@ emit_library_call_value_1 (int retval, rtx orgfun, rtx value, either emit_move_insn or emit_push_insn will do that. */ /* Make sure it is a reasonable operand for a move or push insn. */ - if (GET_CODE (val) != REG && GET_CODE (val) != MEM + if (!REG_P (val) && GET_CODE (val) != MEM && ! (CONSTANT_P (val) && LEGITIMATE_CONSTANT_P (val))) val = force_operand (val, NULL_RTX); @@ -4030,7 +4030,7 @@ emit_library_call_value_1 (int retval, rtx orgfun, rtx value, force_reg (Pmode, force_operand (XEXP (mem_value, 0), NULL_RTX))); - if (GET_CODE (struct_value) == REG) + if (REG_P (struct_value)) use_reg (&call_fusage, struct_value); } diff --git a/gcc/cfganal.c b/gcc/cfganal.c index c8675dc..2f2f121 100644 --- a/gcc/cfganal.c +++ b/gcc/cfganal.c @@ -69,7 +69,7 @@ flow_active_insn_p (rtx insn) function. If we allow it to be skipped, we introduce the possibility for register livetime aborts. */ if (GET_CODE (PATTERN (insn)) == CLOBBER - && GET_CODE (XEXP (PATTERN (insn), 0)) == REG + && REG_P (XEXP (PATTERN (insn), 0)) && REG_FUNCTION_VALUE_P (XEXP (PATTERN (insn), 0))) return true; diff --git a/gcc/combine.c b/gcc/combine.c index f046e2e..c0fef9d 100644 --- a/gcc/combine.c +++ b/gcc/combine.c @@ -845,7 +845,7 @@ set_nonzero_bits_and_sign_copies (rtx x, rtx set, { unsigned int num; - if (GET_CODE (x) == REG + if (REG_P (x) && REGNO (x) >= FIRST_PSEUDO_REGISTER /* If this register is undefined at the start of the file, we can't say what its contents were. */ @@ -979,7 +979,7 @@ can_combine_p (rtx insn, rtx i3, rtx pred ATTRIBUTE_UNUSED, rtx succ, something to tell them apart, e.g. different modes. For now, we forgo such complicated tests and simply disallow combining of USES of pseudo registers with any other USE. */ - if (GET_CODE (XEXP (elt, 0)) == REG + if (REG_P (XEXP (elt, 0)) && GET_CODE (PATTERN (i3)) == PARALLEL) { rtx i3pat = PATTERN (i3); @@ -991,7 +991,7 @@ can_combine_p (rtx insn, rtx i3, rtx pred ATTRIBUTE_UNUSED, rtx succ, rtx i3elt = XVECEXP (i3pat, 0, i); if (GET_CODE (i3elt) == USE - && GET_CODE (XEXP (i3elt, 0)) == REG + && REG_P (XEXP (i3elt, 0)) && (REGNO (XEXP (i3elt, 0)) == regno ? reg_set_between_p (XEXP (elt, 0), PREV_INSN (insn), i3) @@ -1056,7 +1056,7 @@ can_combine_p (rtx insn, rtx i3, rtx pred ATTRIBUTE_UNUSED, rtx succ, /* Don't eliminate a function call argument. */ || (GET_CODE (i3) == CALL_INSN && (find_reg_fusage (i3, USE, dest) - || (GET_CODE (dest) == REG + || (REG_P (dest) && REGNO (dest) < FIRST_PSEUDO_REGISTER && global_regs[REGNO (dest)]))) /* Don't substitute into an incremented register. */ @@ -1101,7 +1101,7 @@ can_combine_p (rtx insn, rtx i3, rtx pred ATTRIBUTE_UNUSED, rtx succ, return 0; /* DEST must either be a REG or CC0. */ - if (GET_CODE (dest) == REG) + if (REG_P (dest)) { /* If register alignment is being enforced for multi-word items in all cases except for parameters, it is possible to have a register copy @@ -1112,7 +1112,7 @@ can_combine_p (rtx insn, rtx i3, rtx pred ATTRIBUTE_UNUSED, rtx succ, Also, on some machines we don't want to extend the life of a hard register. */ - if (GET_CODE (src) == REG + if (REG_P (src) && ((REGNO (dest) < FIRST_PSEUDO_REGISTER && ! HARD_REGNO_MODE_OK (REGNO (dest), GET_MODE (dest))) /* Don't extend the life of a hard register unless it is @@ -1158,7 +1158,7 @@ can_combine_p (rtx insn, rtx i3, rtx pred ATTRIBUTE_UNUSED, rtx succ, to be an explicit register variable, and was chosen for a reason. */ if (GET_CODE (src) == ASM_OPERANDS - && GET_CODE (dest) == REG && REGNO (dest) < FIRST_PSEUDO_REGISTER) + && REG_P (dest) && REGNO (dest) < FIRST_PSEUDO_REGISTER) return 0; /* If there are any volatile insns between INSN and I3, reject, because @@ -1284,7 +1284,7 @@ combinable_i3pat (rtx i3, rtx *loc, rtx i2dest, rtx i1dest, function argument; the all_adjacent test in can_combine_p also checks this; here, we do a more specific test for this case. */ - || (GET_CODE (inner_dest) == REG + || (REG_P (inner_dest) && REGNO (inner_dest) < FIRST_PSEUDO_REGISTER && (! HARD_REGNO_MODE_OK (REGNO (inner_dest), GET_MODE (inner_dest)))) @@ -1296,7 +1296,7 @@ combinable_i3pat (rtx i3, rtx *loc, rtx i2dest, rtx i1dest, Never add REG_DEAD notes for the FRAME_POINTER_REGNUM or the STACK_POINTER_REGNUM, since these are always considered to be live. Similarly for ARG_POINTER_REGNUM if it is fixed. */ - if (pi3dest_killed && GET_CODE (dest) == REG + if (pi3dest_killed && REG_P (dest) && reg_referenced_p (dest, PATTERN (i3)) && REGNO (dest) != FRAME_POINTER_REGNUM #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM @@ -1524,7 +1524,7 @@ try_combine (rtx i3, rtx i2, rtx i1, int *new_direct_jump_p) usage tests. */ if (i1 == 0 && GET_CODE (i3) == INSN && GET_CODE (PATTERN (i3)) == SET - && GET_CODE (SET_SRC (PATTERN (i3))) == REG + && REG_P (SET_SRC (PATTERN (i3))) && REGNO (SET_SRC (PATTERN (i3))) >= FIRST_PSEUDO_REGISTER && find_reg_note (i3, REG_DEAD, SET_SRC (PATTERN (i3))) && GET_CODE (PATTERN (i2)) == PARALLEL @@ -1591,7 +1591,7 @@ try_combine (rtx i3, rtx i2, rtx i1, int *new_direct_jump_p) && (temp = single_set (i2)) != 0 && (GET_CODE (SET_SRC (temp)) == CONST_INT || GET_CODE (SET_SRC (temp)) == CONST_DOUBLE) - && GET_CODE (SET_DEST (temp)) == REG + && REG_P (SET_DEST (temp)) && GET_MODE_CLASS (GET_MODE (SET_DEST (temp))) == MODE_INT && GET_MODE_SIZE (GET_MODE (SET_DEST (temp))) == 2 * UNITS_PER_WORD && GET_CODE (PATTERN (i3)) == SET @@ -1676,7 +1676,7 @@ try_combine (rtx i3, rtx i2, rtx i1, int *new_direct_jump_p) && GET_CODE (SET_SRC (XVECEXP (PATTERN (i2), 0, 0))) == COMPARE && XEXP (SET_SRC (XVECEXP (PATTERN (i2), 0, 0)), 1) == const0_rtx && GET_CODE (XVECEXP (PATTERN (i2), 0, 1)) == SET - && GET_CODE (SET_DEST (XVECEXP (PATTERN (i2), 0, 1))) == REG + && REG_P (SET_DEST (XVECEXP (PATTERN (i2), 0, 1))) && rtx_equal_p (XEXP (SET_SRC (XVECEXP (PATTERN (i2), 0, 0)), 0), SET_SRC (XVECEXP (PATTERN (i2), 0, 1)))) { @@ -1748,7 +1748,7 @@ try_combine (rtx i3, rtx i2, rtx i1, int *new_direct_jump_p) #if 0 if (!(GET_CODE (PATTERN (i3)) == SET - && GET_CODE (SET_SRC (PATTERN (i3))) == REG + && REG_P (SET_SRC (PATTERN (i3))) && GET_CODE (SET_DEST (PATTERN (i3))) == MEM && (GET_CODE (XEXP (SET_DEST (PATTERN (i3)), 0)) == POST_INC || GET_CODE (XEXP (SET_DEST (PATTERN (i3)), 0)) == POST_DEC))) @@ -2039,7 +2039,7 @@ try_combine (rtx i3, rtx i2, rtx i1, int *new_direct_jump_p) rtx set1 = XVECEXP (newpat, 0, 1); rtx note; - if (((GET_CODE (SET_DEST (set1)) == REG + if (((REG_P (SET_DEST (set1)) && find_reg_note (i3, REG_UNUSED, SET_DEST (set1))) || (GET_CODE (SET_DEST (set1)) == SUBREG && find_reg_note (i3, REG_UNUSED, SUBREG_REG (SET_DEST (set1))))) @@ -2051,7 +2051,7 @@ try_combine (rtx i3, rtx i2, rtx i1, int *new_direct_jump_p) insn_code_number = recog_for_combine (&newpat, i3, &new_i3_notes); } - else if (((GET_CODE (SET_DEST (set0)) == REG + else if (((REG_P (SET_DEST (set0)) && find_reg_note (i3, REG_UNUSED, SET_DEST (set0))) || (GET_CODE (SET_DEST (set0)) == SUBREG && find_reg_note (i3, REG_UNUSED, @@ -2106,7 +2106,7 @@ try_combine (rtx i3, rtx i2, rtx i1, int *new_direct_jump_p) we can change its mode. */ if (GET_MODE (SET_DEST (newpat)) != GET_MODE (i2dest) && GET_MODE (SET_DEST (newpat)) != VOIDmode - && GET_CODE (i2dest) == REG + && REG_P (i2dest) && (REGNO (i2dest) < FIRST_PSEUDO_REGISTER || (REG_N_SETS (REGNO (i2dest)) == 1 && ! added_sets_2 && ! REG_USERVAR_P (i2dest)))) @@ -2190,8 +2190,8 @@ try_combine (rtx i3, rtx i2, rtx i1, int *new_direct_jump_p) || GET_CODE (new_i2_dest) == SUBREG) new_i2_dest = XEXP (new_i2_dest, 0); - if (GET_CODE (new_i3_dest) == REG - && GET_CODE (new_i2_dest) == REG + if (REG_P (new_i3_dest) + && REG_P (new_i2_dest) && REGNO (new_i3_dest) == REGNO (new_i2_dest)) REG_N_SETS (REGNO (new_i2_dest))++; } @@ -2202,7 +2202,7 @@ try_combine (rtx i3, rtx i2, rtx i1, int *new_direct_jump_p) are set between I2 and I3. */ if (insn_code_number < 0 && (split = find_split_point (&newpat, i3)) != 0 #ifdef HAVE_cc0 - && GET_CODE (i2dest) == REG + && REG_P (i2dest) #endif /* We need I2DEST in the proper mode. If it is a hard register or the only use of a pseudo, we can change its mode. */ @@ -2306,7 +2306,7 @@ try_combine (rtx i3, rtx i2, rtx i1, int *new_direct_jump_p) && GET_CODE (SET_DEST (XVECEXP (newpat, 0, 1))) != ZERO_EXTRACT && GET_CODE (SET_DEST (XVECEXP (newpat, 0, 1))) != STRICT_LOW_PART && ! (temp = SET_DEST (XVECEXP (newpat, 0, 1)), - (GET_CODE (temp) == REG + (REG_P (temp) && reg_stat[REGNO (temp)].nonzero_bits != 0 && GET_MODE_BITSIZE (GET_MODE (temp)) < BITS_PER_WORD && GET_MODE_BITSIZE (GET_MODE (temp)) < HOST_BITS_PER_INT @@ -2314,7 +2314,7 @@ try_combine (rtx i3, rtx i2, rtx i1, int *new_direct_jump_p) != GET_MODE_MASK (word_mode)))) && ! (GET_CODE (SET_DEST (XVECEXP (newpat, 0, 1))) == SUBREG && (temp = SUBREG_REG (SET_DEST (XVECEXP (newpat, 0, 1))), - (GET_CODE (temp) == REG + (REG_P (temp) && reg_stat[REGNO (temp)].nonzero_bits != 0 && GET_MODE_BITSIZE (GET_MODE (temp)) < BITS_PER_WORD && GET_MODE_BITSIZE (GET_MODE (temp)) < HOST_BITS_PER_INT @@ -2462,7 +2462,7 @@ try_combine (rtx i3, rtx i2, rtx i1, int *new_direct_jump_p) if (REG_NOTE_KIND (note) == REG_UNUSED && ! reg_set_p (XEXP (note, 0), PATTERN (undobuf.other_insn))) { - if (GET_CODE (XEXP (note, 0)) == REG) + if (REG_P (XEXP (note, 0))) REG_N_DEATHS (REGNO (XEXP (note, 0)))--; remove_note (undobuf.other_insn, note); @@ -2470,7 +2470,7 @@ try_combine (rtx i3, rtx i2, rtx i1, int *new_direct_jump_p) } for (note = new_other_notes; note; note = XEXP (note, 1)) - if (GET_CODE (XEXP (note, 0)) == REG) + if (REG_P (XEXP (note, 0))) REG_N_DEATHS (REGNO (XEXP (note, 0)))++; distribute_notes (new_other_notes, undobuf.other_insn, @@ -2561,7 +2561,7 @@ try_combine (rtx i3, rtx i2, rtx i1, int *new_direct_jump_p) { for (i = 0; i < XVECLEN (PATTERN (i2), 0); i++) if (GET_CODE (XVECEXP (PATTERN (i2), 0, i)) != USE - && GET_CODE (SET_DEST (XVECEXP (PATTERN (i2), 0, i))) == REG + && REG_P (SET_DEST (XVECEXP (PATTERN (i2), 0, i))) && SET_DEST (XVECEXP (PATTERN (i2), 0, i)) != i2dest && ! find_reg_note (i2, REG_UNUSED, SET_DEST (XVECEXP (PATTERN (i2), 0, i)))) @@ -2644,7 +2644,7 @@ try_combine (rtx i3, rtx i2, rtx i1, int *new_direct_jump_p) if (newi2pat && new_i2_notes) { for (temp = new_i2_notes; temp; temp = XEXP (temp, 1)) - if (GET_CODE (XEXP (temp, 0)) == REG) + if (REG_P (XEXP (temp, 0))) REG_N_DEATHS (REGNO (XEXP (temp, 0)))++; distribute_notes (new_i2_notes, i2, i2, NULL_RTX); @@ -2653,7 +2653,7 @@ try_combine (rtx i3, rtx i2, rtx i1, int *new_direct_jump_p) if (new_i3_notes) { for (temp = new_i3_notes; temp; temp = XEXP (temp, 1)) - if (GET_CODE (XEXP (temp, 0)) == REG) + if (REG_P (XEXP (temp, 0))) REG_N_DEATHS (REGNO (XEXP (temp, 0)))++; distribute_notes (new_i3_notes, i3, i3, NULL_RTX); @@ -2668,7 +2668,7 @@ try_combine (rtx i3, rtx i2, rtx i1, int *new_direct_jump_p) if (i3dest_killed) { - if (GET_CODE (i3dest_killed) == REG) + if (REG_P (i3dest_killed)) REG_N_DEATHS (REGNO (i3dest_killed))++; if (newi2pat && reg_set_p (i3dest_killed, newi2pat)) @@ -2683,7 +2683,7 @@ try_combine (rtx i3, rtx i2, rtx i1, int *new_direct_jump_p) if (i2dest_in_i2src) { - if (GET_CODE (i2dest) == REG) + if (REG_P (i2dest)) REG_N_DEATHS (REGNO (i2dest))++; if (newi2pat && reg_set_p (i2dest, newi2pat)) @@ -2696,7 +2696,7 @@ try_combine (rtx i3, rtx i2, rtx i1, int *new_direct_jump_p) if (i1dest_in_i1src) { - if (GET_CODE (i1dest) == REG) + if (REG_P (i1dest)) REG_N_DEATHS (REGNO (i1dest))++; if (newi2pat && reg_set_p (i1dest, newi2pat)) @@ -2711,7 +2711,7 @@ try_combine (rtx i3, rtx i2, rtx i1, int *new_direct_jump_p) distribute_links (i2links); distribute_links (i1links); - if (GET_CODE (i2dest) == REG) + if (REG_P (i2dest)) { rtx link; rtx i2_insn = 0, i2_val = 0, set; @@ -2742,7 +2742,7 @@ try_combine (rtx i3, rtx i2, rtx i1, int *new_direct_jump_p) } } - if (i1 && GET_CODE (i1dest) == REG) + if (i1 && REG_P (i1dest)) { rtx link; rtx i1_insn = 0, i1_val = 0, set; @@ -3050,9 +3050,9 @@ find_split_point (rtx *loc, rtx insn) be better. */ if (GET_CODE (XEXP (SET_SRC (x), 1)) == CONST_INT - && GET_CODE (XEXP (SET_SRC (x), 0)) == REG + && REG_P (XEXP (SET_SRC (x), 0)) && (pos = exact_log2 (INTVAL (XEXP (SET_SRC (x), 1)))) >= 7 - && GET_CODE (SET_DEST (x)) == REG + && REG_P (SET_DEST (x)) && (split = find_single_use (SET_DEST (x), insn, (rtx*) 0)) != 0 && (GET_CODE (*split) == EQ || GET_CODE (*split) == NE) && XEXP (*split, 0) == SET_DEST (x) @@ -3286,7 +3286,7 @@ subst (rtx x, rtx from, rtx to, int in_dest, int unique_copy) #define COMBINE_RTX_EQUAL_P(X,Y) \ ((X) == (Y) \ - || (GET_CODE (X) == REG && GET_CODE (Y) == REG \ + || (REG_P (X) && REG_P (Y) \ && REGNO (X) == REGNO (Y) && GET_MODE (X) == GET_MODE (Y))) if (! in_dest && COMBINE_RTX_EQUAL_P (x, from)) @@ -3302,7 +3302,7 @@ subst (rtx x, rtx from, rtx to, int in_dest, int unique_copy) delete the feeding insn, which is incorrect. So force this insn not to match in this (rare) case. */ - if (! in_dest && code == REG && GET_CODE (from) == REG + if (! in_dest && code == REG && REG_P (from) && REGNO (x) == REGNO (from)) return gen_rtx_CLOBBER (GET_MODE (x), const0_rtx); @@ -3346,7 +3346,7 @@ subst (rtx x, rtx from, rtx to, int in_dest, int unique_copy) { rtx dest = SET_DEST (XVECEXP (x, 0, i)); - if (GET_CODE (dest) != REG + if (!REG_P (dest) && GET_CODE (dest) != CC0 && GET_CODE (dest) != PC) { @@ -3371,7 +3371,7 @@ subst (rtx x, rtx from, rtx to, int in_dest, int unique_copy) where we want to suppress replacing something inside a SET_SRC are handled via the IN_DEST operand. */ if (code == SET - && (GET_CODE (SET_DEST (x)) == REG + && (REG_P (SET_DEST (x)) || GET_CODE (SET_DEST (x)) == CC0 || GET_CODE (SET_DEST (x)) == PC)) fmt = "ie"; @@ -3417,7 +3417,7 @@ subst (rtx x, rtx from, rtx to, int in_dest, int unique_copy) && (code == SUBREG || code == STRICT_LOW_PART || code == ZERO_EXTRACT) && i == 0 - && GET_CODE (new) == REG) + && REG_P (new)) ; else if (COMBINE_RTX_EQUAL_P (XEXP (x, i), from)) @@ -3449,7 +3449,7 @@ subst (rtx x, rtx from, rtx to, int in_dest, int unique_copy) #ifdef CANNOT_CHANGE_MODE_CLASS if (code == SUBREG - && GET_CODE (to) == REG + && REG_P (to) && REGNO (to) < FIRST_PSEUDO_REGISTER && REG_CANNOT_CHANGE_MODE_P (REGNO (to), GET_MODE (to), @@ -3911,9 +3911,9 @@ combine_simplify_rtx (rtx x, enum machine_mode op0_mode, int in_dest) or a SUBREG of one since we'd be making the expression more complex if it was just a register. */ - if (GET_CODE (temp) != REG + if (!REG_P (temp) && ! (GET_CODE (temp) == SUBREG - && GET_CODE (SUBREG_REG (temp)) == REG) + && REG_P (SUBREG_REG (temp))) && (i = exact_log2 (nonzero_bits (temp, mode))) >= 0) { rtx temp1 = simplify_shift_const @@ -4177,9 +4177,9 @@ combine_simplify_rtx (rtx x, enum machine_mode op0_mode, int in_dest) the bitsize of the mode - 1. This allows simplification of "a = (b & 8) == 0;" */ if (XEXP (x, 1) == constm1_rtx - && GET_CODE (XEXP (x, 0)) != REG + && !REG_P (XEXP (x, 0)) && ! (GET_CODE (XEXP (x, 0)) == SUBREG - && GET_CODE (SUBREG_REG (XEXP (x, 0))) == REG) + && REG_P (SUBREG_REG (XEXP (x, 0)))) && nonzero_bits (XEXP (x, 0), mode) == 1) return simplify_shift_const (NULL_RTX, ASHIFTRT, mode, simplify_shift_const (NULL_RTX, ASHIFT, mode, @@ -4541,7 +4541,7 @@ combine_simplify_rtx (rtx x, enum machine_mode op0_mode, int in_dest) return simplify_shift_const (x, code, mode, XEXP (x, 0), INTVAL (XEXP (x, 1))); - else if (SHIFT_COUNT_TRUNCATED && GET_CODE (XEXP (x, 1)) != REG) + else if (SHIFT_COUNT_TRUNCATED && !REG_P (XEXP (x, 1))) SUBST (XEXP (x, 1), force_to_mode (XEXP (x, 1), GET_MODE (XEXP (x, 1)), ((HOST_WIDE_INT) 1 @@ -4630,7 +4630,7 @@ simplify_if_then_else (rtx x) if (comparison_p && ((false_code = combine_reversed_comparison_code (cond)) != UNKNOWN) - && GET_CODE (XEXP (cond, 0)) == REG) + && REG_P (XEXP (cond, 0))) { HOST_WIDE_INT nzb; rtx from = XEXP (cond, 0); @@ -5140,14 +5140,14 @@ simplify_set (rtx x) < GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))) #endif #ifdef CANNOT_CHANGE_MODE_CLASS - && ! (GET_CODE (dest) == REG && REGNO (dest) < FIRST_PSEUDO_REGISTER + && ! (REG_P (dest) && REGNO (dest) < FIRST_PSEUDO_REGISTER && REG_CANNOT_CHANGE_MODE_P (REGNO (dest), GET_MODE (SUBREG_REG (src)), GET_MODE (src))) #endif - && (GET_CODE (dest) == REG + && (REG_P (dest) || (GET_CODE (dest) == SUBREG - && GET_CODE (SUBREG_REG (dest)) == REG))) + && REG_P (SUBREG_REG (dest))))) { SUBST (SET_DEST (x), gen_lowpart (GET_MODE (SUBREG_REG (src)), @@ -6015,7 +6015,7 @@ make_extraction (enum machine_mode mode, rtx inner, HOST_WIDE_INT pos, && ((pos_rtx == 0 && (pos % BITS_PER_WORD) == 0 && GET_CODE (inner) != MEM && (! in_dest - || (GET_CODE (inner) == REG + || (REG_P (inner) && have_insn_for (STRICT_LOW_PART, tmode)))) || (GET_CODE (inner) == MEM && pos_rtx == 0 && (pos @@ -6047,7 +6047,7 @@ make_extraction (enum machine_mode mode, rtx inner, HOST_WIDE_INT pos, new = adjust_address_nv (inner, tmode, offset); } - else if (GET_CODE (inner) == REG) + else if (REG_P (inner)) { if (tmode != inner_mode) { @@ -9127,7 +9127,7 @@ recog_for_combine (rtx *pnewpat, rtx insn, rtx *pnotes) for (i = XVECLEN (newpat, 0) - num_clobbers_to_add; i < XVECLEN (newpat, 0); i++) { - if (GET_CODE (XEXP (XVECEXP (newpat, 0, i), 0)) == REG + if (REG_P (XEXP (XVECEXP (newpat, 0, i), 0)) && ! reg_dead_at_p (XEXP (XVECEXP (newpat, 0, i), 0), insn)) return -1; notes = gen_rtx_EXPR_LIST (REG_UNUSED, @@ -9192,7 +9192,7 @@ gen_lowpart_for_combine (enum machine_mode mode, rtx x) #ifdef CANNOT_CHANGE_MODE_CLASS if (result != 0 && GET_CODE (result) == SUBREG - && GET_CODE (SUBREG_REG (result)) == REG + && REG_P (SUBREG_REG (result)) && REGNO (SUBREG_REG (result)) >= FIRST_PSEUDO_REGISTER) bitmap_set_bit (&subregs_of_mode, REGNO (SUBREG_REG (result)) * MAX_MACHINE_MODE @@ -10393,7 +10393,7 @@ simplify_comparison (enum rtx_code code, rtx *pop0, rtx *pop1) { /* For paradoxical subregs, allow case 1 as above. Case 3 isn't implemented. */ - if (GET_CODE (SUBREG_REG (op0)) == REG) + if (REG_P (SUBREG_REG (op0))) { op0 = SUBREG_REG (op0); op1 = gen_lowpart (GET_MODE (op0), op1); @@ -10714,7 +10714,7 @@ record_dead_and_set_regs_1 (rtx dest, rtx setter, void *data) if (GET_CODE (dest) == SUBREG) dest = SUBREG_REG (dest); - if (GET_CODE (dest) == REG) + if (REG_P (dest)) { /* If we are setting the whole register, we know its value. Otherwise show that we don't know the value. We can handle SUBREG in @@ -10757,7 +10757,7 @@ record_dead_and_set_regs (rtx insn) for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) { if (REG_NOTE_KIND (link) == REG_DEAD - && GET_CODE (XEXP (link, 0)) == REG) + && REG_P (XEXP (link, 0))) { unsigned int regno = REGNO (XEXP (link, 0)); unsigned int endregno @@ -10821,7 +10821,7 @@ record_promoted_value (rtx insn, rtx subreg) insn = XEXP (links, 0); set = single_set (insn); - if (! set || GET_CODE (SET_DEST (set)) != REG + if (! set || !REG_P (SET_DEST (set)) || REGNO (SET_DEST (set)) != regno || GET_MODE (SET_DEST (set)) != GET_MODE (SUBREG_REG (subreg))) { @@ -10835,7 +10835,7 @@ record_promoted_value (rtx insn, rtx subreg) reg_stat[regno].last_set_nonzero_bits &= GET_MODE_MASK (mode); } - if (GET_CODE (SET_SRC (set)) == REG) + if (REG_P (SET_SRC (set))) { regno = REGNO (SET_SRC (set)); links = LOG_LINKS (insn); @@ -10852,7 +10852,7 @@ static void check_promoted_subreg (rtx insn, rtx x) { if (GET_CODE (x) == SUBREG && SUBREG_PROMOTED_VAR_P (x) - && GET_CODE (SUBREG_REG (x)) == REG) + && REG_P (SUBREG_REG (x))) record_promoted_value (insn, x); else { @@ -10893,7 +10893,7 @@ get_last_value_validate (rtx *loc, rtx insn, int tick, int replace) int len = GET_RTX_LENGTH (GET_CODE (x)); int i; - if (GET_CODE (x) == REG) + if (REG_P (x)) { unsigned int regno = REGNO (x); unsigned int endregno @@ -10997,7 +10997,7 @@ get_last_value (rtx x) && (value = get_last_value (SUBREG_REG (x))) != 0) return gen_lowpart (GET_MODE (x), value); - if (GET_CODE (x) != REG) + if (!REG_P (x)) return 0; regno = REGNO (x); @@ -11108,7 +11108,7 @@ reg_dead_at_p_1 (rtx dest, rtx x, void *data ATTRIBUTE_UNUSED) { unsigned int regno, endregno; - if (GET_CODE (dest) != REG) + if (!REG_P (dest)) return; regno = REGNO (dest); @@ -11505,7 +11505,7 @@ reg_bitfield_target_p (rtx x, rtx body) if (GET_CODE (target) == SUBREG) target = SUBREG_REG (target); - if (GET_CODE (target) != REG) + if (!REG_P (target)) return 0; tregno = REGNO (target), regno = REGNO (x); @@ -11545,7 +11545,7 @@ distribute_notes (rtx notes, rtx from_insn, rtx i3, rtx i2) /* If this NOTE references a pseudo register, ensure it references the latest copy of that register. */ - if (XEXP (note, 0) && GET_CODE (XEXP (note, 0)) == REG + if (XEXP (note, 0) && REG_P (XEXP (note, 0)) && REGNO (XEXP (note, 0)) >= FIRST_PSEUDO_REGISTER) XEXP (note, 0) = regno_reg_rtx[REGNO (XEXP (note, 0))]; @@ -11635,7 +11635,7 @@ distribute_notes (rtx notes, rtx from_insn, rtx i3, rtx i2) if (from_insn != i3) break; - if (! (GET_CODE (XEXP (note, 0)) == REG + if (! (REG_P (XEXP (note, 0)) ? find_regno_note (i3, REG_UNUSED, REGNO (XEXP (note, 0))) : find_reg_note (i3, REG_UNUSED, XEXP (note, 0)))) place = i3; @@ -11644,7 +11644,7 @@ distribute_notes (rtx notes, rtx from_insn, rtx i3, rtx i2) now dies here, so we must put a REG_DEAD note here unless there is one already. */ else if (reg_referenced_p (XEXP (note, 0), PATTERN (i3)) - && ! (GET_CODE (XEXP (note, 0)) == REG + && ! (REG_P (XEXP (note, 0)) ? find_regno_note (i3, REG_DEAD, REGNO (XEXP (note, 0))) : find_reg_note (i3, REG_DEAD, XEXP (note, 0)))) @@ -12068,14 +12068,14 @@ distribute_notes (rtx notes, rtx from_insn, rtx i3, rtx i2) } else if ((REG_NOTE_KIND (note) == REG_DEAD || REG_NOTE_KIND (note) == REG_UNUSED) - && GET_CODE (XEXP (note, 0)) == REG) + && REG_P (XEXP (note, 0))) REG_N_DEATHS (REGNO (XEXP (note, 0)))--; if (place2) { if ((REG_NOTE_KIND (note) == REG_DEAD || REG_NOTE_KIND (note) == REG_UNUSED) - && GET_CODE (XEXP (note, 0)) == REG) + && REG_P (XEXP (note, 0))) REG_N_DEATHS (REGNO (XEXP (note, 0)))++; REG_NOTES (place2) = gen_rtx_fmt_ee (GET_CODE (note), @@ -12189,7 +12189,7 @@ unmentioned_reg_p_1 (rtx *loc, void *expr) rtx x = *loc; if (x != NULL_RTX - && (GET_CODE (x) == REG || GET_CODE (x) == MEM) + && (REG_P (x) || GET_CODE (x) == MEM) && ! reg_mentioned_p (x, (rtx) expr)) return 1; return 0; diff --git a/gcc/conflict.c b/gcc/conflict.c index a23bad3..dd6e2a1 100644 --- a/gcc/conflict.c +++ b/gcc/conflict.c @@ -376,7 +376,7 @@ mark_reg (rtx reg, rtx setter ATTRIBUTE_UNUSED, void *data) reg = SUBREG_REG (reg); /* We're only interested in regs. */ - if (GET_CODE (reg) != REG) + if (!REG_P (reg)) return; SET_REGNO_REG_SET (set, REGNO (reg)); @@ -485,7 +485,7 @@ struct table_elt register (hard registers may require `do_not_record' to be set). */ #define HASH(X, M) \ - ((GET_CODE (X) == REG && REGNO (X) >= FIRST_PSEUDO_REGISTER \ + ((REG_P (X) && REGNO (X) >= FIRST_PSEUDO_REGISTER \ ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \ : canon_hash (X, M)) & HASH_MASK) @@ -510,8 +510,8 @@ struct table_elt || ((N) < FIRST_PSEUDO_REGISTER \ && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS)) -#define COST(X) (GET_CODE (X) == REG ? 0 : notreg_cost (X, SET)) -#define COST_IN(X,OUTER) (GET_CODE (X) == REG ? 0 : notreg_cost (X, OUTER)) +#define COST(X) (REG_P (X) ? 0 : notreg_cost (X, SET)) +#define COST_IN(X,OUTER) (REG_P (X) ? 0 : notreg_cost (X, OUTER)) /* Get the info associated with register N. */ @@ -729,7 +729,7 @@ approx_reg_cost_1 (rtx *xp, void *data) rtx x = *xp; int *cost_p = data; - if (x && GET_CODE (x) == REG) + if (x && REG_P (x)) { unsigned int regno = REGNO (x); @@ -807,7 +807,7 @@ static int notreg_cost (rtx x, enum rtx_code outer) { return ((GET_CODE (x) == SUBREG - && GET_CODE (SUBREG_REG (x)) == REG + && REG_P (SUBREG_REG (x)) && GET_MODE_CLASS (GET_MODE (x)) == MODE_INT && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x))) == MODE_INT && (GET_MODE_SIZE (GET_MODE (x)) @@ -1086,7 +1086,7 @@ mention_regs (rtx x) /* If this is a SUBREG, we don't want to discard other SUBREGs of the same pseudo if they don't use overlapping words. We handle only pseudos here for simplicity. */ - if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG + if (code == SUBREG && REG_P (SUBREG_REG (x)) && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER) { unsigned int i = REGNO (SUBREG_REG (x)); @@ -1122,7 +1122,7 @@ mention_regs (rtx x) if (code == COMPARE || COMPARISON_P (x)) { - if (GET_CODE (XEXP (x, 0)) == REG + if (REG_P (XEXP (x, 0)) && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))) if (insert_regs (XEXP (x, 0), NULL, 0)) { @@ -1130,7 +1130,7 @@ mention_regs (rtx x) changed = 1; } - if (GET_CODE (XEXP (x, 1)) == REG + if (REG_P (XEXP (x, 1)) && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 1)))) if (insert_regs (XEXP (x, 1), NULL, 0)) { @@ -1163,7 +1163,7 @@ mention_regs (rtx x) static int insert_regs (rtx x, struct table_elt *classp, int modified) { - if (GET_CODE (x) == REG) + if (REG_P (x)) { unsigned int regno = REGNO (x); int qty_valid; @@ -1186,7 +1186,7 @@ insert_regs (rtx x, struct table_elt *classp, int modified) for (classp = classp->first_same_value; classp != 0; classp = classp->next_same_value) - if (GET_CODE (classp->exp) == REG + if (REG_P (classp->exp) && GET_MODE (classp->exp) == GET_MODE (x)) { make_regs_eqv (regno, REGNO (classp->exp)); @@ -1219,7 +1219,7 @@ insert_regs (rtx x, struct table_elt *classp, int modified) not be accessible because its hash code will have changed. So assign a quantity number now. */ - else if (GET_CODE (x) == SUBREG && GET_CODE (SUBREG_REG (x)) == REG + else if (GET_CODE (x) == SUBREG && REG_P (SUBREG_REG (x)) && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x)))) { insert_regs (SUBREG_REG (x), NULL, 0); @@ -1326,8 +1326,8 @@ lookup (rtx x, unsigned int hash, enum machine_mode mode) struct table_elt *p; for (p = table[hash]; p; p = p->next_same_hash) - if (mode == p->mode && ((x == p->exp && GET_CODE (x) == REG) - || exp_equiv_p (x, p->exp, GET_CODE (x) != REG, 0))) + if (mode == p->mode && ((x == p->exp && REG_P (x)) + || exp_equiv_p (x, p->exp, !REG_P (x), 0))) return p; return 0; @@ -1341,14 +1341,14 @@ lookup_for_remove (rtx x, unsigned int hash, enum machine_mode mode) { struct table_elt *p; - if (GET_CODE (x) == REG) + if (REG_P (x)) { unsigned int regno = REGNO (x); /* Don't check the machine mode when comparing registers; invalidating (REG:SI 0) also invalidates (REG:DF 0). */ for (p = table[hash]; p; p = p->next_same_hash) - if (GET_CODE (p->exp) == REG + if (REG_P (p->exp) && REGNO (p->exp) == regno) return p; } @@ -1428,11 +1428,11 @@ insert (rtx x, struct table_elt *classp, unsigned int hash, enum machine_mode mo /* If X is a register and we haven't made a quantity for it, something is wrong. */ - if (GET_CODE (x) == REG && ! REGNO_QTY_VALID_P (REGNO (x))) + if (REG_P (x) && ! REGNO_QTY_VALID_P (REGNO (x))) abort (); /* If X is a hard register, show it is being put in the table. */ - if (GET_CODE (x) == REG && REGNO (x) < FIRST_PSEUDO_REGISTER) + if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER) { unsigned int regno = REGNO (x); unsigned int endregno = regno + hard_regno_nregs[regno][GET_MODE (x)]; @@ -1467,7 +1467,7 @@ insert (rtx x, struct table_elt *classp, unsigned int hash, enum machine_mode mo elt->is_const = (CONSTANT_P (x) /* GNU C++ takes advantage of this for `this' (and other const values). */ - || (GET_CODE (x) == REG + || (REG_P (x) && RTX_UNCHANGING_P (x) && REGNO (x) >= FIRST_PSEUDO_REGISTER) || fixed_base_plus_p (x)); @@ -1528,8 +1528,8 @@ insert (rtx x, struct table_elt *classp, unsigned int hash, enum machine_mode mo update the qtys `const_insn' to show that `this_insn' is the latest insn making that quantity equivalent to the constant. */ - if (elt->is_const && classp && GET_CODE (classp->exp) == REG - && GET_CODE (x) != REG) + if (elt->is_const && classp && REG_P (classp->exp) + && !REG_P (x)) { int exp_q = REG_QTY (REGNO (classp->exp)); struct qty_table_elem *exp_ent = &qty_table[exp_q]; @@ -1538,7 +1538,7 @@ insert (rtx x, struct table_elt *classp, unsigned int hash, enum machine_mode mo exp_ent->const_insn = this_insn; } - else if (GET_CODE (x) == REG + else if (REG_P (x) && classp && ! qty_table[REG_QTY (REGNO (x))].const_rtx && ! elt->is_const) @@ -1547,7 +1547,7 @@ insert (rtx x, struct table_elt *classp, unsigned int hash, enum machine_mode mo for (p = classp; p != 0; p = p->next_same_value) { - if (p->is_const && GET_CODE (p->exp) != REG) + if (p->is_const && !REG_P (p->exp)) { int x_q = REG_QTY (REGNO (x)); struct qty_table_elem *x_ent = &qty_table[x_q]; @@ -1560,7 +1560,7 @@ insert (rtx x, struct table_elt *classp, unsigned int hash, enum machine_mode mo } } - else if (GET_CODE (x) == REG + else if (REG_P (x) && qty_table[REG_QTY (REGNO (x))].const_rtx && GET_MODE (x) == qty_table[REG_QTY (REGNO (x))].mode) qty_table[REG_QTY (REGNO (x))].const_insn = this_insn; @@ -1631,12 +1631,12 @@ merge_equiv_classes (struct table_elt *class1, struct table_elt *class2) /* Remove old entry, make a new one in CLASS1's class. Don't do this for invalid entries as we cannot find their hash code (it also isn't necessary). */ - if (GET_CODE (exp) == REG || exp_equiv_p (exp, exp, 1, 0)) + if (REG_P (exp) || exp_equiv_p (exp, exp, 1, 0)) { hash_arg_in_memory = 0; hash = HASH (exp, mode); - if (GET_CODE (exp) == REG) + if (REG_P (exp)) delete_reg_equiv (REGNO (exp)); remove_from_table (elt, hash); @@ -1665,7 +1665,7 @@ flush_hash_table (void) { /* Note that invalidate can remove elements after P in the current hash chain. */ - if (GET_CODE (p->exp) == REG) + if (REG_P (p->exp)) invalidate (p->exp, p->mode); else remove_from_table (p, i); @@ -1769,7 +1769,7 @@ invalidate (rtx x, enum machine_mode full_mode) { next = p->next_same_hash; - if (GET_CODE (p->exp) != REG + if (!REG_P (p->exp) || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER) continue; @@ -1856,7 +1856,7 @@ remove_invalid_refs (unsigned int regno) for (p = table[i]; p; p = next) { next = p->next_same_hash; - if (GET_CODE (p->exp) != REG + if (!REG_P (p->exp) && refers_to_regno_p (regno, regno + 1, p->exp, (rtx *) 0)) remove_from_table (p, i); } @@ -1878,9 +1878,9 @@ remove_invalid_subreg_refs (unsigned int regno, unsigned int offset, rtx exp = p->exp; next = p->next_same_hash; - if (GET_CODE (exp) != REG + if (!REG_P (exp) && (GET_CODE (exp) != SUBREG - || GET_CODE (SUBREG_REG (exp)) != REG + || !REG_P (SUBREG_REG (exp)) || REGNO (SUBREG_REG (exp)) != regno || (((SUBREG_BYTE (exp) + (GET_MODE_SIZE (GET_MODE (exp)) - 1)) >= offset) @@ -1908,7 +1908,7 @@ rehash_using_reg (rtx x) /* If X is not a register or if the register is known not to be in any valid entries in the table, we have no work to do. */ - if (GET_CODE (x) != REG + if (!REG_P (x) || REG_IN_TABLE (REGNO (x)) < 0 || REG_IN_TABLE (REGNO (x)) != REG_TICK (REGNO (x))) return; @@ -1921,7 +1921,7 @@ rehash_using_reg (rtx x) for (p = table[i]; p; p = next) { next = p->next_same_hash; - if (GET_CODE (p->exp) != REG && reg_mentioned_p (x, p->exp) + if (!REG_P (p->exp) && reg_mentioned_p (x, p->exp) && exp_equiv_p (p->exp, p->exp, 1, 0) && i != (hash = safe_hash (p->exp, p->mode) & HASH_MASK)) { @@ -1982,7 +1982,7 @@ invalidate_for_call (void) { next = p->next_same_hash; - if (GET_CODE (p->exp) != REG + if (!REG_P (p->exp) || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER) continue; @@ -2048,7 +2048,7 @@ use_related_value (rtx x, struct table_elt *elt) q = 0; else for (q = p->first_same_value; q; q = q->next_same_value) - if (GET_CODE (q->exp) == REG) + if (REG_P (q->exp)) break; if (q) @@ -2167,7 +2167,7 @@ canon_hash (rtx x, enum machine_mode mode) want to have to forget unrelated subregs when one subreg changes. */ case SUBREG: { - if (GET_CODE (SUBREG_REG (x)) == REG) + if (REG_P (SUBREG_REG (x))) { hash += (((unsigned) SUBREG << 7) + REGNO (SUBREG_REG (x)) @@ -2398,7 +2398,7 @@ exp_equiv_p (rtx x, rtx y, int validate, int equal_values) /* If X is a constant and Y is a register or vice versa, they may be equivalent. We only have to validate if Y is a register. */ - if (CONSTANT_P (x) && GET_CODE (y) == REG + if (CONSTANT_P (x) && REG_P (y) && REGNO_QTY_VALID_P (REGNO (y))) { int y_q = REG_QTY (REGNO (y)); @@ -2575,7 +2575,7 @@ cse_rtx_varies_p (rtx x, int from_alias) mode because if X is equivalent to a constant in some mode, it doesn't vary in any mode. */ - if (GET_CODE (x) == REG + if (REG_P (x) && REGNO_QTY_VALID_P (REGNO (x))) { int x_q = REG_QTY (REGNO (x)); @@ -2588,7 +2588,7 @@ cse_rtx_varies_p (rtx x, int from_alias) if (GET_CODE (x) == PLUS && GET_CODE (XEXP (x, 1)) == CONST_INT - && GET_CODE (XEXP (x, 0)) == REG + && REG_P (XEXP (x, 0)) && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))) { int x0_q = REG_QTY (REGNO (XEXP (x, 0))); @@ -2605,8 +2605,8 @@ cse_rtx_varies_p (rtx x, int from_alias) load fp minus a constant into a register, then a MEM which is the sum of the two `constant' registers. */ if (GET_CODE (x) == PLUS - && GET_CODE (XEXP (x, 0)) == REG - && GET_CODE (XEXP (x, 1)) == REG + && REG_P (XEXP (x, 0)) + && REG_P (XEXP (x, 1)) && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))) && REGNO_QTY_VALID_P (REGNO (XEXP (x, 1)))) { @@ -2701,7 +2701,7 @@ canon_reg (rtx x, rtx insn) /* If replacing pseudo with hard reg or vice versa, ensure the insn remains valid. Likewise if the insn has MATCH_DUPs. */ if (insn != 0 && new != 0 - && GET_CODE (new) == REG && GET_CODE (XEXP (x, i)) == REG + && REG_P (new) && REG_P (XEXP (x, i)) && (((REGNO (new) < FIRST_PSEUDO_REGISTER) != (REGNO (XEXP (x, i)) < FIRST_PSEUDO_REGISTER)) || (insn_code = recog_memoized (insn)) < 0 @@ -2756,12 +2756,12 @@ find_best_addr (rtx insn, rtx *loc, enum machine_mode mode) no easy way to unshare the MEM. In addition, looking up all stack addresses is costly. */ if ((GET_CODE (addr) == PLUS - && GET_CODE (XEXP (addr, 0)) == REG + && REG_P (XEXP (addr, 0)) && GET_CODE (XEXP (addr, 1)) == CONST_INT && (regno = REGNO (XEXP (addr, 0)), regno == FRAME_POINTER_REGNUM || regno == HARD_FRAME_POINTER_REGNUM || regno == ARG_POINTER_REGNUM)) - || (GET_CODE (addr) == REG + || (REG_P (addr) && (regno = REGNO (addr), regno == FRAME_POINTER_REGNUM || regno == HARD_FRAME_POINTER_REGNUM || regno == ARG_POINTER_REGNUM)) @@ -2773,7 +2773,7 @@ find_best_addr (rtx insn, rtx *loc, enum machine_mode mode) sometimes simplify the expression. Many simplifications will not be valid, but some, usually applying the associative rule, will be valid and produce better code. */ - if (GET_CODE (addr) != REG) + if (!REG_P (addr)) { rtx folded = fold_rtx (copy_rtx (addr), NULL_RTX); int addr_folded_cost = address_cost (folded, mode); @@ -2824,7 +2824,7 @@ find_best_addr (rtx insn, rtx *loc, enum machine_mode mode) for (p = elt->first_same_value; p; p = p->next_same_value) if (! p->flag) { - if ((GET_CODE (p->exp) == REG + if ((REG_P (p->exp) || exp_equiv_p (p->exp, p->exp, 1, 0)) && ((exp_cost = address_cost (p->exp, mode)) < best_addr_cost || (exp_cost == best_addr_cost @@ -2860,7 +2860,7 @@ find_best_addr (rtx insn, rtx *loc, enum machine_mode mode) if (flag_expensive_optimizations && ARITHMETIC_P (*loc) - && GET_CODE (XEXP (*loc, 0)) == REG) + && REG_P (XEXP (*loc, 0))) { rtx op1 = XEXP (*loc, 1); @@ -2900,7 +2900,7 @@ find_best_addr (rtx insn, rtx *loc, enum machine_mode mode) p && count < 32; p = p->next_same_value, count++) if (! p->flag - && (GET_CODE (p->exp) == REG + && (REG_P (p->exp) || exp_equiv_p (p->exp, p->exp, 1, 0))) { rtx new = simplify_gen_binary (GET_CODE (*loc), Pmode, @@ -3261,7 +3261,7 @@ fold_rtx (rtx x, rtx insn) return new; } - if (GET_CODE (folded_arg0) == REG + if (REG_P (folded_arg0) && GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (folded_arg0))) { struct table_elt *elt; @@ -3306,7 +3306,7 @@ fold_rtx (rtx x, rtx insn) { rtx op0 = SUBREG_REG (XEXP (elt->exp, 0)); - if (GET_CODE (op0) != REG && ! CONSTANT_P (op0)) + if (!REG_P (op0) && ! CONSTANT_P (op0)) op0 = fold_rtx (op0, NULL_RTX); op0 = equiv_constant (op0); @@ -3331,13 +3331,13 @@ fold_rtx (rtx x, rtx insn) rtx op0 = gen_lowpart_common (mode, XEXP (elt->exp, 0)); rtx op1 = gen_lowpart_common (mode, XEXP (elt->exp, 1)); - if (op0 && GET_CODE (op0) != REG && ! CONSTANT_P (op0)) + if (op0 && !REG_P (op0) && ! CONSTANT_P (op0)) op0 = fold_rtx (op0, NULL_RTX); if (op0) op0 = equiv_constant (op0); - if (op1 && GET_CODE (op1) != REG && ! CONSTANT_P (op1)) + if (op1 && !REG_P (op1) && ! CONSTANT_P (op1)) op1 = fold_rtx (op1, NULL_RTX); if (op1) @@ -3417,7 +3417,7 @@ fold_rtx (rtx x, rtx insn) rtx base = 0; HOST_WIDE_INT offset = 0; - if (GET_CODE (addr) == REG + if (REG_P (addr) && REGNO_QTY_VALID_P (REGNO (addr))) { int addr_q = REG_QTY (REGNO (addr)); @@ -3584,7 +3584,7 @@ fold_rtx (rtx x, rtx insn) struct qty_table_elem *arg_ent = &qty_table[arg_q]; if (arg_ent->const_rtx != NULL_RTX - && GET_CODE (arg_ent->const_rtx) != REG + && !REG_P (arg_ent->const_rtx) && GET_CODE (arg_ent->const_rtx) != PLUS) const_arg = gen_lowpart (GET_MODE (arg), @@ -3828,8 +3828,8 @@ fold_rtx (rtx x, rtx insn) /* See if the two operands are the same. */ if (folded_arg0 == folded_arg1 - || (GET_CODE (folded_arg0) == REG - && GET_CODE (folded_arg1) == REG + || (REG_P (folded_arg0) + && REG_P (folded_arg1) && (REG_QTY (REGNO (folded_arg0)) == REG_QTY (REGNO (folded_arg1)))) || ((p0 = lookup (folded_arg0, @@ -3857,7 +3857,7 @@ fold_rtx (rtx x, rtx insn) /* If FOLDED_ARG0 is a register, see if the comparison we are doing now is either the same as we did before or the reverse (we only check the reverse if not floating-point). */ - else if (GET_CODE (folded_arg0) == REG) + else if (REG_P (folded_arg0)) { int qty = REG_QTY (REGNO (folded_arg0)); @@ -3873,7 +3873,7 @@ fold_rtx (rtx x, rtx insn) || (const_arg1 && rtx_equal_p (ent->comparison_const, const_arg1)) - || (GET_CODE (folded_arg1) == REG + || (REG_P (folded_arg1) && (REG_QTY (REGNO (folded_arg1)) == ent->comparison_qty)))) return (comparison_dominates_p (ent->comparison_code, code) ? true_rtx : false_rtx); @@ -4007,7 +4007,7 @@ fold_rtx (rtx x, rtx insn) manner and hope the Sun compilers get it correct. */ && INTVAL (const_arg1) != ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1)) - && GET_CODE (folded_arg1) == REG) + && REG_P (folded_arg1)) { rtx new_const = GEN_INT (-INTVAL (const_arg1)); struct table_elt *p @@ -4016,7 +4016,7 @@ fold_rtx (rtx x, rtx insn) if (p) for (p = p->first_same_value; p; p = p->next_same_value) - if (GET_CODE (p->exp) == REG) + if (REG_P (p->exp)) return simplify_gen_binary (MINUS, mode, folded_arg0, canon_reg (p->exp, NULL_RTX)); } @@ -4048,7 +4048,7 @@ fold_rtx (rtx x, rtx insn) Note that the similar optimization done by combine.c only works if the intermediate operation's result has only one reference. */ - if (GET_CODE (folded_arg0) == REG + if (REG_P (folded_arg0) && const_arg1 && GET_CODE (const_arg1) == CONST_INT) { int is_shift @@ -4173,7 +4173,7 @@ fold_rtx (rtx x, rtx insn) static rtx equiv_constant (rtx x) { - if (GET_CODE (x) == REG + if (REG_P (x) && REGNO_QTY_VALID_P (REGNO (x))) { int x_q = REG_QTY (REGNO (x)); @@ -4429,11 +4429,11 @@ record_jump_cond (enum rtx_code code, enum machine_mode mode, rtx op0, register, or if OP1 is neither a register or constant, we can't do anything. */ - if (GET_CODE (op1) != REG) + if (!REG_P (op1)) op1 = equiv_constant (op1); if ((reversed_nonequality && FLOAT_MODE_P (mode)) - || GET_CODE (op0) != REG || op1 == 0) + || !REG_P (op0) || op1 == 0) return; /* Put OP0 in the hash table if it isn't already. This gives it a @@ -4460,7 +4460,7 @@ record_jump_cond (enum rtx_code code, enum machine_mode mode, rtx op0, ent = &qty_table[qty]; ent->comparison_code = code; - if (GET_CODE (op1) == REG) + if (REG_P (op1)) { /* Look it up again--in case op0 and op1 are the same. */ op1_elt = lookup (op1, op1_hash, mode); @@ -4662,7 +4662,7 @@ cse_insn (rtx insn, rtx libcall_insn) { rtx clobbered = XEXP (y, 0); - if (GET_CODE (clobbered) == REG + if (REG_P (clobbered) || GET_CODE (clobbered) == SUBREG) invalidate (clobbered, VOIDmode); else if (GET_CODE (clobbered) == STRICT_LOW_PART @@ -4700,7 +4700,7 @@ cse_insn (rtx insn, rtx libcall_insn) canon_reg (XEXP (y, 0), NULL_RTX); } else if (GET_CODE (y) == USE - && ! (GET_CODE (XEXP (y, 0)) == REG + && ! (REG_P (XEXP (y, 0)) && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER)) canon_reg (y, NULL_RTX); else if (GET_CODE (y) == CALL) @@ -4721,7 +4721,7 @@ cse_insn (rtx insn, rtx libcall_insn) /* Canonicalize a USE of a pseudo register or memory location. */ else if (GET_CODE (x) == USE - && ! (GET_CODE (XEXP (x, 0)) == REG + && ! (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)) canon_reg (XEXP (x, 0), NULL_RTX); else if (GET_CODE (x) == CALL) @@ -4763,7 +4763,7 @@ cse_insn (rtx insn, rtx libcall_insn) int insn_code; sets[i].orig_src = src; - if ((GET_CODE (new) == REG && GET_CODE (src) == REG + if ((REG_P (new) && REG_P (src) && ((REGNO (new) < FIRST_PSEUDO_REGISTER) != (REGNO (src) < FIRST_PSEUDO_REGISTER))) || (insn_code = recog_memoized (insn)) < 0 @@ -4914,7 +4914,7 @@ cse_insn (rtx insn, rtx libcall_insn) if (GET_CODE (src) == MEM && find_reg_note (insn, REG_EQUIV, NULL_RTX) != 0 - && GET_CODE (dest) == REG + && REG_P (dest) && REGNO (dest) >= FIRST_PSEUDO_REGISTER) sets[i].src_volatile = 1; @@ -5065,7 +5065,7 @@ cse_insn (rtx insn, rtx libcall_insn) for (const_elt = const_elt->first_same_value; const_elt; const_elt = const_elt->next_same_value) - if (GET_CODE (const_elt->exp) == REG) + if (REG_P (const_elt->exp)) { src_related = gen_lowpart (mode, const_elt->exp); @@ -5104,7 +5104,7 @@ cse_insn (rtx insn, rtx libcall_insn) for (larger_elt = larger_elt->first_same_value; larger_elt; larger_elt = larger_elt->next_same_value) - if (GET_CODE (larger_elt->exp) == REG) + if (REG_P (larger_elt->exp)) { src_related = gen_lowpart (mode, larger_elt->exp); @@ -5150,7 +5150,7 @@ cse_insn (rtx insn, rtx libcall_insn) for (larger_elt = larger_elt->first_same_value; larger_elt; larger_elt = larger_elt->next_same_value) - if (GET_CODE (larger_elt->exp) == REG) + if (REG_P (larger_elt->exp)) { src_related = gen_lowpart (mode, larger_elt->exp); @@ -5282,7 +5282,7 @@ cse_insn (rtx insn, rtx libcall_insn) rtx trial; /* Skip invalid entries. */ - while (elt && GET_CODE (elt->exp) != REG + while (elt && !REG_P (elt->exp) && ! exp_equiv_p (elt->exp, elt->exp, 1, 0)) elt = elt->next_same_value; @@ -5385,7 +5385,7 @@ cse_insn (rtx insn, rtx libcall_insn) need to make the same substitution in any notes attached to the RETVAL insn. */ if (libcall_insn - && (GET_CODE (sets[i].orig_src) == REG + && (REG_P (sets[i].orig_src) || GET_CODE (sets[i].orig_src) == SUBREG || GET_CODE (sets[i].orig_src) == MEM)) { @@ -5442,7 +5442,7 @@ cse_insn (rtx insn, rtx libcall_insn) with the head of the class. If we do not do this, we will have both registers live over a portion of the basic block. This way, their lifetimes will likely abut instead of overlapping. */ - if (GET_CODE (dest) == REG + if (REG_P (dest) && REGNO_QTY_VALID_P (REGNO (dest))) { int dest_q = REG_QTY (REGNO (dest)); @@ -5450,12 +5450,12 @@ cse_insn (rtx insn, rtx libcall_insn) if (dest_ent->mode == GET_MODE (dest) && dest_ent->first_reg != REGNO (dest) - && GET_CODE (src) == REG && REGNO (src) == REGNO (dest) + && REG_P (src) && REGNO (src) == REGNO (dest) /* Don't do this if the original insn had a hard reg as SET_SRC or SET_DEST. */ - && (GET_CODE (sets[i].src) != REG + && (!REG_P (sets[i].src) || REGNO (sets[i].src) >= FIRST_PSEUDO_REGISTER) - && (GET_CODE (dest) != REG || REGNO (dest) >= FIRST_PSEUDO_REGISTER)) + && (!REG_P (dest) || REGNO (dest) >= FIRST_PSEUDO_REGISTER)) /* We can't call canon_reg here because it won't do anything if SRC is a hard register. */ { @@ -5506,8 +5506,8 @@ cse_insn (rtx insn, rtx libcall_insn) which can be created for a reference to a compile time computable entry in a jump table. */ - if (n_sets == 1 && src_const && GET_CODE (dest) == REG - && GET_CODE (src_const) != REG + if (n_sets == 1 && src_const && REG_P (dest) + && !REG_P (src_const) && ! (GET_CODE (src_const) == CONST && GET_CODE (XEXP (src_const, 0)) == MINUS && GET_CODE (XEXP (XEXP (src_const, 0), 0)) == LABEL_REF @@ -5652,7 +5652,7 @@ cse_insn (rtx insn, rtx libcall_insn) else if (do_not_record) { - if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG) + if (REG_P (dest) || GET_CODE (dest) == SUBREG) invalidate (dest, VOIDmode); else if (GET_CODE (dest) == MEM) { @@ -5825,7 +5825,7 @@ cse_insn (rtx insn, rtx libcall_insn) previous quantity's chain. Needed for memory if this is a nonvarying address, unless we have just done an invalidate_memory that covers even those. */ - if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG) + if (REG_P (dest) || GET_CODE (dest) == SUBREG) invalidate (dest, VOIDmode); else if (GET_CODE (dest) == MEM) { @@ -5859,7 +5859,7 @@ cse_insn (rtx insn, rtx libcall_insn) { rtx x = SET_DEST (sets[i].rtl); - if (GET_CODE (x) != REG) + if (!REG_P (x)) mention_regs (x); else { @@ -5959,7 +5959,7 @@ cse_insn (rtx insn, rtx libcall_insn) if (GET_CODE (dest) == STRICT_LOW_PART) dest = SUBREG_REG (XEXP (dest, 0)); - if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG) + if (REG_P (dest) || GET_CODE (dest) == SUBREG) /* Registers must also be inserted into chains for quantities. */ if (insert_regs (dest, sets[i].src_elt, 1)) { @@ -6021,7 +6021,7 @@ cse_insn (rtx insn, rtx libcall_insn) int byte = 0; /* Ignore invalid entries. */ - if (GET_CODE (elt->exp) != REG + if (!REG_P (elt->exp) && ! exp_equiv_p (elt->exp, elt->exp, 1, 0)) continue; @@ -6074,7 +6074,7 @@ cse_insn (rtx insn, rtx libcall_insn) classp = src_elt->first_same_value; /* Ignore invalid entries. */ while (classp - && GET_CODE (classp->exp) != REG + && !REG_P (classp->exp) && ! exp_equiv_p (classp->exp, classp->exp, 1, 0)) classp = classp->next_same_value; } @@ -6098,9 +6098,9 @@ cse_insn (rtx insn, rtx libcall_insn) register to be set in the middle of a libcall, and we then get bad code if the libcall is deleted. */ - if (n_sets == 1 && sets[0].rtl && GET_CODE (SET_DEST (sets[0].rtl)) == REG + if (n_sets == 1 && sets[0].rtl && REG_P (SET_DEST (sets[0].rtl)) && NEXT_INSN (PREV_INSN (insn)) == insn - && GET_CODE (SET_SRC (sets[0].rtl)) == REG + && REG_P (SET_SRC (sets[0].rtl)) && REGNO (SET_SRC (sets[0].rtl)) >= FIRST_PSEUDO_REGISTER && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets[0].rtl)))) { @@ -6208,7 +6208,7 @@ static int addr_affects_sp_p (rtx addr) { if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC - && GET_CODE (XEXP (addr, 0)) == REG + && REG_P (XEXP (addr, 0)) && REGNO (XEXP (addr, 0)) == STACK_POINTER_REGNUM) { if (REG_TICK (STACK_POINTER_REGNUM) >= 0) @@ -6243,7 +6243,7 @@ invalidate_from_clobbers (rtx x) rtx ref = XEXP (x, 0); if (ref) { - if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG + if (REG_P (ref) || GET_CODE (ref) == SUBREG || GET_CODE (ref) == MEM) invalidate (ref, VOIDmode); else if (GET_CODE (ref) == STRICT_LOW_PART @@ -6260,7 +6260,7 @@ invalidate_from_clobbers (rtx x) if (GET_CODE (y) == CLOBBER) { rtx ref = XEXP (y, 0); - if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG + if (REG_P (ref) || GET_CODE (ref) == SUBREG || GET_CODE (ref) == MEM) invalidate (ref, VOIDmode); else if (GET_CODE (ref) == STRICT_LOW_PART @@ -6335,7 +6335,7 @@ cse_process_notes (rtx x, rtx object) if (ent->const_rtx != NULL_RTX && (CONSTANT_P (ent->const_rtx) - || GET_CODE (ent->const_rtx) == REG)) + || REG_P (ent->const_rtx))) { rtx new = gen_lowpart (GET_MODE (x), ent->const_rtx); if (new) @@ -6399,9 +6399,9 @@ cse_around_loop (rtx loop_start) for (p = last_jump_equiv_class->first_same_value; p; p = p->next_same_value) { - if (GET_CODE (p->exp) == MEM || GET_CODE (p->exp) == REG + if (MEM_P (p->exp) || REG_P (p->exp) || (GET_CODE (p->exp) == SUBREG - && GET_CODE (SUBREG_REG (p->exp)) == REG)) + && REG_P (SUBREG_REG (p->exp)))) invalidate (p->exp, VOIDmode); else if (GET_CODE (p->exp) == STRICT_LOW_PART || GET_CODE (p->exp) == ZERO_EXTRACT) @@ -6544,7 +6544,7 @@ cse_set_around_loop (rtx x, rtx insn, rtx loop_start) are setting PC or CC0 or whose SET_SRC is already a register. */ if (GET_CODE (x) == SET && GET_CODE (SET_DEST (x)) != PC && GET_CODE (SET_DEST (x)) != CC0 - && GET_CODE (SET_SRC (x)) != REG) + && !REG_P (SET_SRC (x))) { src_elt = lookup (SET_SRC (x), HASH (SET_SRC (x), GET_MODE (SET_DEST (x))), @@ -6553,7 +6553,7 @@ cse_set_around_loop (rtx x, rtx insn, rtx loop_start) if (src_elt) for (src_elt = src_elt->first_same_value; src_elt; src_elt = src_elt->next_same_value) - if (GET_CODE (src_elt->exp) == REG && REG_LOOP_TEST_P (src_elt->exp) + if (REG_P (src_elt->exp) && REG_LOOP_TEST_P (src_elt->exp) && COST (src_elt->exp) < COST (SET_SRC (x))) { rtx p, set; @@ -6567,7 +6567,7 @@ cse_set_around_loop (rtx x, rtx insn, rtx loop_start) && GET_CODE (p) != CODE_LABEL; p = prev_nonnote_insn (p)) if ((set = single_set (p)) != 0 - && GET_CODE (SET_DEST (set)) == REG + && REG_P (SET_DEST (set)) && GET_MODE (SET_DEST (set)) == src_elt->mode && rtx_equal_p (SET_SRC (set), SET_SRC (x))) { @@ -6632,7 +6632,7 @@ cse_set_around_loop (rtx x, rtx insn, rtx loop_start) /* See comment on similar code in cse_insn for explanation of these tests. */ - if (GET_CODE (SET_DEST (x)) == REG || GET_CODE (SET_DEST (x)) == SUBREG + if (REG_P (SET_DEST (x)) || GET_CODE (SET_DEST (x)) == SUBREG || GET_CODE (SET_DEST (x)) == MEM) invalidate (SET_DEST (x), VOIDmode); else if (GET_CODE (SET_DEST (x)) == STRICT_LOW_PART @@ -7305,7 +7305,7 @@ count_reg_usage (rtx x, int *counts, int incr) case SET: /* Unless we are setting a REG, count everything in SET_DEST. */ - if (GET_CODE (SET_DEST (x)) != REG) + if (!REG_P (SET_DEST (x))) count_reg_usage (SET_DEST (x), counts, incr); count_reg_usage (SET_SRC (x), counts, incr); return; @@ -7395,7 +7395,7 @@ set_live_p (rtx set, rtx insn ATTRIBUTE_UNUSED, /* Only used with HAVE_cc0. */ || !reg_referenced_p (cc0_rtx, PATTERN (tem)))) return false; #endif - else if (GET_CODE (SET_DEST (set)) != REG + else if (!REG_P (SET_DEST (set)) || REGNO (SET_DEST (set)) < FIRST_PSEUDO_REGISTER || counts[REGNO (SET_DEST (set))] != 0 || side_effects_p (SET_SRC (set)) @@ -7587,7 +7587,7 @@ cse_change_cc_mode (rtx *loc, void *data) rtx newreg = (rtx) data; if (*loc - && GET_CODE (*loc) == REG + && REG_P (*loc) && REGNO (*loc) == REGNO (newreg) && GET_MODE (*loc) != GET_MODE (newreg)) { @@ -7683,7 +7683,7 @@ cse_cc_succs (basic_block bb, rtx cc_reg, rtx cc_src, bool can_change_mode) /* Check whether INSN sets CC_REG to CC_SRC. */ set = single_set (insn); if (set - && GET_CODE (SET_DEST (set)) == REG + && REG_P (SET_DEST (set)) && REGNO (SET_DEST (set)) == REGNO (cc_reg)) { bool found; @@ -7873,7 +7873,7 @@ cse_condition_code_reg (void) continue; set = single_set (insn); if (set - && GET_CODE (SET_DEST (set)) == REG + && REG_P (SET_DEST (set)) && REGNO (SET_DEST (set)) == REGNO (cc_reg)) { cc_src_insn = insn; diff --git a/gcc/cselib.c b/gcc/cselib.c index a5f9cfe..ef50cce 100644 --- a/gcc/cselib.c +++ b/gcc/cselib.c @@ -382,7 +382,7 @@ remove_useless_values (void) enum machine_mode cselib_reg_set_mode (rtx x) { - if (GET_CODE (x) != REG) + if (!REG_P (x)) return GET_MODE (x); if (REG_VALUES (REGNO (x)) == NULL @@ -402,7 +402,7 @@ rtx_equal_for_cselib_p (rtx x, rtx y) const char *fmt; int i; - if (GET_CODE (x) == REG || GET_CODE (x) == MEM) + if (REG_P (x) || MEM_P (x)) { cselib_val *e = cselib_lookup (x, GET_MODE (x), 0); @@ -410,7 +410,7 @@ rtx_equal_for_cselib_p (rtx x, rtx y) x = e->u.val_rtx; } - if (GET_CODE (y) == REG || GET_CODE (y) == MEM) + if (REG_P (y) || MEM_P (y)) { cselib_val *e = cselib_lookup (y, GET_MODE (y), 0); @@ -434,7 +434,7 @@ rtx_equal_for_cselib_p (rtx x, rtx y) rtx t = l->loc; /* Avoid infinite recursion. */ - if (GET_CODE (t) == REG || GET_CODE (t) == MEM) + if (REG_P (t) || GET_CODE (t) == MEM) continue; else if (rtx_equal_for_cselib_p (t, y)) return 1; @@ -452,7 +452,7 @@ rtx_equal_for_cselib_p (rtx x, rtx y) { rtx t = l->loc; - if (GET_CODE (t) == REG || GET_CODE (t) == MEM) + if (REG_P (t) || GET_CODE (t) == MEM) continue; else if (rtx_equal_for_cselib_p (x, t)) return 1; @@ -884,7 +884,7 @@ cselib_lookup (rtx x, enum machine_mode mode, int create) if (GET_CODE (x) == VALUE) return CSELIB_VAL_PTR (x); - if (GET_CODE (x) == REG) + if (REG_P (x)) { struct elt_list *l; unsigned int i = REGNO (x); @@ -1030,7 +1030,7 @@ cselib_invalidate_regno (unsigned int regno, enum machine_mode mode) { rtx x = (*p)->loc; - if (GET_CODE (x) == REG && REGNO (x) == i) + if (REG_P (x) && REGNO (x) == i) { unchain_one_elt_loc_list (p); break; @@ -1146,7 +1146,7 @@ cselib_invalidate_rtx (rtx dest, rtx ignore ATTRIBUTE_UNUSED, || GET_CODE (dest) == ZERO_EXTRACT || GET_CODE (dest) == SUBREG) dest = XEXP (dest, 0); - if (GET_CODE (dest) == REG) + if (REG_P (dest)) cselib_invalidate_regno (REGNO (dest), GET_MODE (dest)); else if (GET_CODE (dest) == MEM) cselib_invalidate_mem (dest); @@ -1166,7 +1166,7 @@ cselib_invalidate_rtx (rtx dest, rtx ignore ATTRIBUTE_UNUSED, static void cselib_record_set (rtx dest, cselib_val *src_elt, cselib_val *dest_addr_elt) { - int dreg = GET_CODE (dest) == REG ? (int) REGNO (dest) : -1; + int dreg = REG_P (dest) ? (int) REGNO (dest) : -1; if (src_elt == 0 || side_effects_p (dest)) return; @@ -1274,7 +1274,7 @@ cselib_record_sets (rtx insn) sets[i].dest = dest = XEXP (dest, 0); /* We don't know how to record anything but REG or MEM. */ - if (GET_CODE (dest) == REG + if (REG_P (dest) || (GET_CODE (dest) == MEM && cselib_record_memory)) { rtx src = sets[i].src; @@ -1303,7 +1303,7 @@ cselib_record_sets (rtx insn) for (i = 0; i < n_sets; i++) { rtx dest = sets[i].dest; - if (GET_CODE (dest) == REG || GET_CODE (dest) == MEM) + if (REG_P (dest) || GET_CODE (dest) == MEM) { int j; for (j = i + 1; j < n_sets; j++) @@ -1320,7 +1320,7 @@ cselib_record_sets (rtx insn) for (i = 0; i < n_sets; i++) { rtx dest = sets[i].dest; - if (GET_CODE (dest) == REG + if (REG_P (dest) || (GET_CODE (dest) == MEM && cselib_record_memory)) cselib_record_set (dest, sets[i].src_elt, sets[i].dest_addr_elt); } diff --git a/gcc/dbxout.c b/gcc/dbxout.c index 9e3ffb4e..80dad25 100644 --- a/gcc/dbxout.c +++ b/gcc/dbxout.c @@ -2446,14 +2446,14 @@ dbxout_symbol_location (tree decl, tree type, const char *suffix, rtx home) while (GET_CODE (value) == SUBREG) value = SUBREG_REG (value); - if (GET_CODE (value) == REG) + if (REG_P (value)) { if (REGNO (value) >= FIRST_PSEUDO_REGISTER) return 0; } home = alter_subreg (&home); } - if (GET_CODE (home) == REG) + if (REG_P (home)) { regno = REGNO (home); if (regno >= FIRST_PSEUDO_REGISTER) @@ -2548,7 +2548,7 @@ dbxout_symbol_location (tree decl, tree type, const char *suffix, rtx home) } else if (GET_CODE (home) == MEM && (GET_CODE (XEXP (home, 0)) == MEM - || (GET_CODE (XEXP (home, 0)) == REG + || (REG_P (XEXP (home, 0)) && REGNO (XEXP (home, 0)) != HARD_FRAME_POINTER_REGNUM && REGNO (XEXP (home, 0)) != STACK_POINTER_REGNUM #if ARG_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM @@ -2562,7 +2562,7 @@ dbxout_symbol_location (tree decl, tree type, const char *suffix, rtx home) so all we can do is output the variable as a pointer. If it's not a parameter, ignore it. */ { - if (GET_CODE (XEXP (home, 0)) == REG) + if (REG_P (XEXP (home, 0))) { letter = 'r'; current_sym_code = N_RSYM; @@ -2587,7 +2587,7 @@ dbxout_symbol_location (tree decl, tree type, const char *suffix, rtx home) TREE_TYPE (type) = TREE_TYPE (decl); } else if (GET_CODE (home) == MEM - && GET_CODE (XEXP (home, 0)) == REG) + && REG_P (XEXP (home, 0))) { current_sym_code = N_LSYM; current_sym_value = DEBUGGER_AUTO_OFFSET (XEXP (home, 0)); @@ -2842,7 +2842,7 @@ dbxout_parms (tree parms) current_sym_value = DEBUGGER_ARG_OFFSET (current_sym_value, addr); dbxout_finish_symbol (parms); } - else if (GET_CODE (DECL_RTL (parms)) == REG) + else if (REG_P (DECL_RTL (parms))) { rtx best_rtl; char regparm_letter; @@ -2893,7 +2893,7 @@ dbxout_parms (tree parms) dbxout_finish_symbol (parms); } else if (GET_CODE (DECL_RTL (parms)) == MEM - && GET_CODE (XEXP (DECL_RTL (parms), 0)) == REG + && REG_P (XEXP (DECL_RTL (parms), 0)) && REGNO (XEXP (DECL_RTL (parms), 0)) != HARD_FRAME_POINTER_REGNUM && REGNO (XEXP (DECL_RTL (parms), 0)) != STACK_POINTER_REGNUM #if ARG_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM @@ -2956,7 +2956,7 @@ dbxout_parms (tree parms) const char *const decl_name = (DECL_NAME (parms) ? IDENTIFIER_POINTER (DECL_NAME (parms)) : "(anon)"); - if (GET_CODE (XEXP (XEXP (DECL_RTL (parms), 0), 0)) == REG) + if (REG_P (XEXP (XEXP (DECL_RTL (parms), 0), 0))) current_sym_value = 0; else current_sym_value @@ -2987,7 +2987,7 @@ dbxout_parms (tree parms) in which case we want the value of that CONST_INT, or (MEM (REG ...)), in which case we use a value of zero. */ - if (GET_CODE (XEXP (DECL_RTL (parms), 0)) == REG) + if (REG_P (XEXP (DECL_RTL (parms), 0))) current_sym_value = 0; else current_sym_value @@ -3056,7 +3056,7 @@ dbxout_reg_parms (tree parms) /* Report parms that live in registers during the function but were passed in memory. */ - if (GET_CODE (DECL_RTL (parms)) == REG + if (REG_P (DECL_RTL (parms)) && REGNO (DECL_RTL (parms)) < FIRST_PSEUDO_REGISTER) dbxout_symbol_location (parms, TREE_TYPE (parms), 0, DECL_RTL (parms)); @@ -821,7 +821,7 @@ df_ref_record (struct df *df, rtx reg, rtx *loc, rtx insn, { unsigned int regno; - if (GET_CODE (reg) != REG && GET_CODE (reg) != SUBREG) + if (!REG_P (reg) && GET_CODE (reg) != SUBREG) abort (); /* For the reg allocator we are interested in some SUBREG rtx's, but not @@ -937,8 +937,8 @@ df_def_record_1 (struct df *df, rtx x, basic_block bb, rtx insn) flags |= DF_REF_READ_WRITE; } - if (GET_CODE (dst) == REG - || (GET_CODE (dst) == SUBREG && GET_CODE (SUBREG_REG (dst)) == REG)) + if (REG_P (dst) + || (GET_CODE (dst) == SUBREG && REG_P (SUBREG_REG (dst)))) df_ref_record (df, dst, loc, insn, DF_REF_REG_DEF, flags); } @@ -1013,7 +1013,7 @@ df_uses_record (struct df *df, rtx *loc, enum df_ref_type ref_type, /* While we're here, optimize this case. */ /* In case the SUBREG is not of a REG, do not optimize. */ - if (GET_CODE (SUBREG_REG (x)) != REG) + if (!REG_P (SUBREG_REG (x))) { loc = &SUBREG_REG (x); df_uses_record (df, loc, ref_type, bb, insn, flags); diff --git a/gcc/dojump.c b/gcc/dojump.c index 1c8aa7c..e4bb6dd 100644 --- a/gcc/dojump.c +++ b/gcc/dojump.c @@ -648,7 +648,7 @@ do_jump (tree exp, rtx if_false_label, rtx if_true_label) { /* Compare promoted variables in their promoted mode. */ if (SUBREG_PROMOTED_VAR_P (temp) - && GET_CODE (XEXP (temp, 0)) == REG) + && REG_P (XEXP (temp, 0))) temp = XEXP (temp, 0); else temp = copy_to_reg (temp); diff --git a/gcc/dwarf2out.c b/gcc/dwarf2out.c index 0ad017b..93afca7 100644 --- a/gcc/dwarf2out.c +++ b/gcc/dwarf2out.c @@ -1454,7 +1454,7 @@ dwarf2out_frame_debug_expr (rtx expr, const char *label) if (! frame_pointer_needed) abort (); - if (GET_CODE (XEXP (src, 0)) == REG + if (REG_P (XEXP (src, 0)) && (unsigned) REGNO (XEXP (src, 0)) == cfa.reg && GET_CODE (XEXP (src, 1)) == CONST_INT) { @@ -1473,7 +1473,7 @@ dwarf2out_frame_debug_expr (rtx expr, const char *label) abort (); /* Rule 4 */ - if (GET_CODE (XEXP (src, 0)) == REG + if (REG_P (XEXP (src, 0)) && REGNO (XEXP (src, 0)) == cfa.reg && GET_CODE (XEXP (src, 1)) == CONST_INT) { @@ -1488,7 +1488,7 @@ dwarf2out_frame_debug_expr (rtx expr, const char *label) } /* Rule 5 */ - else if (GET_CODE (XEXP (src, 0)) == REG + else if (REG_P (XEXP (src, 0)) && REGNO (XEXP (src, 0)) == cfa_temp.reg && XEXP (src, 1) == stack_pointer_rtx) { @@ -1520,7 +1520,7 @@ dwarf2out_frame_debug_expr (rtx expr, const char *label) /* Rule 7 */ case IOR: - if (GET_CODE (XEXP (src, 0)) != REG + if (!REG_P (XEXP (src, 0)) || (unsigned) REGNO (XEXP (src, 0)) != cfa_temp.reg || GET_CODE (XEXP (src, 1)) != CONST_INT) abort (); @@ -1544,7 +1544,7 @@ dwarf2out_frame_debug_expr (rtx expr, const char *label) break; case MEM: - if (GET_CODE (src) != REG) + if (!REG_P (src)) abort (); /* Saving a register to the stack. Make sure dest is relative to the @@ -1651,9 +1651,9 @@ dwarf2out_frame_debug_expr (rtx expr, const char *label) calculate the CFA. */ rtx x = XEXP (dest, 0); - if (GET_CODE (x) != REG) + if (!REG_P (x)) x = XEXP (x, 0); - if (GET_CODE (x) != REG) + if (!REG_P (x)) abort (); cfa.reg = REGNO (x); @@ -4012,7 +4012,7 @@ dwarf2out_set_demangle_name_func (const char *(*func) (const char *)) static inline int is_pseudo_reg (rtx rtl) { - return ((GET_CODE (rtl) == REG && REGNO (rtl) >= FIRST_PSEUDO_REGISTER) + return ((REG_P (rtl) && REGNO (rtl) >= FIRST_PSEUDO_REGISTER) || (GET_CODE (rtl) == SUBREG && REGNO (SUBREG_REG (rtl)) >= FIRST_PSEUDO_REGISTER)); } @@ -8413,7 +8413,7 @@ static inline int is_based_loc (rtx rtl) { return (GET_CODE (rtl) == PLUS - && ((GET_CODE (XEXP (rtl, 0)) == REG + && ((REG_P (XEXP (rtl, 0)) && REGNO (XEXP (rtl, 0)) < FIRST_PSEUDO_REGISTER && GET_CODE (XEXP (rtl, 1)) == CONST_INT))); } @@ -9715,7 +9715,7 @@ rtl_for_decl_location (tree decl) && (CONSTANT_P (rtl) || (GET_CODE (rtl) == MEM && CONSTANT_P (XEXP (rtl, 0))) - || (GET_CODE (rtl) == REG + || (REG_P (rtl) && TREE_CODE (decl) == VAR_DECL && TREE_STATIC (decl)))) { @@ -9756,7 +9756,7 @@ rtl_for_decl_location (tree decl) /* Not passed in memory. */ && GET_CODE (DECL_INCOMING_RTL (decl)) != MEM /* Not passed by invisible reference. */ - && (GET_CODE (XEXP (rtl, 0)) != REG + && (!REG_P (XEXP (rtl, 0)) || REGNO (XEXP (rtl, 0)) == HARD_FRAME_POINTER_REGNUM || REGNO (XEXP (rtl, 0)) == STACK_POINTER_REGNUM #if ARG_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM diff --git a/gcc/emit-rtl.c b/gcc/emit-rtl.c index c3503ee..1a6667a 100644 --- a/gcc/emit-rtl.c +++ b/gcc/emit-rtl.c @@ -857,7 +857,7 @@ set_reg_attrs_from_mem (rtx reg, rtx mem) void set_reg_attrs_for_parm (rtx parm_rtx, rtx mem) { - if (GET_CODE (parm_rtx) == REG) + if (REG_P (parm_rtx)) set_reg_attrs_from_mem (parm_rtx, mem); else if (GET_CODE (parm_rtx) == PARALLEL) { @@ -867,7 +867,7 @@ set_reg_attrs_for_parm (rtx parm_rtx, rtx mem) for (; i < XVECLEN (parm_rtx, 0); i++) { rtx x = XVECEXP (parm_rtx, 0, i); - if (GET_CODE (XEXP (x, 0)) == REG) + if (REG_P (XEXP (x, 0))) REG_ATTRS (XEXP (x, 0)) = get_reg_attrs (MEM_EXPR (mem), INTVAL (XEXP (x, 1))); @@ -884,7 +884,7 @@ set_decl_rtl (tree t, rtx x) if (!x) return; /* For register, we maintain the reverse information too. */ - if (GET_CODE (x) == REG) + if (REG_P (x)) REG_ATTRS (x) = get_reg_attrs (t, 0); else if (GET_CODE (x) == SUBREG) REG_ATTRS (SUBREG_REG (x)) @@ -918,7 +918,7 @@ set_decl_incoming_rtl (tree t, rtx x) if (!x) return; /* For register, we maintain the reverse information too. */ - if (GET_CODE (x) == REG) + if (REG_P (x)) REG_ATTRS (x) = get_reg_attrs (t, 0); else if (GET_CODE (x) == SUBREG) REG_ATTRS (SUBREG_REG (x)) @@ -961,7 +961,7 @@ mark_user_reg (rtx reg) REG_USERVAR_P (XEXP (reg, 0)) = 1; REG_USERVAR_P (XEXP (reg, 1)) = 1; } - else if (GET_CODE (reg) == REG) + else if (REG_P (reg)) REG_USERVAR_P (reg) = 1; else abort (); @@ -1034,7 +1034,7 @@ subreg_hard_regno (rtx x, int check_mode) /* This is where we attempt to catch illegal subregs created by the compiler. */ if (GET_CODE (x) != SUBREG - || GET_CODE (reg) != REG) + || !REG_P (reg)) abort (); base_regno = REGNO (reg); if (base_regno >= FIRST_PSEUDO_REGISTER) @@ -1121,7 +1121,7 @@ gen_lowpart_common (enum machine_mode mode, rtx x) else if (msize < xsize) return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0)); } - else if (GET_CODE (x) == SUBREG || GET_CODE (x) == REG + else if (GET_CODE (x) == SUBREG || REG_P (x) || GET_CODE (x) == CONCAT || GET_CODE (x) == CONST_VECTOR || GET_CODE (x) == CONST_DOUBLE || GET_CODE (x) == CONST_INT) return simplify_gen_subreg (mode, x, innermode, offset); @@ -1387,7 +1387,7 @@ operand_subword_force (rtx op, unsigned int offset, enum machine_mode mode) { /* If this is a register which can not be accessed by words, copy it to a pseudo register. */ - if (GET_CODE (op) == REG) + if (REG_P (op)) op = copy_to_reg (op); else op = force_reg (mode, op); @@ -2784,9 +2784,9 @@ make_safe_from (rtx x, rtx other) done: if ((GET_CODE (other) == MEM && ! CONSTANT_P (x) - && GET_CODE (x) != REG + && !REG_P (x) && GET_CODE (x) != SUBREG) - || (GET_CODE (other) == REG + || (REG_P (other) && (REGNO (other) < FIRST_PSEUDO_REGISTER || reg_mentioned_p (other, x)))) { diff --git a/gcc/explow.c b/gcc/explow.c index 155404d..af67003 100644 --- a/gcc/explow.c +++ b/gcc/explow.c @@ -405,7 +405,7 @@ convert_memory_address (enum machine_mode to_mode ATTRIBUTE_UNUSED, rtx copy_all_regs (rtx x) { - if (GET_CODE (x) == REG) + if (REG_P (x)) { if (REGNO (x) != FRAME_POINTER_REGNUM #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM @@ -451,7 +451,7 @@ memory_address (enum machine_mode mode, rtx x) On attempting to put this in an insn we will call protect_from_queue which will turn it into a REG, which is valid. */ else if (GET_CODE (x) == QUEUED - && GET_CODE (QUEUED_VAR (x)) == REG) + && REG_P (QUEUED_VAR (x))) ; /* We get better cse by rejecting indirect addressing at this stage. @@ -460,7 +460,7 @@ memory_address (enum machine_mode mode, rtx x) are visible. But not if cse won't be done! */ else { - if (! cse_not_expected && GET_CODE (x) != REG) + if (! cse_not_expected && !REG_P (x)) x = break_out_memory_refs (x); /* At this point, any valid address is accepted. */ @@ -508,7 +508,7 @@ memory_address (enum machine_mode mode, rtx x) /* If we have a register that's an invalid address, it must be a hard reg of the wrong class. Copy it to a pseudo. */ - else if (GET_CODE (x) == REG) + else if (REG_P (x)) x = copy_to_reg (x); /* Last resort: copy the value to a register, since @@ -521,7 +521,7 @@ memory_address (enum machine_mode mode, rtx x) win2: x = oldx; win: - if (flag_force_addr && ! cse_not_expected && GET_CODE (x) != REG + if (flag_force_addr && ! cse_not_expected && !REG_P (x) /* Don't copy an addr via a reg if it is one of our stack slots. */ && ! (GET_CODE (x) == PLUS && (XEXP (x, 0) == virtual_stack_vars_rtx @@ -540,10 +540,10 @@ memory_address (enum machine_mode mode, rtx x) a reg as a pointer if we have REG or REG + CONST_INT. */ if (oldx == x) return x; - else if (GET_CODE (x) == REG) + else if (REG_P (x)) mark_reg_pointer (x, BITS_PER_UNIT); else if (GET_CODE (x) == PLUS - && GET_CODE (XEXP (x, 0)) == REG + && REG_P (XEXP (x, 0)) && GET_CODE (XEXP (x, 1)) == CONST_INT) mark_reg_pointer (XEXP (x, 0), BITS_PER_UNIT); @@ -688,7 +688,7 @@ force_reg (enum machine_mode mode, rtx x) { rtx temp, insn, set; - if (GET_CODE (x) == REG) + if (REG_P (x)) return x; if (general_operand (x, mode)) @@ -699,7 +699,7 @@ force_reg (enum machine_mode mode, rtx x) else { temp = force_operand (x, NULL_RTX); - if (GET_CODE (temp) == REG) + if (REG_P (temp)) insn = get_last_insn (); else { @@ -784,7 +784,7 @@ copy_to_suggested_reg (rtx x, rtx target, enum machine_mode mode) { rtx temp; - if (target && GET_CODE (target) == REG) + if (target && REG_P (target)) temp = target; else temp = gen_reg_rtx (mode); @@ -1333,7 +1333,7 @@ allocate_dynamic_stack_space (rtx size, rtx target, int known_align) probe_stack_range (STACK_CHECK_MAX_FRAME_SIZE + STACK_CHECK_PROTECT, size); /* Don't use a TARGET that isn't a pseudo or is the wrong mode. */ - if (target == 0 || GET_CODE (target) != REG + if (target == 0 || !REG_P (target) || REGNO (target) < FIRST_PSEUDO_REGISTER || GET_MODE (target) != Pmode) target = gen_reg_rtx (Pmode); @@ -1557,7 +1557,7 @@ probe_stack_range (HOST_WIDE_INT first, rtx size) rtx end_lab = gen_label_rtx (); rtx temp; - if (GET_CODE (test_addr) != REG + if (!REG_P (test_addr) || REGNO (test_addr) < FIRST_PSEUDO_REGISTER) test_addr = force_reg (Pmode, test_addr); @@ -1611,7 +1611,7 @@ hard_function_value (tree valtype, tree func ATTRIBUTE_UNUSED, #endif val = FUNCTION_VALUE (valtype, func); - if (GET_CODE (val) == REG + if (REG_P (val) && GET_MODE (val) == BLKmode) { unsigned HOST_WIDE_INT bytes = int_size_in_bytes (valtype); diff --git a/gcc/expmed.c b/gcc/expmed.c index bebdbe8..fb590cd 100644 --- a/gcc/expmed.c +++ b/gcc/expmed.c @@ -417,7 +417,7 @@ store_bit_field (rtx str_rtx, unsigned HOST_WIDE_INT bitsize, subregs results in Severe Tire Damage. */ abort (); } - if (GET_CODE (op0) == REG) + if (REG_P (op0)) op0 = gen_rtx_SUBREG (fieldmode, op0, byte_offset); else op0 = adjust_address (op0, fieldmode, offset); @@ -472,7 +472,7 @@ store_bit_field (rtx str_rtx, unsigned HOST_WIDE_INT bitsize, int icode = movstrict_optab->handlers[fieldmode].insn_code; /* Get appropriate low part of the value being stored. */ - if (GET_CODE (value) == CONST_INT || GET_CODE (value) == REG) + if (GET_CODE (value) == CONST_INT || REG_P (value)) value = gen_lowpart (fieldmode, value); else if (!(GET_CODE (value) == SYMBOL_REF || GET_CODE (value) == LABEL_REF @@ -558,7 +558,7 @@ store_bit_field (rtx str_rtx, unsigned HOST_WIDE_INT bitsize, if (offset != 0 || GET_MODE_SIZE (GET_MODE (op0)) > UNITS_PER_WORD) { - if (GET_CODE (op0) != REG) + if (!REG_P (op0)) { /* Since this is a destination (lvalue), we can't copy it to a pseudo. We can trivially remove a SUBREG that does not @@ -597,7 +597,7 @@ store_bit_field (rtx str_rtx, unsigned HOST_WIDE_INT bitsize, && !(bitsize == 1 && GET_CODE (value) == CONST_INT) /* Ensure insv's size is wide enough for this field. */ && (GET_MODE_BITSIZE (op_mode) >= bitsize) - && ! ((GET_CODE (op0) == REG || GET_CODE (op0) == SUBREG) + && ! ((REG_P (op0) || GET_CODE (op0) == SUBREG) && (bitsize + bitpos > GET_MODE_BITSIZE (op_mode)))) { int xbitpos = bitpos; @@ -666,7 +666,7 @@ store_bit_field (rtx str_rtx, unsigned HOST_WIDE_INT bitsize, /* We can't just change the mode, because this might clobber op0, and we will need the original value of op0 if insv fails. */ xop0 = gen_rtx_SUBREG (maxmode, SUBREG_REG (xop0), SUBREG_BYTE (xop0)); - if (GET_CODE (xop0) == REG && GET_MODE (xop0) != maxmode) + if (REG_P (xop0) && GET_MODE (xop0) != maxmode) xop0 = gen_rtx_SUBREG (maxmode, xop0, 0); /* On big-endian machines, we count bits from the most significant. @@ -768,7 +768,7 @@ store_fixed_bit_field (rtx op0, unsigned HOST_WIDE_INT offset, and a field split across two bytes. Such cases are not supposed to be able to occur. */ - if (GET_CODE (op0) == REG || GET_CODE (op0) == SUBREG) + if (REG_P (op0) || GET_CODE (op0) == SUBREG) { if (offset != 0) abort (); @@ -866,7 +866,7 @@ store_fixed_bit_field (rtx op0, unsigned HOST_WIDE_INT offset, if (GET_MODE (value) != mode) { - if ((GET_CODE (value) == REG || GET_CODE (value) == SUBREG) + if ((REG_P (value) || GET_CODE (value) == SUBREG) && GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (value))) value = gen_lowpart (mode, value); else @@ -885,7 +885,7 @@ store_fixed_bit_field (rtx op0, unsigned HOST_WIDE_INT offset, /* Now clear the chosen bits in OP0, except that if VALUE is -1 we need not bother. */ - subtarget = (GET_CODE (op0) == REG || ! flag_force_mem) ? op0 : 0; + subtarget = (REG_P (op0) || ! flag_force_mem) ? op0 : 0; if (! all_one) { @@ -924,7 +924,7 @@ store_split_bit_field (rtx op0, unsigned HOST_WIDE_INT bitsize, /* Make sure UNIT isn't larger than BITS_PER_WORD, we can only handle that much at a time. */ - if (GET_CODE (op0) == REG || GET_CODE (op0) == SUBREG) + if (REG_P (op0) || GET_CODE (op0) == SUBREG) unit = BITS_PER_WORD; else unit = MIN (MEM_ALIGN (op0), BITS_PER_WORD); @@ -1013,7 +1013,7 @@ store_split_bit_field (rtx op0, unsigned HOST_WIDE_INT bitsize, GET_MODE (SUBREG_REG (op0))); offset = 0; } - else if (GET_CODE (op0) == REG) + else if (REG_P (op0)) { word = operand_subword_force (op0, offset, GET_MODE (op0)); offset = 0; @@ -1088,7 +1088,7 @@ extract_bit_field (rtx str_rtx, unsigned HOST_WIDE_INT bitsize, op0 = SUBREG_REG (op0); } - if (GET_CODE (op0) == REG + if (REG_P (op0) && mode == GET_MODE (op0) && bitnum == 0 && bitsize == GET_MODE_BITSIZE (GET_MODE (op0))) @@ -1239,7 +1239,7 @@ extract_bit_field (rtx str_rtx, unsigned HOST_WIDE_INT bitsize, subregs results in Severe Tire Damage. */ goto no_subreg_mode_swap; } - if (GET_CODE (op0) == REG) + if (REG_P (op0)) op0 = gen_rtx_SUBREG (mode1, op0, byte_offset); else op0 = adjust_address (op0, mode1, offset); @@ -1262,7 +1262,7 @@ extract_bit_field (rtx str_rtx, unsigned HOST_WIDE_INT bitsize, unsigned int nwords = (bitsize + (BITS_PER_WORD - 1)) / BITS_PER_WORD; unsigned int i; - if (target == 0 || GET_CODE (target) != REG) + if (target == 0 || !REG_P (target)) target = gen_reg_rtx (mode); /* Indicate for flow that the entire target reg is being set. */ @@ -1346,7 +1346,7 @@ extract_bit_field (rtx str_rtx, unsigned HOST_WIDE_INT bitsize, if (offset != 0 || GET_MODE_SIZE (GET_MODE (op0)) > UNITS_PER_WORD) { - if (GET_CODE (op0) != REG) + if (!REG_P (op0)) op0 = copy_to_reg (op0); op0 = gen_rtx_SUBREG (mode_for_size (BITS_PER_WORD, MODE_INT, 0), op0, (offset * UNITS_PER_WORD)); @@ -1362,7 +1362,7 @@ extract_bit_field (rtx str_rtx, unsigned HOST_WIDE_INT bitsize, { if (HAVE_extzv && (GET_MODE_BITSIZE (extzv_mode) >= bitsize) - && ! ((GET_CODE (op0) == REG || GET_CODE (op0) == SUBREG) + && ! ((REG_P (op0) || GET_CODE (op0) == SUBREG) && (bitsize + bitpos > GET_MODE_BITSIZE (extzv_mode)))) { unsigned HOST_WIDE_INT xbitpos = bitpos, xoffset = offset; @@ -1430,7 +1430,7 @@ extract_bit_field (rtx str_rtx, unsigned HOST_WIDE_INT bitsize, SImode). to make it acceptable to the format of extzv. */ if (GET_CODE (xop0) == SUBREG && GET_MODE (xop0) != maxmode) goto extzv_loses; - if (GET_CODE (xop0) == REG && GET_MODE (xop0) != maxmode) + if (REG_P (xop0) && GET_MODE (xop0) != maxmode) xop0 = gen_rtx_SUBREG (maxmode, xop0, 0); /* On big-endian machines, we count bits from the most significant. @@ -1450,7 +1450,7 @@ extract_bit_field (rtx str_rtx, unsigned HOST_WIDE_INT bitsize, if (GET_MODE (xtarget) != maxmode) { - if (GET_CODE (xtarget) == REG) + if (REG_P (xtarget)) { int wider = (GET_MODE_SIZE (maxmode) > GET_MODE_SIZE (GET_MODE (xtarget))); @@ -1496,7 +1496,7 @@ extract_bit_field (rtx str_rtx, unsigned HOST_WIDE_INT bitsize, { if (HAVE_extv && (GET_MODE_BITSIZE (extv_mode) >= bitsize) - && ! ((GET_CODE (op0) == REG || GET_CODE (op0) == SUBREG) + && ! ((REG_P (op0) || GET_CODE (op0) == SUBREG) && (bitsize + bitpos > GET_MODE_BITSIZE (extv_mode)))) { int xbitpos = bitpos, xoffset = offset; @@ -1558,7 +1558,7 @@ extract_bit_field (rtx str_rtx, unsigned HOST_WIDE_INT bitsize, SImode) to make it acceptable to the format of extv. */ if (GET_CODE (xop0) == SUBREG && GET_MODE (xop0) != maxmode) goto extv_loses; - if (GET_CODE (xop0) == REG && GET_MODE (xop0) != maxmode) + if (REG_P (xop0) && GET_MODE (xop0) != maxmode) xop0 = gen_rtx_SUBREG (maxmode, xop0, 0); /* On big-endian machines, we count bits from the most significant. @@ -1579,7 +1579,7 @@ extract_bit_field (rtx str_rtx, unsigned HOST_WIDE_INT bitsize, if (GET_MODE (xtarget) != maxmode) { - if (GET_CODE (xtarget) == REG) + if (REG_P (xtarget)) { int wider = (GET_MODE_SIZE (maxmode) > GET_MODE_SIZE (GET_MODE (xtarget))); @@ -1670,7 +1670,7 @@ extract_fixed_bit_field (enum machine_mode tmode, rtx op0, unsigned int total_bits = BITS_PER_WORD; enum machine_mode mode; - if (GET_CODE (op0) == SUBREG || GET_CODE (op0) == REG) + if (GET_CODE (op0) == SUBREG || REG_P (op0)) { /* Special treatment for a bit field split across two registers. */ if (bitsize + bitpos > BITS_PER_WORD) @@ -1732,7 +1732,7 @@ extract_fixed_bit_field (enum machine_mode tmode, rtx op0, tree amount = build_int_2 (bitpos, 0); /* Maybe propagate the target for the shift. */ /* But not if we will return it--could confuse integrate.c. */ - rtx subtarget = (target != 0 && GET_CODE (target) == REG ? target : 0); + rtx subtarget = (target != 0 && REG_P (target) ? target : 0); if (tmode != mode) subtarget = 0; op0 = expand_shift (RSHIFT_EXPR, mode, op0, amount, subtarget, 1); } @@ -1771,7 +1771,7 @@ extract_fixed_bit_field (enum machine_mode tmode, rtx op0, tree amount = build_int_2 (GET_MODE_BITSIZE (mode) - (bitsize + bitpos), 0); /* Maybe propagate the target for the shift. */ - rtx subtarget = (target != 0 && GET_CODE (target) == REG ? target : 0); + rtx subtarget = (target != 0 && REG_P (target) ? target : 0); op0 = expand_shift (LSHIFT_EXPR, mode, op0, amount, subtarget, 1); } @@ -1868,7 +1868,7 @@ extract_split_bit_field (rtx op0, unsigned HOST_WIDE_INT bitsize, /* Make sure UNIT isn't larger than BITS_PER_WORD, we can only handle that much at a time. */ - if (GET_CODE (op0) == REG || GET_CODE (op0) == SUBREG) + if (REG_P (op0) || GET_CODE (op0) == SUBREG) unit = BITS_PER_WORD; else unit = MIN (MEM_ALIGN (op0), BITS_PER_WORD); @@ -1902,7 +1902,7 @@ extract_split_bit_field (rtx op0, unsigned HOST_WIDE_INT bitsize, GET_MODE (SUBREG_REG (op0))); offset = 0; } - else if (GET_CODE (op0) == REG) + else if (REG_P (op0)) { word = operand_subword_force (op0, offset, GET_MODE (op0)); offset = 0; @@ -3709,13 +3709,13 @@ expand_divmod (int rem_flag, enum tree_code code, enum machine_mode mode, if (rem_flag) { remainder - = GET_CODE (target) == REG ? target : gen_reg_rtx (compute_mode); + = REG_P (target) ? target : gen_reg_rtx (compute_mode); quotient = gen_reg_rtx (compute_mode); } else { quotient - = GET_CODE (target) == REG ? target : gen_reg_rtx (compute_mode); + = REG_P (target) ? target : gen_reg_rtx (compute_mode); remainder = gen_reg_rtx (compute_mode); } @@ -3825,13 +3825,13 @@ expand_divmod (int rem_flag, enum tree_code code, enum machine_mode mode, if (rem_flag) { - remainder = (GET_CODE (target) == REG + remainder = (REG_P (target) ? target : gen_reg_rtx (compute_mode)); quotient = gen_reg_rtx (compute_mode); } else { - quotient = (GET_CODE (target) == REG + quotient = (REG_P (target) ? target : gen_reg_rtx (compute_mode)); remainder = gen_reg_rtx (compute_mode); } @@ -3922,13 +3922,13 @@ expand_divmod (int rem_flag, enum tree_code code, enum machine_mode mode, target = gen_reg_rtx (compute_mode); if (rem_flag) { - remainder= (GET_CODE (target) == REG + remainder= (REG_P (target) ? target : gen_reg_rtx (compute_mode)); quotient = gen_reg_rtx (compute_mode); } else { - quotient = (GET_CODE (target) == REG + quotient = (REG_P (target) ? target : gen_reg_rtx (compute_mode)); remainder = gen_reg_rtx (compute_mode); } @@ -4884,7 +4884,7 @@ emit_store_flag_force (rtx target, enum rtx_code code, rtx op0, rtx op1, /* If this failed, we have to do this with set/compare/jump/set code. */ - if (GET_CODE (target) != REG + if (!REG_P (target) || reg_mentioned_p (target, op0) || reg_mentioned_p (target, op1)) target = gen_reg_rtx (GET_MODE (target)); @@ -706,7 +706,7 @@ convert_move (rtx to, rtx from, int unsignedp) && ((code = can_extend_p (to_mode, word_mode, unsignedp)) != CODE_FOR_nothing)) { - if (GET_CODE (to) == REG) + if (REG_P (to)) { if (reg_overlap_mentioned_p (to, from)) from = force_reg (from_mode, from); @@ -793,7 +793,7 @@ convert_move (rtx to, rtx from, int unsignedp) && ! MEM_VOLATILE_P (from) && direct_load[(int) to_mode] && ! mode_dependent_address_p (XEXP (from, 0))) - || GET_CODE (from) == REG + || REG_P (from) || GET_CODE (from) == SUBREG)) from = force_reg (from_mode, from); convert_move (to, gen_lowpart (word_mode, from), 0); @@ -812,10 +812,10 @@ convert_move (rtx to, rtx from, int unsignedp) && ! MEM_VOLATILE_P (from) && direct_load[(int) to_mode] && ! mode_dependent_address_p (XEXP (from, 0))) - || GET_CODE (from) == REG + || REG_P (from) || GET_CODE (from) == SUBREG)) from = force_reg (from_mode, from); - if (GET_CODE (from) == REG && REGNO (from) < FIRST_PSEUDO_REGISTER + if (REG_P (from) && REGNO (from) < FIRST_PSEUDO_REGISTER && ! HARD_REGNO_MODE_OK (REGNO (from), to_mode)) from = copy_to_reg (from); emit_move_insn (to, gen_lowpart (to_mode, from)); @@ -983,7 +983,7 @@ convert_modes (enum machine_mode mode, enum machine_mode oldmode, rtx x, int uns || (GET_MODE_SIZE (mode) <= GET_MODE_SIZE (oldmode) && ((GET_CODE (x) == MEM && ! MEM_VOLATILE_P (x) && direct_load[(int) mode]) - || (GET_CODE (x) == REG + || (REG_P (x) && (! HARD_REGISTER_P (x) || HARD_REGNO_MODE_OK (REGNO (x), mode)) && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (mode), @@ -1917,7 +1917,7 @@ emit_group_load (rtx dst, rtx orig_src, tree type ATTRIBUTE_UNUSED, int ssize) to be extracted. */ tmps[i] = XEXP (src, bytepos / slen0); if (! CONSTANT_P (tmps[i]) - && (GET_CODE (tmps[i]) != REG || GET_MODE (tmps[i]) != mode)) + && (!REG_P (tmps[i]) || GET_MODE (tmps[i]) != mode)) tmps[i] = extract_bit_field (tmps[i], bytelen * BITS_PER_UNIT, (bytepos % slen0) * BITS_PER_UNIT, 1, NULL_RTX, mode, mode, ssize); @@ -1935,7 +1935,7 @@ emit_group_load (rtx dst, rtx orig_src, tree type ATTRIBUTE_UNUSED, int ssize) SIMD register, which is currently broken. While we get GCC to emit proper RTL for these cases, let's dump to memory. */ else if (VECTOR_MODE_P (GET_MODE (dst)) - && GET_CODE (src) == REG) + && REG_P (src)) { int slen = GET_MODE_SIZE (GET_MODE (src)); rtx mem; @@ -1948,7 +1948,7 @@ emit_group_load (rtx dst, rtx orig_src, tree type ATTRIBUTE_UNUSED, int ssize) && XVECLEN (dst, 0) > 1) tmps[i] = simplify_gen_subreg (mode, src, GET_MODE(dst), bytepos); else if (CONSTANT_P (src) - || (GET_CODE (src) == REG && GET_MODE (src) == mode)) + || (REG_P (src) && GET_MODE (src) == mode)) tmps[i] = src; else tmps[i] = extract_bit_field (src, bytelen * BITS_PER_UNIT, @@ -2207,7 +2207,7 @@ copy_blkmode_from_reg (rtx tgtblk, rtx srcreg, tree type) void use_reg (rtx *call_fusage, rtx reg) { - if (GET_CODE (reg) != REG + if (!REG_P (reg) || REGNO (reg) >= FIRST_PSEUDO_REGISTER) abort (); @@ -2247,7 +2247,7 @@ use_group_regs (rtx *call_fusage, rtx regs) /* A NULL entry means the parameter goes both on the stack and in registers. This can also be a MEM for targets that pass values partially on the stack and partially in registers. */ - if (reg != 0 && GET_CODE (reg) == REG) + if (reg != 0 && REG_P (reg)) use_reg (call_fusage, reg); } } @@ -2839,7 +2839,7 @@ emit_move_insn (rtx x, rtx y) last_insn = emit_move_insn_1 (x, y); - if (y_cst && GET_CODE (x) == REG + if (y_cst && REG_P (x) && (set = single_set (last_insn)) != NULL_RTX && SET_DEST (set) == x && ! rtx_equal_p (y_cst, SET_SRC (set))) @@ -3245,7 +3245,7 @@ compress_float_constant (rtx x, rtx y) emit_unop_insn (ic, x, trunc_y, UNKNOWN); last_insn = get_last_insn (); - if (GET_CODE (x) == REG) + if (REG_P (x)) set_unique_reg_note (last_insn, REG_EQUAL, y); return last_insn; @@ -3273,7 +3273,7 @@ push_block (rtx size, int extra, int below) size = convert_modes (Pmode, ptr_mode, size, 1); if (CONSTANT_P (size)) anti_adjust_stack (plus_constant (size, extra)); - else if (GET_CODE (size) == REG && extra == 0) + else if (REG_P (size) && extra == 0) anti_adjust_stack (size); else { @@ -3634,7 +3634,7 @@ emit_push_insn (rtx x, enum machine_mode mode, tree type, rtx size, /* If X is a hard register in a non-integer mode, copy it into a pseudo; SUBREGs of such registers are not allowed. */ - if ((GET_CODE (x) == REG && REGNO (x) < FIRST_PSEUDO_REGISTER + if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER && GET_MODE_CLASS (GET_MODE (x)) != MODE_INT)) x = copy_to_reg (x); @@ -3723,7 +3723,7 @@ get_subtarget (rtx x) { return ((x == 0 /* Only registers can be subtargets. */ - || GET_CODE (x) != REG + || !REG_P (x) /* If the register is readonly, it can't be set more than once. */ || RTX_UNCHANGING_P (x) /* Don't use hard regs to avoid extending their life. */ @@ -3889,7 +3889,7 @@ expand_assignment (tree to, tree from, int want_value) if (TREE_CODE (from) == CALL_EXPR && ! aggregate_value_p (from, from) && TREE_CODE (TYPE_SIZE (TREE_TYPE (from))) == INTEGER_CST && ! ((TREE_CODE (to) == VAR_DECL || TREE_CODE (to) == PARM_DECL) - && GET_CODE (DECL_RTL (to)) == REG)) + && REG_P (DECL_RTL (to)))) { rtx value; @@ -3925,7 +3925,7 @@ expand_assignment (tree to, tree from, int want_value) /* Don't move directly into a return register. */ if (TREE_CODE (to) == RESULT_DECL - && (GET_CODE (to_rtx) == REG || GET_CODE (to_rtx) == PARALLEL)) + && (REG_P (to_rtx) || GET_CODE (to_rtx) == PARALLEL)) { rtx temp; @@ -4213,7 +4213,7 @@ store_expr (tree exp, rtx target, int want_value) Otherwise, if TEMP is not TARGET, return TEMP if it is constant (for efficiency), or if we really want the correct value. */ - if (!(target && GET_CODE (target) == REG + if (!(target && REG_P (target) && REGNO (target) < FIRST_PSEUDO_REGISTER) && !(GET_CODE (target) == MEM && MEM_VOLATILE_P (target)) && ! rtx_equal_p (temp, target) @@ -4379,7 +4379,7 @@ store_expr (tree exp, rtx target, int want_value) /* Return TARGET itself if it is a hard register. */ else if ((want_value & 1) != 0 && GET_MODE (target) != BLKmode - && ! (GET_CODE (target) == REG + && ! (REG_P (target) && REGNO (target) < FIRST_PSEUDO_REGISTER)) return copy_to_reg (target); @@ -4661,7 +4661,7 @@ store_constructor (tree exp, rtx target, int cleared, HOST_WIDE_INT size) set the initial value as zero so we can fold the value into a constant. But if more than one register is involved, this probably loses. */ - else if (GET_CODE (target) == REG && TREE_STATIC (exp) + else if (REG_P (target) && TREE_STATIC (exp) && GET_MODE_SIZE (GET_MODE (target)) <= UNITS_PER_WORD) { emit_move_insn (target, CONST0_RTX (GET_MODE (target))); @@ -4676,7 +4676,7 @@ store_constructor (tree exp, rtx target, int cleared, HOST_WIDE_INT size) else if (size > 0 && ((list_length (CONSTRUCTOR_ELTS (exp)) != fields_length (type)) || mostly_zeros_p (exp)) - && (GET_CODE (target) != REG + && (!REG_P (target) || ((HOST_WIDE_INT) GET_MODE_SIZE (GET_MODE (target)) == size))) { @@ -4774,7 +4774,7 @@ store_constructor (tree exp, rtx target, int cleared, HOST_WIDE_INT size) start of a word, try to widen it to a full word. This special case allows us to output C++ member function initializations in a form that the optimizers can understand. */ - if (GET_CODE (target) == REG + if (REG_P (target) && bitsize < BITS_PER_WORD && bitpos % BITS_PER_WORD == 0 && GET_MODE_CLASS (mode) == MODE_INT @@ -4871,7 +4871,7 @@ store_constructor (tree exp, rtx target, int cleared, HOST_WIDE_INT size) /* If the constructor has fewer elements than the array, clear the whole array first. Similarly if this is static constructor of a non-BLKmode object. */ - if (cleared || (GET_CODE (target) == REG && TREE_STATIC (exp))) + if (cleared || (REG_P (target) && TREE_STATIC (exp))) need_to_clear = 1; else { @@ -5357,7 +5357,7 @@ store_field (rtx target, HOST_WIDE_INT bitsize, HOST_WIDE_INT bitpos, twice, once with emit_move_insn and once via store_field. */ if (mode == BLKmode - && (GET_CODE (target) == REG || GET_CODE (target) == SUBREG)) + && (REG_P (target) || GET_CODE (target) == SUBREG)) { rtx object = assign_temp (type, 0, 1, 1); rtx blk_object = adjust_address (object, BLKmode, 0); @@ -5391,7 +5391,7 @@ store_field (rtx target, HOST_WIDE_INT bitsize, HOST_WIDE_INT bitpos, || (mode != BLKmode && ! direct_store[(int) mode] && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT) - || GET_CODE (target) == REG + || REG_P (target) || GET_CODE (target) == SUBREG /* If the field isn't aligned enough to store as an ordinary memref, store it as a bit field. */ @@ -5487,7 +5487,7 @@ store_field (rtx target, HOST_WIDE_INT bitsize, HOST_WIDE_INT bitpos, /* If a value is wanted, it must be the lhs; so make the address stable for multiple use. */ - if (value_mode != VOIDmode && GET_CODE (addr) != REG + if (value_mode != VOIDmode && !REG_P (addr) && ! CONSTANT_ADDRESS_P (addr) /* A frame-pointer reference is already stable. */ && ! (GET_CODE (addr) == PLUS @@ -5718,7 +5718,7 @@ force_operand (rtx value, rtx target) /* Check for subreg applied to an expression produced by loop optimizer. */ if (code == SUBREG - && GET_CODE (SUBREG_REG (value)) != REG + && !REG_P (SUBREG_REG (value)) && GET_CODE (SUBREG_REG (value)) != MEM) { value = simplify_gen_subreg (GET_MODE (value), @@ -5755,7 +5755,7 @@ force_operand (rtx value, rtx target) if (ARITHMETIC_P (value)) { op2 = XEXP (value, 1); - if (!CONSTANT_P (op2) && !(GET_CODE (op2) == REG && op2 != subtarget)) + if (!CONSTANT_P (op2) && !(REG_P (op2) && op2 != subtarget)) subtarget = 0; if (code == MINUS && GET_CODE (op2) == CONST_INT) { @@ -5771,7 +5771,7 @@ force_operand (rtx value, rtx target) creating another one around this addition. */ if (code == PLUS && GET_CODE (op2) == CONST_INT && GET_CODE (XEXP (value, 0)) == PLUS - && GET_CODE (XEXP (XEXP (value, 0), 0)) == REG + && REG_P (XEXP (XEXP (value, 0), 0)) && REGNO (XEXP (XEXP (value, 0), 0)) >= FIRST_VIRTUAL_REGISTER && REGNO (XEXP (XEXP (value, 0), 0)) <= LAST_VIRTUAL_REGISTER) { @@ -5886,7 +5886,7 @@ safe_from_p (rtx x, tree exp, int top_p) if (GET_CODE (x) == SUBREG) { x = SUBREG_REG (x); - if (GET_CODE (x) == REG && REGNO (x) < FIRST_PSEUDO_REGISTER) + if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER) return 0; } @@ -5993,7 +5993,7 @@ safe_from_p (rtx x, tree exp, int top_p) case CALL_EXPR: /* Assume that the call will clobber all hard registers and all of memory. */ - if ((GET_CODE (x) == REG && REGNO (x) < FIRST_PSEUDO_REGISTER) + if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER) || GET_CODE (x) == MEM) return 0; break; @@ -6070,7 +6070,7 @@ safe_from_p (rtx x, tree exp, int top_p) if (GET_CODE (exp_rtl) == SUBREG) { exp_rtl = SUBREG_REG (exp_rtl); - if (GET_CODE (exp_rtl) == REG + if (REG_P (exp_rtl) && REGNO (exp_rtl) < FIRST_PSEUDO_REGISTER) return 0; } @@ -6496,7 +6496,7 @@ expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode, Another is a CALL_EXPR which must return in memory. */ if (! cse_not_expected && mode != BLKmode && target - && (GET_CODE (target) != REG || REGNO (target) < FIRST_PSEUDO_REGISTER) + && (!REG_P (target) || REGNO (target) < FIRST_PSEUDO_REGISTER) && ! (code == CONSTRUCTOR && GET_MODE_SIZE (mode) > UNITS_PER_WORD) && ! (code == CALL_EXPR && aggregate_value_p (exp, exp))) target = 0; @@ -6587,7 +6587,7 @@ expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode, See expand_decl. */ else if (GET_CODE (DECL_RTL (exp)) == MEM - && GET_CODE (XEXP (DECL_RTL (exp), 0)) == REG) + && REG_P (XEXP (DECL_RTL (exp), 0))) temp = validize_mem (DECL_RTL (exp)); /* If DECL_RTL is memory, we are in the normal case and either @@ -6601,7 +6601,7 @@ expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode, && (! memory_address_p (DECL_MODE (exp), XEXP (DECL_RTL (exp), 0)) || (flag_force_addr - && GET_CODE (XEXP (DECL_RTL (exp), 0)) != REG))) + && !REG_P (XEXP (DECL_RTL (exp), 0))))) { if (alt_rtl) *alt_rtl = DECL_RTL (exp); @@ -6613,7 +6613,7 @@ expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode, if the address is a register. */ if (temp != 0) { - if (GET_CODE (temp) == MEM && GET_CODE (XEXP (temp, 0)) == REG) + if (GET_CODE (temp) == MEM && REG_P (XEXP (temp, 0))) mark_reg_pointer (XEXP (temp, 0), DECL_ALIGN (exp)); return temp; @@ -6623,7 +6623,7 @@ expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode, must be a promoted value. We return a SUBREG of the wanted mode, but mark it so that we know that it was already extended. */ - if (GET_CODE (DECL_RTL (exp)) == REG + if (REG_P (DECL_RTL (exp)) && GET_MODE (DECL_RTL (exp)) != DECL_MODE (exp)) { /* Get the signedness used for this variable. Ensure we get the @@ -6734,7 +6734,7 @@ expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode, find_function_data (context); temp = SAVE_EXPR_RTL (exp); - if (temp && GET_CODE (temp) == REG) + if (temp && REG_P (temp)) { put_var_into_stack (exp, /*rescan=*/true); temp = SAVE_EXPR_RTL (exp); @@ -6756,7 +6756,7 @@ expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode, 3, 0, 0); SAVE_EXPR_RTL (exp) = temp; - if (!optimize && GET_CODE (temp) == REG) + if (!optimize && REG_P (temp)) save_expr_regs = gen_rtx_EXPR_LIST (VOIDmode, temp, save_expr_regs); @@ -6765,7 +6765,7 @@ expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode, wanted mode but mark it so that we know that it was already extended. */ - if (GET_CODE (temp) == REG && GET_MODE (temp) != mode) + if (REG_P (temp) && GET_MODE (temp) != mode) { temp = gen_lowpart_SUBREG (mode, SAVE_EXPR_RTL (exp)); promote_mode (type, mode, &unsignedp, 0); @@ -6786,7 +6786,7 @@ expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode, must be a promoted value. We return a SUBREG of the wanted mode, but mark it so that we know that it was already extended. */ - if (GET_CODE (SAVE_EXPR_RTL (exp)) == REG + if (REG_P (SAVE_EXPR_RTL (exp)) && GET_MODE (SAVE_EXPR_RTL (exp)) != mode) { /* Compute the signedness and make the proper SUBREG. */ @@ -7299,7 +7299,7 @@ expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode, (which we know to be the width of a basic mode), then storing into memory, and changing the mode to BLKmode. */ if (mode1 == VOIDmode - || GET_CODE (op0) == REG || GET_CODE (op0) == SUBREG + || REG_P (op0) || GET_CODE (op0) == SUBREG || (mode1 != BLKmode && ! direct_load[(int) mode1] && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT @@ -7363,7 +7363,7 @@ expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode, op0 = validize_mem (op0); - if (GET_CODE (op0) == MEM && GET_CODE (XEXP (op0, 0)) == REG) + if (GET_CODE (op0) == MEM && REG_P (XEXP (op0, 0))) mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0)); op0 = extract_bit_field (op0, bitsize, bitpos, unsignedp, @@ -7422,7 +7422,7 @@ expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode, op0 = copy_rtx (op0); set_mem_attributes (op0, exp, 0); - if (GET_CODE (XEXP (op0, 0)) == REG) + if (REG_P (XEXP (op0, 0))) mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0)); MEM_VOLATILE_P (op0) |= volatilep; @@ -7666,7 +7666,7 @@ expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode, adjust_address (target, TYPE_MODE (valtype), 0), modifier == EXPAND_STACK_PARM ? 2 : 0); - else if (GET_CODE (target) == REG) + else if (REG_P (target)) /* Store this field into a union of the proper type. */ store_field (target, MIN ((int_size_in_bytes (TREE_TYPE @@ -7989,9 +7989,9 @@ expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode, op0 = expand_expr (TREE_OPERAND (exp, 0), subtarget, VOIDmode, EXPAND_SUM); - if (GET_CODE (op0) != REG) + if (!REG_P (op0)) op0 = force_operand (op0, NULL_RTX); - if (GET_CODE (op0) != REG) + if (!REG_P (op0)) op0 = copy_to_mode_reg (mode, op0); return gen_rtx_MULT (mode, op0, @@ -8183,7 +8183,7 @@ expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode, || modifier == EXPAND_STACK_PARM || (GET_CODE (target) == MEM && MEM_VOLATILE_P (target)) || GET_MODE (target) != mode - || (GET_CODE (target) == REG + || (REG_P (target) && REGNO (target) < FIRST_PSEUDO_REGISTER)) target = gen_reg_rtx (mode); expand_operands (TREE_OPERAND (exp, 0), TREE_OPERAND (exp, 1), @@ -8315,7 +8315,7 @@ expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode, /* For foo != 0, load foo, and if it is nonzero load 1 instead. */ if (code == NE_EXPR && integer_zerop (TREE_OPERAND (exp, 1)) && original_target - && GET_CODE (original_target) == REG + && REG_P (original_target) && (GET_MODE (original_target) == TYPE_MODE (TREE_TYPE (TREE_OPERAND (exp, 0))))) { @@ -8362,7 +8362,7 @@ expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode, || ! safe_from_p (target, exp, 1) /* Make sure we don't have a hard reg (such as function's return value) live across basic blocks, if not optimizing. */ - || (!optimize && GET_CODE (target) == REG + || (!optimize && REG_P (target) && REGNO (target) < FIRST_PSEUDO_REGISTER))) target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode); @@ -8564,13 +8564,13 @@ expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode, temp = assign_temp (type, 0, 0, 1); else if (original_target && (safe_from_p (original_target, TREE_OPERAND (exp, 0), 1) - || (singleton && GET_CODE (original_target) == REG + || (singleton && REG_P (original_target) && REGNO (original_target) >= FIRST_PSEUDO_REGISTER && original_target == var_rtx (singleton))) && GET_MODE (original_target) == mode #ifdef HAVE_conditional_move && (! can_conditionally_move_p (mode) - || GET_CODE (original_target) == REG + || REG_P (original_target) || TREE_ADDRESSABLE (type)) #endif && (GET_CODE (original_target) != MEM @@ -8646,7 +8646,7 @@ expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode, might clobber it. */ if ((binary_op && ! safe_from_p (temp, TREE_OPERAND (binary_op, 1), 1)) - || (GET_CODE (temp) == REG + || (REG_P (temp) && REGNO (temp) < FIRST_PSEUDO_REGISTER)) temp = gen_reg_rtx (mode); store_expr (singleton, temp, @@ -8689,7 +8689,7 @@ expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode, || TREE_CODE (TREE_OPERAND (exp, 1)) == SAVE_EXPR) && safe_from_p (temp, TREE_OPERAND (exp, 2), 1)) { - if (GET_CODE (temp) == REG + if (REG_P (temp) && REGNO (temp) < FIRST_PSEUDO_REGISTER) temp = gen_reg_rtx (mode); store_expr (TREE_OPERAND (exp, 1), temp, @@ -8714,7 +8714,7 @@ expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode, || TREE_CODE (TREE_OPERAND (exp, 2)) == SAVE_EXPR) && safe_from_p (temp, TREE_OPERAND (exp, 1), 1)) { - if (GET_CODE (temp) == REG + if (REG_P (temp) && REGNO (temp) < FIRST_PSEUDO_REGISTER) temp = gen_reg_rtx (mode); store_expr (TREE_OPERAND (exp, 2), temp, @@ -8983,7 +8983,7 @@ expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode, if (CONSTANT_P (op0)) op0 = force_const_mem (TYPE_MODE (TREE_TYPE (TREE_OPERAND (exp, 0))), op0); - else if (GET_CODE (op0) == REG || GET_CODE (op0) == SUBREG + else if (REG_P (op0) || GET_CODE (op0) == SUBREG || GET_CODE (op0) == CONCAT || GET_CODE (op0) == ADDRESSOF || GET_CODE (op0) == PARALLEL || GET_CODE (op0) == LO_SUM) { @@ -9073,13 +9073,13 @@ expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode, } if (flag_force_addr - && GET_CODE (op0) != REG + && !REG_P (op0) && modifier != EXPAND_CONST_ADDRESS && modifier != EXPAND_INITIALIZER && modifier != EXPAND_SUM) op0 = force_reg (Pmode, op0); - if (GET_CODE (op0) == REG + if (REG_P (op0) && ! REG_USERVAR_P (op0)) mark_reg_pointer (op0, TYPE_ALIGN (TREE_TYPE (type))); @@ -9548,7 +9548,7 @@ expand_increment (tree exp, int post, int ignore) bad_subreg = 1; } - op0_is_copy = ((GET_CODE (op0) == SUBREG || GET_CODE (op0) == REG) + op0_is_copy = ((GET_CODE (op0) == SUBREG || REG_P (op0)) && temp != get_last_insn ()); op1 = expand_expr (TREE_OPERAND (exp, 1), NULL_RTX, VOIDmode, 0); @@ -9902,7 +9902,7 @@ do_store_flag (tree exp, rtx target, enum machine_mode mode, int only_cheap) } /* If this failed, we have to do this with set/compare/jump/set code. */ - if (GET_CODE (target) != REG + if (!REG_P (target) || reg_mentioned_p (target, op0) || reg_mentioned_p (target, op1)) target = gen_reg_rtx (GET_MODE (target)); @@ -10073,7 +10073,7 @@ do_tablejump (rtx index, enum machine_mode mode, rtx range, rtx table_label, out of PIC_CASE_VECTOR_ADDRESS won't be a valid address, and break_out_memory_refs will go to work on it and mess it up. */ #ifdef PIC_CASE_VECTOR_ADDRESS - if (flag_pic && GET_CODE (index) != REG) + if (flag_pic && !REG_P (index)) index = copy_to_mode_reg (Pmode, index); #endif diff --git a/gcc/final.c b/gcc/final.c index ef1eeb2..65ebaa0 100644 --- a/gcc/final.c +++ b/gcc/final.c @@ -1428,7 +1428,7 @@ profile_function (FILE *file ATTRIBUTE_UNUSED) function_section (current_function_decl); #if defined(ASM_OUTPUT_REG_PUSH) - if (sval && svrtx != NULL_RTX && GET_CODE (svrtx) == REG) + if (sval && svrtx != NULL_RTX && REG_P (svrtx)) ASM_OUTPUT_REG_PUSH (file, REGNO (svrtx)); #endif @@ -1459,7 +1459,7 @@ profile_function (FILE *file ATTRIBUTE_UNUSED) #endif #if defined(ASM_OUTPUT_REG_PUSH) - if (sval && svrtx != NULL_RTX && GET_CODE (svrtx) == REG) + if (sval && svrtx != NULL_RTX && REG_P (svrtx)) ASM_OUTPUT_REG_POP (file, REGNO (svrtx)); #endif } @@ -2275,8 +2275,8 @@ final_scan_insn (rtx insn, FILE *file, int optimize ATTRIBUTE_UNUSED, if (final_sequence == 0 && prescan >= 0 && GET_CODE (insn) == INSN && GET_CODE (body) == SET - && GET_CODE (SET_SRC (body)) == REG - && GET_CODE (SET_DEST (body)) == REG + && REG_P (SET_SRC (body)) + && REG_P (SET_DEST (body)) && REGNO (SET_SRC (body)) == REGNO (SET_DEST (body))) break; #endif @@ -2633,7 +2633,7 @@ alter_subreg (rtx *xp) if (new != 0) *xp = new; /* Simplify_subreg can't handle some REG cases, but we have to. */ - else if (GET_CODE (y) == REG) + else if (REG_P (y)) { unsigned int regno = subreg_hard_regno (x, 1); *xp = gen_rtx_REG_offset (y, GET_MODE (x), regno, SUBREG_BYTE (x)); @@ -2899,7 +2899,7 @@ get_mem_expr_from_op (rtx op, int *paddressp) *paddressp = 0; - if (GET_CODE (op) == REG) + if (REG_P (op)) return REG_EXPR (op); else if (GET_CODE (op) != MEM) return 0; @@ -3218,7 +3218,7 @@ output_operand (rtx x, int code ATTRIBUTE_UNUSED) /* If X is a pseudo-register, abort now rather than writing trash to the assembler file. */ - if (x && GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER) + if (x && REG_P (x) && REGNO (x) >= FIRST_PSEUDO_REGISTER) abort (); PRINT_OPERAND (asm_out_file, x, code); @@ -3756,7 +3756,7 @@ only_leaf_regs_used (void) if (current_function_uses_pic_offset_table && pic_offset_table_rtx != 0 - && GET_CODE (pic_offset_table_rtx) == REG + && REG_P (pic_offset_table_rtx) && ! permitted_reg_in_leaf_functions[REGNO (pic_offset_table_rtx)]) return 0; @@ -3800,7 +3800,7 @@ leaf_renumber_regs_insn (rtx in_rtx) renumbered_regs would be 1 for an output-register; they */ - if (GET_CODE (in_rtx) == REG) + if (REG_P (in_rtx)) { int newreg; @@ -455,7 +455,7 @@ verify_wide_reg_1 (rtx *px, void *pregno) rtx x = *px; unsigned int regno = *(int *) pregno; - if (GET_CODE (x) == REG && REGNO (x) == regno) + if (REG_P (x) && REGNO (x) == regno) { if (GET_MODE_BITSIZE (GET_MODE (x)) <= BITS_PER_WORD) return 2; @@ -1330,7 +1330,7 @@ find_regno_partial (rtx *ptr, void *data) case ZERO_EXTRACT: case SIGN_EXTRACT: case STRICT_LOW_PART: - if (GET_CODE (XEXP (*ptr, 0)) == REG && REGNO (XEXP (*ptr, 0)) == reg) + if (REG_P (XEXP (*ptr, 0)) && REGNO (XEXP (*ptr, 0)) == reg) { param->retval = XEXP (*ptr, 0); return 1; @@ -1338,7 +1338,7 @@ find_regno_partial (rtx *ptr, void *data) break; case SUBREG: - if (GET_CODE (SUBREG_REG (*ptr)) == REG + if (REG_P (SUBREG_REG (*ptr)) && REGNO (SUBREG_REG (*ptr)) == reg) { param->retval = SUBREG_REG (*ptr); @@ -1623,7 +1623,7 @@ propagate_one_insn (struct propagate_block_info *pbi, rtx insn) /* Does this instruction increment or decrement a register? */ if ((flags & PROP_AUTOINC) && x != 0 - && GET_CODE (SET_DEST (x)) == REG + && REG_P (SET_DEST (x)) && (GET_CODE (SET_SRC (x)) == PLUS || GET_CODE (SET_SRC (x)) == MINUS) && XEXP (SET_SRC (x), 0) == SET_DEST (x) @@ -1873,7 +1873,7 @@ init_propagate_block_info (basic_block bb, regset live, regset local_set, in the form of a comparison of a register against zero. If the condition is more complex than that, then it is safe not to record any information. */ - if (GET_CODE (reg) == REG + if (REG_P (reg) && XEXP (cond_true, 1) == const0_rtx) { rtx cond_false @@ -2149,7 +2149,7 @@ insn_dead_p (struct propagate_block_info *pbi, rtx x, int call_ok, || GET_CODE (r) == ZERO_EXTRACT) r = XEXP (r, 0); - if (GET_CODE (r) == REG) + if (REG_P (r)) { int regno = REGNO (r); @@ -2225,7 +2225,7 @@ insn_dead_p (struct propagate_block_info *pbi, rtx x, int call_ok, is not necessarily true for hard registers until after reload. */ else if (code == CLOBBER) { - if (GET_CODE (XEXP (x, 0)) == REG + if (REG_P (XEXP (x, 0)) && (REGNO (XEXP (x, 0)) >= FIRST_PSEUDO_REGISTER || reload_completed) && ! REGNO_REG_SET_P (pbi->reg_live, REGNO (XEXP (x, 0)))) @@ -2265,7 +2265,7 @@ libcall_dead_p (struct propagate_block_info *pbi, rtx note, rtx insn) { rtx r = SET_SRC (x); - if (GET_CODE (r) == REG) + if (REG_P (r)) { rtx call = XEXP (note, 0); rtx call_pat; @@ -2552,7 +2552,7 @@ mark_set_1 (struct propagate_block_info *pbi, enum rtx_code code, rtx reg, rtx c break; case SUBREG: - if (GET_CODE (SUBREG_REG (reg)) == REG) + if (REG_P (SUBREG_REG (reg))) { enum machine_mode outer_mode = GET_MODE (reg); enum machine_mode inner_mode = GET_MODE (SUBREG_REG (reg)); @@ -2605,7 +2605,7 @@ mark_set_1 (struct propagate_block_info *pbi, enum rtx_code code, rtx reg, rtx c If this set is a REG, then it kills any MEMs which use the reg. */ if (optimize && (flags & PROP_SCAN_DEAD_STORES)) { - if (GET_CODE (reg) == REG) + if (REG_P (reg)) invalidate_mems_from_set (pbi, reg); /* If the memory reference had embedded side effects (autoincrement @@ -2620,7 +2620,7 @@ mark_set_1 (struct propagate_block_info *pbi, enum rtx_code code, rtx reg, rtx c add_to_mem_set_list (pbi, canon_rtx (reg)); } - if (GET_CODE (reg) == REG + if (REG_P (reg) && ! (regno_first == FRAME_POINTER_REGNUM && (! reload_completed || frame_pointer_needed)) #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM @@ -2810,7 +2810,7 @@ mark_set_1 (struct propagate_block_info *pbi, enum rtx_code code, rtx reg, rtx c } } } - else if (GET_CODE (reg) == REG) + else if (REG_P (reg)) { if (flags & (PROP_LOG_LINKS | PROP_AUTOINC)) pbi->reg_next_use[regno_first] = 0; @@ -3086,7 +3086,7 @@ not_reg_cond (rtx x) if (x_code == NOT) return XEXP (x, 0); if (COMPARISON_P (x) - && GET_CODE (XEXP (x, 0)) == REG) + && REG_P (XEXP (x, 0))) { if (XEXP (x, 1) != const0_rtx) abort (); @@ -3279,7 +3279,7 @@ attempt_auto_inc (struct propagate_block_info *pbi, rtx inc, rtx insn, if (! validate_change (insn, &XEXP (mem, 0), inc, 0)) return; } - else if (GET_CODE (q) == REG + else if (REG_P (q) /* PREV_INSN used here to check the semi-open interval [insn,incr). */ && ! reg_used_between_p (q, PREV_INSN (insn), incr) @@ -3429,7 +3429,7 @@ find_auto_inc (struct propagate_block_info *pbi, rtx x, rtx insn) if (GET_CODE (addr) == PLUS && GET_CODE (XEXP (addr, 1)) == CONST_INT) offset = INTVAL (XEXP (addr, 1)), addr = XEXP (addr, 0); - if (GET_CODE (addr) != REG) + if (!REG_P (addr)) return; regno = REGNO (addr); @@ -3484,7 +3484,7 @@ find_auto_inc (struct propagate_block_info *pbi, rtx x, rtx insn) inc_val)), insn, x, incr, addr); } - else if (GET_CODE (inc_val) == REG + else if (REG_P (inc_val) && ! reg_set_between_p (inc_val, PREV_INSN (insn), NEXT_INSN (incr))) @@ -3787,7 +3787,7 @@ mark_used_regs (struct propagate_block_info *pbi, rtx x, rtx cond, rtx insn) case SUBREG: #ifdef CANNOT_CHANGE_MODE_CLASS if ((flags & PROP_REG_INFO) - && GET_CODE (SUBREG_REG (x)) == REG + && REG_P (SUBREG_REG (x)) && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER) bitmap_set_bit (&subregs_of_mode, REGNO (SUBREG_REG (x)) * MAX_MACHINE_MODE @@ -3796,7 +3796,7 @@ mark_used_regs (struct propagate_block_info *pbi, rtx x, rtx cond, rtx insn) /* While we're here, optimize this case. */ x = SUBREG_REG (x); - if (GET_CODE (x) != REG) + if (!REG_P (x)) goto retry; /* Fall through. */ @@ -3838,7 +3838,7 @@ mark_used_regs (struct propagate_block_info *pbi, rtx x, rtx cond, rtx insn) #ifdef CANNOT_CHANGE_MODE_CLASS if ((flags & PROP_REG_INFO) && GET_CODE (testreg) == SUBREG - && GET_CODE (SUBREG_REG (testreg)) == REG + && REG_P (SUBREG_REG (testreg)) && REGNO (SUBREG_REG (testreg)) >= FIRST_PSEUDO_REGISTER) bitmap_set_bit (&subregs_of_mode, REGNO (SUBREG_REG (testreg)) * MAX_MACHINE_MODE @@ -3865,7 +3865,7 @@ mark_used_regs (struct propagate_block_info *pbi, rtx x, rtx cond, rtx insn) if ((GET_CODE (testreg) == PARALLEL && GET_MODE (testreg) == BLKmode) - || (GET_CODE (testreg) == REG + || (REG_P (testreg) && (regno = REGNO (testreg), ! (regno == FRAME_POINTER_REGNUM && (! reload_completed || frame_pointer_needed))) @@ -4268,7 +4268,7 @@ count_or_remove_death_notes_bb (basic_block bb, int kill) switch (REG_NOTE_KIND (link)) { case REG_DEAD: - if (GET_CODE (XEXP (link, 0)) == REG) + if (REG_P (XEXP (link, 0))) { rtx reg = XEXP (link, 0); int n; diff --git a/gcc/function.c b/gcc/function.c index 5554cbb..277ac76 100644 --- a/gcc/function.c +++ b/gcc/function.c @@ -1061,10 +1061,10 @@ find_temp_slot_from_address (rtx x) /* If we have a sum involving a register, see if it points to a temp slot. */ - if (GET_CODE (x) == PLUS && GET_CODE (XEXP (x, 0)) == REG + if (GET_CODE (x) == PLUS && REG_P (XEXP (x, 0)) && (p = find_temp_slot_from_address (XEXP (x, 0))) != 0) return p; - else if (GET_CODE (x) == PLUS && GET_CODE (XEXP (x, 1)) == REG + else if (GET_CODE (x) == PLUS && REG_P (XEXP (x, 1)) && (p = find_temp_slot_from_address (XEXP (x, 1))) != 0) return p; @@ -1094,7 +1094,7 @@ update_temp_slot_address (rtx old, rtx new) if (GET_CODE (old) != PLUS) return; - if (GET_CODE (new) == REG) + if (REG_P (new)) { update_temp_slot_address (XEXP (old, 0), new); update_temp_slot_address (XEXP (old, 1), new); @@ -1181,7 +1181,7 @@ preserve_temp_slots (rtx x) a temporary slot we know it points to. To be consistent with the code below, we really should preserve all non-kept slots if we can't find a match, but that seems to be much too costly. */ - if (GET_CODE (x) == REG && REG_POINTER (x)) + if (REG_P (x) && REG_POINTER (x)) p = find_temp_slot_from_address (x); /* If X is not in memory or is at a constant address, it cannot be in @@ -1407,7 +1407,7 @@ put_var_into_stack (tree decl, int rescan) if the var is non-local. */ if (TREE_CODE (decl) != SAVE_EXPR && DECL_NONLOCAL (decl) && GET_CODE (reg) == MEM - && GET_CODE (XEXP (reg, 0)) == REG + && REG_P (XEXP (reg, 0)) && REGNO (XEXP (reg, 0)) > LAST_VIRTUAL_REGISTER) { orig_reg = reg = XEXP (reg, 0); @@ -1437,7 +1437,7 @@ put_var_into_stack (tree decl, int rescan) /* Now we should have a value that resides in one or more pseudo regs. */ - if (GET_CODE (reg) == REG) + if (REG_P (reg)) { if (can_use_addressof_p) gen_mem_addressof (reg, decl, rescan); @@ -1761,7 +1761,7 @@ fixup_var_refs_insn (rtx insn, rtx var, enum machine_mode promoted_mode, don't delete the insn. */ && find_reg_note (insn, REG_RETVAL, NULL_RTX) == 0 && (rtx_equal_p (SET_SRC (set), var) - || (GET_CODE (SET_SRC (set)) == REG + || (REG_P (SET_SRC (set)) && (prev = prev_nonnote_insn (insn)) != 0 && (prev_set = single_set (prev)) != 0 && SET_DEST (prev_set) == SET_SRC (set) @@ -1836,7 +1836,7 @@ fixup_var_refs_insn (rtx insn, rtx var, enum machine_mode promoted_mode, { struct fixup_replacement *next; - if (GET_CODE (replacements->new) == REG) + if (REG_P (replacements->new)) { rtx insert_before; rtx seq; @@ -2351,9 +2351,9 @@ fixup_var_refs_1 (rtx var, enum machine_mode promoted_mode, rtx *loc, rtx insn, if ((SET_SRC (x) == var || (GET_CODE (SET_SRC (x)) == SUBREG && SUBREG_REG (SET_SRC (x)) == var)) - && (GET_CODE (SET_DEST (x)) == REG + && (REG_P (SET_DEST (x)) || (GET_CODE (SET_DEST (x)) == SUBREG - && GET_CODE (SUBREG_REG (SET_DEST (x))) == REG)) + && REG_P (SUBREG_REG (SET_DEST (x))))) && GET_MODE (var) == promoted_mode && x == single_set (insn)) { @@ -2422,9 +2422,9 @@ fixup_var_refs_1 (rtx var, enum machine_mode promoted_mode, rtx *loc, rtx insn, if ((SET_DEST (x) == var || (GET_CODE (SET_DEST (x)) == SUBREG && SUBREG_REG (SET_DEST (x)) == var)) - && (GET_CODE (SET_SRC (x)) == REG + && (REG_P (SET_SRC (x)) || (GET_CODE (SET_SRC (x)) == SUBREG - && GET_CODE (SUBREG_REG (SET_SRC (x))) == REG)) + && REG_P (SUBREG_REG (SET_SRC (x))))) && GET_MODE (var) == promoted_mode && x == single_set (insn)) { @@ -2635,7 +2635,7 @@ fixup_stack_1 (rtx x, rtx insn) /* If we have address of a stack slot but it's not valid (displacement is too large), compute the sum in a register. */ if (GET_CODE (ad) == PLUS - && GET_CODE (XEXP (ad, 0)) == REG + && REG_P (XEXP (ad, 0)) && ((REGNO (XEXP (ad, 0)) >= FIRST_VIRTUAL_REGISTER && REGNO (XEXP (ad, 0)) <= LAST_VIRTUAL_REGISTER) || REGNO (XEXP (ad, 0)) == FRAME_POINTER_REGNUM @@ -2717,7 +2717,7 @@ optimize_bit_field (rtx body, rtx insn, rtx *equiv_mem) if (GET_CODE (XEXP (bitfield, 0)) == MEM) memref = XEXP (bitfield, 0); - else if (GET_CODE (XEXP (bitfield, 0)) == REG + else if (REG_P (XEXP (bitfield, 0)) && equiv_mem != 0) memref = equiv_mem[REGNO (XEXP (bitfield, 0))]; else if (GET_CODE (XEXP (bitfield, 0)) == SUBREG @@ -2725,7 +2725,7 @@ optimize_bit_field (rtx body, rtx insn, rtx *equiv_mem) memref = SUBREG_REG (XEXP (bitfield, 0)); else if (GET_CODE (XEXP (bitfield, 0)) == SUBREG && equiv_mem != 0 - && GET_CODE (SUBREG_REG (XEXP (bitfield, 0))) == REG) + && REG_P (SUBREG_REG (XEXP (bitfield, 0)))) memref = equiv_mem[REGNO (SUBREG_REG (XEXP (bitfield, 0)))]; if (memref @@ -2962,7 +2962,7 @@ flush_addressof (tree decl) && DECL_RTL (decl) != 0 && GET_CODE (DECL_RTL (decl)) == MEM && GET_CODE (XEXP (DECL_RTL (decl), 0)) == ADDRESSOF - && GET_CODE (XEXP (XEXP (DECL_RTL (decl), 0), 0)) == REG) + && REG_P (XEXP (XEXP (DECL_RTL (decl), 0), 0))) put_addressof_into_stack (XEXP (DECL_RTL (decl), 0), 0); } @@ -2976,7 +2976,7 @@ put_addressof_into_stack (rtx r, htab_t ht) rtx reg = XEXP (r, 0); - if (GET_CODE (reg) != REG) + if (!REG_P (reg)) abort (); decl = ADDRESSOF_DECL (r); @@ -3071,7 +3071,7 @@ purge_addressof_1 (rtx *loc, rtx insn, int force, int store, int may_postpone, /* If SUB is a hard or virtual register, try it as a pseudo-register. Otherwise, perhaps SUB is an expression, so generate code to compute it. */ - if (GET_CODE (sub) == REG && REGNO (sub) <= LAST_VIRTUAL_REGISTER) + if (REG_P (sub) && REGNO (sub) <= LAST_VIRTUAL_REGISTER) sub = copy_to_reg (sub); else sub = force_operand (sub, NULL_RTX); @@ -3092,10 +3092,10 @@ purge_addressof_1 (rtx *loc, rtx insn, int force, int store, int may_postpone, if (GET_CODE (sub) == MEM) sub = adjust_address_nv (sub, GET_MODE (x), 0); - else if (GET_CODE (sub) == REG + else if (REG_P (sub) && (MEM_VOLATILE_P (x) || GET_MODE (x) == BLKmode)) ; - else if (GET_CODE (sub) == REG && GET_MODE (x) != GET_MODE (sub)) + else if (REG_P (sub) && GET_MODE (x) != GET_MODE (sub)) { int size_x, size_sub; @@ -3133,7 +3133,7 @@ purge_addressof_1 (rtx *loc, rtx insn, int force, int store, int may_postpone, rtx z = XEXP (XEXP (tem, 1), 0); if (GET_MODE (x) == GET_MODE (z) - || (GET_CODE (XEXP (XEXP (tem, 1), 0)) != REG + || (!REG_P (XEXP (XEXP (tem, 1), 0)) && GET_CODE (XEXP (XEXP (tem, 1), 0)) != SUBREG)) abort (); @@ -3298,7 +3298,7 @@ purge_addressof_1 (rtx *loc, rtx insn, int force, int store, int may_postpone, { /* Remember the replacement so that the same one can be done on the REG_NOTES. */ - if (GET_CODE (sub) == REG || GET_CODE (sub) == SUBREG) + if (REG_P (sub) || GET_CODE (sub) == SUBREG) { rtx tem; @@ -3385,7 +3385,7 @@ insns_for_mem_walk (rtx *r, void *data) tmp.insns = NULL_RTX; if (ifmwi->pass == 0 && *r && GET_CODE (*r) == ADDRESSOF - && GET_CODE (XEXP (*r, 0)) == REG) + && REG_P (XEXP (*r, 0))) { void **e; tmp.key = XEXP (*r, 0); @@ -3396,7 +3396,7 @@ insns_for_mem_walk (rtx *r, void *data) memcpy (*e, &tmp, sizeof (tmp)); } } - else if (ifmwi->pass == 1 && *r && GET_CODE (*r) == REG) + else if (ifmwi->pass == 1 && *r && REG_P (*r)) { struct insns_for_mem_entry *ifme; tmp.key = *r; @@ -3534,7 +3534,7 @@ purge_single_hard_subreg_set (rtx pattern) enum machine_mode mode = GET_MODE (SET_DEST (pattern)); int offset = 0; - if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG + if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg)) && REGNO (SUBREG_REG (reg)) < FIRST_PSEUDO_REGISTER) { offset = subreg_regno_offset (REGNO (SUBREG_REG (reg)), @@ -3545,7 +3545,7 @@ purge_single_hard_subreg_set (rtx pattern) } - if (GET_CODE (reg) == REG && REGNO (reg) < FIRST_PSEUDO_REGISTER) + if (REG_P (reg) && REGNO (reg) < FIRST_PSEUDO_REGISTER) { reg = gen_rtx_REG (mode, REGNO (reg) + offset); SET_DEST (pattern) = reg; @@ -3724,8 +3724,8 @@ instantiate_decl (rtx x, HOST_WIDE_INT size, int valid_only) addr = XEXP (x, 0); if (CONSTANT_P (addr) - || (GET_CODE (addr) == ADDRESSOF && GET_CODE (XEXP (addr, 0)) == REG) - || (GET_CODE (addr) == REG + || (GET_CODE (addr) == ADDRESSOF && REG_P (XEXP (addr, 0))) + || (REG_P (addr) && (REGNO (addr) < FIRST_VIRTUAL_REGISTER || REGNO (addr) > LAST_VIRTUAL_REGISTER))) return; @@ -3883,14 +3883,14 @@ instantiate_virtual_regs_1 (rtx *loc, rtx object, int extra_insns) /* The only valid sources here are PLUS or REG. Just do the simplest possible thing to handle them. */ - if (GET_CODE (src) != REG && GET_CODE (src) != PLUS) + if (!REG_P (src) && GET_CODE (src) != PLUS) { instantiate_virtual_regs_lossage (object); return 1; } start_sequence (); - if (GET_CODE (src) != REG) + if (!REG_P (src)) temp = force_operand (src, NULL_RTX); else temp = src; @@ -3956,7 +3956,7 @@ instantiate_virtual_regs_1 (rtx *loc, rtx object, int extra_insns) /* We know the second operand is a constant. Unless the first operand is a REG (which has been already checked), it needs to be checked. */ - if (GET_CODE (XEXP (x, 0)) != REG) + if (!REG_P (XEXP (x, 0))) { loc = &XEXP (x, 0); goto restart; @@ -4145,7 +4145,7 @@ instantiate_virtual_regs_1 (rtx *loc, rtx object, int extra_insns) if ((GET_CODE (XEXP (x, 0)) == MEM && instantiate_virtual_regs_1 (&XEXP (XEXP (x, 0), 0), XEXP (x, 0), 0)) - || (GET_CODE (XEXP (x, 0)) == REG + || (REG_P (XEXP (x, 0)) && instantiate_virtual_regs_1 (&XEXP (x, 0), object, 0))) return 1; @@ -4179,7 +4179,7 @@ instantiate_virtual_regs_1 (rtx *loc, rtx object, int extra_insns) return 1; case ADDRESSOF: - if (GET_CODE (XEXP (x, 0)) == REG) + if (REG_P (XEXP (x, 0))) return 1; else if (GET_CODE (XEXP (x, 0)) == MEM) @@ -4273,7 +4273,7 @@ aggregate_value_p (tree exp, tree fntype) /* If we have something other than a REG (e.g. a PARALLEL), then assume it is OK. */ - if (GET_CODE (reg) != REG) + if (!REG_P (reg)) return 0; regno = REGNO (reg); @@ -4711,7 +4711,7 @@ assign_parms (tree fndecl) for (i = 0; i < len; i++) if (XEXP (XVECEXP (entry_parm, 0, i), 0) != NULL_RTX - && GET_CODE (XEXP (XVECEXP (entry_parm, 0, i), 0)) == REG + && REG_P (XEXP (XVECEXP (entry_parm, 0, i), 0)) && (GET_MODE (XEXP (XVECEXP (entry_parm, 0, i), 0)) == passed_mode) && INTVAL (XEXP (XVECEXP (entry_parm, 0, i), 1)) == 0) @@ -4781,7 +4781,7 @@ assign_parms (tree fndecl) /* If a BLKmode arrives in registers, copy it to a stack slot. Handle calls that pass values in multiple non-contiguous locations. The Irix 6 ABI has examples of this. */ - if (GET_CODE (entry_parm) == REG + if (REG_P (entry_parm) || (GET_CODE (entry_parm) == PARALLEL && (!loaded_in_reg || !optimize))) { @@ -4947,7 +4947,7 @@ assign_parms (tree fndecl) if (GET_CODE (tempreg) == SUBREG && GET_MODE (tempreg) == nominal_mode - && GET_CODE (SUBREG_REG (tempreg)) == REG + && REG_P (SUBREG_REG (tempreg)) && nominal_mode == passed_mode && GET_MODE (SUBREG_REG (tempreg)) == GET_MODE (entry_parm) && GET_MODE_SIZE (GET_MODE (tempreg)) @@ -5433,7 +5433,7 @@ promoted_input_arg (unsigned int regno, enum machine_mode *pmode, int *punsigned for (arg = DECL_ARGUMENTS (current_function_decl); arg; arg = TREE_CHAIN (arg)) - if (GET_CODE (DECL_INCOMING_RTL (arg)) == REG + if (REG_P (DECL_INCOMING_RTL (arg)) && REGNO (DECL_INCOMING_RTL (arg)) == regno && TYPE_MODE (DECL_ARG_TYPE (arg)) == TYPE_MODE (TREE_TYPE (arg))) { @@ -5708,7 +5708,7 @@ setjmp_vars_warning (tree block) { if (TREE_CODE (decl) == VAR_DECL && DECL_RTL_SET_P (decl) - && GET_CODE (DECL_RTL (decl)) == REG + && REG_P (DECL_RTL (decl)) && regno_clobbered_at_setjmp (REGNO (DECL_RTL (decl)))) warning ("%Jvariable '%D' might be clobbered by `longjmp' or `vfork'", decl, decl); @@ -5728,7 +5728,7 @@ setjmp_args_warning (void) for (decl = DECL_ARGUMENTS (current_function_decl); decl; decl = TREE_CHAIN (decl)) if (DECL_RTL (decl) != 0 - && GET_CODE (DECL_RTL (decl)) == REG + && REG_P (DECL_RTL (decl)) && regno_clobbered_at_setjmp (REGNO (DECL_RTL (decl)))) warning ("%Jargument '%D' might be clobbered by `longjmp' or `vfork'", decl, decl); @@ -5745,7 +5745,7 @@ setjmp_protect (tree block) if ((TREE_CODE (decl) == VAR_DECL || TREE_CODE (decl) == PARM_DECL) && DECL_RTL (decl) != 0 - && (GET_CODE (DECL_RTL (decl)) == REG + && (REG_P (DECL_RTL (decl)) || (GET_CODE (DECL_RTL (decl)) == MEM && GET_CODE (XEXP (DECL_RTL (decl), 0)) == ADDRESSOF)) /* If this variable came from an inline function, it must be @@ -5778,7 +5778,7 @@ setjmp_protect_args (void) if ((TREE_CODE (decl) == VAR_DECL || TREE_CODE (decl) == PARM_DECL) && DECL_RTL (decl) != 0 - && (GET_CODE (DECL_RTL (decl)) == REG + && (REG_P (DECL_RTL (decl)) || (GET_CODE (DECL_RTL (decl)) == MEM && GET_CODE (XEXP (DECL_RTL (decl), 0)) == ADDRESSOF)) && ( @@ -5815,7 +5815,7 @@ fix_lexical_addr (rtx addr, tree var) addr = XEXP (XEXP (addr, 0), 0); /* Decode given address as base reg plus displacement. */ - if (GET_CODE (addr) == REG) + if (REG_P (addr)) basereg = addr, displacement = 0; else if (GET_CODE (addr) == PLUS && GET_CODE (XEXP (addr, 1)) == CONST_INT) basereg = XEXP (addr, 0), displacement = INTVAL (XEXP (addr, 1)); @@ -6592,7 +6592,7 @@ diddle_return_value (void (*doit) (rtx, void *), void *arg) if (! outgoing) return; - if (GET_CODE (outgoing) == REG) + if (REG_P (outgoing)) (*doit) (outgoing, arg); else if (GET_CODE (outgoing) == PARALLEL) { @@ -6602,7 +6602,7 @@ diddle_return_value (void (*doit) (rtx, void *), void *arg) { rtx x = XEXP (XVECEXP (outgoing, 0, i), 0); - if (GET_CODE (x) == REG && REGNO (x) < FIRST_PSEUDO_REGISTER) + if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER) (*doit) (x, arg); } } @@ -7154,7 +7154,7 @@ keep_stack_depressed (rtx insns) unchanged. Otherwise, it must be a MEM and we see what the base register and offset are. In any case, we have to emit any pending load to the equivalent reg of SP, if any. */ - if (GET_CODE (retaddr) == REG) + if (REG_P (retaddr)) { emit_equiv_load (&info); add_insn (insn); @@ -7162,11 +7162,11 @@ keep_stack_depressed (rtx insns) continue; } else if (GET_CODE (retaddr) == MEM - && GET_CODE (XEXP (retaddr, 0)) == REG) + && REG_P (XEXP (retaddr, 0))) base = gen_rtx_REG (Pmode, REGNO (XEXP (retaddr, 0))), offset = 0; else if (GET_CODE (retaddr) == MEM && GET_CODE (XEXP (retaddr, 0)) == PLUS - && GET_CODE (XEXP (XEXP (retaddr, 0), 0)) == REG + && REG_P (XEXP (XEXP (retaddr, 0), 0)) && GET_CODE (XEXP (XEXP (retaddr, 0), 1)) == CONST_INT) { base = gen_rtx_REG (Pmode, REGNO (XEXP (XEXP (retaddr, 0), 0))); @@ -7291,7 +7291,7 @@ handle_epilogue_set (rtx set, struct epi_info *p) p->new_sp_equiv_reg = XEXP (SET_SRC (set), 0); if (GET_CODE (XEXP (SET_SRC (set), 1)) == CONST_INT) p->new_sp_offset = INTVAL (XEXP (SET_SRC (set), 1)); - else if (GET_CODE (XEXP (SET_SRC (set), 1)) == REG + else if (REG_P (XEXP (SET_SRC (set), 1)) && REGNO (XEXP (SET_SRC (set), 1)) < FIRST_PSEUDO_REGISTER && p->const_equiv[REGNO (XEXP (SET_SRC (set), 1))] != 0) p->new_sp_offset @@ -7309,7 +7309,7 @@ handle_epilogue_set (rtx set, struct epi_info *p) p->new_sp_offset += p->sp_offset; } - if (p->new_sp_equiv_reg == 0 || GET_CODE (p->new_sp_equiv_reg) != REG) + if (p->new_sp_equiv_reg == 0 || !REG_P (p->new_sp_equiv_reg)) abort (); return; @@ -7326,8 +7326,8 @@ handle_epilogue_set (rtx set, struct epi_info *p) else if (p->new_sp_equiv_reg != 0 && reg_set_p (p->new_sp_equiv_reg, set)) { if (p->equiv_reg_src != 0 - || GET_CODE (p->new_sp_equiv_reg) != REG - || GET_CODE (SET_DEST (set)) != REG + || !REG_P (p->new_sp_equiv_reg) + || !REG_P (SET_DEST (set)) || GET_MODE_BITSIZE (GET_MODE (SET_DEST (set))) > BITS_PER_WORD || REGNO (p->new_sp_equiv_reg) != REGNO (SET_DEST (set))) abort (); @@ -7360,7 +7360,7 @@ update_epilogue_consts (rtx dest, rtx x, void *data) struct epi_info *p = (struct epi_info *) data; rtx new; - if (GET_CODE (dest) != REG || REGNO (dest) >= FIRST_PSEUDO_REGISTER) + if (!REG_P (dest) || REGNO (dest) >= FIRST_PSEUDO_REGISTER) return; /* If we are either clobbering a register or doing a partial set, @@ -7375,7 +7375,7 @@ update_epilogue_consts (rtx dest, rtx x, void *data) /* If this is a binary operation between a register we have been tracking and a constant, see if we can compute a new constant value. */ else if (ARITHMETIC_P (SET_SRC (x)) - && GET_CODE (XEXP (SET_SRC (x), 0)) == REG + && REG_P (XEXP (SET_SRC (x), 0)) && REGNO (XEXP (SET_SRC (x), 0)) < FIRST_PSEUDO_REGISTER && p->const_equiv[REGNO (XEXP (SET_SRC (x), 0))] != 0 && GET_CODE (XEXP (SET_SRC (x), 1)) == CONST_INT diff --git a/gcc/genemit.c b/gcc/genemit.c index c31b1fb..0195c97 100644 --- a/gcc/genemit.c +++ b/gcc/genemit.c @@ -321,7 +321,7 @@ gen_insn (rtx insn, int lineno) if (GET_CODE (XVECEXP (insn, 1, i)) != CLOBBER) break; - if (GET_CODE (XEXP (XVECEXP (insn, 1, i), 0)) == REG) + if (REG_P (XEXP (XVECEXP (insn, 1, i), 0))) has_hard_reg = 1; else if (GET_CODE (XEXP (XVECEXP (insn, 1, i), 0)) != MATCH_SCRATCH) break; @@ -355,7 +355,7 @@ gen_insn (rtx insn, int lineno) if (! (GET_MODE (old) == GET_MODE (new) && ((GET_CODE (old) == MATCH_SCRATCH && GET_CODE (new) == MATCH_SCRATCH) - || (GET_CODE (old) == REG && GET_CODE (new) == REG + || (REG_P (old) && REG_P (new) && REGNO (old) == REGNO (new))))) break; } diff --git a/gcc/genrecog.c b/gcc/genrecog.c index c727fec..6dc1084 100644 --- a/gcc/genrecog.c +++ b/gcc/genrecog.c @@ -2522,7 +2522,7 @@ make_insn_sequence (rtx insn, enum routine_type type) { rtx y = XVECEXP (x, 0, i - 1); if (GET_CODE (y) != CLOBBER - || (GET_CODE (XEXP (y, 0)) != REG + || (!REG_P (XEXP (y, 0)) && GET_CODE (XEXP (y, 0)) != MATCH_SCRATCH)) break; } diff --git a/gcc/global.c b/gcc/global.c index 5826f83..bef4023 100644 --- a/gcc/global.c +++ b/gcc/global.c @@ -849,7 +849,7 @@ global_conflicts (void) { rtx set = XVECEXP (PATTERN (insn), 0, i); if (GET_CODE (set) == SET - && GET_CODE (SET_DEST (set)) != REG + && !REG_P (SET_DEST (set)) && !rtx_equal_p (reg, SET_DEST (set)) && reg_overlap_mentioned_p (reg, SET_DEST (set))) used_in_output = 1; @@ -896,11 +896,11 @@ expand_preferences (void) for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) if (INSN_P (insn) && (set = single_set (insn)) != 0 - && GET_CODE (SET_DEST (set)) == REG + && REG_P (SET_DEST (set)) && reg_allocno[REGNO (SET_DEST (set))] >= 0) for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) if (REG_NOTE_KIND (link) == REG_DEAD - && GET_CODE (XEXP (link, 0)) == REG + && REG_P (XEXP (link, 0)) && reg_allocno[REGNO (XEXP (link, 0))] >= 0 && ! CONFLICTP (reg_allocno[REGNO (SET_DEST (set))], reg_allocno[REGNO (XEXP (link, 0))])) @@ -1465,7 +1465,7 @@ mark_reg_store (rtx reg, rtx setter, void *data ATTRIBUTE_UNUSED) if (GET_CODE (reg) == SUBREG) reg = SUBREG_REG (reg); - if (GET_CODE (reg) != REG) + if (!REG_P (reg)) return; regs_set[n_regs_set++] = reg; @@ -1522,7 +1522,7 @@ mark_reg_conflicts (rtx reg) if (GET_CODE (reg) == SUBREG) reg = SUBREG_REG (reg); - if (GET_CODE (reg) != REG) + if (!REG_P (reg)) return; regno = REGNO (reg); @@ -1625,9 +1625,9 @@ set_preference (rtx dest, rtx src) /* Get the reg number for both SRC and DEST. If neither is a reg, give up. */ - if (GET_CODE (src) == REG) + if (REG_P (src)) src_regno = REGNO (src); - else if (GET_CODE (src) == SUBREG && GET_CODE (SUBREG_REG (src)) == REG) + else if (GET_CODE (src) == SUBREG && REG_P (SUBREG_REG (src))) { src_regno = REGNO (SUBREG_REG (src)); @@ -1643,9 +1643,9 @@ set_preference (rtx dest, rtx src) else return; - if (GET_CODE (dest) == REG) + if (REG_P (dest)) dest_regno = REGNO (dest); - else if (GET_CODE (dest) == SUBREG && GET_CODE (SUBREG_REG (dest)) == REG) + else if (GET_CODE (dest) == SUBREG && REG_P (SUBREG_REG (dest))) { dest_regno = REGNO (SUBREG_REG (dest)); @@ -1746,7 +1746,7 @@ reg_becomes_live (rtx reg, rtx setter ATTRIBUTE_UNUSED, void *regs_set) if (GET_CODE (reg) == SUBREG) reg = SUBREG_REG (reg); - if (GET_CODE (reg) != REG) + if (!REG_P (reg)) return; regno = REGNO (reg); @@ -1841,7 +1841,7 @@ build_insn_chain (rtx first) for (link = REG_NOTES (first); link; link = XEXP (link, 1)) if (REG_NOTE_KIND (link) == REG_DEAD - && GET_CODE (XEXP (link, 0)) == REG) + && REG_P (XEXP (link, 0))) reg_dies (REGNO (XEXP (link, 0)), GET_MODE (XEXP (link, 0)), c); @@ -1863,7 +1863,7 @@ build_insn_chain (rtx first) for (link = REG_NOTES (first); link; link = XEXP (link, 1)) if (REG_NOTE_KIND (link) == REG_UNUSED - && GET_CODE (XEXP (link, 0)) == REG) + && REG_P (XEXP (link, 0))) reg_dies (REGNO (XEXP (link, 0)), GET_MODE (XEXP (link, 0)), c); } @@ -2074,7 +2074,7 @@ mark_reg_change (rtx reg, rtx setter, void *data) if (GET_CODE (reg) == SUBREG) reg = SUBREG_REG (reg); - if (GET_CODE (reg) != REG) + if (!REG_P (reg)) return; regno = REGNO (reg); diff --git a/gcc/haifa-sched.c b/gcc/haifa-sched.c index 033aaae..e3c819c 100644 --- a/gcc/haifa-sched.c +++ b/gcc/haifa-sched.c @@ -307,7 +307,7 @@ static int may_trap_exp (rtx, int); /* Nonzero iff the address is comprised from at most 1 register. */ #define CONST_BASED_ADDRESS_P(x) \ - (GET_CODE (x) == REG \ + (REG_P (x) \ || ((GET_CODE (x) == PLUS || GET_CODE (x) == MINUS \ || (GET_CODE (x) == LO_SUM)) \ && (CONSTANT_P (XEXP (x, 0)) \ @@ -1685,7 +1685,7 @@ find_set_reg_weight (rtx x) if (GET_CODE (x) == SET && register_operand (SET_DEST (x), VOIDmode)) { - if (GET_CODE (SET_DEST (x)) == REG) + if (REG_P (SET_DEST (x))) { if (!reg_mentioned_p (SET_DEST (x), SET_SRC (x))) return 1; diff --git a/gcc/ifcvt.c b/gcc/ifcvt.c index a6066da..270cc59 100644 --- a/gcc/ifcvt.c +++ b/gcc/ifcvt.c @@ -1969,7 +1969,7 @@ noce_process_if_block (struct ce_if_block * ce_info) /* Only operate on register destinations, and even then avoid extending the lifetime of hard registers on small register class machines. */ orig_x = x; - if (GET_CODE (x) != REG + if (!REG_P (x) || (SMALL_REGISTER_CLASSES && REGNO (x) < FIRST_PSEUDO_REGISTER)) { diff --git a/gcc/integrate.c b/gcc/integrate.c index de89717..df2c823 100644 --- a/gcc/integrate.c +++ b/gcc/integrate.c @@ -558,7 +558,7 @@ copy_rtx_and_substitute (rtx orig, struct inline_remap *map, int for_lhs) equiv_loc = VARRAY_CONST_EQUIV (map->const_equiv_varray, REGNO (equiv_reg)).rtx; loc_offset - = GET_CODE (equiv_loc) == REG ? 0 : INTVAL (XEXP (equiv_loc, 1)); + = REG_P (equiv_loc) ? 0 : INTVAL (XEXP (equiv_loc, 1)); return gen_rtx_SET (VOIDmode, SET_DEST (orig), force_operand @@ -691,7 +691,7 @@ try_constants (rtx insn, struct inline_remap *map) /* Set up any constant equivalences made in this insn. */ for (i = 0; i < map->num_sets; i++) { - if (GET_CODE (map->equiv_sets[i].dest) == REG) + if (REG_P (map->equiv_sets[i].dest)) { int regno = REGNO (map->equiv_sets[i].dest); @@ -792,7 +792,7 @@ subst_constants (rtx *loc, rtx insn, struct inline_remap *map, int memonly) be a special hack and we don't know how to treat it specially. Consider for example mulsidi3 in m68k.md. Ordinary SUBREG of a REG needs this special treatment. */ - if (! memonly && GET_CODE (SUBREG_REG (x)) == REG) + if (! memonly && REG_P (SUBREG_REG (x))) { rtx inner = SUBREG_REG (x); rtx new = 0; @@ -885,11 +885,11 @@ subst_constants (rtx *loc, rtx insn, struct inline_remap *map, int memonly) /* If storing a recognizable value save it for later recording. */ if ((map->num_sets < MAX_RECOG_OPERANDS) && (CONSTANT_P (src) - || (GET_CODE (src) == REG + || (REG_P (src) && (REGNO (src) == VIRTUAL_INCOMING_ARGS_REGNUM || REGNO (src) == VIRTUAL_STACK_VARS_REGNUM)) || (GET_CODE (src) == PLUS - && GET_CODE (XEXP (src, 0)) == REG + && REG_P (XEXP (src, 0)) && (REGNO (XEXP (src, 0)) == VIRTUAL_INCOMING_ARGS_REGNUM || REGNO (XEXP (src, 0)) == VIRTUAL_STACK_VARS_REGNUM) && CONSTANT_P (XEXP (src, 1))) @@ -1062,9 +1062,9 @@ mark_stores (rtx dest, rtx x ATTRIBUTE_UNUSED, void *data ATTRIBUTE_UNUSED) /* DEST is always the innermost thing set, except in the case of SUBREGs of hard registers. */ - if (GET_CODE (dest) == REG) + if (REG_P (dest)) regno = REGNO (dest), mode = GET_MODE (dest); - else if (GET_CODE (dest) == SUBREG && GET_CODE (SUBREG_REG (dest)) == REG) + else if (GET_CODE (dest) == SUBREG && REG_P (SUBREG_REG (dest))) { regno = REGNO (SUBREG_REG (dest)); if (regno < FIRST_PSEUDO_REGISTER) @@ -1324,7 +1324,7 @@ allocate_initial_values (rtx *reg_equiv_memory_loc ATTRIBUTE_UNUSED) ; /* Do nothing. */ else if (GET_CODE (x) == MEM) reg_equiv_memory_loc[regno] = x; - else if (GET_CODE (x) == REG) + else if (REG_P (x)) { reg_renumber[regno] = REGNO (x); /* Poke the regno right into regno_reg_rtx @@ -1237,7 +1237,7 @@ delete_prior_computation (rtx note, rtx insn) delete_computation (our_prev); } else if (GET_CODE (pat) == SET - && GET_CODE (SET_DEST (pat)) == REG) + && REG_P (SET_DEST (pat))) { int dest_regno = REGNO (SET_DEST (pat)); int dest_endregno @@ -1340,7 +1340,7 @@ delete_computation (rtx insn) if (REG_NOTE_KIND (note) != REG_DEAD /* Verify that the REG_NOTE is legitimate. */ - || GET_CODE (XEXP (note, 0)) != REG) + || !REG_P (XEXP (note, 0))) continue; delete_prior_computation (note, insn); @@ -1815,9 +1815,9 @@ rtx_renumbered_equal_p (rtx x, rtx y) if (x == y) return 1; - if ((code == REG || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG)) - && (GET_CODE (y) == REG || (GET_CODE (y) == SUBREG - && GET_CODE (SUBREG_REG (y)) == REG))) + if ((code == REG || (code == SUBREG && REG_P (SUBREG_REG (x)))) + && (REG_P (y) || (GET_CODE (y) == SUBREG + && REG_P (SUBREG_REG (y))))) { int reg_x = -1, reg_y = -1; int byte_x = 0, byte_y = 0; @@ -1994,7 +1994,7 @@ rtx_renumbered_equal_p (rtx x, rtx y) int true_regnum (rtx x) { - if (GET_CODE (x) == REG) + if (REG_P (x)) { if (REGNO (x) >= FIRST_PSEUDO_REGISTER && reg_renumber[REGNO (x)] >= 0) return reg_renumber[REGNO (x)]; @@ -927,7 +927,7 @@ reg_dies (rtx reg, HARD_REG_SET live) { int regno, nregs; - if (GET_CODE (reg) != REG) + if (!REG_P (reg)) return; regno = REGNO (reg); @@ -948,7 +948,7 @@ reg_becomes_live (rtx reg, rtx setter ATTRIBUTE_UNUSED, void *live) if (GET_CODE (reg) == SUBREG) reg = SUBREG_REG (reg); - if (GET_CODE (reg) != REG) + if (!REG_P (reg)) return; regno = REGNO (reg); diff --git a/gcc/local-alloc.c b/gcc/local-alloc.c index 1802d09..e69fb24 100644 --- a/gcc/local-alloc.c +++ b/gcc/local-alloc.c @@ -448,7 +448,7 @@ static void validate_equiv_mem_from_store (rtx dest, rtx set ATTRIBUTE_UNUSED, void *data ATTRIBUTE_UNUSED) { - if ((GET_CODE (dest) == REG + if ((REG_P (dest) && reg_overlap_mentioned_p (dest, equiv_mem)) || (GET_CODE (dest) == MEM && true_dependence (dest, VOIDmode, equiv_mem, rtx_varies_p))) @@ -498,7 +498,7 @@ validate_equiv_mem (rtx start, rtx reg, rtx memref) for (note = REG_NOTES (insn); note; note = XEXP (note, 1)) if ((REG_NOTE_KIND (note) == REG_INC || REG_NOTE_KIND (note) == REG_DEAD) - && GET_CODE (XEXP (note, 0)) == REG + && REG_P (XEXP (note, 0)) && reg_overlap_mentioned_p (XEXP (note, 0), memref)) return 0; } @@ -849,7 +849,7 @@ update_equiv_regs (void) Equivalences to MEMs should be made in another pass, after the reg_equiv[].replace information has been gathered. */ - if (GET_CODE (dest) == MEM && GET_CODE (src) == REG + if (MEM_P (dest) && REG_P (src) && (regno = REGNO (src)) >= FIRST_PSEUDO_REGISTER && REG_BASIC_BLOCK (regno) >= 0 && REG_N_SETS (regno) == 1 @@ -878,7 +878,7 @@ update_equiv_regs (void) preferred class of a pseudo depends on all instructions that set or use it. */ - if (GET_CODE (dest) != REG + if (!REG_P (dest) || (regno = REGNO (dest)) < FIRST_PSEUDO_REGISTER || reg_equiv[regno].init_insns == const0_rtx || (CLASS_LIKELY_SPILLED_P (reg_preferred_class (regno)) @@ -1155,7 +1155,7 @@ no_equiv (rtx reg, rtx store ATTRIBUTE_UNUSED, void *data ATTRIBUTE_UNUSED) int regno; rtx list; - if (GET_CODE (reg) != REG) + if (!REG_P (reg)) return; regno = REGNO (reg); list = reg_equiv[regno].init_insns; @@ -1308,14 +1308,14 @@ block_alloc (int b) hard_reg = get_hard_reg_initial_reg (cfun, r1); if (hard_reg != NULL_RTX) { - if (GET_CODE (hard_reg) == REG + if (REG_P (hard_reg) && IN_RANGE (REGNO (hard_reg), 0, FIRST_PSEUDO_REGISTER - 1) && ! call_used_regs[REGNO (hard_reg)]) continue; } - if (GET_CODE (r0) == REG || GET_CODE (r0) == SUBREG) + if (REG_P (r0) || GET_CODE (r0) == SUBREG) { /* We have two priorities for hard register preferences. If we have a move insn or an insn whose first input @@ -1324,7 +1324,7 @@ block_alloc (int b) int may_save_copy = (r1 == recog_data.operand[i] && must_match_0 >= 0); - if (GET_CODE (r1) == REG || GET_CODE (r1) == SUBREG) + if (REG_P (r1) || GET_CODE (r1) == SUBREG) win = combine_regs (r1, r0, may_save_copy, insn_number, insn, 0); } @@ -1350,7 +1350,7 @@ block_alloc (int b) if (optimize && GET_CODE (PATTERN (insn)) == CLOBBER && (r0 = XEXP (PATTERN (insn), 0), - GET_CODE (r0) == REG) + REG_P (r0)) && (link = find_reg_note (insn, REG_LIBCALL, NULL_RTX)) != 0 && XEXP (link, 0) != 0 && GET_CODE (XEXP (link, 0)) == INSN @@ -1359,13 +1359,13 @@ block_alloc (int b) && (note = find_reg_note (XEXP (link, 0), REG_EQUAL, NULL_RTX)) != 0) { - if (r1 = XEXP (note, 0), GET_CODE (r1) == REG + if (r1 = XEXP (note, 0), REG_P (r1) /* Check that we have such a sequence. */ && no_conflict_p (insn, r0, r1)) win = combine_regs (r1, r0, 1, insn_number, insn, 1); else if (GET_RTX_FORMAT (GET_CODE (XEXP (note, 0)))[0] == 'e' && (r1 = XEXP (XEXP (note, 0), 0), - GET_CODE (r1) == REG || GET_CODE (r1) == SUBREG) + REG_P (r1) || GET_CODE (r1) == SUBREG) && no_conflict_p (insn, r0, r1)) win = combine_regs (r1, r0, 0, insn_number, insn, 1); @@ -1373,7 +1373,7 @@ block_alloc (int b) commutative. */ else if (COMMUTATIVE_P (XEXP (note, 0)) && (r1 = XEXP (XEXP (note, 0), 1), - (GET_CODE (r1) == REG || GET_CODE (r1) == SUBREG)) + (REG_P (r1) || GET_CODE (r1) == SUBREG)) && no_conflict_p (insn, r0, r1)) win = combine_regs (r1, r0, 0, insn_number, insn, 1); @@ -1400,7 +1400,7 @@ block_alloc (int b) for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) if (REG_NOTE_KIND (link) == REG_DEAD - && GET_CODE (XEXP (link, 0)) == REG + && REG_P (XEXP (link, 0)) && combined_regno != (int) REGNO (XEXP (link, 0)) && (no_conflict_combined_regno != (int) REGNO (XEXP (link, 0)) || ! find_reg_note (insn, REG_NO_CONFLICT, @@ -1421,7 +1421,7 @@ block_alloc (int b) for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) if (REG_NOTE_KIND (link) == REG_UNUSED - && GET_CODE (XEXP (link, 0)) == REG) + && REG_P (XEXP (link, 0))) wipe_dead_reg (XEXP (link, 0), 1); /* If this is an insn that has a REG_RETVAL note pointing at a @@ -1753,7 +1753,7 @@ combine_regs (rtx usedreg, rtx setreg, int may_save_copy, int insn_number, { rtx subreg = SUBREG_REG (usedreg); - if (GET_CODE (subreg) == REG) + if (REG_P (subreg)) { if (GET_MODE_SIZE (GET_MODE (subreg)) > UNITS_PER_WORD) may_save_copy = 0; @@ -1771,7 +1771,7 @@ combine_regs (rtx usedreg, rtx setreg, int may_save_copy, int insn_number, usedreg = subreg; } - if (GET_CODE (usedreg) != REG) + if (!REG_P (usedreg)) return 0; ureg = REGNO (usedreg); @@ -1786,7 +1786,7 @@ combine_regs (rtx usedreg, rtx setreg, int may_save_copy, int insn_number, { rtx subreg = SUBREG_REG (setreg); - if (GET_CODE (subreg) == REG) + if (REG_P (subreg)) { if (GET_MODE_SIZE (GET_MODE (subreg)) > UNITS_PER_WORD) may_save_copy = 0; @@ -1804,7 +1804,7 @@ combine_regs (rtx usedreg, rtx setreg, int may_save_copy, int insn_number, setreg = subreg; } - if (GET_CODE (setreg) != REG) + if (!REG_P (setreg)) return 0; sreg = REGNO (setreg); @@ -1984,7 +1984,7 @@ reg_is_set (rtx reg, rtx setter, void *data ATTRIBUTE_UNUSED) a hard register. These may actually not exist any more. */ if (GET_CODE (reg) != SUBREG - && GET_CODE (reg) != REG) + && !REG_P (reg)) return; /* Mark this register as being born. If it is used in a CLOBBER, mark @@ -2060,7 +2060,7 @@ wipe_dead_reg (rtx reg, int output_p) { rtx set = XVECEXP (PATTERN (this_insn), 0, i); if (GET_CODE (set) == SET - && GET_CODE (SET_DEST (set)) != REG + && !REG_P (SET_DEST (set)) && !rtx_equal_p (reg, SET_DEST (set)) && reg_overlap_mentioned_p (reg, SET_DEST (set))) output_p = 1; @@ -2310,8 +2310,8 @@ no_conflict_p (rtx insn, rtx r0 ATTRIBUTE_UNUSED, rtx r1) when we scan the insns that actually use it. */ if (note == 0 - || (GET_CODE (r1) == REG && REGNO (r1) < FIRST_PSEUDO_REGISTER) - || (GET_CODE (r1) == SUBREG && GET_CODE (SUBREG_REG (r1)) == REG + || (REG_P (r1) && REGNO (r1) < FIRST_PSEUDO_REGISTER) + || (GET_CODE (r1) == SUBREG && REG_P (SUBREG_REG (r1)) && REGNO (SUBREG_REG (r1)) < FIRST_PSEUDO_REGISTER)) return 0; diff --git a/gcc/loop-iv.c b/gcc/loop-iv.c index 0e416c4..0093743 100644 --- a/gcc/loop-iv.c +++ b/gcc/loop-iv.c @@ -1321,7 +1321,7 @@ simplify_using_assignment (rtx insn, rtx *expr, regset altered) if (set) { lhs = SET_DEST (set); - if (GET_CODE (lhs) != REG + if (!REG_P (lhs) || altered_reg_used (&lhs, altered)) ret = true; } @@ -772,7 +772,7 @@ scan_loop (struct loop *loop, int flags) in_libcall++; if (! in_libcall && (set = single_set (p)) - && GET_CODE (SET_DEST (set)) == REG + && REG_P (SET_DEST (set)) #ifdef PIC_OFFSET_TABLE_REG_CALL_CLOBBERED && SET_DEST (set) != pic_offset_table_rtx #endif @@ -877,7 +877,7 @@ scan_loop (struct loop *loop, int flags) else if (insert_temp && (optimize_size || ! can_copy_p (GET_MODE (SET_SRC (set))) - || GET_CODE (SET_SRC (set)) == REG + || REG_P (SET_SRC (set)) || (CONSTANT_P (SET_SRC (set)) && LEGITIMATE_CONSTANT_P (SET_SRC (set))))) ; @@ -928,7 +928,7 @@ scan_loop (struct loop *loop, int flags) && ! side_effects_p (SET_SRC (set)) && ! find_reg_note (p, REG_RETVAL, NULL_RTX) && (! SMALL_REGISTER_CLASSES - || (! (GET_CODE (SET_SRC (set)) == REG + || (! (REG_P (SET_SRC (set)) && (REGNO (SET_SRC (set)) < FIRST_PSEUDO_REGISTER)))) /* This test is not redundant; SET_SRC (set) might be @@ -1542,7 +1542,7 @@ combine_movables (struct loop_movables *movables, struct loop_regs *regs) && (GET_MODE_BITSIZE (GET_MODE (m->set_dest)) >= GET_MODE_BITSIZE (GET_MODE (m1->set_dest))))) /* See if the source of M1 says it matches M. */ - && ((GET_CODE (m1->set_src) == REG + && ((REG_P (m1->set_src) && matched_regs[REGNO (m1->set_src)]) || rtx_equal_for_loop_p (m->set_src, m1->set_src, movables, regs)))) @@ -1677,7 +1677,7 @@ rtx_equal_for_loop_p (rtx x, rtx y, struct loop_movables *movables, /* If we have a register and a constant, they may sometimes be equal. */ - if (GET_CODE (x) == REG && regs->array[REGNO (x)].set_in_loop == -2 + if (REG_P (x) && regs->array[REGNO (x)].set_in_loop == -2 && CONSTANT_P (y)) { for (m = movables->head; m; m = m->next) @@ -1685,7 +1685,7 @@ rtx_equal_for_loop_p (rtx x, rtx y, struct loop_movables *movables, && rtx_equal_p (m->set_src, y)) return 1; } - else if (GET_CODE (y) == REG && regs->array[REGNO (y)].set_in_loop == -2 + else if (REG_P (y) && regs->array[REGNO (y)].set_in_loop == -2 && CONSTANT_P (x)) { for (m = movables->head; m; m = m->next) @@ -2078,12 +2078,12 @@ move_movables (struct loop *loop, struct loop_movables *movables, redundant stores that we have created. */ if (GET_CODE (next) == CALL_INSN && GET_CODE (body) == SET - && GET_CODE (SET_DEST (body)) == REG + && REG_P (SET_DEST (body)) && (n = find_reg_note (temp, REG_EQUAL, NULL_RTX))) { fn_reg = SET_SRC (body); - if (GET_CODE (fn_reg) != REG) + if (!REG_P (fn_reg)) fn_reg = SET_DEST (body); fn_address = XEXP (n, 0); fn_address_insn = temp; @@ -3273,7 +3273,7 @@ note_set_pseudo_multiple_uses (rtx x, rtx y ATTRIBUTE_UNUSED, void *data) || GET_CODE (x) == SUBREG) x = XEXP (x, 0); - if (GET_CODE (x) != REG || REGNO (x) < FIRST_PSEUDO_REGISTER) + if (!REG_P (x) || REGNO (x) < FIRST_PSEUDO_REGISTER) return; /* If we do not have usage information, or if we know the register @@ -3470,7 +3470,7 @@ consec_sets_invariant_p (const struct loop *loop, rtx reg, int n_sets, this = 0; if (code == INSN && (set = single_set (p)) - && GET_CODE (SET_DEST (set)) == REG + && REG_P (SET_DEST (set)) && REGNO (SET_DEST (set)) == regno) { this = loop_invariant_p (loop, SET_SRC (set)); @@ -3525,7 +3525,7 @@ find_single_use_in_loop (struct loop_regs *regs, rtx insn, rtx x) in SET_DEST because if a register is partially modified, it won't show up as a potential movable so we don't care how USAGE is set for it. */ - if (GET_CODE (SET_DEST (x)) != REG) + if (!REG_P (SET_DEST (x))) find_single_use_in_loop (regs, insn, SET_DEST (x)); find_single_use_in_loop (regs, insn, SET_SRC (x)); } @@ -3547,7 +3547,7 @@ find_single_use_in_loop (struct loop_regs *regs, rtx insn, rtx x) static void count_one_set (struct loop_regs *regs, rtx insn, rtx x, rtx *last_set) { - if (GET_CODE (x) == CLOBBER && GET_CODE (XEXP (x, 0)) == REG) + if (GET_CODE (x) == CLOBBER && REG_P (XEXP (x, 0))) /* Don't move a reg that has an explicit clobber. It's not worth the pain to try to do it correctly. */ regs->array[REGNO (XEXP (x, 0))].may_not_optimize = 1; @@ -3560,7 +3560,7 @@ count_one_set (struct loop_regs *regs, rtx insn, rtx x, rtx *last_set) || GET_CODE (dest) == SIGN_EXTRACT || GET_CODE (dest) == STRICT_LOW_PART) dest = XEXP (dest, 0); - if (GET_CODE (dest) == REG) + if (REG_P (dest)) { int i; int regno = REGNO (dest); @@ -4517,7 +4517,7 @@ loop_bivs_init_find (struct loop *loop) && JUMP_LABEL (p) != 0 && next_real_insn (JUMP_LABEL (p)) == next_real_insn (loop->end) && (test = get_condition_for_loop (loop, p)) != 0 - && GET_CODE (XEXP (test, 0)) == REG + && REG_P (XEXP (test, 0)) && REGNO (XEXP (test, 0)) < max_reg_before_loop && (bl = REG_IV_CLASS (ivs, REGNO (XEXP (test, 0)))) != 0 && valid_initial_value_p (XEXP (test, 1), p, call_seen, loop->start) @@ -4864,12 +4864,12 @@ loop_givs_rescan (struct loop *loop, struct iv_class *bl, rtx *reg_map) computational information. If not, and this is a DEST_ADDR giv, at least we know that it's a pointer, though we don't know the alignment. */ - if (GET_CODE (v->new_reg) == REG + if (REG_P (v->new_reg) && v->giv_type == DEST_REG && REG_POINTER (v->dest_reg)) mark_reg_pointer (v->new_reg, REGNO_POINTER_ALIGN (REGNO (v->dest_reg))); - else if (GET_CODE (v->new_reg) == REG + else if (REG_P (v->new_reg) && REG_POINTER (v->src_reg)) { unsigned int align = REGNO_POINTER_ALIGN (REGNO (v->src_reg)); @@ -4881,8 +4881,8 @@ loop_givs_rescan (struct loop *loop, struct iv_class *bl, rtx *reg_map) mark_reg_pointer (v->new_reg, align); } - else if (GET_CODE (v->new_reg) == REG - && GET_CODE (v->add_val) == REG + else if (REG_P (v->new_reg) + && REG_P (v->add_val) && REG_POINTER (v->add_val)) { unsigned int align = REGNO_POINTER_ALIGN (REGNO (v->add_val)); @@ -4893,7 +4893,7 @@ loop_givs_rescan (struct loop *loop, struct iv_class *bl, rtx *reg_map) mark_reg_pointer (v->new_reg, align); } - else if (GET_CODE (v->new_reg) == REG && v->giv_type == DEST_ADDR) + else if (REG_P (v->new_reg) && v->giv_type == DEST_ADDR) mark_reg_pointer (v->new_reg, 0); if (v->giv_type == DEST_ADDR) @@ -5374,7 +5374,7 @@ check_insn_for_bivs (struct loop *loop, rtx p, int not_every_iteration, if (GET_CODE (p) == INSN && (set = single_set (p)) - && GET_CODE (SET_DEST (set)) == REG) + && REG_P (SET_DEST (set))) { dest_reg = SET_DEST (set); if (REGNO (dest_reg) < max_reg_before_loop @@ -5415,7 +5415,7 @@ check_insn_for_givs (struct loop *loop, rtx p, int not_every_iteration, /* Look for a general induction variable in a register. */ if (GET_CODE (p) == INSN && (set = single_set (p)) - && GET_CODE (SET_DEST (set)) == REG + && REG_P (SET_DEST (set)) && ! regs->array[REGNO (SET_DEST (set))].may_not_optimize) { rtx src_reg; @@ -5498,7 +5498,7 @@ valid_initial_value_p (rtx x, rtx insn, int call_seen, rtx loop_start) /* Only consider pseudos we know about initialized in insns whose luids we know. */ - if (GET_CODE (x) != REG + if (!REG_P (x) || REGNO (x) >= max_reg_before_loop) return 0; @@ -6580,9 +6580,9 @@ simplify_giv_expr (const struct loop *loop, rtx x, rtx *ext_val, int *benefit) /* Each argument must be either REG, PLUS, or MULT. Convert REG to MULT to reduce cases. */ - if (GET_CODE (arg0) == REG) + if (REG_P (arg0)) arg0 = gen_rtx_MULT (mode, arg0, const1_rtx); - if (GET_CODE (arg1) == REG) + if (REG_P (arg1)) arg1 = gen_rtx_MULT (mode, arg1, const1_rtx); /* Now have PLUS + PLUS, PLUS + MULT, MULT + PLUS, or MULT + MULT. @@ -6759,7 +6759,7 @@ simplify_giv_expr (const struct loop *loop, rtx x, rtx *ext_val, int *benefit) if (*ext_val == NULL_RTX) { arg0 = simplify_giv_expr (loop, XEXP (x, 0), ext_val, benefit); - if (arg0 && *ext_val == NULL_RTX && GET_CODE (arg0) == REG) + if (arg0 && *ext_val == NULL_RTX && REG_P (arg0)) { *ext_val = gen_rtx_fmt_e (GET_CODE (x), mode, arg0); return arg0; @@ -7038,7 +7038,7 @@ consec_sets_giv (const struct loop *loop, int first_benefit, rtx p, if (code == INSN && (set = single_set (p)) - && GET_CODE (SET_DEST (set)) == REG + && REG_P (SET_DEST (set)) && SET_DEST (set) == dest_reg && (general_induction_var (loop, SET_SRC (set), &src_reg, add_val, mult_val, ext_val, 0, @@ -7759,7 +7759,7 @@ loop_regs_update (const struct loop *loop ATTRIBUTE_UNUSED, rtx seq) { rtx set = single_set (insn); - if (set && GET_CODE (SET_DEST (set)) == REG) + if (set && REG_P (SET_DEST (set))) record_base_value (REGNO (SET_DEST (set)), SET_SRC (set), 0); insn = NEXT_INSN (insn); @@ -8144,7 +8144,7 @@ check_dbra_loop (struct loop *loop, int insn_count) { rtx set = single_set (p); - if (set && GET_CODE (SET_DEST (set)) == REG + if (set && REG_P (SET_DEST (set)) && REGNO (SET_DEST (set)) == bl->regno) /* An insn that sets the biv is okay. */ ; @@ -8525,7 +8525,7 @@ check_dbra_loop (struct loop *loop, int insn_count) /* If this is a set of a GIV based on the reversed biv, any REG_EQUAL notes should still be correct. */ if (! set - || GET_CODE (SET_DEST (set)) != REG + || !REG_P (SET_DEST (set)) || (size_t) REGNO (SET_DEST (set)) >= ivs->n_regs || REG_IV_TYPE (ivs, REGNO (SET_DEST (set))) != GENERAL_INDUCT || REG_IV_INFO (ivs, REGNO (SET_DEST (set)))->src_reg != bl->biv->src_reg) @@ -8600,7 +8600,7 @@ maybe_eliminate_biv (const struct loop *loop, struct iv_class *bl, rtx last = XEXP (note, 0); rtx set = single_set (last); - if (set && GET_CODE (SET_DEST (set)) == REG) + if (set && REG_P (SET_DEST (set))) { unsigned int regno = REGNO (SET_DEST (set)); @@ -8794,7 +8794,7 @@ maybe_eliminate_biv_1 (const struct loop *loop, rtx x, rtx insn, && (GET_CODE (v->add_val) == SYMBOL_REF || GET_CODE (v->add_val) == LABEL_REF || GET_CODE (v->add_val) == CONST - || (GET_CODE (v->add_val) == REG + || (REG_P (v->add_val) && REG_POINTER (v->add_val)))) { if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn)) @@ -8859,7 +8859,7 @@ maybe_eliminate_biv_1 (const struct loop *loop, rtx x, rtx insn, && (GET_CODE (v->add_val) == SYMBOL_REF || GET_CODE (v->add_val) == LABEL_REF || GET_CODE (v->add_val) == CONST - || (GET_CODE (v->add_val) == REG + || (REG_P (v->add_val) && REG_POINTER (v->add_val))) && ! v->ignore && ! v->maybe_dead && v->always_computable && v->mode == mode) @@ -8948,7 +8948,7 @@ maybe_eliminate_biv_1 (const struct loop *loop, rtx x, rtx insn, return 1; } } - else if (GET_CODE (arg) == REG || GET_CODE (arg) == MEM) + else if (REG_P (arg) || GET_CODE (arg) == MEM) { if (loop_invariant_p (loop, arg) == 1) { @@ -9000,7 +9000,7 @@ maybe_eliminate_biv_1 (const struct loop *loop, rtx x, rtx insn, #if 0 /* Otherwise the reg compared with had better be a biv. */ - if (GET_CODE (arg) != REG + if (!REG_P (arg) || REG_IV_TYPE (ivs, REGNO (arg)) != BASIC_INDUCT) return 0; @@ -9102,7 +9102,7 @@ record_initial (rtx dest, rtx set, void *data ATTRIBUTE_UNUSED) struct loop_ivs *ivs = (struct loop_ivs *) data; struct iv_class *bl; - if (GET_CODE (dest) != REG + if (!REG_P (dest) || REGNO (dest) >= ivs->n_regs || REG_IV_TYPE (ivs, REGNO (dest)) != BASIC_INDUCT) return; @@ -9131,7 +9131,7 @@ update_reg_last_use (rtx x, rtx insn) and hence this insn will never be the last use of x. ???? This comment is not correct. See for example loop_givs_reduce. This may insert an insn before another new insn. */ - if (GET_CODE (x) == REG && REGNO (x) < max_reg_before_loop + if (REG_P (x) && REGNO (x) < max_reg_before_loop && INSN_UID (insn) < max_uid_for_loop && REGNO_LAST_LUID (REGNO (x)) < INSN_LUID (insn)) { @@ -9239,7 +9239,7 @@ canonicalize_condition (rtx insn, rtx cond, int reverse, rtx *earliest, op0 = XEXP (op0, 0); continue; } - else if (GET_CODE (op0) != REG) + else if (!REG_P (op0)) break; /* Go back to the previous insn. Stop if it is not an INSN. We also @@ -9655,7 +9655,7 @@ loop_regs_scan (const struct loop *loop, int extra_size) rtx op, reg; if (GET_CODE (op = XEXP (link, 0)) == USE - && GET_CODE (reg = XEXP (op, 0)) == REG + && REG_P (reg = XEXP (op, 0)) && rtx_varies_p (reg, 1)) regs->array[REGNO (reg)].may_not_optimize = 1; } @@ -9889,7 +9889,7 @@ load_mems (const struct loop *loop) if (set /* @@@ This test is _way_ too conservative. */ && ! maybe_never - && GET_CODE (SET_DEST (set)) == REG + && REG_P (SET_DEST (set)) && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER && REGNO (SET_DEST (set)) < last_max_reg && regs->array[REGNO (SET_DEST (set))].n_times_set == 1 @@ -9903,7 +9903,7 @@ load_mems (const struct loop *loop) to untangle things for the BIV detection code. */ if (set && ! maybe_never - && GET_CODE (SET_SRC (set)) == REG + && REG_P (SET_SRC (set)) && REGNO (SET_SRC (set)) >= FIRST_PSEUDO_REGISTER && REGNO (SET_SRC (set)) < last_max_reg && regs->array[REGNO (SET_SRC (set))].n_times_set == 1 @@ -9954,7 +9954,7 @@ load_mems (const struct loop *loop) { if (CONSTANT_P (equiv->loc)) const_equiv = equiv; - else if (GET_CODE (equiv->loc) == REG + else if (REG_P (equiv->loc) /* Extending hard register lifetimes causes crash on SRC targets. Doing so on non-SRC is probably also not good idea, since we most @@ -10098,7 +10098,7 @@ try_copy_prop (const struct loop *loop, rtx replacement, unsigned int regno) /* Is this the initializing insn? */ set = single_set (insn); if (set - && GET_CODE (SET_DEST (set)) == REG + && REG_P (SET_DEST (set)) && REGNO (SET_DEST (set)) == regno) { if (init_insn) @@ -10208,9 +10208,9 @@ try_swap_copy_prop (const struct loop *loop, rtx replacement, /* Search for the insn that copies REGNO to NEW_REGNO? */ if (INSN_P (insn) && (set = single_set (insn)) - && GET_CODE (SET_DEST (set)) == REG + && REG_P (SET_DEST (set)) && REGNO (SET_DEST (set)) == new_regno - && GET_CODE (SET_SRC (set)) == REG + && REG_P (SET_SRC (set)) && REGNO (SET_SRC (set)) == regno) break; } @@ -10228,7 +10228,7 @@ try_swap_copy_prop (const struct loop *loop, rtx replacement, if (INSN_P (insn) && (prev_set = single_set (prev_insn)) - && GET_CODE (SET_DEST (prev_set)) == REG + && REG_P (SET_DEST (prev_set)) && REGNO (SET_DEST (prev_set)) == regno) { /* We have: diff --git a/gcc/optabs.c b/gcc/optabs.c index 562eb290..b059c2f 100644 --- a/gcc/optabs.c +++ b/gcc/optabs.c @@ -729,9 +729,9 @@ expand_binop (enum machine_mode mode, optab binoptab, rtx op0, rtx op1, { commutative_op = 1; - if (((target == 0 || GET_CODE (target) == REG) - ? ((GET_CODE (op1) == REG - && GET_CODE (op0) != REG) + if (((target == 0 || REG_P (target)) + ? ((REG_P (op1) + && !REG_P (op0)) || target == op1) : rtx_equal_p (op1, target)) || GET_CODE (op0) == CONST_INT) @@ -1225,11 +1225,11 @@ expand_binop (enum machine_mode mode, optab binoptab, rtx op0, rtx op1, xtarget = gen_reg_rtx (mode); - if (target == 0 || GET_CODE (target) != REG) + if (target == 0 || !REG_P (target)) target = xtarget; /* Indicate for flow that the entire target reg is being set. */ - if (GET_CODE (target) == REG) + if (REG_P (target)) emit_insn (gen_rtx_CLOBBER (VOIDmode, xtarget)); /* Do the actual arithmetic. */ @@ -1388,7 +1388,7 @@ expand_binop (enum machine_mode mode, optab binoptab, rtx op0, rtx op1, /* If the target is the same as one of the inputs, don't use it. This prevents problems with the REG_EQUAL note. */ if (target == op0 || target == op1 - || (target != 0 && GET_CODE (target) != REG)) + || (target != 0 && !REG_P (target))) target = 0; /* Multiply the two lower words to get a double-word product. @@ -1945,7 +1945,7 @@ expand_vector_binop (enum machine_mode mode, optab binoptab, rtx op0, And storing with a SUBREG is only possible for the least significant part, hence we can't do it for big endian (unless we want to permute the evaluation order. */ - if (GET_CODE (target) == REG + if (REG_P (target) && (BYTES_BIG_ENDIAN ? subsize < UNITS_PER_WORD : ((i * subsize) % UNITS_PER_WORD) != 0)) @@ -2064,7 +2064,7 @@ expand_vector_unop (enum machine_mode mode, optab unoptab, rtx op0, And storing with a SUBREG is only possible for the least significant part, hence we can't do it for big endian (unless we want to permute the evaluation order. */ - if (GET_CODE (target) == REG + if (REG_P (target) && (BYTES_BIG_ENDIAN ? subsize < UNITS_PER_WORD : ((i * subsize) % UNITS_PER_WORD) != 0)) @@ -2978,7 +2978,7 @@ expand_abs (enum machine_mode mode, rtx op0, rtx target, /* It is safe to use the target if it is the same as the source if this is also a pseudo register */ - if (op0 == target && GET_CODE (op0) == REG + if (op0 == target && REG_P (op0) && REGNO (op0) >= FIRST_PSEUDO_REGISTER) safe = 1; @@ -2986,7 +2986,7 @@ expand_abs (enum machine_mode mode, rtx op0, rtx target, if (target == 0 || ! safe || GET_MODE (target) != mode || (GET_CODE (target) == MEM && MEM_VOLATILE_P (target)) - || (GET_CODE (target) == REG + || (REG_P (target) && REGNO (target) < FIRST_PSEUDO_REGISTER)) target = gen_reg_rtx (mode); @@ -3288,7 +3288,7 @@ emit_no_conflict_block (rtx insns, rtx target, rtx op0, rtx op1, rtx equiv) { rtx prev, next, first, last, insn; - if (GET_CODE (target) != REG || reload_in_progress) + if (!REG_P (target) || reload_in_progress) return emit_insn (insns); else for (insn = insns; insn; insn = NEXT_INSN (insn)) @@ -3354,11 +3354,11 @@ emit_no_conflict_block (rtx insns, rtx target, rtx op0, rtx op1, rtx equiv) next = NEXT_INSN (insn); add_insn (insn); - if (op1 && GET_CODE (op1) == REG) + if (op1 && REG_P (op1)) REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_NO_CONFLICT, op1, REG_NOTES (insn)); - if (op0 && GET_CODE (op0) == REG) + if (op0 && REG_P (op0)) REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_NO_CONFLICT, op0, REG_NOTES (insn)); } @@ -3481,7 +3481,7 @@ emit_libcall_block (rtx insns, rtx target, rtx result, rtx equiv) next = NEXT_INSN (insn); - if (set != 0 && GET_CODE (SET_DEST (set)) == REG + if (set != 0 && REG_P (SET_DEST (set)) && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER && (insn == insns || ((! INSN_P(insns) @@ -4685,7 +4685,7 @@ expand_float (rtx to, rtx from, int unsignedp) /* Don't use TARGET if it isn't a register, is a hard register, or is the wrong mode. */ - if (GET_CODE (target) != REG + if (!REG_P (target) || REGNO (target) < FIRST_PSEUDO_REGISTER || GET_MODE (target) != fmode) target = gen_reg_rtx (fmode); @@ -4732,7 +4732,7 @@ expand_float (rtx to, rtx from, int unsignedp) unsigned operand, do it in a pseudo-register. */ if (GET_MODE (to) != fmode - || GET_CODE (to) != REG || REGNO (to) < FIRST_PSEUDO_REGISTER) + || !REG_P (to) || REGNO (to) < FIRST_PSEUDO_REGISTER) target = gen_reg_rtx (fmode); /* Convert as signed integer to floating. */ diff --git a/gcc/postreload.c b/gcc/postreload.c index 26404e3..58a3735 100644 --- a/gcc/postreload.c +++ b/gcc/postreload.c @@ -235,7 +235,7 @@ reload_cse_simplify_set (rtx set, rtx insn) if (GET_CODE (src) == MEM && GET_MODE_BITSIZE (GET_MODE (src)) < BITS_PER_WORD && (extend_op = LOAD_EXTEND_OP (GET_MODE (src))) != NIL - && GET_CODE (SET_DEST (set)) != REG) + && !REG_P (SET_DEST (set))) return 0; #endif @@ -246,7 +246,7 @@ reload_cse_simplify_set (rtx set, rtx insn) /* If memory loads are cheaper than register copies, don't change them. */ if (GET_CODE (src) == MEM) old_cost = MEMORY_MOVE_COST (GET_MODE (src), dclass, 1); - else if (GET_CODE (src) == REG) + else if (REG_P (src)) old_cost = REGISTER_MOVE_COST (GET_MODE (src), REGNO_REG_CLASS (REGNO (src)), dclass); else @@ -287,7 +287,7 @@ reload_cse_simplify_set (rtx set, rtx insn) #endif this_cost = rtx_cost (this_rtx, SET); } - else if (GET_CODE (this_rtx) == REG) + else if (REG_P (this_rtx)) { #ifdef LOAD_EXTEND_OP if (extend_op != NIL) @@ -308,8 +308,8 @@ reload_cse_simplify_set (rtx set, rtx insn) tends to lead to smaller instructions on some machines. */ if (this_cost < old_cost || (this_cost == old_cost - && GET_CODE (this_rtx) == REG - && GET_CODE (SET_SRC (set)) != REG)) + && REG_P (this_rtx) + && !REG_P (SET_SRC (set)))) { #ifdef LOAD_EXTEND_OP if (GET_MODE_BITSIZE (GET_MODE (SET_DEST (set))) < BITS_PER_WORD @@ -426,14 +426,14 @@ reload_cse_simplify_operands (rtx insn, rtx testreg) #ifdef CANNOT_CHANGE_MODE_CLASS /* If the register cannot change mode to word_mode, it follows that it cannot have been used in word_mode. */ - else if (GET_CODE (SET_DEST (set)) == REG + else if (REG_P (SET_DEST (set)) && CANNOT_CHANGE_MODE_CLASS (GET_MODE (SET_DEST (set)), word_mode, REGNO_REG_CLASS (REGNO (SET_DEST (set))))) ; /* Continue ordinary processing. */ #endif /* If this is a straight load, make the extension explicit. */ - else if (GET_CODE (SET_DEST (set)) == REG + else if (REG_P (SET_DEST (set)) && recog_data.n_operands == 2 && SET_SRC (set) == op && SET_DEST (set) == recog_data.operand[1-i]) @@ -460,7 +460,7 @@ reload_cse_simplify_operands (rtx insn, rtx testreg) continue; for (l = v->locs; l; l = l->next) - if (GET_CODE (l->loc) == REG) + if (REG_P (l->loc)) SET_HARD_REG_BIT (equiv_regs[i], REGNO (l->loc)); } @@ -779,12 +779,12 @@ reload_combine (void) does not yet show whether REGY changes in this insn. */ set = single_set (insn); if (set != NULL_RTX - && GET_CODE (SET_DEST (set)) == REG + && REG_P (SET_DEST (set)) && (hard_regno_nregs[REGNO (SET_DEST (set))] [GET_MODE (SET_DEST (set))] == 1) && GET_CODE (SET_SRC (set)) == PLUS - && GET_CODE (XEXP (SET_SRC (set), 1)) == REG + && REG_P (XEXP (SET_SRC (set), 1)) && rtx_equal_p (XEXP (SET_SRC (set), 0), SET_DEST (set)) && !rtx_equal_p (XEXP (SET_SRC (set), 1), SET_DEST (set)) && last_label_ruid < reg_state[REGNO (SET_DEST (set))].use_ruid) @@ -913,7 +913,7 @@ reload_combine (void) link = XEXP (link, 1)) { rtx usage_rtx = XEXP (XEXP (link, 0), 0); - if (GET_CODE (usage_rtx) == REG) + if (REG_P (usage_rtx)) { unsigned int i; unsigned int start_reg = REGNO (usage_rtx); @@ -954,7 +954,7 @@ reload_combine (void) for (note = REG_NOTES (insn); note; note = XEXP (note, 1)) { if (REG_NOTE_KIND (note) == REG_INC - && GET_CODE (XEXP (note, 0)) == REG) + && REG_P (XEXP (note, 0))) { int regno = REGNO (XEXP (note, 0)); @@ -986,7 +986,7 @@ reload_combine_note_store (rtx dst, rtx set, void *data ATTRIBUTE_UNUSED) GET_MODE (dst)); dst = SUBREG_REG (dst); } - if (GET_CODE (dst) != REG) + if (!REG_P (dst)) return; regno += REGNO (dst); @@ -1031,7 +1031,7 @@ reload_combine_note_use (rtx *xp, rtx insn) switch (code) { case SET: - if (GET_CODE (SET_DEST (x)) == REG) + if (REG_P (SET_DEST (x))) { reload_combine_note_use (&SET_SRC (x), insn); return; @@ -1040,7 +1040,7 @@ reload_combine_note_use (rtx *xp, rtx insn) case USE: /* If this is the USE of a return value, we can't change it. */ - if (GET_CODE (XEXP (x, 0)) == REG && REG_FUNCTION_VALUE_P (XEXP (x, 0))) + if (REG_P (XEXP (x, 0)) && REG_FUNCTION_VALUE_P (XEXP (x, 0))) { /* Mark the return register as used in an unknown fashion. */ rtx reg = XEXP (x, 0); @@ -1054,7 +1054,7 @@ reload_combine_note_use (rtx *xp, rtx insn) break; case CLOBBER: - if (GET_CODE (SET_DEST (x)) == REG) + if (REG_P (SET_DEST (x))) { /* No spurious CLOBBERs of pseudo registers may remain. */ if (REGNO (SET_DEST (x)) >= FIRST_PSEUDO_REGISTER) @@ -1065,7 +1065,7 @@ reload_combine_note_use (rtx *xp, rtx insn) case PLUS: /* We are interested in (plus (reg) (const_int)) . */ - if (GET_CODE (XEXP (x, 0)) != REG + if (!REG_P (XEXP (x, 0)) || GET_CODE (XEXP (x, 1)) != CONST_INT) break; offset = XEXP (x, 1); @@ -1207,7 +1207,7 @@ reload_cse_move2add (rtx first) /* For simplicity, we only perform this optimization on straightforward SETs. */ if (GET_CODE (pat) == SET - && GET_CODE (SET_DEST (pat)) == REG) + && REG_P (SET_DEST (pat))) { rtx reg = SET_DEST (pat); int regno = REGNO (reg); @@ -1303,7 +1303,7 @@ reload_cse_move2add (rtx first) (set (REGX) (PLUS (REGX) (CONST_INT A))) ... (set (REGX) (plus (REGX) (CONST_INT B-A))) */ - else if (GET_CODE (src) == REG + else if (REG_P (src) && reg_set_luid[regno] == reg_set_luid[REGNO (src)] && reg_base_reg[regno] == reg_base_reg[REGNO (src)] && MODES_OK_FOR_MOVE2ADD (GET_MODE (reg), @@ -1363,7 +1363,7 @@ reload_cse_move2add (rtx first) for (note = REG_NOTES (insn); note; note = XEXP (note, 1)) { if (REG_NOTE_KIND (note) == REG_INC - && GET_CODE (XEXP (note, 0)) == REG) + && REG_P (XEXP (note, 0))) { /* Reset the information about this register. */ int regno = REGNO (XEXP (note, 0)); @@ -1381,7 +1381,7 @@ reload_cse_move2add (rtx first) if (cnd != NULL_RTX && GET_CODE (cnd) == NE - && GET_CODE (XEXP (cnd, 0)) == REG + && REG_P (XEXP (cnd, 0)) /* The following two checks, which are also in move2add_note_store, are intended to reduce the number of calls to gen_rtx_SET to avoid memory @@ -1440,7 +1440,7 @@ move2add_note_store (rtx dst, rtx set, void *data ATTRIBUTE_UNUSED) reg_set_luid[REGNO (XEXP (dst, 0))] = 0; return; } - if (GET_CODE (dst) != REG) + if (!REG_P (dst)) return; regno += REGNO (dst); @@ -1462,13 +1462,13 @@ move2add_note_store (rtx dst, rtx set, void *data ATTRIBUTE_UNUSED) switch (GET_CODE (src)) { case PLUS: - if (GET_CODE (XEXP (src, 0)) == REG) + if (REG_P (XEXP (src, 0))) { base_reg = XEXP (src, 0); if (GET_CODE (XEXP (src, 1)) == CONST_INT) offset = INTVAL (XEXP (src, 1)); - else if (GET_CODE (XEXP (src, 1)) == REG + else if (REG_P (XEXP (src, 1)) && (reg_set_luid[REGNO (XEXP (src, 1))] > move2add_last_label_luid) && (MODES_OK_FOR_MOVE2ADD diff --git a/gcc/print-rtl.c b/gcc/print-rtl.c index 51dc65a..4f2223a 100644 --- a/gcc/print-rtl.c +++ b/gcc/print-rtl.c @@ -212,7 +212,7 @@ print_rtx (rtx in_rtx) An exception is the third field of a NOTE, where it indicates that the field has several different valid contents. */ case '0': - if (i == 1 && GET_CODE (in_rtx) == REG) + if (i == 1 && REG_P (in_rtx)) { if (REGNO (in_rtx) != ORIGINAL_REGNO (in_rtx)) fprintf (outfile, " [%d]", ORIGINAL_REGNO (in_rtx)); @@ -395,10 +395,10 @@ print_rtx (rtx in_rtx) const char *name; #ifndef GENERATOR_FILE - if (GET_CODE (in_rtx) == REG && value < FIRST_PSEUDO_REGISTER) + if (REG_P (in_rtx) && value < FIRST_PSEUDO_REGISTER) fprintf (outfile, " %d %s", REGNO (in_rtx), reg_names[REGNO (in_rtx)]); - else if (GET_CODE (in_rtx) == REG + else if (REG_P (in_rtx) && value <= LAST_VIRTUAL_REGISTER) { if (value == VIRTUAL_INCOMING_ARGS_REGNUM) @@ -423,7 +423,7 @@ print_rtx (rtx in_rtx) else fprintf (outfile, " %d", value); - if (GET_CODE (in_rtx) == REG && REG_ATTRS (in_rtx)) + if (REG_P (in_rtx) && REG_ATTRS (in_rtx)) { fputs (" [", outfile); if (ORIGINAL_REGNO (in_rtx) != REGNO (in_rtx)) diff --git a/gcc/ra-build.c b/gcc/ra-build.c index 4f0eac0..e986346 100644 --- a/gcc/ra-build.c +++ b/gcc/ra-build.c @@ -259,13 +259,13 @@ copy_insn_p (rtx insn, rtx *source, rtx *target) coalescing (the check for this is in remember_move() below). */ while (GET_CODE (d) == STRICT_LOW_PART) d = XEXP (d, 0); - if (GET_CODE (d) != REG - && (GET_CODE (d) != SUBREG || GET_CODE (SUBREG_REG (d)) != REG)) + if (!REG_P (d) + && (GET_CODE (d) != SUBREG || !REG_P (SUBREG_REG (d)))) return 0; while (GET_CODE (s) == STRICT_LOW_PART) s = XEXP (s, 0); - if (GET_CODE (s) != REG - && (GET_CODE (s) != SUBREG || GET_CODE (SUBREG_REG (s)) != REG)) + if (!REG_P (s) + && (GET_CODE (s) != SUBREG || !REG_P (SUBREG_REG (s)))) return 0; s_regno = (unsigned) REGNO (GET_CODE (s) == SUBREG ? SUBREG_REG (s) : s); @@ -563,7 +563,7 @@ remember_move (rtx insn) Those would be difficult to coalesce (we would need to implement handling of all the subwebs in the allocator, including that such subwebs could be source and target of coalescing). */ - if (GET_CODE (s) == REG && GET_CODE (d) == REG) + if (REG_P (s) && REG_P (d)) { struct move *m = ra_calloc (sizeof (struct move)); struct move_list *ml; @@ -1204,7 +1204,7 @@ prune_hardregs_for_mode (HARD_REG_SET *s, enum machine_mode mode) static void init_one_web_common (struct web *web, rtx reg) { - if (GET_CODE (reg) != REG) + if (!REG_P (reg)) abort (); /* web->id isn't initialized here. */ web->regno = REGNO (reg); @@ -2476,7 +2476,7 @@ contains_pseudo (rtx x) int i; if (GET_CODE (x) == SUBREG) x = SUBREG_REG (x); - if (GET_CODE (x) == REG) + if (REG_P (x)) { if (REGNO (x) >= FIRST_PSEUDO_REGISTER) return 1; @@ -2806,7 +2806,7 @@ handle_asm_insn (struct df *df, rtx insn) for (i = 0; i < XVECLEN (pat, 0); i++) { rtx t = XVECEXP (pat, 0, i); - if (GET_CODE (t) == CLOBBER && GET_CODE (XEXP (t, 0)) == REG + if (GET_CODE (t) == CLOBBER && REG_P (XEXP (t, 0)) && REGNO (XEXP (t, 0)) < FIRST_PSEUDO_REGISTER) SET_HARD_REG_BIT (clobbered, REGNO (XEXP (t, 0))); } @@ -2831,7 +2831,7 @@ handle_asm_insn (struct df *df, rtx insn) || GET_CODE (reg) == SIGN_EXTRACT || GET_CODE (reg) == STRICT_LOW_PART) reg = XEXP (reg, 0); - if (GET_CODE (reg) != REG || REGNO (reg) < FIRST_PSEUDO_REGISTER) + if (!REG_P (reg) || REGNO (reg) < FIRST_PSEUDO_REGISTER) continue; /* Search the web corresponding to this operand. We depend on diff --git a/gcc/ra-debug.c b/gcc/ra-debug.c index 16d2a58..a5c4f09 100644 --- a/gcc/ra-debug.c +++ b/gcc/ra-debug.c @@ -271,7 +271,7 @@ ra_print_rtx_object (FILE *file, rtx x) { rtx sub = SUBREG_REG (x); int ofs = SUBREG_BYTE (x); - if (GET_CODE (sub) == REG + if (REG_P (sub) && REGNO (sub) < FIRST_PSEUDO_REGISTER) { int regno = REGNO (sub); @@ -802,7 +802,7 @@ dump_constraints (void) if (!dump_file || (debug_new_regalloc & DUMP_CONSTRAINTS) == 0) return; for (i = FIRST_PSEUDO_REGISTER; i < ra_max_regno; i++) - if (regno_reg_rtx[i] && GET_CODE (regno_reg_rtx[i]) == REG) + if (regno_reg_rtx[i] && REG_P (regno_reg_rtx[i])) REGNO (regno_reg_rtx[i]) = ra_reg_renumber[i] >= 0 ? ra_reg_renumber[i] : i; for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) @@ -840,7 +840,7 @@ dump_constraints (void) ra_debug_msg (DUMP_CONSTRAINTS, "\n"); } for (i = FIRST_PSEUDO_REGISTER; i < ra_max_regno; i++) - if (regno_reg_rtx[i] && GET_CODE (regno_reg_rtx[i]) == REG) + if (regno_reg_rtx[i] && REG_P (regno_reg_rtx[i])) REGNO (regno_reg_rtx[i]) = i; } @@ -941,10 +941,11 @@ dump_static_insn_cost (FILE *file, const char *message, const char *prefix) if (rtx_equal_p (src, dest)) pcost = &selfcopy; else if (GET_CODE (src) == GET_CODE (dest) - && ((GET_CODE (src) == REG) + && ((REG_P (src)) || (GET_CODE (src) == SUBREG - && GET_CODE (SUBREG_REG (src)) == REG - && GET_CODE (SUBREG_REG (dest)) == REG))) + && REG_P (SUBREG_REG (src)) + && REG_P (SUBREG_REG (dest))))) + /* XXX is dest guaranteed to be a subreg? */ pcost = ®copy; else { diff --git a/gcc/ra-rewrite.c b/gcc/ra-rewrite.c index 7479860..5d64608 100644 --- a/gcc/ra-rewrite.c +++ b/gcc/ra-rewrite.c @@ -562,7 +562,7 @@ slots_overlap_p (rtx s1, rtx s2) if (GET_CODE (s1) != GET_CODE (s2)) return 0; - if (GET_CODE (s1) == REG && GET_CODE (s2) == REG) + if (REG_P (s1) && REG_P (s2)) { if (REGNO (s1) != REGNO (s2)) return 0; @@ -574,10 +574,10 @@ slots_overlap_p (rtx s1, rtx s2) abort (); s1 = XEXP (s1, 0); s2 = XEXP (s2, 0); - if (GET_CODE (s1) != PLUS || GET_CODE (XEXP (s1, 0)) != REG + if (GET_CODE (s1) != PLUS || !REG_P (XEXP (s1, 0)) || GET_CODE (XEXP (s1, 1)) != CONST_INT) return 1; - if (GET_CODE (s2) != PLUS || GET_CODE (XEXP (s2, 0)) != REG + if (GET_CODE (s2) != PLUS || !REG_P (XEXP (s2, 0)) || GET_CODE (XEXP (s2, 1)) != CONST_INT) return 1; base1 = XEXP (s1, 0); @@ -1877,7 +1877,7 @@ remove_suspicious_death_notes (void) rtx note = *pnote; if ((REG_NOTE_KIND (note) == REG_DEAD || REG_NOTE_KIND (note) == REG_UNUSED) - && (GET_CODE (XEXP (note, 0)) == REG + && (REG_P (XEXP (note, 0)) && bitmap_bit_p (regnos_coalesced_to_hardregs, REGNO (XEXP (note, 0))))) *pnote = XEXP (note, 1); diff --git a/gcc/recog.c b/gcc/recog.c index d7c9507..4fcb6ee 100644 --- a/gcc/recog.c +++ b/gcc/recog.c @@ -466,7 +466,7 @@ validate_replace_rtx_1 (rtx *loc, rtx from, rtx to, rtx object) operands look similar. */ if (x == from - || (GET_CODE (x) == REG && GET_CODE (from) == REG + || (REG_P (x) && REG_P (from) && GET_MODE (x) == GET_MODE (from) && REGNO (x) == REGNO (from)) || (GET_CODE (x) == GET_CODE (from) && GET_MODE (x) == GET_MODE (from) @@ -755,9 +755,9 @@ find_single_use_1 (rtx dest, rtx *loc) need just check the source. */ if (GET_CODE (SET_DEST (x)) != CC0 && GET_CODE (SET_DEST (x)) != PC - && GET_CODE (SET_DEST (x)) != REG + && !REG_P (SET_DEST (x)) && ! (GET_CODE (SET_DEST (x)) == SUBREG - && GET_CODE (SUBREG_REG (SET_DEST (x))) == REG + && REG_P (SUBREG_REG (SET_DEST (x))) && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (SET_DEST (x)))) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD) == ((GET_MODE_SIZE (GET_MODE (SET_DEST (x))) @@ -783,7 +783,7 @@ find_single_use_1 (rtx dest, rtx *loc) if (fmt[i] == 'e') { if (dest == XEXP (x, i) - || (GET_CODE (dest) == REG && GET_CODE (XEXP (x, i)) == REG + || (REG_P (dest) && REG_P (XEXP (x, i)) && REGNO (dest) == REGNO (XEXP (x, i)))) this_result = loc; else @@ -802,8 +802,8 @@ find_single_use_1 (rtx dest, rtx *loc) for (j = XVECLEN (x, i) - 1; j >= 0; j--) { if (XVECEXP (x, i, j) == dest - || (GET_CODE (dest) == REG - && GET_CODE (XVECEXP (x, i, j)) == REG + || (REG_P (dest) + && REG_P (XVECEXP (x, i, j)) && REGNO (XVECEXP (x, i, j)) == REGNO (dest))) this_result = loc; else @@ -860,7 +860,7 @@ find_single_use (rtx dest, rtx insn, rtx *ploc) } #endif - if (reload_completed || reload_in_progress || GET_CODE (dest) != REG) + if (reload_completed || reload_in_progress || !REG_P (dest)) return 0; for (next = next_nonnote_insn (insn); @@ -1043,7 +1043,7 @@ register_operand (rtx op, enum machine_mode mode) return general_operand (op, mode); #ifdef CANNOT_CHANGE_MODE_CLASS - if (GET_CODE (sub) == REG + if (REG_P (sub) && REGNO (sub) < FIRST_PSEUDO_REGISTER && REG_CANNOT_CHANGE_MODE_P (REGNO (sub), GET_MODE (sub), mode) && GET_MODE_CLASS (GET_MODE (sub)) != MODE_COMPLEX_INT @@ -1067,7 +1067,7 @@ register_operand (rtx op, enum machine_mode mode) /* We don't consider registers whose class is NO_REGS to be a register operand. */ - return (GET_CODE (op) == REG + return (REG_P (op) && (REGNO (op) >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (REGNO (op)) != NO_REGS)); } @@ -1090,7 +1090,7 @@ scratch_operand (rtx op, enum machine_mode mode) return 0; return (GET_CODE (op) == SCRATCH - || (GET_CODE (op) == REG + || (REG_P (op) && REGNO (op) < FIRST_PSEUDO_REGISTER)); } @@ -1209,7 +1209,7 @@ nonmemory_operand (rtx op, enum machine_mode mode) /* We don't consider registers whose class is NO_REGS to be a register operand. */ - return (GET_CODE (op) == REG + return (REG_P (op) && (REGNO (op) >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (REGNO (op)) != NO_REGS)); } @@ -2303,7 +2303,7 @@ constrain_operands (int strict) if (GET_CODE (op) == SUBREG) { - if (GET_CODE (SUBREG_REG (op)) == REG + if (REG_P (SUBREG_REG (op)) && REGNO (SUBREG_REG (op)) < FIRST_PSEUDO_REGISTER) offset = subreg_regno_offset (REGNO (SUBREG_REG (op)), GET_MODE (SUBREG_REG (op)), @@ -2415,7 +2415,7 @@ constrain_operands (int strict) but the hard reg is not in the class GENERAL_REGS. */ if (strict < 0 || GENERAL_REGS == ALL_REGS - || GET_CODE (op) != REG + || !REG_P (op) || (reload_in_progress && REGNO (op) >= FIRST_PSEUDO_REGISTER) || reg_fits_class_p (op, GENERAL_REGS, offset, mode)) @@ -2447,7 +2447,7 @@ constrain_operands (int strict) else if (strict < 0 && CONSTANT_P (op)) win = 1; /* During reload, accept a pseudo */ - else if (reload_in_progress && GET_CODE (op) == REG + else if (reload_in_progress && REG_P (op) && REGNO (op) >= FIRST_PSEUDO_REGISTER) win = 1; break; @@ -2517,7 +2517,7 @@ constrain_operands (int strict) || (strict < 0 && !(CONSTANT_P (op) || GET_CODE (op) == MEM)) || (reload_in_progress - && !(GET_CODE (op) == REG + && !(REG_P (op) && REGNO (op) >= FIRST_PSEUDO_REGISTER)))) win = 1; break; @@ -2529,7 +2529,7 @@ constrain_operands (int strict) || (strict < 0 && (CONSTANT_P (op) || GET_CODE (op) == MEM)) /* During reload, accept a pseudo */ - || (reload_in_progress && GET_CODE (op) == REG + || (reload_in_progress && REG_P (op) && REGNO (op) >= FIRST_PSEUDO_REGISTER)) win = 1; break; @@ -2544,10 +2544,10 @@ constrain_operands (int strict) { if (strict < 0 || (strict == 0 - && GET_CODE (op) == REG + && REG_P (op) && REGNO (op) >= FIRST_PSEUDO_REGISTER) || (strict == 0 && GET_CODE (op) == SCRATCH) - || (GET_CODE (op) == REG + || (REG_P (op) && reg_fits_class_p (op, class, offset, mode))) win = 1; } @@ -2562,7 +2562,7 @@ constrain_operands (int strict) into mem. */ || (strict < 0 && CONSTANT_P (op)) /* During reload, accept a pseudo */ - || (reload_in_progress && GET_CODE (op) == REG + || (reload_in_progress && REG_P (op) && REGNO (op) >= FIRST_PSEUDO_REGISTER))) win = 1; else if (EXTRA_ADDRESS_CONSTRAINT (c, p) @@ -2596,7 +2596,7 @@ constrain_operands (int strict) because we would often report failure when we have two memory operands, one of which was formerly a REG. */ if (earlyclobber[eopno] - && GET_CODE (recog_data.operand[eopno]) == REG) + && REG_P (recog_data.operand[eopno])) for (opno = 0; opno < recog_data.n_operands; opno++) if ((GET_CODE (recog_data.operand[opno]) == MEM || recog_data.operand_type[opno] != OP_OUT) diff --git a/gcc/reg-stack.c b/gcc/reg-stack.c index 7dda02f..5672561 100644 --- a/gcc/reg-stack.c +++ b/gcc/reg-stack.c @@ -628,7 +628,7 @@ check_asm_stack_operands (rtx insn) /* Strip SUBREGs here to make the following code simpler. */ for (i = 0; i < recog_data.n_operands; i++) if (GET_CODE (recog_data.operand[i]) == SUBREG - && GET_CODE (SUBREG_REG (recog_data.operand[i])) == REG) + && REG_P (SUBREG_REG (recog_data.operand[i]))) recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]); /* Set up CLOBBER_REG. */ @@ -645,7 +645,7 @@ check_asm_stack_operands (rtx insn) rtx clobber = XVECEXP (body, 0, i); rtx reg = XEXP (clobber, 0); - if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG) + if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg))) reg = SUBREG_REG (reg); if (STACK_REG_P (reg)) @@ -1008,8 +1008,8 @@ emit_swap_insn (rtx insn, stack regstack, rtx reg) /* If the previous register stack push was from the reg we are to swap with, omit the swap. */ - if (GET_CODE (i1dest) == REG && REGNO (i1dest) == FIRST_STACK_REG - && GET_CODE (i1src) == REG + if (REG_P (i1dest) && REGNO (i1dest) == FIRST_STACK_REG + && REG_P (i1src) && REGNO (i1src) == (unsigned) hard_regno - 1 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX) return; @@ -1017,8 +1017,8 @@ emit_swap_insn (rtx insn, stack regstack, rtx reg) /* If the previous insn wrote to the reg we are to swap with, omit the swap. */ - if (GET_CODE (i1dest) == REG && REGNO (i1dest) == (unsigned) hard_regno - && GET_CODE (i1src) == REG && REGNO (i1src) == FIRST_STACK_REG + if (REG_P (i1dest) && REGNO (i1dest) == (unsigned) hard_regno + && REG_P (i1src) && REGNO (i1src) == FIRST_STACK_REG && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX) return; } @@ -1266,7 +1266,7 @@ swap_rtx_condition (rtx insn) /* We're looking for a single set to cc0 or an HImode temporary. */ if (GET_CODE (pat) == SET - && GET_CODE (SET_DEST (pat)) == REG + && REG_P (SET_DEST (pat)) && REGNO (SET_DEST (pat)) == FLAGS_REG) { insn = next_flags_user (insn); @@ -1530,7 +1530,7 @@ subst_stack_regs_pat (rtx insn, stack regstack, rtx pat) /* See if this is a `movM' pattern, and handle elsewhere if so. */ if (STACK_REG_P (*src) || (STACK_REG_P (*dest) - && (GET_CODE (*src) == REG || GET_CODE (*src) == MEM + && (REG_P (*src) || GET_CODE (*src) == MEM || GET_CODE (*src) == CONST_DOUBLE))) { control_flow_insn_deleted |= move_for_stack_reg (insn, regstack, pat); @@ -2072,7 +2072,7 @@ subst_asm_stack_regs (rtx insn, stack regstack) /* Strip SUBREGs here to make the following code simpler. */ for (i = 0; i < recog_data.n_operands; i++) if (GET_CODE (recog_data.operand[i]) == SUBREG - && GET_CODE (SUBREG_REG (recog_data.operand[i])) == REG) + && REG_P (SUBREG_REG (recog_data.operand[i]))) { recog_data.operand_loc[i] = & SUBREG_REG (recog_data.operand[i]); recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]); @@ -2093,7 +2093,7 @@ subst_asm_stack_regs (rtx insn, stack regstack) rtx reg = XEXP (note, 0); rtx *loc = & XEXP (note, 0); - if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG) + if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg))) { loc = & SUBREG_REG (reg); reg = SUBREG_REG (reg); @@ -2126,7 +2126,7 @@ subst_asm_stack_regs (rtx insn, stack regstack) rtx reg = XEXP (clobber, 0); rtx *loc = & XEXP (clobber, 0); - if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG) + if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg))) { loc = & SUBREG_REG (reg); reg = SUBREG_REG (reg); diff --git a/gcc/regclass.c b/gcc/regclass.c index ff7d89e..a6bbec8 100644 --- a/gcc/regclass.c +++ b/gcc/regclass.c @@ -1037,7 +1037,7 @@ scan_one_insn (rtx insn, int pass) it represents a savings, rather than a cost, if the parameter is stored in memory. Record this fact. */ - if (set != 0 && GET_CODE (SET_DEST (set)) == REG + if (set != 0 && REG_P (SET_DEST (set)) && GET_CODE (SET_SRC (set)) == MEM && (note = find_reg_note (insn, REG_EQUIV, NULL_RTX)) != 0 @@ -1071,7 +1071,7 @@ scan_one_insn (rtx insn, int pass) && CONSTANT_P (recog_data.operand[1]) && ! rtx_equal_p (recog_data.operand[0], recog_data.operand[1]) && ! rtx_equal_p (recog_data.operand[0], recog_data.operand[2]) - && GET_CODE (recog_data.operand[0]) == REG + && REG_P (recog_data.operand[0]) && MODES_TIEABLE_P (GET_MODE (recog_data.operand[0]), recog_data.operand_mode[1])) { @@ -1120,7 +1120,7 @@ scan_one_insn (rtx insn, int pass) its register. */ for (i = 0; i < recog_data.n_operands; i++) - if (GET_CODE (recog_data.operand[i]) == REG + if (REG_P (recog_data.operand[i]) && REGNO (recog_data.operand[i]) >= FIRST_PSEUDO_REGISTER) { int regno = REGNO (recog_data.operand[i]); @@ -1422,7 +1422,7 @@ record_reg_classes (int n_alts, int n_ops, rtx *ops, if (*p == 0) { - if (GET_CODE (op) == REG && REGNO (op) >= FIRST_PSEUDO_REGISTER) + if (REG_P (op) && REGNO (op) >= FIRST_PSEUDO_REGISTER) memset (&this_op_costs[i], 0, sizeof this_op_costs[i]); continue; @@ -1445,7 +1445,7 @@ record_reg_classes (int n_alts, int n_ops, rtx *ops, classes[i] = classes[j]; allows_mem[i] = allows_mem[j]; - if (GET_CODE (op) != REG || REGNO (op) < FIRST_PSEUDO_REGISTER) + if (!REG_P (op) || REGNO (op) < FIRST_PSEUDO_REGISTER) { /* If this matches the other operand, we have no added cost and we win. */ @@ -1459,7 +1459,7 @@ record_reg_classes (int n_alts, int n_ops, rtx *ops, else if (classes[j] != NO_REGS) alt_cost += copy_cost (op, mode, classes[j], 1), win = 1; } - else if (GET_CODE (ops[j]) != REG + else if (!REG_P (ops[j]) || REGNO (ops[j]) < FIRST_PSEUDO_REGISTER) { /* This op is a pseudo but the one it matches is not. */ @@ -1702,7 +1702,7 @@ record_reg_classes (int n_alts, int n_ops, rtx *ops, register preferencing. If some register class is valid, compute the costs of moving the pseudo into that class. */ - if (GET_CODE (op) == REG && REGNO (op) >= FIRST_PSEUDO_REGISTER) + if (REG_P (op) && REGNO (op) >= FIRST_PSEUDO_REGISTER) { if (classes[i] == NO_REGS) { @@ -1757,7 +1757,7 @@ record_reg_classes (int n_alts, int n_ops, rtx *ops, the proper class, there is no cost for this alternative. */ else if (win - || (GET_CODE (op) == REG + || (REG_P (op) && reg_fits_class_p (op, classes[i], 0, GET_MODE (op)))) ; @@ -1789,7 +1789,7 @@ record_reg_classes (int n_alts, int n_ops, rtx *ops, about this alternative. */ for (i = 0; i < n_ops; i++) - if (GET_CODE (ops[i]) == REG + if (REG_P (ops[i]) && REGNO (ops[i]) >= FIRST_PSEUDO_REGISTER) { struct costs *pp = &op_costs[i], *qq = &this_op_costs[i]; @@ -1820,7 +1820,7 @@ record_reg_classes (int n_alts, int n_ops, rtx *ops, if ((set = single_set (insn)) != 0 && ops[0] == SET_DEST (set) && ops[1] == SET_SRC (set) - && GET_CODE (ops[0]) == REG && GET_CODE (ops[1]) == REG + && REG_P (ops[0]) && REG_P (ops[1]) && find_regno_note (insn, REG_DEAD, REGNO (ops[1]))) for (i = 0; i <= 1; i++) if (REGNO (ops[i]) >= FIRST_PSEUDO_REGISTER) @@ -1912,7 +1912,7 @@ copy_cost (rtx x, enum machine_mode mode ATTRIBUTE_UNUSED, if (GET_CODE (x) == MEM || class == NO_REGS) return MEMORY_MOVE_COST (mode, class, to_p); - else if (GET_CODE (x) == REG) + else if (REG_P (x)) return move_cost[mode][(int) REGNO_REG_CLASS (REGNO (x))][(int) class]; else @@ -2074,7 +2074,7 @@ record_address_regs (rtx x, enum reg_class class, int scale) show it is being used in an INC_DEC context. */ #ifdef FORBIDDEN_INC_DEC_CLASSES - if (GET_CODE (XEXP (x, 0)) == REG + if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) >= FIRST_PSEUDO_REGISTER) in_inc_dec[REGNO (XEXP (x, 0))] = 1; #endif @@ -2436,7 +2436,7 @@ reg_scan_mark_refs (rtx x, rtx insn, int note_flag, unsigned int min_regno) if (GET_CODE (dest) == PARALLEL) max_set_parallel = MAX (max_set_parallel, XVECLEN (dest, 0) - 1); - if (GET_CODE (dest) == REG + if (REG_P (dest) && REGNO (dest) >= min_regno) { REG_N_SETS (REGNO (dest))++; @@ -2455,7 +2455,7 @@ reg_scan_mark_refs (rtx x, rtx insn, int note_flag, unsigned int min_regno) variable since it should have already been set as a pointer based on the type. */ - if (GET_CODE (SET_DEST (x)) == REG + if (REG_P (SET_DEST (x)) && REGNO (SET_DEST (x)) >= FIRST_PSEUDO_REGISTER && REGNO (SET_DEST (x)) >= min_regno /* If the destination pseudo is set more than once, then other @@ -2466,12 +2466,12 @@ reg_scan_mark_refs (rtx x, rtx insn, int note_flag, unsigned int min_regno) && REG_N_SETS (REGNO (SET_DEST (x))) == 1 && ! REG_USERVAR_P (SET_DEST (x)) && ! REG_POINTER (SET_DEST (x)) - && ((GET_CODE (SET_SRC (x)) == REG + && ((REG_P (SET_SRC (x)) && REG_POINTER (SET_SRC (x))) || ((GET_CODE (SET_SRC (x)) == PLUS || GET_CODE (SET_SRC (x)) == LO_SUM) && GET_CODE (XEXP (SET_SRC (x), 1)) == CONST_INT - && GET_CODE (XEXP (SET_SRC (x), 0)) == REG + && REG_P (XEXP (SET_SRC (x), 0)) && REG_POINTER (XEXP (SET_SRC (x), 0))) || GET_CODE (SET_SRC (x)) == CONST || GET_CODE (SET_SRC (x)) == SYMBOL_REF @@ -2493,7 +2493,7 @@ reg_scan_mark_refs (rtx x, rtx insn, int note_flag, unsigned int min_regno) /* If this is setting a register from a register or from a simple conversion of a register, propagate REG_EXPR. */ - if (GET_CODE (dest) == REG) + if (REG_P (dest)) { rtx src = SET_SRC (x); diff --git a/gcc/regmove.c b/gcc/regmove.c index 13a6d39..f309f21 100644 --- a/gcc/regmove.c +++ b/gcc/regmove.c @@ -188,10 +188,10 @@ discover_flags_reg (void) scratch or something. We only care about hard regs. Moreover we don't like the notion of subregs of hard regs. */ if (GET_CODE (tmp) == SUBREG - && GET_CODE (SUBREG_REG (tmp)) == REG + && REG_P (SUBREG_REG (tmp)) && REGNO (SUBREG_REG (tmp)) < FIRST_PSEUDO_REGISTER) return pc_rtx; - found = (GET_CODE (tmp) == REG && REGNO (tmp) < FIRST_PSEUDO_REGISTER); + found = (REG_P (tmp) && REGNO (tmp) < FIRST_PSEUDO_REGISTER); return (found ? tmp : NULL_RTX); } @@ -334,7 +334,7 @@ replacement_quality (rtx reg) int src_regno; /* Bad if this isn't a register at all. */ - if (GET_CODE (reg) != REG) + if (!REG_P (reg)) return 0; /* If this register is not meant to get a hard register, @@ -752,9 +752,9 @@ copy_src_to_dest (rtx insn, rtx src, rtx dest, int old_max_uid) parameter when there is no frame pointer that is not allocated a register. For now, we just reject them, rather than incrementing the live length. */ - if (GET_CODE (src) == REG + if (REG_P (src) && REG_LIVE_LENGTH (REGNO (src)) > 0 - && GET_CODE (dest) == REG + && REG_P (dest) && !RTX_UNCHANGING_P (dest) && REG_LIVE_LENGTH (REGNO (dest)) > 0 && (set = single_set (insn)) != NULL_RTX @@ -865,7 +865,7 @@ reg_is_remote_constant_p (rtx reg, rtx insn, rtx first) continue; s = single_set (XEXP (p, 0)); if (s != 0 - && GET_CODE (SET_DEST (s)) == REG + && REG_P (SET_DEST (s)) && REGNO (SET_DEST (s)) == REGNO (reg)) { /* The register is set in the same basic block. */ @@ -881,7 +881,7 @@ reg_is_remote_constant_p (rtx reg, rtx insn, rtx first) continue; s = single_set (p); if (s != 0 - && GET_CODE (SET_DEST (s)) == REG + && REG_P (SET_DEST (s)) && REGNO (SET_DEST (s)) == REGNO (reg)) { /* This is the instruction which sets REG. If there is a @@ -1087,13 +1087,13 @@ regmove_optimize (rtx f, int nregs, FILE *regmove_dump_file) if (flag_expensive_optimizations && ! pass && (GET_CODE (SET_SRC (set)) == SIGN_EXTEND || GET_CODE (SET_SRC (set)) == ZERO_EXTEND) - && GET_CODE (XEXP (SET_SRC (set), 0)) == REG - && GET_CODE (SET_DEST (set)) == REG) + && REG_P (XEXP (SET_SRC (set), 0)) + && REG_P (SET_DEST (set))) optimize_reg_copy_3 (insn, SET_DEST (set), SET_SRC (set)); if (flag_expensive_optimizations && ! pass - && GET_CODE (SET_SRC (set)) == REG - && GET_CODE (SET_DEST (set)) == REG) + && REG_P (SET_SRC (set)) + && REG_P (SET_DEST (set))) { /* If this is a register-register copy where SRC is not dead, see if we can optimize it. If this optimization succeeds, @@ -1142,7 +1142,7 @@ regmove_optimize (rtx f, int nregs, FILE *regmove_dump_file) src = recog_data.operand[op_no]; dst = recog_data.operand[match_no]; - if (GET_CODE (src) != REG) + if (!REG_P (src)) continue; src_subreg = src; @@ -1155,7 +1155,7 @@ regmove_optimize (rtx f, int nregs, FILE *regmove_dump_file) src, SUBREG_BYTE (dst)); dst = SUBREG_REG (dst); } - if (GET_CODE (dst) != REG + if (!REG_P (dst) || REGNO (dst) < FIRST_PSEUDO_REGISTER) continue; @@ -1253,10 +1253,10 @@ regmove_optimize (rtx f, int nregs, FILE *regmove_dump_file) dst = recog_data.operand[match_no]; src = recog_data.operand[op_no]; - if (GET_CODE (src) != REG) + if (!REG_P (src)) continue; - if (GET_CODE (dst) != REG + if (!REG_P (dst) || REGNO (dst) < FIRST_PSEUDO_REGISTER || REG_LIVE_LENGTH (REGNO (dst)) < 0 || RTX_UNCHANGING_P (dst) @@ -1779,7 +1779,7 @@ fixup_match_1 (rtx insn, rtx set, rtx src, rtx src_subreg, rtx dst, hard register. */ && ! (dst_note && ! REG_N_CALLS_CROSSED (REGNO (dst)) && single_set (p) - && GET_CODE (SET_DEST (single_set (p))) == REG + && REG_P (SET_DEST (single_set (p))) && (REGNO (SET_DEST (single_set (p))) < FIRST_PSEUDO_REGISTER)) /* We may only emit an insn directly after P if we diff --git a/gcc/regrename.c b/gcc/regrename.c index c4c4e70..0e27636 100644 --- a/gcc/regrename.c +++ b/gcc/regrename.c @@ -101,7 +101,7 @@ note_sets (rtx x, rtx set ATTRIBUTE_UNUSED, void *data) HARD_REG_SET *pset = (HARD_REG_SET *) data; unsigned int regno; int nregs; - if (GET_CODE (x) != REG) + if (!REG_P (x)) return; regno = REGNO (x); nregs = hard_regno_nregs[regno][GET_MODE (x)]; @@ -836,7 +836,7 @@ build_def_use (basic_block bb) rtx *loc = recog_data.operand_loc[i]; rtx op = *loc; - if (GET_CODE (op) == REG + if (REG_P (op) && REGNO (op) == ORIGINAL_REGNO (op) && (recog_data.operand_type[i] == OP_IN || recog_data.operand_type[i] == OP_INOUT)) @@ -926,7 +926,7 @@ build_def_use (basic_block bb) rtx op = *loc; enum reg_class class = recog_op_alt[i][alt].class; - if (GET_CODE (op) == REG + if (REG_P (op) && REGNO (op) == ORIGINAL_REGNO (op)) continue; @@ -1659,7 +1659,7 @@ copyprop_hardreg_forward_1 (basic_block bb, struct value_data *vd) continue; /* Don't replace in asms intentionally referencing hard regs. */ - if (is_asm && GET_CODE (recog_data.operand[i]) == REG + if (is_asm && REG_P (recog_data.operand[i]) && (REGNO (recog_data.operand[i]) == ORIGINAL_REGNO (recog_data.operand[i]))) continue; diff --git a/gcc/reload.c b/gcc/reload.c index c0fca57..298db27 100644 --- a/gcc/reload.c +++ b/gcc/reload.c @@ -211,8 +211,8 @@ static int output_reloadnum; /* Compare two RTX's. */ #define MATCHES(x, y) \ - (x == y || (x != 0 && (GET_CODE (x) == REG \ - ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \ + (x == y || (x != 0 && (REG_P (x) \ + ? REG_P (y) && REGNO (x) == REGNO (y) \ : rtx_equal_p (x, y) && ! side_effects_p (x)))) /* Indicates if two reloads purposes are for similar enough things that we @@ -332,7 +332,7 @@ push_secondary_reload (int in_p, rtx x, int opnum, int optional, a secondary reload is needed since whether or not a reload is needed might be sensitive to the form of the MEM. */ - if (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER + if (REG_P (x) && REGNO (x) >= FIRST_PSEUDO_REGISTER && reg_equiv_mem[REGNO (x)] != 0) x = reg_equiv_mem[REGNO (x)]; @@ -771,10 +771,10 @@ find_reusable_reload (rtx *p_in, rtx out, enum reg_class class, || TEST_HARD_REG_BIT (reg_class_contents[(int) class], true_regnum (rld[i].reg_rtx))) && out == 0 && rld[i].out == 0 && rld[i].in != 0 - && ((GET_CODE (in) == REG + && ((REG_P (in) && GET_RTX_CLASS (GET_CODE (rld[i].in)) == RTX_AUTOINC && MATCHES (XEXP (rld[i].in, 0), in)) - || (GET_CODE (rld[i].in) == REG + || (REG_P (rld[i].in) && GET_RTX_CLASS (GET_CODE (in)) == RTX_AUTOINC && MATCHES (XEXP (in, 0), rld[i].in))) && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out)) @@ -784,7 +784,7 @@ find_reusable_reload (rtx *p_in, rtx out, enum reg_class class, { /* Make sure reload_in ultimately has the increment, not the plain register. */ - if (GET_CODE (in) == REG) + if (REG_P (in)) *p_in = rld[i].in; return i; } @@ -811,7 +811,7 @@ reload_inner_reg_of_subreg (rtx x, enum machine_mode mode, int output) /* If INNER is not a hard register, then INNER will not need to be reloaded. */ - if (GET_CODE (inner) != REG + if (!REG_P (inner) || REGNO (inner) >= FIRST_PSEUDO_REGISTER) return 0; @@ -855,7 +855,7 @@ can_reload_into (rtx in, int regno, enum machine_mode mode) technically this is a non-optional input-output reload, but IN is already a valid register, and has been chosen as the reload register. Speed this up, since it trivially works. */ - if (GET_CODE (in) == REG) + if (REG_P (in)) return 1; /* To test MEMs properly, we'd have to take into account all the reloads @@ -938,7 +938,7 @@ push_reload (rtx in, rtx out, rtx *inloc, rtx *outloc, it is not in a hard register, reload straight from the constant, since we want to get rid of such pseudo registers. Often this is done earlier, but not always in find_reloads_address. */ - if (in != 0 && GET_CODE (in) == REG) + if (in != 0 && REG_P (in)) { int regno = REGNO (in); @@ -950,7 +950,7 @@ push_reload (rtx in, rtx out, rtx *inloc, rtx *outloc, /* Likewise for OUT. Of course, OUT will never be equivalent to an actual constant, but it might be equivalent to a memory location (in the case of a parameter). */ - if (out != 0 && GET_CODE (out) == REG) + if (out != 0 && REG_P (out)) { int regno = REGNO (out); @@ -1014,7 +1014,7 @@ push_reload (rtx in, rtx out, rtx *inloc, rtx *outloc, && (CONSTANT_P (SUBREG_REG (in)) || GET_CODE (SUBREG_REG (in)) == PLUS || strict_low - || (((GET_CODE (SUBREG_REG (in)) == REG + || (((REG_P (SUBREG_REG (in)) && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER) || GET_CODE (SUBREG_REG (in)) == MEM) && ((GET_MODE_SIZE (inmode) @@ -1036,7 +1036,7 @@ push_reload (rtx in, rtx out, rtx *inloc, rtx *outloc, / UNITS_PER_WORD))) #endif )) - || (GET_CODE (SUBREG_REG (in)) == REG + || (REG_P (SUBREG_REG (in)) && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER /* The case where out is nonzero is handled differently in the following statement. */ @@ -1057,7 +1057,7 @@ push_reload (rtx in, rtx out, rtx *inloc, rtx *outloc, == NO_REGS)) #endif #ifdef CANNOT_CHANGE_MODE_CLASS - || (GET_CODE (SUBREG_REG (in)) == REG + || (REG_P (SUBREG_REG (in)) && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER && REG_CANNOT_CHANGE_MODE_P (REGNO (SUBREG_REG (in)), GET_MODE (SUBREG_REG (in)), inmode)) @@ -1091,7 +1091,7 @@ push_reload (rtx in, rtx out, rtx *inloc, rtx *outloc, { enum reg_class in_class = class; - if (GET_CODE (SUBREG_REG (in)) == REG) + if (REG_P (SUBREG_REG (in))) in_class = find_valid_class (inmode, subreg_regno_offset (REGNO (SUBREG_REG (in)), @@ -1123,7 +1123,7 @@ push_reload (rtx in, rtx out, rtx *inloc, rtx *outloc, #endif && (CONSTANT_P (SUBREG_REG (out)) || strict_low - || (((GET_CODE (SUBREG_REG (out)) == REG + || (((REG_P (SUBREG_REG (out)) && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER) || GET_CODE (SUBREG_REG (out)) == MEM) && ((GET_MODE_SIZE (outmode) @@ -1136,7 +1136,7 @@ push_reload (rtx in, rtx out, rtx *inloc, rtx *outloc, / UNITS_PER_WORD))) #endif )) - || (GET_CODE (SUBREG_REG (out)) == REG + || (REG_P (SUBREG_REG (out)) && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER && ((GET_MODE_SIZE (outmode) <= UNITS_PER_WORD && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) @@ -1154,7 +1154,7 @@ push_reload (rtx in, rtx out, rtx *inloc, rtx *outloc, == NO_REGS)) #endif #ifdef CANNOT_CHANGE_MODE_CLASS - || (GET_CODE (SUBREG_REG (out)) == REG + || (REG_P (SUBREG_REG (out)) && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER && REG_CANNOT_CHANGE_MODE_P (REGNO (SUBREG_REG (out)), GET_MODE (SUBREG_REG (out)), @@ -1202,21 +1202,21 @@ push_reload (rtx in, rtx out, rtx *inloc, rtx *outloc, /* If IN appears in OUT, we can't share any input-only reload for IN. */ if (in != 0 && out != 0 && GET_CODE (out) == MEM - && (GET_CODE (in) == REG || GET_CODE (in) == MEM) + && (REG_P (in) || GET_CODE (in) == MEM) && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0))) dont_share = 1; /* If IN is a SUBREG of a hard register, make a new REG. This simplifies some of the cases below. */ - if (in != 0 && GET_CODE (in) == SUBREG && GET_CODE (SUBREG_REG (in)) == REG + if (in != 0 && GET_CODE (in) == SUBREG && REG_P (SUBREG_REG (in)) && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER && ! dont_remove_subreg) in = gen_rtx_REG (GET_MODE (in), subreg_regno (in)); /* Similarly for OUT. */ if (out != 0 && GET_CODE (out) == SUBREG - && GET_CODE (SUBREG_REG (out)) == REG + && REG_P (SUBREG_REG (out)) && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER && ! dont_remove_subreg) out = gen_rtx_REG (GET_MODE (out), subreg_regno (out)); @@ -1320,7 +1320,7 @@ push_reload (rtx in, rtx out, rtx *inloc, rtx *outloc, #ifdef SECONDARY_MEMORY_NEEDED /* If a memory location is needed for the copy, make one. */ - if (in != 0 && (GET_CODE (in) == REG || GET_CODE (in) == SUBREG) + if (in != 0 && (REG_P (in) || GET_CODE (in) == SUBREG) && reg_or_subregno (in) < FIRST_PSEUDO_REGISTER && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (reg_or_subregno (in)), class, inmode)) @@ -1350,7 +1350,7 @@ push_reload (rtx in, rtx out, rtx *inloc, rtx *outloc, n_reloads++; #ifdef SECONDARY_MEMORY_NEEDED - if (out != 0 && (GET_CODE (out) == REG || GET_CODE (out) == SUBREG) + if (out != 0 && (REG_P (out) || GET_CODE (out) == SUBREG) && reg_or_subregno (out) < FIRST_PSEUDO_REGISTER && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (reg_or_subregno (out)), @@ -1494,7 +1494,7 @@ push_reload (rtx in, rtx out, rtx *inloc, rtx *outloc, The easiest way to tell the caller that is to give a phony value for the incoming operand (same as outgoing one). */ if (rld[i].reg_rtx == out - && (GET_CODE (in) == REG || CONSTANT_P (in)) + && (REG_P (in) || CONSTANT_P (in)) && 0 != find_equiv_reg (in, this_insn, 0, REGNO (out), static_reload_reg_p, i, inmode)) rld[i].in = out; @@ -1523,7 +1523,7 @@ push_reload (rtx in, rtx out, rtx *inloc, rtx *outloc, for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1)) if (REG_NOTE_KIND (note) == REG_DEAD - && GET_CODE (XEXP (note, 0)) == REG + && REG_P (XEXP (note, 0)) && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER && reg_mentioned_p (XEXP (note, 0), in) && ! refers_to_regno_for_reload_p (regno, @@ -1762,7 +1762,7 @@ combine_reloads (void) If the same reload reg is used for both reg 69 and the result to be stored in memory, then that result will clobber the address of the memory ref. */ - && ! (GET_CODE (rld[i].in) == REG + && ! (REG_P (rld[i].in) && reg_overlap_mentioned_for_reload_p (rld[i].in, rld[output_reload].out)))) && ! reload_inner_reg_of_subreg (rld[i].in, rld[i].inmode, @@ -1831,7 +1831,7 @@ combine_reloads (void) up can fully hold our output reload. */ for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1)) if (REG_NOTE_KIND (note) == REG_DEAD - && GET_CODE (XEXP (note, 0)) == REG + && REG_P (XEXP (note, 0)) && ! reg_overlap_mentioned_for_reload_p (XEXP (note, 0), rld[output_reload].out) && REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER @@ -1903,7 +1903,7 @@ find_dummy_reload (rtx real_in, rtx real_out, rtx *inloc, rtx *outloc, /* Find the inside of any subregs. */ while (GET_CODE (out) == SUBREG) { - if (GET_CODE (SUBREG_REG (out)) == REG + if (REG_P (SUBREG_REG (out)) && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER) out_offset += subreg_regno_offset (REGNO (SUBREG_REG (out)), GET_MODE (SUBREG_REG (out)), @@ -1913,7 +1913,7 @@ find_dummy_reload (rtx real_in, rtx real_out, rtx *inloc, rtx *outloc, } while (GET_CODE (in) == SUBREG) { - if (GET_CODE (SUBREG_REG (in)) == REG + if (REG_P (SUBREG_REG (in)) && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER) in_offset += subreg_regno_offset (REGNO (SUBREG_REG (in)), GET_MODE (SUBREG_REG (in)), @@ -1927,7 +1927,7 @@ find_dummy_reload (rtx real_in, rtx real_out, rtx *inloc, rtx *outloc, class = PREFERRED_RELOAD_CLASS (in, class); /* See if OUT will do. */ - if (GET_CODE (out) == REG + if (REG_P (out) && REGNO (out) < FIRST_PSEUDO_REGISTER) { unsigned int regno = REGNO (out) + out_offset; @@ -1960,7 +1960,7 @@ find_dummy_reload (rtx real_in, rtx real_out, rtx *inloc, rtx *outloc, if (i == nwords) { - if (GET_CODE (real_out) == REG) + if (REG_P (real_out)) value = real_out; else value = gen_rtx_REG (outmode, regno); @@ -1977,7 +1977,7 @@ find_dummy_reload (rtx real_in, rtx real_out, rtx *inloc, rtx *outloc, Also, the result can't go in IN if IN is used within OUT, or if OUT is an earlyclobber and IN appears elsewhere in the insn. */ if (hard_regs_live_known - && GET_CODE (in) == REG + && REG_P (in) && REGNO (in) < FIRST_PSEUDO_REGISTER && (value == 0 || find_reg_note (this_insn, REG_UNUSED, real_out)) @@ -2015,7 +2015,7 @@ find_dummy_reload (rtx real_in, rtx real_out, rtx *inloc, rtx *outloc, dies here. So don't bother copying value to it. */ if (for_real >= 0 && value == real_out) rld[for_real].out = 0; - if (GET_CODE (real_in) == REG) + if (REG_P (real_in)) value = real_in; else value = gen_rtx_REG (inmode, regno); @@ -2058,7 +2058,7 @@ hard_reg_set_here_p (unsigned int beg_regno, unsigned int end_regno, rtx x) while (GET_CODE (op0) == SUBREG) op0 = SUBREG_REG (op0); - if (GET_CODE (op0) == REG) + if (REG_P (op0)) { unsigned int r = REGNO (op0); @@ -2119,9 +2119,9 @@ operands_match_p (rtx x, rtx y) if (x == y) return 1; - if ((code == REG || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG)) - && (GET_CODE (y) == REG || (GET_CODE (y) == SUBREG - && GET_CODE (SUBREG_REG (y)) == REG))) + if ((code == REG || (code == SUBREG && REG_P (SUBREG_REG (x)))) + && (REG_P (y) || (GET_CODE (y) == SUBREG + && REG_P (SUBREG_REG (y))))) { int j; @@ -2358,7 +2358,7 @@ decompose (rtx x) val.base = base; return val; } - else if (GET_CODE (x) == REG) + else if (REG_P (x)) { val.reg_flag = 1; val.start = true_regnum (x); @@ -2374,7 +2374,7 @@ decompose (rtx x) } else if (GET_CODE (x) == SUBREG) { - if (GET_CODE (SUBREG_REG (x)) != REG) + if (!REG_P (SUBREG_REG (x))) /* This could be more precise, but it's good enough. */ return decompose (SUBREG_REG (x)); val.reg_flag = 1; @@ -2562,9 +2562,9 @@ find_reloads (rtx insn, int replace, int ind_levels, int live_known, is cheap to move between them. If it is not, there may not be an insn to do the copy, so we may need a reload. */ if (GET_CODE (body) == SET - && GET_CODE (SET_DEST (body)) == REG + && REG_P (SET_DEST (body)) && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER - && GET_CODE (SET_SRC (body)) == REG + && REG_P (SET_SRC (body)) && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER && REGISTER_MOVE_COST (GET_MODE (SET_SRC (body)), REGNO_REG_CLASS (REGNO (SET_SRC (body))), @@ -2762,7 +2762,7 @@ find_reloads (rtx insn, int replace, int ind_levels, int live_known, if (replace && GET_CODE (op) == MEM - && GET_CODE (reg) == REG + && REG_P (reg) && (GET_MODE_SIZE (GET_MODE (reg)) >= GET_MODE_SIZE (GET_MODE (op)))) set_unique_reg_note (emit_insn_before (gen_rtx_USE (VOIDmode, reg), @@ -2912,7 +2912,7 @@ find_reloads (rtx insn, int replace, int ind_levels, int live_known, it is a hard reg. This is because it is passed to reg_fits_class_p if it is a REG and all pseudos return 0 from that function. */ - if (GET_CODE (SUBREG_REG (operand)) == REG + if (REG_P (SUBREG_REG (operand)) && REGNO (SUBREG_REG (operand)) < FIRST_PSEUDO_REGISTER) { if (!subreg_offset_representable_p @@ -2956,7 +2956,7 @@ find_reloads (rtx insn, int replace, int ind_levels, int live_known, of a mem that is _not_ to be handled specially? IMO those should have been reduced to just a mem. */ || ((GET_CODE (operand) == MEM - || (GET_CODE (operand)== REG + || (REG_P (operand) && REGNO (operand) >= FIRST_PSEUDO_REGISTER)) #ifndef WORD_REGISTER_OPERATIONS && (((GET_MODE_BITSIZE (GET_MODE (operand)) @@ -3126,7 +3126,7 @@ find_reloads (rtx insn, int replace, int ind_levels, int live_known, if (force_reload) break; if (GET_CODE (operand) == MEM - || (GET_CODE (operand) == REG + || (REG_P (operand) && REGNO (operand) >= FIRST_PSEUDO_REGISTER && reg_renumber[REGNO (operand)] < 0)) win = 1; @@ -3162,7 +3162,7 @@ find_reloads (rtx insn, int replace, int ind_levels, int live_known, after they themselves are reloaded. This is important; we don't want our own handling of unoffsettables to override the handling of reg_equiv_address. */ - && !(GET_CODE (XEXP (operand, 0)) == REG + && !(REG_P (XEXP (operand, 0)) && (ind_levels == 0 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0))) win = 1; @@ -3181,7 +3181,7 @@ find_reloads (rtx insn, int replace, int ind_levels, int live_known, /* A reloaded address is offsettable because it is now just a simple register indirect. */ || address_reloaded[i])) - || (GET_CODE (operand) == REG + || (REG_P (operand) && REGNO (operand) >= FIRST_PSEUDO_REGISTER && reg_renumber[REGNO (operand)] < 0 /* If reg_equiv_address is nonzero, we will be @@ -3272,7 +3272,7 @@ find_reloads (rtx insn, int replace, int ind_levels, int live_known, || LEGITIMATE_PIC_OPERAND_P (operand)) #endif && (GENERAL_REGS == ALL_REGS - || GET_CODE (operand) != REG + || !REG_P (operand) || (REGNO (operand) >= FIRST_PSEUDO_REGISTER && reg_renumber[REGNO (operand)] < 0))) win = 1; @@ -3301,7 +3301,7 @@ find_reloads (rtx insn, int replace, int ind_levels, int live_known, /* Likewise if the address will be reloaded because reg_equiv_address is nonzero. For reg_equiv_mem we have to check. */ - else if (GET_CODE (operand) == REG + else if (REG_P (operand) && REGNO (operand) >= FIRST_PSEUDO_REGISTER && reg_renumber[REGNO (operand)] < 0 && ((reg_equiv_mem[REGNO (operand)] != 0 @@ -3345,7 +3345,7 @@ find_reloads (rtx insn, int replace, int ind_levels, int live_known, if (GET_MODE (operand) == BLKmode) break; winreg = 1; - if (GET_CODE (operand) == REG + if (REG_P (operand) && reg_fits_class_p (operand, this_alternative[i], offset, GET_MODE (recog_data.operand[i]))) win = 1; @@ -3375,7 +3375,7 @@ find_reloads (rtx insn, int replace, int ind_levels, int live_known, if (badop) bad = 1; /* Alternative loses if it has no regs for a reg operand. */ - if (GET_CODE (operand) == REG + if (REG_P (operand) && this_alternative[i] == (int) NO_REGS && this_alternative_matches[i] < 0) bad = 1; @@ -3431,7 +3431,7 @@ find_reloads (rtx insn, int replace, int ind_levels, int live_known, case where we are forcing a constant into memory and it will then win since we don't want to have a different alternative match then. */ - if (! (GET_CODE (operand) == REG + if (! (REG_P (operand) && REGNO (operand) >= FIRST_PSEUDO_REGISTER) && GET_CODE (operand) != SCRATCH && ! (const_to_mem && constmemok)) @@ -3530,7 +3530,7 @@ find_reloads (rtx insn, int replace, int ind_levels, int live_known, /* If the output is in a single-reg class, it's costly to reload it, so reload the input instead. */ if (reg_class_size[this_alternative[i]] == 1 - && (GET_CODE (recog_data.operand[j]) == REG + && (REG_P (recog_data.operand[j]) || GET_CODE (recog_data.operand[j]) == SUBREG)) { losers++; @@ -3908,7 +3908,7 @@ find_reloads (rtx insn, int replace, int ind_levels, int live_known, while (GET_CODE (operand) == SUBREG) operand = SUBREG_REG (operand); if ((GET_CODE (operand) == MEM - || (GET_CODE (operand) == REG + || (REG_P (operand) && REGNO (operand) >= FIRST_PSEUDO_REGISTER)) /* If this is only for an output, the optional reload would not actually cause us to use a register now, just note that @@ -3949,7 +3949,7 @@ find_reloads (rtx insn, int replace, int ind_levels, int live_known, inheritance will do the right thing. */ else if (replace && (GET_CODE (operand) == MEM - || (GET_CODE (operand) == REG + || (REG_P (operand) && REGNO (operand) >= FIRST_PSEUDO_REGISTER && reg_renumber [REGNO (operand)] < 0))) { @@ -3957,7 +3957,7 @@ find_reloads (rtx insn, int replace, int ind_levels, int live_known, while (GET_CODE (operand) == SUBREG) operand = SUBREG_REG (operand); - if (GET_CODE (operand) == REG) + if (REG_P (operand)) { if (modified[i] != RELOAD_WRITE) /* We mark the USE with QImode so that we recognize @@ -3985,7 +3985,7 @@ find_reloads (rtx insn, int replace, int ind_levels, int live_known, while (GET_CODE (operand) == SUBREG) operand = SUBREG_REG (operand); if ((GET_CODE (operand) == MEM - || (GET_CODE (operand) == REG + || (REG_P (operand) && REGNO (operand) >= FIRST_PSEUDO_REGISTER)) && ((enum reg_class) goal_alternative[goal_alternative_matches[i]] != NO_REGS)) @@ -4060,7 +4060,7 @@ find_reloads (rtx insn, int replace, int ind_levels, int live_known, for (i = 0; i < n_reloads; i++) if (rld[i].reg_rtx == 0 && rld[i].in != 0 - && GET_CODE (rld[i].in) == REG + && REG_P (rld[i].in) && rld[i].out == 0) { rld[i].reg_rtx @@ -4365,7 +4365,7 @@ find_reloads (rtx insn, int replace, int ind_levels, int live_known, for (i = 0; i < n_reloads; i++) if (rld[i].when_needed == RELOAD_FOR_INPUT && GET_CODE (PATTERN (insn)) == SET - && GET_CODE (SET_DEST (PATTERN (insn))) == REG + && REG_P (SET_DEST (PATTERN (insn))) && SET_SRC (PATTERN (insn)) == rld[i].in) { rtx dest = SET_DEST (PATTERN (insn)); @@ -4494,7 +4494,7 @@ find_reloads_toplev (rtx x, int opnum, enum reload_type type, return tem; } - if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG) + if (code == SUBREG && REG_P (SUBREG_REG (x))) { /* Check for SUBREG containing a REG that's equivalent to a constant. If the constant has a known value, truncate it right now. @@ -4658,7 +4658,7 @@ find_reloads_address (enum machine_mode mode, rtx *memrefloc, rtx ad, reload if not. We first handle the cases where we need not reload or where we must reload in a non-standard way. */ - if (GET_CODE (ad) == REG) + if (REG_P (ad)) { regno = REGNO (ad); @@ -4692,9 +4692,9 @@ find_reloads_address (enum machine_mode mode, rtx *memrefloc, rtx ad, if (ind_levels > 0 && strict_memory_address_p (mode, tem) - && (GET_CODE (XEXP (tem, 0)) == REG + && (REG_P (XEXP (tem, 0)) || (GET_CODE (XEXP (tem, 0)) == PLUS - && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG + && REG_P (XEXP (XEXP (tem, 0), 0)) && CONSTANT_P (XEXP (XEXP (tem, 0), 1))))) { /* TEM is not the same as what we'll be replacing the @@ -4747,7 +4747,7 @@ find_reloads_address (enum machine_mode mode, rtx *memrefloc, rtx ad, /* But first quickly dispose of a common case. */ if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT - && GET_CODE (XEXP (ad, 0)) == REG + && REG_P (XEXP (ad, 0)) && reg_equiv_constant[REGNO (XEXP (ad, 0))] == 0) return 0; @@ -4823,9 +4823,9 @@ find_reloads_address (enum machine_mode mode, rtx *memrefloc, rtx ad, if (ind_levels == 0 || (GET_CODE (XEXP (tem, 0)) == SYMBOL_REF && ! indirect_symref_ok) || GET_CODE (XEXP (tem, 0)) == MEM - || ! (GET_CODE (XEXP (tem, 0)) == REG + || ! (REG_P (XEXP (tem, 0)) || (GET_CODE (XEXP (tem, 0)) == PLUS - && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG + && REG_P (XEXP (XEXP (tem, 0), 0)) && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT))) { /* Must use TEM here, not AD, since it is the one that will @@ -4846,7 +4846,7 @@ find_reloads_address (enum machine_mode mode, rtx *memrefloc, rtx ad, targets (namely SH) we can also get too large displacements from big-endian corrections. */ else if (GET_CODE (ad) == PLUS - && GET_CODE (XEXP (ad, 0)) == REG + && REG_P (XEXP (ad, 0)) && REGNO (XEXP (ad, 0)) < FIRST_PSEUDO_REGISTER && REG_MODE_OK_FOR_BASE_P (XEXP (ad, 0), mode) && GET_CODE (XEXP (ad, 1)) == CONST_INT) @@ -4909,7 +4909,7 @@ find_reloads_address (enum machine_mode mode, rtx *memrefloc, rtx ad, else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT && GET_CODE (XEXP (ad, 0)) == PLUS - && GET_CODE (XEXP (XEXP (ad, 0), 0)) == REG + && REG_P (XEXP (XEXP (ad, 0), 0)) && REGNO (XEXP (XEXP (ad, 0), 0)) < FIRST_PSEUDO_REGISTER && (REG_MODE_OK_FOR_BASE_P (XEXP (XEXP (ad, 0), 0), mode) || XEXP (XEXP (ad, 0), 0) == frame_pointer_rtx @@ -4937,7 +4937,7 @@ find_reloads_address (enum machine_mode mode, rtx *memrefloc, rtx ad, else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT && GET_CODE (XEXP (ad, 0)) == PLUS - && GET_CODE (XEXP (XEXP (ad, 0), 1)) == REG + && REG_P (XEXP (XEXP (ad, 0), 1)) && REGNO (XEXP (XEXP (ad, 0), 1)) < FIRST_PSEUDO_REGISTER && (REG_MODE_OK_FOR_BASE_P (XEXP (XEXP (ad, 0), 1), mode) || XEXP (XEXP (ad, 0), 1) == frame_pointer_rtx @@ -5152,12 +5152,12 @@ subst_indexed_address (rtx addr) { /* Try to find a register to replace. */ op0 = XEXP (addr, 0), op1 = XEXP (addr, 1), op2 = 0; - if (GET_CODE (op0) == REG + if (REG_P (op0) && (regno = REGNO (op0)) >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0 && reg_equiv_constant[regno] != 0) op0 = reg_equiv_constant[regno]; - else if (GET_CODE (op1) == REG + else if (REG_P (op1) && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0 && reg_equiv_constant[regno] != 0) @@ -5464,7 +5464,7 @@ find_reloads_address_1 (enum machine_mode mode, rtx x, int context, case POST_DEC: case PRE_INC: case PRE_DEC: - if (GET_CODE (XEXP (x, 0)) == REG) + if (REG_P (XEXP (x, 0))) { int regno = REGNO (XEXP (x, 0)); int value = 0; @@ -5699,7 +5699,7 @@ find_reloads_address_1 (enum machine_mode mode, rtx x, int context, return 0; case SUBREG: - if (GET_CODE (SUBREG_REG (x)) == REG) + if (REG_P (SUBREG_REG (x))) { /* If this is a SUBREG of a hard register and the resulting register is of the wrong class, reload the whole SUBREG. This avoids @@ -5879,7 +5879,7 @@ find_reloads_subreg_address (rtx x, int force_replace, int opnum, return x; base = XEXP (base, 0); } - if (GET_CODE (base) != REG + if (!REG_P (base) || (REGNO_POINTER_ALIGN (REGNO (base)) < outer_size * BITS_PER_UNIT)) return x; @@ -6101,7 +6101,7 @@ find_replacement (rtx *loc) ??? Is it actually still ever a SUBREG? If so, why? */ - if (GET_CODE (reloadreg) == REG) + if (REG_P (reloadreg)) return gen_rtx_REG (GET_MODE (*loc), (REGNO (reloadreg) + subreg_regno_offset (REGNO (SUBREG_REG (*loc)), @@ -6192,7 +6192,7 @@ refers_to_regno_for_reload_p (unsigned int regno, unsigned int endregno, case SUBREG: /* If this is a SUBREG of a hard reg, we can see exactly which registers are being modified. Otherwise, handle normally. */ - if (GET_CODE (SUBREG_REG (x)) == REG + if (REG_P (SUBREG_REG (x)) && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER) { unsigned int inner_regno = subreg_regno (x); @@ -6212,14 +6212,14 @@ refers_to_regno_for_reload_p (unsigned int regno, unsigned int endregno, treat each word individually. */ && ((GET_CODE (SET_DEST (x)) == SUBREG && loc != &SUBREG_REG (SET_DEST (x)) - && GET_CODE (SUBREG_REG (SET_DEST (x))) == REG + && REG_P (SUBREG_REG (SET_DEST (x))) && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER && refers_to_regno_for_reload_p (regno, endregno, SUBREG_REG (SET_DEST (x)), loc)) /* If the output is an earlyclobber operand, this is a conflict. */ - || ((GET_CODE (SET_DEST (x)) != REG + || ((!REG_P (SET_DEST (x)) || earlyclobber_operand_p (SET_DEST (x))) && refers_to_regno_for_reload_p (regno, endregno, SET_DEST (x), loc)))) @@ -6295,7 +6295,7 @@ reg_overlap_mentioned_for_reload_p (rtx x, rtx in) SUBREG_BYTE (x), GET_MODE (x)); } - else if (GET_CODE (x) == REG) + else if (REG_P (x)) { regno = REGNO (x); @@ -6325,7 +6325,7 @@ reg_overlap_mentioned_for_reload_p (rtx x, rtx in) into a RELOAD_OTHER on behalf of another RELOAD_OTHER. */ while (GET_CODE (in) == MEM) in = XEXP (in, 0); - if (GET_CODE (in) == REG) + if (REG_P (in)) return 0; else if (GET_CODE (in) == PLUS) return (reg_overlap_mentioned_for_reload_p (x, XEXP (in, 0)) @@ -6354,7 +6354,7 @@ refers_to_mem_for_reload_p (rtx x) if (GET_CODE (x) == MEM) return 1; - if (GET_CODE (x) == REG) + if (REG_P (x)) return (REGNO (x) >= FIRST_PSEUDO_REGISTER && reg_equiv_memory_loc[REGNO (x)]); @@ -6414,7 +6414,7 @@ find_equiv_reg (rtx goal, rtx insn, enum reg_class class, int other, if (goal == 0) regno = goalreg; - else if (GET_CODE (goal) == REG) + else if (REG_P (goal)) regno = REGNO (goal); else if (GET_CODE (goal) == MEM) { @@ -6510,7 +6510,7 @@ find_equiv_reg (rtx goal, rtx insn, enum reg_class class, int other, && ((rtx_equal_p (XEXP (tem, 0), goal) && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0) - || (GET_CODE (SET_DEST (pat)) == REG + || (REG_P (SET_DEST (pat)) && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE && (GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) == MODE_FLOAT) @@ -6525,7 +6525,7 @@ find_equiv_reg (rtx goal, rtx insn, enum reg_class class, int other, && (valueno = true_regnum (valtry)) >= 0))) || (goal_const && (tem = find_reg_note (p, REG_EQUIV, NULL_RTX)) - && GET_CODE (SET_DEST (pat)) == REG + && REG_P (SET_DEST (pat)) && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE && (GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) == MODE_FLOAT) @@ -6700,7 +6700,7 @@ find_equiv_reg (rtx goal, rtx insn, enum reg_class class, int other, || GET_CODE (dest) == SIGN_EXTRACT || GET_CODE (dest) == STRICT_LOW_PART) dest = XEXP (dest, 0); - if (GET_CODE (dest) == REG) + if (REG_P (dest)) { int xregno = REGNO (dest); int xnregs; @@ -6744,7 +6744,7 @@ find_equiv_reg (rtx goal, rtx insn, enum reg_class class, int other, || GET_CODE (dest) == SIGN_EXTRACT || GET_CODE (dest) == STRICT_LOW_PART) dest = XEXP (dest, 0); - if (GET_CODE (dest) == REG) + if (REG_P (dest)) { int xregno = REGNO (dest); int xnregs; @@ -6790,7 +6790,7 @@ find_equiv_reg (rtx goal, rtx insn, enum reg_class class, int other, { rtx dest = SET_DEST (pat); - if (GET_CODE (dest) == REG) + if (REG_P (dest)) { int xregno = REGNO (dest); int xnregs @@ -6828,7 +6828,7 @@ find_equiv_reg (rtx goal, rtx insn, enum reg_class class, int other, for (link = REG_NOTES (p); link; link = XEXP (link, 1)) if (REG_NOTE_KIND (link) == REG_INC - && GET_CODE (XEXP (link, 0)) == REG) + && REG_P (XEXP (link, 0))) { int incno = REGNO (XEXP (link, 0)); if (incno < regno + nregs && incno >= regno) @@ -6914,7 +6914,7 @@ regno_clobbered_p (unsigned int regno, rtx insn, enum machine_mode mode, if ((GET_CODE (PATTERN (insn)) == CLOBBER || (sets && GET_CODE (PATTERN (insn)) == SET)) - && GET_CODE (XEXP (PATTERN (insn), 0)) == REG) + && REG_P (XEXP (PATTERN (insn), 0))) { unsigned int test = REGNO (XEXP (PATTERN (insn), 0)); @@ -6930,7 +6930,7 @@ regno_clobbered_p (unsigned int regno, rtx insn, enum machine_mode mode, rtx elt = XVECEXP (PATTERN (insn), 0, i); if ((GET_CODE (elt) == CLOBBER || (sets && GET_CODE (PATTERN (insn)) == SET)) - && GET_CODE (XEXP (elt, 0)) == REG) + && REG_P (XEXP (elt, 0))) { unsigned int test = REGNO (XEXP (elt, 0)); diff --git a/gcc/reload1.c b/gcc/reload1.c index 4282280..ea01b688 100644 --- a/gcc/reload1.c +++ b/gcc/reload1.c @@ -584,7 +584,7 @@ replace_pseudos_in (rtx *loc, enum machine_mode mem_mode, rtx usage) *loc = reg_equiv_mem[regno]; else if (reg_equiv_address[regno]) *loc = gen_rtx_MEM (GET_MODE (x), reg_equiv_address[regno]); - else if (GET_CODE (regno_reg_rtx[regno]) != REG + else if (!REG_P (regno_reg_rtx[regno]) || REGNO (regno_reg_rtx[regno]) != regno) *loc = regno_reg_rtx[regno]; else @@ -730,7 +730,7 @@ reload (rtx first, int global) && GET_MODE (insn) != VOIDmode) PUT_MODE (insn, VOIDmode); - if (set != 0 && GET_CODE (SET_DEST (set)) == REG) + if (set != 0 && REG_P (SET_DEST (set))) { rtx note = find_reg_note (insn, REG_EQUIV, NULL_RTX); if (note @@ -804,7 +804,7 @@ reload (rtx first, int global) /* If this insn is setting a MEM from a register equivalent to it, this is the equivalencing insn. */ else if (set && GET_CODE (SET_DEST (set)) == MEM - && GET_CODE (SET_SRC (set)) == REG + && REG_P (SET_SRC (set)) && reg_equiv_memory_loc[REGNO (SET_SRC (set))] && rtx_equal_p (SET_DEST (set), reg_equiv_memory_loc[REGNO (SET_SRC (set))])) @@ -938,10 +938,10 @@ reload (rtx first, int global) XEXP (x, 0))) reg_equiv_mem[i] = x, reg_equiv_address[i] = 0; else if (CONSTANT_P (XEXP (x, 0)) - || (GET_CODE (XEXP (x, 0)) == REG + || (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER) || (GET_CODE (XEXP (x, 0)) == PLUS - && GET_CODE (XEXP (XEXP (x, 0), 0)) == REG + && REG_P (XEXP (XEXP (x, 0), 0)) && (REGNO (XEXP (XEXP (x, 0), 0)) < FIRST_PSEUDO_REGISTER) && CONSTANT_P (XEXP (XEXP (x, 0), 1)))) @@ -1180,7 +1180,7 @@ reload (rtx first, int global) || (GET_CODE (XEXP (XEXP (PATTERN (insn), 0), 0)) != SCRATCH && XEXP (XEXP (PATTERN (insn), 0), 0) != stack_pointer_rtx)) - && (GET_CODE (XEXP (PATTERN (insn), 0)) != REG + && (!REG_P (XEXP (PATTERN (insn), 0)) || ! REG_FUNCTION_VALUE_P (XEXP (PATTERN (insn), 0))))) { delete_insn (insn); @@ -1454,7 +1454,7 @@ calculate_needs_all_insns (int global) rtx set = single_set (insn); /* Skip insns that only set an equivalence. */ - if (set && GET_CODE (SET_DEST (set)) == REG + if (set && REG_P (SET_DEST (set)) && reg_renumber[REGNO (SET_DEST (set))] < 0 && reg_equiv_constant[REGNO (SET_DEST (set))]) continue; @@ -1479,7 +1479,7 @@ calculate_needs_all_insns (int global) rtx set = single_set (insn); if (set && SET_SRC (set) == SET_DEST (set) - && GET_CODE (SET_SRC (set)) == REG + && REG_P (SET_SRC (set)) && REGNO (SET_SRC (set)) >= FIRST_PSEUDO_REGISTER) { delete_insn (insn); @@ -1714,9 +1714,9 @@ find_reg (struct insn_chain *chain, int order) } if (! ok) continue; - if (rl->in && GET_CODE (rl->in) == REG && REGNO (rl->in) == regno) + if (rl->in && REG_P (rl->in) && REGNO (rl->in) == regno) this_cost--; - if (rl->out && GET_CODE (rl->out) == REG && REGNO (rl->out) == regno) + if (rl->out && REG_P (rl->out) && REGNO (rl->out) == regno) this_cost--; if (this_cost < best_cost /* Among registers with equal cost, prefer caller-saved ones, or @@ -1905,7 +1905,7 @@ delete_dead_insn (rtx insn) /* If the previous insn sets a register that dies in our insn, delete it too. */ if (prev && GET_CODE (PATTERN (prev)) == SET - && (prev_dest = SET_DEST (PATTERN (prev)), GET_CODE (prev_dest) == REG) + && (prev_dest = SET_DEST (PATTERN (prev)), REG_P (prev_dest)) && reg_mentioned_p (prev_dest, PATTERN (insn)) && find_regno_note (insn, REG_DEAD, REGNO (prev_dest)) && ! side_effects_p (SET_SRC (PATTERN (prev)))) @@ -1934,7 +1934,7 @@ alter_reg (int i, int from_reg) /* If the reg got changed to a MEM at rtl-generation time, ignore it. */ - if (GET_CODE (regno_reg_rtx[i]) != REG) + if (!REG_P (regno_reg_rtx[i])) return; /* Modify the reg-rtx to contain the new hard reg @@ -2055,7 +2055,7 @@ alter_reg (int i, int from_reg) any copies of it, since otherwise when the stack slot is reused, nonoverlapping_memrefs_p might think they cannot overlap. */ - if (decl && GET_CODE (decl) == REG && REGNO (decl) == (unsigned) i) + if (decl && REG_P (decl) && REGNO (decl) == (unsigned) i) { if (from_reg != -1 && spill_stack_slot[from_reg] == x) x = copy_rtx (x); @@ -2334,7 +2334,7 @@ eliminate_regs (rtx x, enum machine_mode mem_mode, rtx insn) case PLUS: /* If this is the sum of an eliminable register and a constant, rework the sum. */ - if (GET_CODE (XEXP (x, 0)) == REG + if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER && CONSTANT_P (XEXP (x, 1))) { @@ -2383,13 +2383,13 @@ eliminate_regs (rtx x, enum machine_mode mem_mode, rtx insn) didn't get a hard register but has a reg_equiv_constant, we must replace the constant here since it may no longer be in the position of any operand. */ - if (GET_CODE (new0) == PLUS && GET_CODE (new1) == REG + if (GET_CODE (new0) == PLUS && REG_P (new1) && REGNO (new1) >= FIRST_PSEUDO_REGISTER && reg_renumber[REGNO (new1)] < 0 && reg_equiv_constant != 0 && reg_equiv_constant[REGNO (new1)] != 0) new1 = reg_equiv_constant[REGNO (new1)]; - else if (GET_CODE (new1) == PLUS && GET_CODE (new0) == REG + else if (GET_CODE (new1) == PLUS && REG_P (new0) && REGNO (new0) >= FIRST_PSEUDO_REGISTER && reg_renumber[REGNO (new0)] < 0 && reg_equiv_constant[REGNO (new0)] != 0) @@ -2414,7 +2414,7 @@ eliminate_regs (rtx x, enum machine_mode mem_mode, rtx insn) so that we have (plus (mult ..) ..). This is needed in order to keep load-address insns valid. This case is pathological. We ignore the possibility of overflow here. */ - if (GET_CODE (XEXP (x, 0)) == REG + if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER && GET_CODE (XEXP (x, 1)) == CONST_INT) for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; @@ -2519,7 +2519,7 @@ eliminate_regs (rtx x, enum machine_mode mem_mode, rtx insn) pseudo didn't get a hard reg, we must replace this with the eliminated version of the memory location because push_reload may do the replacement in certain circumstances. */ - if (GET_CODE (SUBREG_REG (x)) == REG + if (REG_P (SUBREG_REG (x)) && (GET_MODE_SIZE (GET_MODE (x)) <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))) && reg_equiv_memory_loc != 0 @@ -2738,7 +2738,7 @@ elimination_effects (rtx x, enum machine_mode mem_mode) return; case SUBREG: - if (GET_CODE (SUBREG_REG (x)) == REG + if (REG_P (SUBREG_REG (x)) && (GET_MODE_SIZE (GET_MODE (x)) <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))) && reg_equiv_memory_loc != 0 @@ -2772,7 +2772,7 @@ elimination_effects (rtx x, enum machine_mode mem_mode) case SET: /* Check for setting a register that we know about. */ - if (GET_CODE (SET_DEST (x)) == REG) + if (REG_P (SET_DEST (x))) { /* See if this is setting the replacement register for an elimination. @@ -2910,7 +2910,7 @@ eliminate_regs_in_insn (rtx insn, int replace) abort (); } - if (old_set != 0 && GET_CODE (SET_DEST (old_set)) == REG + if (old_set != 0 && REG_P (SET_DEST (old_set)) && REGNO (SET_DEST (old_set)) < FIRST_PSEUDO_REGISTER) { /* Check for setting an eliminable register. */ @@ -3004,15 +3004,15 @@ eliminate_regs_in_insn (rtx insn, int replace) currently support: a single set with the source or a REG_EQUAL note being a PLUS of an eliminable register and a constant. */ plus_src = 0; - if (old_set && GET_CODE (SET_DEST (old_set)) == REG) + if (old_set && REG_P (SET_DEST (old_set))) { /* First see if the source is of the form (plus (reg) CST). */ if (GET_CODE (SET_SRC (old_set)) == PLUS - && GET_CODE (XEXP (SET_SRC (old_set), 0)) == REG + && REG_P (XEXP (SET_SRC (old_set), 0)) && GET_CODE (XEXP (SET_SRC (old_set), 1)) == CONST_INT && REGNO (XEXP (SET_SRC (old_set), 0)) < FIRST_PSEUDO_REGISTER) plus_src = SET_SRC (old_set); - else if (GET_CODE (SET_SRC (old_set)) == REG) + else if (REG_P (SET_SRC (old_set))) { /* Otherwise, see if we have a REG_EQUAL note of the form (plus (reg) CST). */ @@ -3021,7 +3021,7 @@ eliminate_regs_in_insn (rtx insn, int replace) { if (REG_NOTE_KIND (links) == REG_EQUAL && GET_CODE (XEXP (links, 0)) == PLUS - && GET_CODE (XEXP (XEXP (links, 0), 0)) == REG + && REG_P (XEXP (XEXP (links, 0), 0)) && GET_CODE (XEXP (XEXP (links, 0), 1)) == CONST_INT && REGNO (XEXP (XEXP (links, 0), 0)) < FIRST_PSEUDO_REGISTER) { @@ -3110,7 +3110,7 @@ eliminate_regs_in_insn (rtx insn, int replace) { /* Check for setting a register that we know about. */ if (recog_data.operand_type[i] != OP_IN - && GET_CODE (orig_operand[i]) == REG) + && REG_P (orig_operand[i])) { /* If we are assigning to a register that can be eliminated, it must be as part of a PARALLEL, since the code above handles @@ -3133,7 +3133,7 @@ eliminate_regs_in_insn (rtx insn, int replace) /* If an output operand changed from a REG to a MEM and INSN is an insn, write a CLOBBER insn. */ if (recog_data.operand_type[i] != OP_IN - && GET_CODE (orig_operand[i]) == REG + && REG_P (orig_operand[i]) && GET_CODE (substed_operand[i]) == MEM && replace) emit_insn_after (gen_rtx_CLOBBER (VOIDmode, orig_operand[i]), @@ -3188,9 +3188,9 @@ eliminate_regs_in_insn (rtx insn, int replace) thing always? */ if (! insn_is_asm && old_set != 0 - && ((GET_CODE (SET_SRC (old_set)) == REG + && ((REG_P (SET_SRC (old_set)) && (GET_CODE (new_body) != SET - || GET_CODE (SET_SRC (new_body)) != REG)) + || !REG_P (SET_SRC (new_body)))) /* If this was a load from or store to memory, compare the MEM in recog_data.operand to the one in the insn. If they are not equal, then rerecognize the insn. */ @@ -3756,7 +3756,7 @@ scan_paradoxical_subregs (rtx x) return; case SUBREG: - if (GET_CODE (SUBREG_REG (x)) == REG + if (REG_P (SUBREG_REG (x)) && GET_MODE_SIZE (GET_MODE (x)) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))) reg_max_ref_width[REGNO (SUBREG_REG (x))] = GET_MODE_SIZE (GET_MODE (x)); @@ -4091,7 +4091,7 @@ forget_old_reloads_1 (rtx x, rtx ignored ATTRIBUTE_UNUSED, x = SUBREG_REG (x); } - if (GET_CODE (x) != REG) + if (!REG_P (x)) return; regno = REGNO (x); @@ -4815,7 +4815,7 @@ reload_reg_free_for_value_p (int start_regno, int regno, int opnum, for (i = 0; i < n_reloads; i++) { rtx reg = rld[i].reg_rtx; - if (reg && GET_CODE (reg) == REG + if (reg && REG_P (reg) && ((unsigned) regno - true_regnum (reg) <= hard_regno_nregs[REGNO (reg)][GET_MODE (reg)] - (unsigned) 1) && i != reloadnum) @@ -5402,18 +5402,18 @@ choose_reload_regs (struct insn_chain *chain) if (rld[r].in == 0) ; - else if (GET_CODE (rld[r].in) == REG) + else if (REG_P (rld[r].in)) { regno = REGNO (rld[r].in); mode = GET_MODE (rld[r].in); } - else if (GET_CODE (rld[r].in_reg) == REG) + else if (REG_P (rld[r].in_reg)) { regno = REGNO (rld[r].in_reg); mode = GET_MODE (rld[r].in_reg); } else if (GET_CODE (rld[r].in_reg) == SUBREG - && GET_CODE (SUBREG_REG (rld[r].in_reg)) == REG) + && REG_P (SUBREG_REG (rld[r].in_reg))) { byte = SUBREG_BYTE (rld[r].in_reg); regno = REGNO (SUBREG_REG (rld[r].in_reg)); @@ -5426,7 +5426,7 @@ choose_reload_regs (struct insn_chain *chain) || GET_CODE (rld[r].in_reg) == PRE_DEC || GET_CODE (rld[r].in_reg) == POST_INC || GET_CODE (rld[r].in_reg) == POST_DEC) - && GET_CODE (XEXP (rld[r].in_reg, 0)) == REG) + && REG_P (XEXP (rld[r].in_reg, 0))) { regno = REGNO (XEXP (rld[r].in_reg, 0)); mode = GET_MODE (XEXP (rld[r].in_reg, 0)); @@ -5438,7 +5438,7 @@ choose_reload_regs (struct insn_chain *chain) Also, it takes much more hair to keep track of all the things that can invalidate an inherited reload of part of a pseudoreg. */ else if (GET_CODE (rld[r].in) == SUBREG - && GET_CODE (SUBREG_REG (rld[r].in)) == REG) + && REG_P (SUBREG_REG (rld[r].in))) regno = subreg_regno (rld[r].in); #endif @@ -5597,7 +5597,7 @@ choose_reload_regs (struct insn_chain *chain) && rld[r].out == 0 && (CONSTANT_P (rld[r].in) || GET_CODE (rld[r].in) == PLUS - || GET_CODE (rld[r].in) == REG + || REG_P (rld[r].in) || GET_CODE (rld[r].in) == MEM) && (rld[r].nregs == max_group_size || ! reg_classes_intersect_p (rld[r].class, group_class))) @@ -5623,7 +5623,7 @@ choose_reload_regs (struct insn_chain *chain) if (equiv != 0) { - if (GET_CODE (equiv) == REG) + if (REG_P (equiv)) regno = REGNO (equiv); else if (GET_CODE (equiv) == SUBREG) { @@ -5872,7 +5872,7 @@ choose_reload_regs (struct insn_chain *chain) if (reload_inherited[r] && rld[r].reg_rtx) check_reg = rld[r].reg_rtx; else if (reload_override_in[r] - && (GET_CODE (reload_override_in[r]) == REG + && (REG_P (reload_override_in[r]) || GET_CODE (reload_override_in[r]) == SUBREG)) check_reg = reload_override_in[r]; else @@ -5941,7 +5941,7 @@ choose_reload_regs (struct insn_chain *chain) /* I is nonneg if this reload uses a register. If rld[r].reg_rtx is 0, this is an optional reload that we opted to ignore. */ - if (rld[r].out_reg != 0 && GET_CODE (rld[r].out_reg) == REG + if (rld[r].out_reg != 0 && REG_P (rld[r].out_reg) && rld[r].reg_rtx != 0) { int nregno = REGNO (rld[r].out_reg); @@ -6212,7 +6212,7 @@ emit_input_reload_insns (struct insn_chain *chain, struct reload *rl, if (oldequiv == 0 && optimize && (GET_CODE (old) == MEM - || (GET_CODE (old) == REG + || (REG_P (old) && REGNO (old) >= FIRST_PSEUDO_REGISTER && reg_renumber[REGNO (old)] < 0))) oldequiv = find_equiv_reg (old, insn, ALL_REGS, -1, NULL, 0, mode); @@ -6257,14 +6257,14 @@ emit_input_reload_insns (struct insn_chain *chain, struct reload *rl, find the pseudo in RELOAD_IN_REG. */ if (oldequiv == 0 && reload_override_in[j] - && GET_CODE (rl->in_reg) == REG) + && REG_P (rl->in_reg)) { oldequiv = old; old = rl->in_reg; } if (oldequiv == 0) oldequiv = old; - else if (GET_CODE (oldequiv) == REG) + else if (REG_P (oldequiv)) oldequiv_reg = oldequiv; else if (GET_CODE (oldequiv) == SUBREG) oldequiv_reg = SUBREG_REG (oldequiv); @@ -6273,10 +6273,10 @@ emit_input_reload_insns (struct insn_chain *chain, struct reload *rl, with an output-reload, see if we can prove there was actually no need to store the old value in it. */ - if (optimize && GET_CODE (oldequiv) == REG + if (optimize && REG_P (oldequiv) && REGNO (oldequiv) < FIRST_PSEUDO_REGISTER && spill_reg_store[REGNO (oldequiv)] - && GET_CODE (old) == REG + && REG_P (old) && (dead_or_set_p (insn, spill_reg_stored_to[REGNO (oldequiv)]) || rtx_equal_p (spill_reg_stored_to[REGNO (oldequiv)], rl->out_reg))) @@ -6346,10 +6346,10 @@ emit_input_reload_insns (struct insn_chain *chain, struct reload *rl, old = XEXP (rl->in_reg, 0); - if (optimize && GET_CODE (oldequiv) == REG + if (optimize && REG_P (oldequiv) && REGNO (oldequiv) < FIRST_PSEUDO_REGISTER && spill_reg_store[REGNO (oldequiv)] - && GET_CODE (old) == REG + && REG_P (old) && (dead_or_set_p (insn, spill_reg_stored_to[REGNO (oldequiv)]) || rtx_equal_p (spill_reg_stored_to[REGNO (oldequiv)], @@ -6368,7 +6368,7 @@ emit_input_reload_insns (struct insn_chain *chain, struct reload *rl, insn, see if we can get rid of that pseudo-register entirely by redirecting the previous insn into our reload register. */ - else if (optimize && GET_CODE (old) == REG + else if (optimize && REG_P (old) && REGNO (old) >= FIRST_PSEUDO_REGISTER && dead_or_set_p (insn, old) /* This is unsafe if some other reload @@ -6402,7 +6402,7 @@ emit_input_reload_insns (struct insn_chain *chain, struct reload *rl, a reload register, and its spill_reg_store entry will contain the previous destination. This is now invalid. */ - if (GET_CODE (SET_SRC (PATTERN (temp))) == REG + if (REG_P (SET_SRC (PATTERN (temp))) && REGNO (SET_SRC (PATTERN (temp))) < FIRST_PSEUDO_REGISTER) { spill_reg_store[REGNO (SET_SRC (PATTERN (temp)))] = 0; @@ -6465,7 +6465,7 @@ emit_input_reload_insns (struct insn_chain *chain, struct reload *rl, tmp = oldequiv; if (GET_CODE (tmp) == SUBREG) tmp = SUBREG_REG (tmp); - if (GET_CODE (tmp) == REG + if (REG_P (tmp) && REGNO (tmp) >= FIRST_PSEUDO_REGISTER && (reg_equiv_memory_loc[REGNO (tmp)] != 0 || reg_equiv_constant[REGNO (tmp)] != 0)) @@ -6481,7 +6481,7 @@ emit_input_reload_insns (struct insn_chain *chain, struct reload *rl, tmp = old; if (GET_CODE (tmp) == SUBREG) tmp = SUBREG_REG (tmp); - if (GET_CODE (tmp) == REG + if (REG_P (tmp) && REGNO (tmp) >= FIRST_PSEUDO_REGISTER && (reg_equiv_memory_loc[REGNO (tmp)] != 0 || reg_equiv_constant[REGNO (tmp)] != 0)) @@ -6591,12 +6591,12 @@ emit_input_reload_insns (struct insn_chain *chain, struct reload *rl, { rtx real_oldequiv = oldequiv; - if ((GET_CODE (oldequiv) == REG + if ((REG_P (oldequiv) && REGNO (oldequiv) >= FIRST_PSEUDO_REGISTER && (reg_equiv_memory_loc[REGNO (oldequiv)] != 0 || reg_equiv_constant[REGNO (oldequiv)] != 0)) || (GET_CODE (oldequiv) == SUBREG - && GET_CODE (SUBREG_REG (oldequiv)) == REG + && REG_P (SUBREG_REG (oldequiv)) && (REGNO (SUBREG_REG (oldequiv)) >= FIRST_PSEUDO_REGISTER) && ((reg_equiv_memory_loc @@ -6671,7 +6671,7 @@ emit_output_reload_insns (struct insn_chain *chain, struct reload *rl, { rtx real_old = old; - if (GET_CODE (old) == REG && REGNO (old) >= FIRST_PSEUDO_REGISTER + if (REG_P (old) && REGNO (old) >= FIRST_PSEUDO_REGISTER && reg_equiv_mem[REGNO (old)] != 0) real_old = reg_equiv_mem[REGNO (old)]; @@ -6749,7 +6749,7 @@ emit_output_reload_insns (struct insn_chain *chain, struct reload *rl, /* Don't output the last reload if OLD is not the dest of INSN and is in the src and is clobbered by INSN. */ if (! flag_expensive_optimizations - || GET_CODE (old) != REG + || !REG_P (old) || !(set = single_set (insn)) || rtx_equal_p (old, SET_DEST (set)) || !reg_mentioned_p (old, SET_SRC (set)) @@ -6871,7 +6871,7 @@ do_input_reload (struct insn_chain *chain, struct reload *rl, int j) if (optimize && (reload_inherited[j] || reload_override_in[j]) && rl->reg_rtx - && GET_CODE (rl->reg_rtx) == REG + && REG_P (rl->reg_rtx) && spill_reg_store[REGNO (rl->reg_rtx)] != 0 #if 0 /* There doesn't seem to be any reason to restrict this to pseudos @@ -6906,7 +6906,7 @@ do_output_reload (struct insn_chain *chain, struct reload *rl, int j) if (pseudo && optimize - && GET_CODE (pseudo) == REG + && REG_P (pseudo) && ! rtx_equal_p (rl->in_reg, pseudo) && REGNO (pseudo) >= FIRST_PSEUDO_REGISTER && reg_last_reload_reg[REGNO (pseudo)]) @@ -6933,7 +6933,7 @@ do_output_reload (struct insn_chain *chain, struct reload *rl, int j) /* An output operand that dies right away does need a reload, but need not be copied from it. Show the new location in the REG_UNUSED note. */ - if ((GET_CODE (old) == REG || GET_CODE (old) == SCRATCH) + if ((REG_P (old) || GET_CODE (old) == SCRATCH) && (note = find_reg_note (insn, REG_UNUSED, old)) != 0) { XEXP (note, 0) = rl->reg_rtx; @@ -6941,7 +6941,7 @@ do_output_reload (struct insn_chain *chain, struct reload *rl, int j) } /* Likewise for a SUBREG of an operand that dies. */ else if (GET_CODE (old) == SUBREG - && GET_CODE (SUBREG_REG (old)) == REG + && REG_P (SUBREG_REG (old)) && 0 != (note = find_reg_note (insn, REG_UNUSED, SUBREG_REG (old)))) { @@ -7095,7 +7095,7 @@ emit_reload_insns (struct insn_chain *chain) if (GET_CODE (reg) == SUBREG) reg = SUBREG_REG (reg); - if (GET_CODE (reg) == REG + if (REG_P (reg) && REGNO (reg) >= FIRST_PSEUDO_REGISTER && ! reg_has_output_reload[REGNO (reg)]) { @@ -7148,13 +7148,13 @@ emit_reload_insns (struct insn_chain *chain) /* Maybe the spill reg contains a copy of reload_out. */ if (rld[r].out != 0 - && (GET_CODE (rld[r].out) == REG + && (REG_P (rld[r].out) #ifdef AUTO_INC_DEC || ! rld[r].out_reg #endif - || GET_CODE (rld[r].out_reg) == REG)) + || REG_P (rld[r].out_reg))) { - rtx out = (GET_CODE (rld[r].out) == REG + rtx out = (REG_P (rld[r].out) ? rld[r].out : rld[r].out_reg ? rld[r].out_reg @@ -7206,10 +7206,10 @@ emit_reload_insns (struct insn_chain *chain) the register being reloaded. */ else if (rld[r].out_reg == 0 && rld[r].in != 0 - && ((GET_CODE (rld[r].in) == REG + && ((REG_P (rld[r].in) && REGNO (rld[r].in) >= FIRST_PSEUDO_REGISTER && ! reg_has_output_reload[REGNO (rld[r].in)]) - || (GET_CODE (rld[r].in_reg) == REG + || (REG_P (rld[r].in_reg) && ! reg_has_output_reload[REGNO (rld[r].in_reg)])) && ! reg_set_p (rld[r].reg_rtx, PATTERN (insn))) { @@ -7218,10 +7218,10 @@ emit_reload_insns (struct insn_chain *chain) rtx in; bool piecemeal; - if (GET_CODE (rld[r].in) == REG + if (REG_P (rld[r].in) && REGNO (rld[r].in) >= FIRST_PSEUDO_REGISTER) in = rld[r].in; - else if (GET_CODE (rld[r].in_reg) == REG) + else if (REG_P (rld[r].in_reg)) in = rld[r].in_reg; else in = XEXP (rld[r].in_reg, 0); @@ -7288,11 +7288,11 @@ emit_reload_insns (struct insn_chain *chain) But forget_old_reloads_1 won't get to see it, because it thinks only about the original insn. So invalidate it here. */ if (i < 0 && rld[r].out != 0 - && (GET_CODE (rld[r].out) == REG + && (REG_P (rld[r].out) || (GET_CODE (rld[r].out) == MEM - && GET_CODE (rld[r].out_reg) == REG))) + && REG_P (rld[r].out_reg)))) { - rtx out = (GET_CODE (rld[r].out) == REG + rtx out = (REG_P (rld[r].out) ? rld[r].out : rld[r].out_reg); int nregno = REGNO (out); if (nregno >= FIRST_PSEUDO_REGISTER) @@ -7329,7 +7329,7 @@ emit_reload_insns (struct insn_chain *chain) } else store_insn = new_spill_reg_store[REGNO (src_reg)]; - if (src_reg && GET_CODE (src_reg) == REG + if (src_reg && REG_P (src_reg) && REGNO (src_reg) < FIRST_PSEUDO_REGISTER) { int src_regno = REGNO (src_reg); @@ -7430,10 +7430,10 @@ gen_reload (rtx out, rtx in, int opnum, enum reload_type type) ??? At some point, this whole thing needs to be rethought. */ if (GET_CODE (in) == PLUS - && (GET_CODE (XEXP (in, 0)) == REG + && (REG_P (XEXP (in, 0)) || GET_CODE (XEXP (in, 0)) == SUBREG || GET_CODE (XEXP (in, 0)) == MEM) - && (GET_CODE (XEXP (in, 1)) == REG + && (REG_P (XEXP (in, 1)) || GET_CODE (XEXP (in, 1)) == SUBREG || CONSTANT_P (XEXP (in, 1)) || GET_CODE (XEXP (in, 1)) == MEM)) @@ -7464,7 +7464,7 @@ gen_reload (rtx out, rtx in, int opnum, enum reload_type type) the case. If the insn would be A = B + A, rearrange it so it will be A = A + B as constrain_operands expects. */ - if (GET_CODE (XEXP (in, 1)) == REG + if (REG_P (XEXP (in, 1)) && REGNO (out) == REGNO (XEXP (in, 1))) tem = op0, op0 = op1, op1 = tem; @@ -7504,7 +7504,7 @@ gen_reload (rtx out, rtx in, int opnum, enum reload_type type) code = (int) add_optab->handlers[(int) GET_MODE (out)].insn_code; if (CONSTANT_P (op1) || GET_CODE (op1) == MEM || GET_CODE (op1) == SUBREG - || (GET_CODE (op1) == REG + || (REG_P (op1) && REGNO (op1) >= FIRST_PSEUDO_REGISTER) || (code != CODE_FOR_nothing && ! ((*insn_data[code].operand[2].predicate) @@ -7551,9 +7551,9 @@ gen_reload (rtx out, rtx in, int opnum, enum reload_type type) #ifdef SECONDARY_MEMORY_NEEDED /* If we need a memory location to do the move, do it that way. */ - else if ((GET_CODE (in) == REG || GET_CODE (in) == SUBREG) + else if ((REG_P (in) || GET_CODE (in) == SUBREG) && reg_or_subregno (in) < FIRST_PSEUDO_REGISTER - && (GET_CODE (out) == REG || GET_CODE (out) == SUBREG) + && (REG_P (out) || GET_CODE (out) == SUBREG) && reg_or_subregno (out) < FIRST_PSEUDO_REGISTER && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (reg_or_subregno (in)), REGNO_REG_CLASS (reg_or_subregno (out)), @@ -7855,7 +7855,7 @@ delete_address_reloads_1 (rtx dead_insn, rtx x, rtx current_insn) if (! set) return; dst = SET_DEST (set); - if (GET_CODE (dst) != REG + if (!REG_P (dst) || ! rtx_equal_p (dst, x)) return; if (! reg_set_p (dst, PATTERN (dead_insn))) @@ -7943,7 +7943,7 @@ inc_for_reload (rtx reloadreg, rtx in, rtx value, int inc_amount) inc/dec operation. If REG_LAST_RELOAD_REG were nonzero, we could inc/dec that register as well (maybe even using it for the source), but I'm not sure it's worth worrying about. */ - if (GET_CODE (incloc) == REG) + if (REG_P (incloc)) reg_last_reload_reg[REGNO (incloc)] = 0; if (GET_CODE (value) == PRE_DEC || GET_CODE (value) == POST_DEC) diff --git a/gcc/reorg.c b/gcc/reorg.c index ff32162..9b3c9fd 100644 --- a/gcc/reorg.c +++ b/gcc/reorg.c @@ -1924,7 +1924,7 @@ update_reg_dead_notes (rtx insn, rtx delayed_insn) next = XEXP (link, 1); if (REG_NOTE_KIND (link) != REG_DEAD - || GET_CODE (XEXP (link, 0)) != REG) + || !REG_P (XEXP (link, 0))) continue; if (reg_referenced_p (XEXP (link, 0), PATTERN (insn))) @@ -1957,7 +1957,7 @@ fix_reg_dead_note (rtx start_insn, rtx stop_insn) next = XEXP (link, 1); if (REG_NOTE_KIND (link) != REG_DEAD - || GET_CODE (XEXP (link, 0)) != REG) + || !REG_P (XEXP (link, 0))) continue; if (reg_set_p (XEXP (link, 0), PATTERN (start_insn))) @@ -1985,7 +1985,7 @@ update_reg_unused_notes (rtx insn, rtx redundant_insn) next = XEXP (link, 1); if (REG_NOTE_KIND (link) != REG_UNUSED - || GET_CODE (XEXP (link, 0)) != REG) + || !REG_P (XEXP (link, 0))) continue; if (! find_regno_note (redundant_insn, REG_UNUSED, @@ -2764,8 +2764,8 @@ fill_slots_from_thread (rtx insn, rtx condition, rtx thread, destination. Overlap may happen for larger-than-register-size modes. */ if (GET_CODE (trial) == INSN && GET_CODE (pat) == SET - && GET_CODE (SET_SRC (pat)) == REG - && GET_CODE (SET_DEST (pat)) == REG + && REG_P (SET_SRC (pat)) + && REG_P (SET_DEST (pat)) && !reg_overlap_mentioned_p (SET_DEST (pat), SET_SRC (pat))) { rtx next = next_nonnote_insn (trial); diff --git a/gcc/resource.c b/gcc/resource.c index 13a7736..714e1ff 100644 --- a/gcc/resource.c +++ b/gcc/resource.c @@ -95,8 +95,8 @@ update_live_status (rtx dest, rtx x, void *data ATTRIBUTE_UNUSED) int first_regno, last_regno; int i; - if (GET_CODE (dest) != REG - && (GET_CODE (dest) != SUBREG || GET_CODE (SUBREG_REG (dest)) != REG)) + if (!REG_P (dest) + && (GET_CODE (dest) != SUBREG || !REG_P (SUBREG_REG (dest)))) return; if (GET_CODE (dest) == SUBREG) @@ -227,7 +227,7 @@ mark_referenced_resources (rtx x, struct resources *res, return; case SUBREG: - if (GET_CODE (SUBREG_REG (x)) != REG) + if (!REG_P (SUBREG_REG (x))) mark_referenced_resources (SUBREG_REG (x), res, 0); else { @@ -765,7 +765,7 @@ mark_set_resources (rtx x, struct resources *res, int in_dest, case SUBREG: if (in_dest) { - if (GET_CODE (SUBREG_REG (x)) != REG) + if (!REG_P (SUBREG_REG (x))) mark_set_resources (SUBREG_REG (x), res, in_dest, mark_type); else { @@ -1038,7 +1038,7 @@ mark_target_live_regs (rtx insns, rtx target, struct resources *res) { for (link = REG_NOTES (real_insn); link; link = XEXP (link, 1)) if (REG_NOTE_KIND (link) == REG_DEAD - && GET_CODE (XEXP (link, 0)) == REG + && REG_P (XEXP (link, 0)) && REGNO (XEXP (link, 0)) < FIRST_PSEUDO_REGISTER) { unsigned int first_regno = REGNO (XEXP (link, 0)); @@ -1057,7 +1057,7 @@ mark_target_live_regs (rtx insns, rtx target, struct resources *res) These notes will always be accurate. */ for (link = REG_NOTES (real_insn); link; link = XEXP (link, 1)) if (REG_NOTE_KIND (link) == REG_UNUSED - && GET_CODE (XEXP (link, 0)) == REG + && REG_P (XEXP (link, 0)) && REGNO (XEXP (link, 0)) < FIRST_PSEUDO_REGISTER) { unsigned int first_regno = REGNO (XEXP (link, 0)); diff --git a/gcc/rtlanal.c b/gcc/rtlanal.c index 8da8b80..959b37b 100644 --- a/gcc/rtlanal.c +++ b/gcc/rtlanal.c @@ -487,7 +487,7 @@ get_jump_table_offset (rtx insn, rtx *earliest) x = XEXP (x, 1); /* Search backwards and locate the expression stored in X. */ - for (old_x = NULL_RTX; GET_CODE (x) == REG && x != old_x; + for (old_x = NULL_RTX; REG_P (x) && x != old_x; old_x = x, x = find_last_value (x, &insn, NULL_RTX, 0)) ; @@ -505,7 +505,7 @@ get_jump_table_offset (rtx insn, rtx *earliest) if (y == pc_rtx || y == pic_offset_table_rtx) break; - for (old_y = NULL_RTX; GET_CODE (y) == REG && y != old_y; + for (old_y = NULL_RTX; REG_P (y) && y != old_y; old_y = y, y = find_last_value (y, &old_insn, NULL_RTX, 0)) ; @@ -518,7 +518,7 @@ get_jump_table_offset (rtx insn, rtx *earliest) x = XEXP (x, 1 - i); - for (old_x = NULL_RTX; GET_CODE (x) == REG && x != old_x; + for (old_x = NULL_RTX; REG_P (x) && x != old_x; old_x = x, x = find_last_value (x, &insn, NULL_RTX, 0)) ; } @@ -528,7 +528,7 @@ get_jump_table_offset (rtx insn, rtx *earliest) { x = XEXP (x, 0); - for (old_x = NULL_RTX; GET_CODE (x) == REG && x != old_x; + for (old_x = NULL_RTX; REG_P (x) && x != old_x; old_x = x, x = find_last_value (x, &insn, NULL_RTX, 0)) ; } @@ -540,7 +540,7 @@ get_jump_table_offset (rtx insn, rtx *earliest) /* Strip off the MEM. */ x = XEXP (x, 0); - for (old_x = NULL_RTX; GET_CODE (x) == REG && x != old_x; + for (old_x = NULL_RTX; REG_P (x) && x != old_x; old_x = x, x = find_last_value (x, &insn, NULL_RTX, 0)) ; @@ -557,7 +557,7 @@ get_jump_table_offset (rtx insn, rtx *earliest) old_insn = insn; y = XEXP (x, i); - for (old_y = NULL_RTX; GET_CODE (y) == REG && y != old_y; + for (old_y = NULL_RTX; REG_P (y) && y != old_y; old_y = y, y = find_last_value (y, &old_insn, NULL_RTX, 0)) ; @@ -602,7 +602,7 @@ global_reg_mentioned_p_1 (rtx *loc, void *data ATTRIBUTE_UNUSED) switch (GET_CODE (x)) { case SUBREG: - if (GET_CODE (SUBREG_REG (x)) == REG) + if (REG_P (SUBREG_REG (x))) { if (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER && global_regs[subreg_regno (x)]) @@ -747,7 +747,7 @@ reg_mentioned_p (rtx reg, rtx in) { /* Compare registers by number. */ case REG: - return GET_CODE (reg) == REG && REGNO (in) == REGNO (reg); + return REG_P (reg) && REGNO (in) == REGNO (reg); /* These codes have no constituent expressions and are unique. */ @@ -856,9 +856,9 @@ reg_referenced_p (rtx x, rtx body) it is mentioned in the destination. */ if (GET_CODE (SET_DEST (body)) != CC0 && GET_CODE (SET_DEST (body)) != PC - && GET_CODE (SET_DEST (body)) != REG + && !REG_P (SET_DEST (body)) && ! (GET_CODE (SET_DEST (body)) == SUBREG - && GET_CODE (SUBREG_REG (SET_DEST (body))) == REG + && REG_P (SUBREG_REG (SET_DEST (body))) && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (SET_DEST (body)))) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD) == ((GET_MODE_SIZE (GET_MODE (SET_DEST (body))) @@ -966,7 +966,7 @@ reg_set_p (rtx reg, rtx insn) ??? Unless we could ensure that the CALL_INSN_FUNCTION_USAGE information holds all clobbered registers. */ - && ((GET_CODE (reg) == REG + && ((REG_P (reg) && REGNO (reg) < FIRST_PSEUDO_REGISTER) || GET_CODE (reg) == MEM || find_reg_fusage (insn, CLOBBER, reg))))) @@ -1319,7 +1319,7 @@ set_noop_p (rtx set) dst = SUBREG_REG (dst); } - return (GET_CODE (src) == REG && GET_CODE (dst) == REG + return (REG_P (src) && REG_P (dst) && REGNO (src) == REGNO (dst)); } @@ -1399,7 +1399,7 @@ find_last_value (rtx x, rtx *pinsn, rtx valid_to, int allow_hwreg) || ! modified_between_p (src, PREV_INSN (p), valid_to)) /* Reject hard registers because we don't usually want to use them; we'd rather use a pseudo. */ - && (! (GET_CODE (src) == REG + && (! (REG_P (src) && REGNO (src) < FIRST_PSEUDO_REGISTER) || allow_hwreg)) { *pinsn = p; @@ -1463,7 +1463,7 @@ refers_to_regno_p (unsigned int regno, unsigned int endregno, rtx x, case SUBREG: /* If this is a SUBREG of a hard reg, we can see exactly which registers are being modified. Otherwise, handle normally. */ - if (GET_CODE (SUBREG_REG (x)) == REG + if (REG_P (SUBREG_REG (x)) && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER) { unsigned int inner_regno = subreg_regno (x); @@ -1483,11 +1483,11 @@ refers_to_regno_p (unsigned int regno, unsigned int endregno, rtx x, treat each word individually. */ && ((GET_CODE (SET_DEST (x)) == SUBREG && loc != &SUBREG_REG (SET_DEST (x)) - && GET_CODE (SUBREG_REG (SET_DEST (x))) == REG + && REG_P (SUBREG_REG (SET_DEST (x))) && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER && refers_to_regno_p (regno, endregno, SUBREG_REG (SET_DEST (x)), loc)) - || (GET_CODE (SET_DEST (x)) != REG + || (!REG_P (SET_DEST (x)) && refers_to_regno_p (regno, endregno, SET_DEST (x), loc)))) return 1; @@ -1633,7 +1633,7 @@ note_stores (rtx x, void (*fun) (rtx, rtx, void *), void *data) rtx dest = SET_DEST (x); while ((GET_CODE (dest) == SUBREG - && (GET_CODE (SUBREG_REG (dest)) != REG + && (!REG_P (SUBREG_REG (dest)) || REGNO (SUBREG_REG (dest)) >= FIRST_PSEUDO_REGISTER)) || GET_CODE (dest) == ZERO_EXTRACT || GET_CODE (dest) == SIGN_EXTRACT @@ -1768,7 +1768,7 @@ dead_or_set_p (rtx insn, rtx x) if (GET_CODE (x) == CC0) return 1; - if (GET_CODE (x) != REG) + if (!REG_P (x)) abort (); regno = REGNO (x); @@ -1818,7 +1818,7 @@ dead_or_set_regno_p (rtx insn, unsigned int test_regno) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))) dest = SUBREG_REG (dest); - if (GET_CODE (dest) != REG) + if (!REG_P (dest)) return 0; regno = REGNO (dest); @@ -1849,7 +1849,7 @@ dead_or_set_regno_p (rtx insn, unsigned int test_regno) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))) dest = SUBREG_REG (dest); - if (GET_CODE (dest) != REG) + if (!REG_P (dest)) continue; regno = REGNO (dest); @@ -1908,7 +1908,7 @@ find_regno_note (rtx insn, enum reg_note kind, unsigned int regno) if (REG_NOTE_KIND (link) == kind /* Verify that it is a register, so that scratch and MEM won't cause a problem here. */ - && GET_CODE (XEXP (link, 0)) == REG + && REG_P (XEXP (link, 0)) && REGNO (XEXP (link, 0)) <= regno && ((REGNO (XEXP (link, 0)) + (REGNO (XEXP (link, 0)) >= FIRST_PSEUDO_REGISTER ? 1 @@ -1954,7 +1954,7 @@ find_reg_fusage (rtx insn, enum rtx_code code, rtx datum) if (! datum) abort (); - if (GET_CODE (datum) != REG) + if (!REG_P (datum)) { rtx link; @@ -2008,7 +2008,7 @@ find_regno_fusage (rtx insn, enum rtx_code code, unsigned int regno) rtx op, reg; if (GET_CODE (op = XEXP (link, 0)) == code - && GET_CODE (reg = XEXP (op, 0)) == REG + && REG_P (reg = XEXP (op, 0)) && (regnote = REGNO (reg)) <= regno && regnote + hard_regno_nregs[regnote][GET_MODE (reg)] > regno) return 1; @@ -2632,7 +2632,7 @@ replace_regs (rtx x, rtx *reg_map, unsigned int nregs, int replace_dest) case SUBREG: /* Prevent making nested SUBREGs. */ - if (GET_CODE (SUBREG_REG (x)) == REG && REGNO (SUBREG_REG (x)) < nregs + if (REG_P (SUBREG_REG (x)) && REGNO (SUBREG_REG (x)) < nregs && reg_map[REGNO (SUBREG_REG (x))] != 0 && GET_CODE (reg_map[REGNO (SUBREG_REG (x))]) == SUBREG) { @@ -2974,7 +2974,7 @@ regno_use_in (unsigned int regno, rtx x) int i, j; rtx tem; - if (GET_CODE (x) == REG && REGNO (x) == regno) + if (REG_P (x) && REGNO (x) == regno) return x; fmt = GET_RTX_FORMAT (GET_CODE (x)); @@ -3401,7 +3401,7 @@ find_first_parameter_load (rtx call_insn, rtx boundary) parm.nregs = 0; for (p = CALL_INSN_FUNCTION_USAGE (call_insn); p; p = XEXP (p, 1)) if (GET_CODE (XEXP (p, 0)) == USE - && GET_CODE (XEXP (XEXP (p, 0), 0)) == REG) + && REG_P (XEXP (XEXP (p, 0), 0))) { if (REGNO (XEXP (XEXP (p, 0), 0)) >= FIRST_PSEUDO_REGISTER) abort (); @@ -3453,14 +3453,14 @@ keep_with_call_p (rtx insn) if (INSN_P (insn) && (set = single_set (insn)) != NULL) { - if (GET_CODE (SET_DEST (set)) == REG + if (REG_P (SET_DEST (set)) && REGNO (SET_DEST (set)) < FIRST_PSEUDO_REGISTER && fixed_regs[REGNO (SET_DEST (set))] && general_operand (SET_SRC (set), VOIDmode)) return true; - if (GET_CODE (SET_SRC (set)) == REG + if (REG_P (SET_SRC (set)) && FUNCTION_VALUE_REGNO_P (REGNO (SET_SRC (set))) - && GET_CODE (SET_DEST (set)) == REG + && REG_P (SET_DEST (set)) && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER) return true; /* There may be a stack pop just after the call and before the store @@ -4224,7 +4224,7 @@ nonzero_bits1 (rtx x, enum machine_mode mode, rtx known_x, zero. */ if (POINTERS_EXTEND_UNSIGNED > 0 && GET_MODE (x) == Pmode && (code == PLUS || code == MINUS) - && GET_CODE (XEXP (x, 0)) == REG && REG_POINTER (XEXP (x, 0))) + && REG_P (XEXP (x, 0)) && REG_POINTER (XEXP (x, 0))) nonzero &= GET_MODE_MASK (ptr_mode); #endif } @@ -4674,7 +4674,7 @@ num_sign_bit_copies1 (rtx x, enum machine_mode mode, rtx known_x, sign bit copies. */ if (! POINTERS_EXTEND_UNSIGNED && GET_MODE (x) == Pmode && (code == PLUS || code == MINUS) - && GET_CODE (XEXP (x, 0)) == REG && REG_POINTER (XEXP (x, 0))) + && REG_P (XEXP (x, 0)) && REG_POINTER (XEXP (x, 0))) result = MAX ((int) (GET_MODE_BITSIZE (Pmode) - GET_MODE_BITSIZE (ptr_mode) + 1), result); diff --git a/gcc/rtlhooks.c b/gcc/rtlhooks.c index b27cece..a32d1c0 100644 --- a/gcc/rtlhooks.c +++ b/gcc/rtlhooks.c @@ -43,7 +43,7 @@ gen_lowpart_general (enum machine_mode mode, rtx x) if (result) return result; - else if (GET_CODE (x) == REG) + else if (REG_P (x)) { /* Must be a hard reg that's not valid in MODE. */ result = gen_lowpart_common (mode, copy_to_reg (x)); diff --git a/gcc/sched-deps.c b/gcc/sched-deps.c index c1c4ece..9c480d9 100644 --- a/gcc/sched-deps.c +++ b/gcc/sched-deps.c @@ -484,7 +484,7 @@ sched_analyze_1 (struct deps *deps, rtx x, rtx insn) dest = XEXP (dest, 0); } - if (GET_CODE (dest) == REG) + if (REG_P (dest)) { regno = REGNO (dest); @@ -1123,7 +1123,7 @@ sched_analyze_insn (struct deps *deps, rtx x, rtx insn, rtx loop_notes) tmp = SET_DEST (set); if (GET_CODE (tmp) == SUBREG) tmp = SUBREG_REG (tmp); - if (GET_CODE (tmp) == REG) + if (REG_P (tmp)) dest_regno = REGNO (tmp); else goto end_call_group; @@ -1133,11 +1133,11 @@ sched_analyze_insn (struct deps *deps, rtx x, rtx insn, rtx loop_notes) tmp = SUBREG_REG (tmp); if ((GET_CODE (tmp) == PLUS || GET_CODE (tmp) == MINUS) - && GET_CODE (XEXP (tmp, 0)) == REG + && REG_P (XEXP (tmp, 0)) && REGNO (XEXP (tmp, 0)) == STACK_POINTER_REGNUM && dest_regno == STACK_POINTER_REGNUM) src_regno = STACK_POINTER_REGNUM; - else if (GET_CODE (tmp) == REG) + else if (REG_P (tmp)) src_regno = REGNO (tmp); else goto end_call_group; @@ -1326,8 +1326,8 @@ sched_analyze (struct deps *deps, rtx head, rtx tail) /* The sequence must start with a clobber of a register. */ && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == CLOBBER - && (r0 = XEXP (PATTERN (insn), 0), GET_CODE (r0) == REG) - && GET_CODE (XEXP (PATTERN (insn), 0)) == REG + && (r0 = XEXP (PATTERN (insn), 0), REG_P (r0)) + && REG_P (XEXP (PATTERN (insn), 0)) /* The CLOBBER must also have a REG_LIBCALL note attached. */ && (link = find_reg_note (insn, REG_LIBCALL, NULL_RTX)) != 0 && (end_seq = XEXP (link, 0)) != 0 diff --git a/gcc/sched-rgn.c b/gcc/sched-rgn.c index e02686d..1417577 100644 --- a/gcc/sched-rgn.c +++ b/gcc/sched-rgn.c @@ -1305,7 +1305,7 @@ check_live_1 (int src, rtx x) return 0; } - if (GET_CODE (reg) != REG) + if (!REG_P (reg)) return 1; regno = REGNO (reg); @@ -1382,7 +1382,7 @@ update_live_1 (int src, rtx x) return; } - if (GET_CODE (reg) != REG) + if (!REG_P (reg)) return; /* Global registers are always live, so the code below does not apply diff --git a/gcc/sdbout.c b/gcc/sdbout.c index b93ab77..b6049c2 100644 --- a/gcc/sdbout.c +++ b/gcc/sdbout.c @@ -790,7 +790,7 @@ sdbout_symbol (tree decl, int local) If DECL was from an inline function, then its rtl is not identically the rtl that was used in this particular compilation. */ - if (GET_CODE (value) == REG) + if (REG_P (value)) { regno = REGNO (value); if (regno >= FIRST_PSEUDO_REGISTER) @@ -800,7 +800,7 @@ sdbout_symbol (tree decl, int local) { while (GET_CODE (value) == SUBREG) value = SUBREG_REG (value); - if (GET_CODE (value) == REG) + if (REG_P (value)) { if (REGNO (value) >= FIRST_PSEUDO_REGISTER) return; @@ -868,7 +868,7 @@ sdbout_symbol (tree decl, int local) } else if (GET_CODE (value) == MEM && (GET_CODE (XEXP (value, 0)) == MEM - || (GET_CODE (XEXP (value, 0)) == REG + || (REG_P (XEXP (value, 0)) && REGNO (XEXP (value, 0)) != HARD_FRAME_POINTER_REGNUM && REGNO (XEXP (value, 0)) != STACK_POINTER_REGNUM))) /* If the value is indirect by memory or by a register @@ -878,7 +878,7 @@ sdbout_symbol (tree decl, int local) so all we can do is output the variable as a pointer. */ { PUT_SDB_DEF (name); - if (GET_CODE (XEXP (value, 0)) == REG) + if (REG_P (XEXP (value, 0))) { PUT_SDB_INT_VAL (DBX_REGISTER_NUMBER (REGNO (XEXP (value, 0)))); PUT_SDB_SCL (C_REG); @@ -903,12 +903,12 @@ sdbout_symbol (tree decl, int local) } else if (GET_CODE (value) == MEM && ((GET_CODE (XEXP (value, 0)) == PLUS - && GET_CODE (XEXP (XEXP (value, 0), 0)) == REG + && REG_P (XEXP (XEXP (value, 0), 0)) && GET_CODE (XEXP (XEXP (value, 0), 1)) == CONST_INT) /* This is for variables which are at offset zero from the frame pointer. This happens on the Alpha. Non-frame pointer registers are excluded above. */ - || (GET_CODE (XEXP (value, 0)) == REG))) + || (REG_P (XEXP (value, 0))))) { /* DECL_RTL looks like (MEM (PLUS (REG...) (CONST_INT...))) or (MEM (REG...)). We want the value of that CONST_INT @@ -1291,7 +1291,7 @@ sdbout_parms (tree parms) else current_sym_value = 0; - if (GET_CODE (DECL_RTL (parms)) == REG + if (REG_P (DECL_RTL (parms)) && REGNO (DECL_RTL (parms)) < FIRST_PSEUDO_REGISTER) type = DECL_ARG_TYPE (parms); else @@ -1330,7 +1330,7 @@ sdbout_parms (tree parms) PUT_SDB_TYPE (plain_type (type)); PUT_SDB_ENDEF; } - else if (GET_CODE (DECL_RTL (parms)) == REG) + else if (REG_P (DECL_RTL (parms))) { rtx best_rtl; /* Parm passed in registers and lives in registers or nowhere. */ @@ -1361,7 +1361,7 @@ sdbout_parms (tree parms) in which case we want the value of that CONST_INT, or (MEM (REG ...)) or (MEM (MEM ...)), in which case we use a value of zero. */ - if (GET_CODE (XEXP (DECL_RTL (parms), 0)) == REG + if (REG_P (XEXP (DECL_RTL (parms), 0)) || GET_CODE (XEXP (DECL_RTL (parms), 0)) == MEM) current_sym_value = 0; else @@ -1399,7 +1399,7 @@ sdbout_reg_parms (tree parms) /* Report parms that live in registers during the function but were passed in memory. */ - if (GET_CODE (DECL_RTL (parms)) == REG + if (REG_P (DECL_RTL (parms)) && REGNO (DECL_RTL (parms)) < FIRST_PSEUDO_REGISTER && PARM_PASSED_IN_MEMORY (parms)) { diff --git a/gcc/simplify-rtx.c b/gcc/simplify-rtx.c index 0d3b2bd..0b716a4 100644 --- a/gcc/simplify-rtx.c +++ b/gcc/simplify-rtx.c @@ -1065,7 +1065,7 @@ simplify_unary_operation (enum rtx_code code, enum machine_mode mode, && mode == Pmode && GET_MODE (op) == ptr_mode && (CONSTANT_P (op) || (GET_CODE (op) == SUBREG - && GET_CODE (SUBREG_REG (op)) == REG + && REG_P (SUBREG_REG (op)) && REG_POINTER (SUBREG_REG (op)) && GET_MODE (SUBREG_REG (op)) == Pmode))) return convert_memory_address (Pmode, op); @@ -1087,7 +1087,7 @@ simplify_unary_operation (enum rtx_code code, enum machine_mode mode, && mode == Pmode && GET_MODE (op) == ptr_mode && (CONSTANT_P (op) || (GET_CODE (op) == SUBREG - && GET_CODE (SUBREG_REG (op)) == REG + && REG_P (SUBREG_REG (op)) && REG_POINTER (SUBREG_REG (op)) && GET_MODE (SUBREG_REG (op)) == Pmode))) return convert_memory_address (Pmode, op); @@ -1619,7 +1619,7 @@ simplify_binary_operation (enum rtx_code code, enum machine_mode mode, #ifdef HAVE_cc0 if (GET_CODE (xop00) == CC0 && GET_CODE (xop10) == CC0) #else - if (GET_CODE (xop00) == REG && GET_CODE (xop10) == REG + if (REG_P (xop00) && REG_P (xop10) && GET_MODE (xop00) == GET_MODE (xop10) && REGNO (xop00) == REGNO (xop10) && GET_MODE_CLASS (GET_MODE (xop00)) == MODE_CC @@ -2807,8 +2807,8 @@ simplify_const_relational_operation (enum rtx_code code, signed comparisons for languages such as Java, so test flag_wrapv. */ if (!flag_wrapv && INTEGRAL_MODE_P (mode) && trueop1 != const0_rtx - && ! ((GET_CODE (op0) == REG || GET_CODE (trueop0) == CONST_INT) - && (GET_CODE (op1) == REG || GET_CODE (trueop1) == CONST_INT)) + && ! ((REG_P (op0) || GET_CODE (trueop0) == CONST_INT) + && (REG_P (op1) || GET_CODE (trueop1) == CONST_INT)) && 0 != (tem = simplify_binary_operation (MINUS, mode, op0, op1)) /* We cannot do this for == or != if tem is a nonzero address. */ && ((code != EQ && code != NE) || ! nonzero_address_p (tem)) @@ -1467,7 +1467,7 @@ expand_asm_operands (tree string, tree outputs, tree inputs, && (allows_mem || is_inout || (DECL_P (val) - && GET_CODE (DECL_RTL (val)) == REG + && REG_P (DECL_RTL (val)) && GET_MODE (DECL_RTL (val)) != TYPE_MODE (type)))) lang_hooks.mark_addressable (val); @@ -1529,8 +1529,8 @@ expand_asm_operands (tree string, tree outputs, tree inputs, if ((TREE_CODE (val) == INDIRECT_REF && allows_mem) || (DECL_P (val) - && (allows_mem || GET_CODE (DECL_RTL (val)) == REG) - && ! (GET_CODE (DECL_RTL (val)) == REG + && (allows_mem || REG_P (DECL_RTL (val))) + && ! (REG_P (DECL_RTL (val)) && GET_MODE (DECL_RTL (val)) != TYPE_MODE (type))) || ! allows_reg || is_inout) @@ -1639,7 +1639,7 @@ expand_asm_operands (tree string, tree outputs, tree inputs, else op = force_reg (TYPE_MODE (type), op); } - if (GET_CODE (op) == REG + if (REG_P (op) || GET_CODE (op) == SUBREG || GET_CODE (op) == ADDRESSOF || GET_CODE (op) == CONCAT) @@ -2333,7 +2333,7 @@ expand_end_stmt_expr (tree t) last_expr_alt_rtl = NULL_RTX; last_expr_type = void_type_node; } - else if (GET_CODE (last_expr_value) != REG && ! CONSTANT_P (last_expr_value)) + else if (!REG_P (last_expr_value) && ! CONSTANT_P (last_expr_value)) /* Remove any possible QUEUED. */ last_expr_value = protect_from_queue (last_expr_value, 0); @@ -2679,7 +2679,7 @@ expand_return (tree retval) if (retval_rhs != 0 && TYPE_MODE (TREE_TYPE (retval_rhs)) == BLKmode - && GET_CODE (result_rtl) == REG) + && REG_P (result_rtl)) { int i; unsigned HOST_WIDE_INT bitpos, xbitpos; @@ -2791,7 +2791,7 @@ expand_return (tree retval) } else if (retval_rhs != 0 && !VOID_TYPE_P (TREE_TYPE (retval_rhs)) - && (GET_CODE (result_rtl) == REG + && (REG_P (result_rtl) || (GET_CODE (result_rtl) == PARALLEL))) { /* Calculate the return value into a temporary (usually a pseudo @@ -3320,7 +3320,7 @@ expand_decl (tree decl) if (DECL_RTL_SET_P (decl)) { if (GET_CODE (DECL_RTL (decl)) != MEM - || GET_CODE (XEXP (DECL_RTL (decl), 0)) != REG) + || !REG_P (XEXP (DECL_RTL (decl), 0))) abort (); oldaddr = XEXP (DECL_RTL (decl), 0); } @@ -3656,7 +3656,7 @@ expand_anon_union_decl (tree decl, tree cleanup, tree decl_elts) else SET_DECL_RTL (decl_elt, adjust_address_nv (x, mode, 0)); } - else if (GET_CODE (x) == REG) + else if (REG_P (x)) { if (mode == GET_MODE (x)) SET_DECL_RTL (decl_elt, x); diff --git a/gcc/unroll.c b/gcc/unroll.c index 455d906..596ea7f 100644 --- a/gcc/unroll.c +++ b/gcc/unroll.c @@ -1460,7 +1460,7 @@ precondition_loop_p (const struct loop *loop, rtx *initial_value, against max_reg_before_loop to make sure that the register is in the range covered by loop_invariant_p. If it isn't, then it is most likely a biv/giv which by definition are not invariant. */ - if ((GET_CODE (loop_info->final_value) == REG + if ((REG_P (loop_info->final_value) && REGNO (loop_info->final_value) >= max_reg_before_loop) || (GET_CODE (loop_info->final_value) == PLUS && REGNO (XEXP (loop_info->final_value, 0)) >= max_reg_before_loop) @@ -1651,7 +1651,7 @@ calculate_giv_inc (rtx pattern, rtx src_insn, unsigned int regno) /* Check that the source register is the same as the register we expected to see as the source. If not, something is seriously wrong. */ - if (GET_CODE (XEXP (SET_SRC (pattern), 0)) != REG + if (!REG_P (XEXP (SET_SRC (pattern), 0)) || REGNO (XEXP (SET_SRC (pattern), 0)) != regno) { /* Some machines (e.g. the romp), may emit two add instructions for @@ -1792,7 +1792,7 @@ copy_loop_body (struct loop *loop, rtx copy_start, rtx copy_end, SET_DEST to a new register. */ if ((set = single_set (insn)) - && GET_CODE (SET_DEST (set)) == REG + && REG_P (SET_DEST (set)) && addr_combined_regs[REGNO (SET_DEST (set))]) { struct iv_class *bl; @@ -1840,7 +1840,7 @@ copy_loop_body (struct loop *loop, rtx copy_start, rtx copy_end, /* tv->dest_reg will be either a bare register, or else a register plus a constant. */ - if (GET_CODE (tv->dest_reg) == REG) + if (REG_P (tv->dest_reg)) dest_reg = tv->dest_reg; else dest_reg = XEXP (tv->dest_reg, 0); @@ -1886,7 +1886,7 @@ copy_loop_body (struct loop *loop, rtx copy_start, rtx copy_end, dest_reg_was_split = 0; if ((set = single_set (insn)) - && GET_CODE (SET_DEST (set)) == REG + && REG_P (SET_DEST (set)) && splittable_regs[REGNO (SET_DEST (set))]) { unsigned int regno = REGNO (SET_DEST (set)); @@ -2517,7 +2517,7 @@ find_splittable_regs (const struct loop *loop, PLUS, we don't know how to split it. */ for (v = bl->biv; biv_splittable && v; v = v->next_iv) if ((tem = single_set (v->insn)) == 0 - || GET_CODE (SET_DEST (tem)) != REG + || !REG_P (SET_DEST (tem)) || REGNO (SET_DEST (tem)) != bl->regno || GET_CODE (SET_SRC (tem)) != PLUS) biv_splittable = 0; @@ -2539,7 +2539,7 @@ find_splittable_regs (const struct loop *loop, register, or it isn't invariant, then we must create a new pseudo reg to hold the initial value of the biv. */ - if (GET_CODE (bl->initial_value) == REG + if (REG_P (bl->initial_value) && (REGNO (bl->initial_value) == bl->regno || REGNO (bl->initial_value) < FIRST_PSEUDO_REGISTER || ! loop_invariant_p (loop, bl->initial_value))) @@ -2742,7 +2742,7 @@ find_splittable_givs (const struct loop *loop, struct iv_class *bl, if (splittable_regs[bl->regno]) biv_initial_value = splittable_regs[bl->regno]; - else if (GET_CODE (bl->initial_value) != REG + else if (!REG_P (bl->initial_value) || (REGNO (bl->initial_value) != bl->regno && REGNO (bl->initial_value) >= FIRST_PSEUDO_REGISTER)) biv_initial_value = bl->initial_value; @@ -2786,9 +2786,9 @@ find_splittable_givs (const struct loop *loop, struct iv_class *bl, is going before the loop start. */ if (unroll_type == UNROLL_COMPLETELY && GET_CODE (value) != CONST_INT - && GET_CODE (value) != REG + && !REG_P (value) && (GET_CODE (value) != PLUS - || GET_CODE (XEXP (value, 0)) != REG + || !REG_P (XEXP (value, 0)) || GET_CODE (XEXP (value, 1)) != CONST_INT)) { rtx tem = gen_reg_rtx (v->mode); @@ -2827,7 +2827,7 @@ find_splittable_givs (const struct loop *loop, struct iv_class *bl, a splittable register. Don't need to do anything for address givs where this may not be a register. */ - if (GET_CODE (v->new_reg) == REG) + if (REG_P (v->new_reg)) { int count = 1; if (! v->ignore) @@ -2844,7 +2844,7 @@ find_splittable_givs (const struct loop *loop, struct iv_class *bl, if (GET_CODE (v->dest_reg) == CONST_INT) regnum = -1; - else if (GET_CODE (v->dest_reg) != REG) + else if (!REG_P (v->dest_reg)) regnum = REGNO (XEXP (v->dest_reg, 0)); else regnum = REGNO (v->dest_reg); @@ -3211,8 +3211,8 @@ subtract_reg_term (rtx op, rtx reg) static rtx find_common_reg_term (rtx op0, rtx op1) { - if ((GET_CODE (op0) == REG || GET_CODE (op0) == PLUS) - && (GET_CODE (op1) == REG || GET_CODE (op1) == PLUS)) + if ((REG_P (op0) || GET_CODE (op0) == PLUS) + && (REG_P (op1) || GET_CODE (op1) == PLUS)) { rtx op00; rtx op01; @@ -3358,7 +3358,7 @@ loop_iterations (struct loop *loop) iteration_var = XEXP (comparison, 0); comparison_value = XEXP (comparison, 1); - if (GET_CODE (iteration_var) != REG) + if (!REG_P (iteration_var)) { if (loop_dump_stream) fprintf (loop_dump_stream, @@ -3420,7 +3420,7 @@ loop_iterations (struct loop *loop) /* Try swapping the comparison to identify a suitable iv. */ if (REG_IV_TYPE (ivs, REGNO (iteration_var)) != BASIC_INDUCT && REG_IV_TYPE (ivs, REGNO (iteration_var)) != GENERAL_INDUCT - && GET_CODE (comparison_value) == REG + && REG_P (comparison_value) && REGNO (comparison_value) < ivs->n_regs) { rtx temp = comparison_value; @@ -3568,7 +3568,7 @@ loop_iterations (struct loop *loop) its value from the insns before the start of the loop. */ final_value = comparison_value; - if (GET_CODE (comparison_value) == REG + if (REG_P (comparison_value) && loop_invariant_p (loop, comparison_value)) { final_value = loop_find_equiv_value (loop, comparison_value); @@ -3713,7 +3713,7 @@ loop_iterations (struct loop *loop) /* If we have a REG, check to see if REG holds a constant value. */ /* ??? Other RTL, such as (neg (reg)) is possible here, but it isn't clear if it is worthwhile to try to handle such RTL. */ - if (GET_CODE (increment) == REG || GET_CODE (increment) == SUBREG) + if (REG_P (increment) || GET_CODE (increment) == SUBREG) increment = loop_find_equiv_value (loop, increment); if (GET_CODE (increment) != CONST_INT) diff --git a/gcc/var-tracking.c b/gcc/var-tracking.c index 28c0c6f..c036baa 100644 --- a/gcc/var-tracking.c +++ b/gcc/var-tracking.c @@ -1099,8 +1099,8 @@ variable_union (void **slot, void *data) node2 = dst->var_part[j].loc_chain; node && node2; node = node->next, node2 = node2->next) { - if (!((GET_CODE (node2->loc) == REG - && GET_CODE (node->loc) == REG + if (!((REG_P (node2->loc) + && REG_P (node->loc) && REGNO (node2->loc) == REGNO (node->loc)) || rtx_equal_p (node2->loc, node->loc))) break; @@ -1136,8 +1136,8 @@ variable_union (void **slot, void *data) /* Find location from NODE. */ for (jj = 0; jj < dst_l; jj++) { - if ((GET_CODE (vui[jj].lc->loc) == REG - && GET_CODE (node->loc) == REG + if ((REG_P (vui[jj].lc->loc) + && REG_P (node->loc) && REGNO (vui[jj].lc->loc) == REGNO (node->loc)) || rtx_equal_p (vui[jj].lc->loc, node->loc)) { @@ -1246,7 +1246,7 @@ variable_part_different_p (variable_part *vp1, variable_part *vp2) { for (lc2 = vp2->loc_chain; lc2; lc2 = lc2->next) { - if (GET_CODE (lc1->loc) == REG && GET_CODE (lc2->loc) == REG) + if (REG_P (lc1->loc) && REG_P (lc2->loc)) { if (REGNO (lc1->loc) == REGNO (lc2->loc)) break; @@ -1282,8 +1282,8 @@ variable_different_p (variable var1, variable var2, return true; if (compare_current_location) { - if (!((GET_CODE (var1->var_part[i].cur_loc) == REG - && GET_CODE (var2->var_part[i].cur_loc) == REG + if (!((REG_P (var1->var_part[i].cur_loc) + && REG_P (var2->var_part[i].cur_loc) && (REGNO (var1->var_part[i].cur_loc) == REGNO (var2->var_part[i].cur_loc))) || rtx_equal_p (var1->var_part[i].cur_loc, @@ -1493,7 +1493,7 @@ count_uses (rtx *loc, void *insn) { basic_block bb = BLOCK_FOR_INSN ((rtx) insn); - if (GET_CODE (*loc) == REG) + if (REG_P (*loc)) { #ifdef ENABLE_CHECKING if (REGNO (*loc) >= FIRST_PSEUDO_REGISTER) @@ -1534,7 +1534,7 @@ count_stores (rtx loc, rtx expr ATTRIBUTE_UNUSED, void *insn) static int add_uses (rtx *loc, void *insn) { - if (GET_CODE (*loc) == REG) + if (REG_P (*loc)) { basic_block bb = BLOCK_FOR_INSN ((rtx) insn); micro_operation *mo = VTI (bb)->mos + VTI (bb)->n_mos++; @@ -1574,7 +1574,7 @@ add_uses_1 (rtx *x, void *insn) static void add_stores (rtx loc, rtx expr, void *insn) { - if (GET_CODE (loc) == REG) + if (REG_P (loc)) { basic_block bb = BLOCK_FOR_INSN ((rtx) insn); micro_operation *mo = VTI (bb)->mos + VTI (bb)->n_mos++; @@ -1629,7 +1629,7 @@ compute_bb_dataflow (basic_block bb) { rtx loc = VTI (bb)->mos[i].u.loc; - if (GET_CODE (loc) == REG) + if (REG_P (loc)) var_reg_delete_and_set (out, loc); else if (GET_CODE (loc) == MEM) var_mem_delete_and_set (out, loc); @@ -1641,7 +1641,7 @@ compute_bb_dataflow (basic_block bb) { rtx loc = VTI (bb)->mos[i].u.loc; - if (GET_CODE (loc) == REG) + if (REG_P (loc)) var_reg_delete (out, loc); else if (GET_CODE (loc) == MEM) var_mem_delete (out, loc); @@ -1999,7 +1999,7 @@ set_variable_part (dataflow_set *set, rtx loc, tree decl, HOST_WIDE_INT offset) node = var->var_part[pos].loc_chain; if (node - && ((GET_CODE (node->loc) == REG && GET_CODE (loc) == REG + && ((REG_P (node->loc) && REG_P (loc) && REGNO (node->loc) == REGNO (loc)) || rtx_equal_p (node->loc, loc))) { @@ -2046,7 +2046,7 @@ set_variable_part (dataflow_set *set, rtx loc, tree decl, HOST_WIDE_INT offset) for (node = var->var_part[pos].loc_chain; node; node = next) { next = node->next; - if ((GET_CODE (node->loc) == REG && GET_CODE (loc) == REG + if ((REG_P (node->loc) && REG_P (loc) && REGNO (node->loc) == REGNO (loc)) || rtx_equal_p (node->loc, loc)) { @@ -2115,7 +2115,7 @@ delete_variable_part (dataflow_set *set, rtx loc, tree decl, for (node = var->var_part[pos].loc_chain; node; node = node->next) { - if ((GET_CODE (node->loc) == REG && GET_CODE (loc) == REG + if ((REG_P (node->loc) && REG_P (loc) && REGNO (node->loc) == REGNO (loc)) || rtx_equal_p (node->loc, loc)) { @@ -2130,7 +2130,7 @@ delete_variable_part (dataflow_set *set, rtx loc, tree decl, for (node = *nextp; node; node = next) { next = node->next; - if ((GET_CODE (node->loc) == REG && GET_CODE (loc) == REG + if ((REG_P (node->loc) && REG_P (loc) && REGNO (node->loc) == REGNO (loc)) || rtx_equal_p (node->loc, loc)) { @@ -2146,8 +2146,8 @@ delete_variable_part (dataflow_set *set, rtx loc, tree decl, we have to emit new location so add the variable to set of changed variables. */ if (var->var_part[pos].cur_loc - && ((GET_CODE (loc) == REG - && GET_CODE (var->var_part[pos].cur_loc) == REG + && ((REG_P (loc) + && REG_P (var->var_part[pos].cur_loc) && REGNO (loc) == REGNO (var->var_part[pos].cur_loc)) || rtx_equal_p (loc, var->var_part[pos].cur_loc))) { @@ -2375,7 +2375,7 @@ emit_notes_in_bb (basic_block bb) { rtx loc = VTI (bb)->mos[i].u.loc; - if (GET_CODE (loc) == REG) + if (REG_P (loc)) var_reg_delete_and_set (&set, loc); else var_mem_delete_and_set (&set, loc); @@ -2392,7 +2392,7 @@ emit_notes_in_bb (basic_block bb) { rtx loc = VTI (bb)->mos[i].u.loc; - if (GET_CODE (loc) == REG) + if (REG_P (loc)) var_reg_delete (&set, loc); else var_mem_delete (&set, loc); @@ -2463,7 +2463,7 @@ vt_emit_notes (void) static bool vt_get_decl_and_offset (rtx rtl, tree *declp, HOST_WIDE_INT *offsetp) { - if (GET_CODE (rtl) == REG) + if (REG_P (rtl)) { if (REG_ATTRS (rtl)) { @@ -2533,7 +2533,7 @@ vt_add_function_parameters (void) incoming = adjust_stack_reference (incoming, -stack_adjust); out = &VTI (ENTRY_BLOCK_PTR)->out; - if (GET_CODE (incoming) == REG) + if (REG_P (incoming)) { #ifdef ENABLE_CHECKING if (REGNO (incoming) >= FIRST_PSEUDO_REGISTER) diff --git a/gcc/varasm.c b/gcc/varasm.c index e7eeb3f..42132f7 100644 --- a/gcc/varasm.c +++ b/gcc/varasm.c @@ -1378,7 +1378,7 @@ assemble_variable (tree decl, int top_level ATTRIBUTE_UNUSED, return; /* Do nothing for global register variables. */ - if (DECL_RTL_SET_P (decl) && GET_CODE (DECL_RTL (decl)) == REG) + if (DECL_RTL_SET_P (decl) && REG_P (DECL_RTL (decl))) { TREE_ASM_WRITTEN (decl) = 1; return; |