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authorJakub Jelinek <jakub@redhat.com>2018-12-01 00:26:41 +0100
committerJakub Jelinek <jakub@gcc.gnu.org>2018-12-01 00:26:41 +0100
commite26584b265dc2af4e95d23c4bdd89462ea508b69 (patch)
tree3f6973695d8e1b6e54221177085dd8ab887441d1
parent2b86de4cc6bf812ecdd343dd426da8497a93d479 (diff)
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re PR testsuite/85368 (phi-opt-11 test fails on IBM Z)
PR testsuite/85368 * params.def (PARAM_LOGICAL_OP_NON_SHORT_CIRCUIT): New param. * tree-ssa-ifcombine.c (ifcombine_ifandif): If --param logical-op-non-short-circuit is present, override LOGICAL_OP_NON_SHORT_CIRCUIT value from the param. * fold-const.c (fold_range_test, fold_truth_andor): Likewise. * lib/target-supports.exp (logical_op_short_circuit): Remove. * gcc.dg/builtin-bswap-7.c: Remove logical_op_short_circuit effective target, drop -mbranch-cost= options from the test and instead pass --param logical-op-non-short-circuit=0 or --param logical-op-non-short-circuit=1 depending on what the tests meant to test. * gcc.dg/pr21643.c: Likewise. * gcc.dg/tree-ssa/ssa-ifcombine-ccmp-2.c: Likewise. * gcc.dg/tree-ssa/phi-opt-11.c: Likewise. * gcc.dg/tree-ssa/ssa-ifcombine-ccmp-1.c: Likewise. * gcc.dg/tree-ssa/ssa-dom-thread-4.c: Likewise. * gcc.dg/tree-ssa/ssa-ifcombine-ccmp-3.c: Likewise. * gcc.dg/tree-ssa/ssa-thread-14.c: Likewise. * gcc.dg/tree-ssa/vrp47.c: Likewise. * gcc.dg/tree-ssa/ssa-dom-thread-11.c: Likewise. * gcc.dg/tree-ssa/ssa-dom-thread-16.c: Likewise. * gcc.dg/tree-ssa/ssa-dom-thread-14.c: Likewise. * gcc.dg/tree-ssa/ssa-ifcombine-ccmp-5.c: Likewise. * gcc.dg/tree-ssa/vrp87.c: Likewise. * gcc.dg/tree-ssa/ssa-ifcombine-ccmp-6.c: Likewise. * gcc.dg/tree-ssa/phi-opt-2.c: Likewise. * gcc.dg/tree-ssa/ssa-ifcombine-13.c: Likewise. * gcc.dg/tree-ssa/ssa-thread-11.c: Likewise. * gcc.dg/tree-ssa/ssa-ifcombine-ccmp-4.c: Likewise. * gcc.dg/tree-ssa/forwprop-28.c: Likewise. * gcc.dg/binop-xor1.c: Likewise. * gcc.dg/pr46309.c: Likewise. * gcc.dg/tree-ssa/ssa-dom-thread-18.c: New test. * gcc.dg/tree-ssa/reassoc-32.c: Add --param logical-op-non-short-circuit=1 to dg-options. * gcc.dg/tree-ssa/reassoc-33.c: Likewise. * gcc.dg/tree-ssa/reassoc-34.c: Likewise. * gcc.dg/tree-ssa/reassoc-35.c: Likewise. * gcc.dg/tree-ssa/reassoc-36.c: Likewise. From-SVN: r266700
-rw-r--r--gcc/ChangeLog9
-rw-r--r--gcc/fold-const.c21
-rw-r--r--gcc/params.def5
-rw-r--r--gcc/testsuite/ChangeLog38
-rw-r--r--gcc/testsuite/gcc.dg/binop-xor1.c4
-rw-r--r--gcc/testsuite/gcc.dg/builtin-bswap-7.c4
-rw-r--r--gcc/testsuite/gcc.dg/pr21643.c6
-rw-r--r--gcc/testsuite/gcc.dg/pr46309.c8
-rw-r--r--gcc/testsuite/gcc.dg/tree-ssa/forwprop-28.c4
-rw-r--r--gcc/testsuite/gcc.dg/tree-ssa/phi-opt-11.c6
-rw-r--r--gcc/testsuite/gcc.dg/tree-ssa/phi-opt-2.c5
-rw-r--r--gcc/testsuite/gcc.dg/tree-ssa/reassoc-32.c2
-rw-r--r--gcc/testsuite/gcc.dg/tree-ssa/reassoc-33.c2
-rw-r--r--gcc/testsuite/gcc.dg/tree-ssa/reassoc-34.c2
-rw-r--r--gcc/testsuite/gcc.dg/tree-ssa/reassoc-35.c2
-rw-r--r--gcc/testsuite/gcc.dg/tree-ssa/reassoc-36.c2
-rw-r--r--gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-11.c4
-rw-r--r--gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-14.c4
-rw-r--r--gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-16.c4
-rw-r--r--gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-18.c24
-rw-r--r--gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-4.c25
-rw-r--r--gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-13.c5
-rw-r--r--gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-1.c6
-rw-r--r--gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-2.c6
-rw-r--r--gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-3.c6
-rw-r--r--gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-4.c6
-rw-r--r--gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-5.c6
-rw-r--r--gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-6.c6
-rw-r--r--gcc/testsuite/gcc.dg/tree-ssa/ssa-thread-11.c4
-rw-r--r--gcc/testsuite/gcc.dg/tree-ssa/ssa-thread-14.c5
-rw-r--r--gcc/testsuite/gcc.dg/tree-ssa/vrp47.c7
-rw-r--r--gcc/testsuite/gcc.dg/tree-ssa/vrp87.c5
-rw-r--r--gcc/testsuite/lib/target-supports.exp23
-rw-r--r--gcc/tree-ssa-ifcombine.c7
34 files changed, 145 insertions, 128 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 0bf512d..f319daf 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,12 @@
+2018-11-30 Jakub Jelinek <jakub@redhat.com>
+
+ PR testsuite/85368
+ * params.def (PARAM_LOGICAL_OP_NON_SHORT_CIRCUIT): New param.
+ * tree-ssa-ifcombine.c (ifcombine_ifandif): If
+ --param logical-op-non-short-circuit is present, override
+ LOGICAL_OP_NON_SHORT_CIRCUIT value from the param.
+ * fold-const.c (fold_range_test, fold_truth_andor): Likewise.
+
2018-11-30 Jeff Law <law@redhat.com>
* optabs.c (expand_binop): Use "machine_mode" rather than
diff --git a/gcc/fold-const.c b/gcc/fold-const.c
index 5399288..45de94c 100644
--- a/gcc/fold-const.c
+++ b/gcc/fold-const.c
@@ -5572,12 +5572,15 @@ fold_range_test (location_t loc, enum tree_code code, tree type,
/* On machines where the branch cost is expensive, if this is a
short-circuited branch and the underlying object on both sides
is the same, make a non-short-circuit operation. */
- else if (LOGICAL_OP_NON_SHORT_CIRCUIT
- && !flag_sanitize_coverage
- && lhs != 0 && rhs != 0
- && (code == TRUTH_ANDIF_EXPR
- || code == TRUTH_ORIF_EXPR)
- && operand_equal_p (lhs, rhs, 0))
+ bool logical_op_non_short_circuit = LOGICAL_OP_NON_SHORT_CIRCUIT;
+ if (PARAM_VALUE (PARAM_LOGICAL_OP_NON_SHORT_CIRCUIT) != -1)
+ logical_op_non_short_circuit
+ = PARAM_VALUE (PARAM_LOGICAL_OP_NON_SHORT_CIRCUIT);
+ if (logical_op_non_short_circuit
+ && !flag_sanitize_coverage
+ && lhs != 0 && rhs != 0
+ && (code == TRUTH_ANDIF_EXPR || code == TRUTH_ORIF_EXPR)
+ && operand_equal_p (lhs, rhs, 0))
{
/* If simple enough, just rewrite. Otherwise, make a SAVE_EXPR
unless we are at top level or LHS contains a PLACEHOLDER_EXPR, in
@@ -8229,7 +8232,11 @@ fold_truth_andor (location_t loc, enum tree_code code, tree type,
if ((tem = fold_truth_andor_1 (loc, code, type, arg0, arg1)) != 0)
return tem;
- if (LOGICAL_OP_NON_SHORT_CIRCUIT
+ bool logical_op_non_short_circuit = LOGICAL_OP_NON_SHORT_CIRCUIT;
+ if (PARAM_VALUE (PARAM_LOGICAL_OP_NON_SHORT_CIRCUIT) != -1)
+ logical_op_non_short_circuit
+ = PARAM_VALUE (PARAM_LOGICAL_OP_NON_SHORT_CIRCUIT);
+ if (logical_op_non_short_circuit
&& !flag_sanitize_coverage
&& (code == TRUTH_AND_EXPR
|| code == TRUTH_ANDIF_EXPR
diff --git a/gcc/params.def b/gcc/params.def
index 11396a7..982f180 100644
--- a/gcc/params.def
+++ b/gcc/params.def
@@ -1360,6 +1360,11 @@ DEFPARAM(PARAM_AVOID_FMA_MAX_BITS,
"Maximum number of bits for which we avoid creating FMAs.",
0, 0, 512)
+DEFPARAM(PARAM_LOGICAL_OP_NON_SHORT_CIRCUIT,
+ "logical-op-non-short-circuit",
+ "True if a non-short-circuit operation is optimal.",
+ -1, -1, 1)
+
/*
Local variables:
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 903f7cb..b48e353 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,41 @@
+2018-11-30 Jakub Jelinek <jakub@redhat.com>
+
+ PR testsuite/85368
+ * lib/target-supports.exp (logical_op_short_circuit): Remove.
+ * gcc.dg/builtin-bswap-7.c: Remove logical_op_short_circuit
+ effective target, drop -mbranch-cost= options from the test and
+ instead pass --param logical-op-non-short-circuit=0 or
+ --param logical-op-non-short-circuit=1 depending on what the
+ tests meant to test.
+ * gcc.dg/pr21643.c: Likewise.
+ * gcc.dg/tree-ssa/ssa-ifcombine-ccmp-2.c: Likewise.
+ * gcc.dg/tree-ssa/phi-opt-11.c: Likewise.
+ * gcc.dg/tree-ssa/ssa-ifcombine-ccmp-1.c: Likewise.
+ * gcc.dg/tree-ssa/ssa-dom-thread-4.c: Likewise.
+ * gcc.dg/tree-ssa/ssa-ifcombine-ccmp-3.c: Likewise.
+ * gcc.dg/tree-ssa/ssa-thread-14.c: Likewise.
+ * gcc.dg/tree-ssa/vrp47.c: Likewise.
+ * gcc.dg/tree-ssa/ssa-dom-thread-11.c: Likewise.
+ * gcc.dg/tree-ssa/ssa-dom-thread-16.c: Likewise.
+ * gcc.dg/tree-ssa/ssa-dom-thread-14.c: Likewise.
+ * gcc.dg/tree-ssa/ssa-ifcombine-ccmp-5.c: Likewise.
+ * gcc.dg/tree-ssa/vrp87.c: Likewise.
+ * gcc.dg/tree-ssa/ssa-ifcombine-ccmp-6.c: Likewise.
+ * gcc.dg/tree-ssa/phi-opt-2.c: Likewise.
+ * gcc.dg/tree-ssa/ssa-ifcombine-13.c: Likewise.
+ * gcc.dg/tree-ssa/ssa-thread-11.c: Likewise.
+ * gcc.dg/tree-ssa/ssa-ifcombine-ccmp-4.c: Likewise.
+ * gcc.dg/tree-ssa/forwprop-28.c: Likewise.
+ * gcc.dg/binop-xor1.c: Likewise.
+ * gcc.dg/pr46309.c: Likewise.
+ * gcc.dg/tree-ssa/ssa-dom-thread-18.c: New test.
+ * gcc.dg/tree-ssa/reassoc-32.c: Add
+ --param logical-op-non-short-circuit=1 to dg-options.
+ * gcc.dg/tree-ssa/reassoc-33.c: Likewise.
+ * gcc.dg/tree-ssa/reassoc-34.c: Likewise.
+ * gcc.dg/tree-ssa/reassoc-35.c: Likewise.
+ * gcc.dg/tree-ssa/reassoc-36.c: Likewise.
+
2018-11-30 Wilco Dijkstra <wdijkstr@arm.com>
PR middle-end/64242
diff --git a/gcc/testsuite/gcc.dg/binop-xor1.c b/gcc/testsuite/gcc.dg/binop-xor1.c
index e2ea938..dea11e5 100644
--- a/gcc/testsuite/gcc.dg/binop-xor1.c
+++ b/gcc/testsuite/gcc.dg/binop-xor1.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O2 -fdump-tree-optimized" } */
+/* { dg-options "-O2 -fdump-tree-optimized --param logical-op-non-short-circuit=1" } */
int
foo (int a, int b, int c)
@@ -7,4 +7,4 @@ foo (int a, int b, int c)
return ((a && !b && c) || (!a && b && c));
}
-/* { dg-final { scan-tree-dump-times "\\\^" 1 "optimized" { xfail logical_op_short_circuit } } } */
+/* { dg-final { scan-tree-dump-times "\\\^" 1 "optimized" } } */
diff --git a/gcc/testsuite/gcc.dg/builtin-bswap-7.c b/gcc/testsuite/gcc.dg/builtin-bswap-7.c
index fe85441..35bcee3 100644
--- a/gcc/testsuite/gcc.dg/builtin-bswap-7.c
+++ b/gcc/testsuite/gcc.dg/builtin-bswap-7.c
@@ -3,9 +3,9 @@
/* { dg-require-effective-target lp64 } */
/* { dg-options "-O -fdump-rtl-combine" } */
-/* The branch cost setting prevents the return value from being
+/* The param setting prevents the return value from being
calculated with arithmetic instead of doing a compare. */
-/* { dg-additional-options "-mbranch-cost=0" { target branch_cost } } */
+/* { dg-additional-options "--param logical-op-non-short-circuit=0" } */
#include <stdint.h>
diff --git a/gcc/testsuite/gcc.dg/pr21643.c b/gcc/testsuite/gcc.dg/pr21643.c
index 8a72165..4e7f93d 100644
--- a/gcc/testsuite/gcc.dg/pr21643.c
+++ b/gcc/testsuite/gcc.dg/pr21643.c
@@ -1,7 +1,6 @@
/* PR tree-optimization/21643 */
/* { dg-do compile } */
-/* { dg-options "-O2 -fdump-tree-reassoc1-details" } */
-/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
+/* { dg-options "-O2 -fdump-tree-reassoc1-details --param logical-op-non-short-circuit=1" } */
int
f1 (unsigned char c)
@@ -87,5 +86,4 @@ f9 (unsigned char c)
return 1;
}
-/* { dg-final { scan-tree-dump-times "Optimizing range tests c_\[0-9\]*.D. -.0, 31. and -.32, 32.\[\n\r\]* into" 6 "reassoc1" { target { ! logical_op_short_circuit } } } } */
-/* { dg-final { scan-tree-dump-times "Optimizing range tests c_\[0-9\]*.D. -.0, 31. and -.32, 32.\[\n\r\]* into" 5 "reassoc1" { target logical_op_short_circuit } } } */
+/* { dg-final { scan-tree-dump-times "Optimizing range tests c_\[0-9\]*.D. -.0, 31. and -.32, 32.\[\n\r\]* into" 6 "reassoc1" } } */
diff --git a/gcc/testsuite/gcc.dg/pr46309.c b/gcc/testsuite/gcc.dg/pr46309.c
index c964529..615d657 100644
--- a/gcc/testsuite/gcc.dg/pr46309.c
+++ b/gcc/testsuite/gcc.dg/pr46309.c
@@ -1,10 +1,6 @@
/* PR tree-optimization/46309 */
-/* { dg-do compile { target { { ! logical_op_short_circuit } || { mips*-*-* avr*-*-* } } } } */
-/* { dg-options "-O2 -fdump-tree-reassoc-details" } */
-/* The transformation depends on BRANCH_COST being greater than 1
- (see the notes in the PR), so try to force that. */
-/* { dg-additional-options "-mtune=octeon2" { target mips*-*-* } } */
-/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
+/* { dg-do compile } */
+/* { dg-options "-O2 -fdump-tree-reassoc-details --param logical-op-non-short-circuit=1" } */
int
f1 (int a)
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/forwprop-28.c b/gcc/testsuite/gcc.dg/tree-ssa/forwprop-28.c
index aa70678..4f88a26 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/forwprop-28.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/forwprop-28.c
@@ -1,7 +1,7 @@
/* Setting LOGICAL_OP_NON_SHORT_CIRCUIT to 0 leads to two conditional jumps
when evaluating an && condition. VRP is not able to optimize this. */
-/* { dg-do compile { target { ! { logical_op_short_circuit || { m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* hppa*-*-* } } } } } */
-/* { dg-options "-O2 -fdump-tree-forwprop1-details" } */
+/* { dg-do compile } */
+/* { dg-options "-O2 -fdump-tree-forwprop1-details --param logical-op-non-short-circuit=1" } */
extern char *frob (void);
extern _Bool testit (void);
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/phi-opt-11.c b/gcc/testsuite/gcc.dg/tree-ssa/phi-opt-11.c
index cccb069..14c82cd 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/phi-opt-11.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/phi-opt-11.c
@@ -1,6 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O1 -fdump-tree-optimized" } */
-/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
+/* { dg-options "-O1 -fdump-tree-optimized --param logical-op-non-short-circuit=1" } */
int f(int a, int b, int c)
{
@@ -23,5 +22,4 @@ int h(int a, int b, int c, int d)
return a;
}
-/* { dg-final { scan-tree-dump-times "if" 0 "optimized" { target { { ! logical_op_short_circuit } || branch_cost } } } } */
-/* { dg-final { scan-tree-dump-times "if" 2 "optimized" { target { logical_op_short_circuit && { ! branch_cost } } } } } */
+/* { dg-final { scan-tree-dump-times "if" 0 "optimized" } } */
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/phi-opt-2.c b/gcc/testsuite/gcc.dg/tree-ssa/phi-opt-2.c
index e0b2618..5c7815e 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/phi-opt-2.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/phi-opt-2.c
@@ -1,6 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O1 -fdump-tree-optimized" } */
-/* { dg-additional-options "-mbranch-cost=1" { target branch_cost } } */
+/* { dg-options "-O1 -fdump-tree-optimized --param logical-op-non-short-circuit=0" } */
_Bool f1(_Bool a, _Bool b)
{
@@ -21,4 +20,4 @@ _Bool f1(_Bool a, _Bool b)
which can be fixed in a different patch).
Test this only when known to be !LOGICAL_OP_NON_SHORT_CIRCUIT,
otherwise ifcombine may convert this into return a & b;. */
-/* { dg-final { scan-tree-dump-times "if" 1 "optimized" { target { i?86-*-* x86_64-*-* mips*-*-* s390*-*-* avr*-*-* } } } } */
+/* { dg-final { scan-tree-dump-times "if" 1 "optimized" } } */
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-32.c b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-32.c
index b6ca8e2..944362a 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-32.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-32.c
@@ -1,6 +1,6 @@
/* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-*"} } } */
-/* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details" } */
+/* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details --param logical-op-non-short-circuit=1" } */
/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-33.c b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-33.c
index 243508c..28cd779 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-33.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-33.c
@@ -1,6 +1,6 @@
/* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* hppa*-*-* nios2*-*-* or1k-*-*-*"} } } */
-/* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details" } */
+/* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details --param logical-op-non-short-circuit=1" } */
/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
int test (int a, int b, int c)
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-34.c b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-34.c
index 2407004..f108711 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-34.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-34.c
@@ -1,6 +1,6 @@
/* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* hppa*-*-* nios2*-*-* or1k*-*-*"} } } */
-/* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details" } */
+/* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details --param logical-op-non-short-circuit=1" } */
/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
int test (int a, int b, int c)
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-35.c b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-35.c
index e5ba101..98ea2ad 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-35.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-35.c
@@ -1,6 +1,6 @@
/* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* hppa*-*-* nios2*-*-* or1k*-*-*"} } } */
-/* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details" } */
+/* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details --param logical-op-non-short-circuit=1" } */
/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
int test (unsigned int a, int b, int c)
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-36.c b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-36.c
index 4df5840..d918410 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-36.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-36.c
@@ -1,6 +1,6 @@
/* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* hppa*-*-* nios2*-*-* or1k*-*-*"} } } */
-/* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details" } */
+/* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details --param logical-op-non-short-circuit=1" } */
/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
int test (int a, int b, int c)
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-11.c b/gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-11.c
index f42d64b..5f90613 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-11.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-11.c
@@ -1,5 +1,5 @@
-/* { dg-do compile { target { ! logical_op_short_circuit } } } */
-/* { dg-options "-O2 -fdump-tree-dom2-details" } */
+/* { dg-do compile } */
+/* { dg-options "-O2 -fdump-tree-dom2-details --param logical-op-non-short-circuit=1" } */
static int *bb_ticks;
extern void frob (void);
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-14.c b/gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-14.c
index 2d97f86..4e6a911 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-14.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-14.c
@@ -1,5 +1,5 @@
-/* { dg-do compile { target { ! logical_op_short_circuit } } } */
-/* { dg-options "-O2 -fdump-tree-dom2-details -w" } */
+/* { dg-do compile } */
+/* { dg-options "-O2 -fdump-tree-dom2-details -w --param logical-op-non-short-circuit=1" } */
enum optab_methods
{
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-16.c b/gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-16.c
index e2e0d20..ffbdc98 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-16.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-16.c
@@ -1,5 +1,5 @@
-/* { dg-do compile { target { ! logical_op_short_circuit } } } */
-/* { dg-options "-O2 -fdump-tree-dom2-details -w" } */
+/* { dg-do compile } */
+/* { dg-options "-O2 -fdump-tree-dom2-details -w --param logical-op-non-short-circuit=1" } */
unsigned char
validate_subreg (unsigned int offset, unsigned int isize, unsigned int osize, int zz, int qq)
{
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-18.c b/gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-18.c
new file mode 100644
index 0000000..d4759b8
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-18.c
@@ -0,0 +1,24 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -fdump-tree-vrp1-details -fdump-tree-dom2-details -std=gnu89 --param logical-op-non-short-circuit=0" } */
+
+#include "ssa-dom-thread-4.c"
+
+/* On targets that define LOGICAL_OP_NON_SHORT_CIRCUIT to 0, we split both
+ "a_elt || b_elt" and "b_elt && kill_elt" into two conditions each,
+ rather than using "(var1 != 0) op (var2 != 0)". Also, as on other targets,
+ we duplicate the header of the inner "while" loop. There are then
+ 4 threading opportunities:
+
+ 1x "!a_elt && b_elt" in the outer "while" loop
+ -> the start of the inner "while" loop,
+ skipping the known-true "b_elt" in the first condition.
+ 1x "!b_elt" in the first condition
+ -> the outer "while" loop's continuation point,
+ skipping the known-false "b_elt" in the second condition.
+ 2x "kill_elt->indx >= b_elt->indx" in the first "while" loop
+ -> "kill_elt->indx == b_elt->indx" in the second condition,
+ skipping the known-true "b_elt && kill_elt" in the second
+ condition.
+
+ All the cases are picked up by VRP1 as jump threads. */
+/* { dg-final { scan-tree-dump-times "Threaded" 4 "vrp1" } } */
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-4.c b/gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-4.c
index e13eb86..521754f 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-4.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-4.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O2 -fdump-tree-vrp1-details -fdump-tree-dom2-details -std=gnu89" } */
+/* { dg-options "-O2 -fdump-tree-vrp1-details -fdump-tree-dom2-details -std=gnu89 --param logical-op-non-short-circuit=1" } */
struct bitmap_head_def;
typedef struct bitmap_head_def *bitmap;
typedef const struct bitmap_head_def *const_bitmap;
@@ -58,25 +58,4 @@ bitmap_ior_and_compl (bitmap dst, const_bitmap a, const_bitmap b,
code we missed the edge when the first conditional is false
(b_elt is zero, which means the second conditional is always
zero. VRP1 catches all three. */
-/* { dg-final { scan-tree-dump-times "Threaded" 3 "vrp1" { target { ! logical_op_short_circuit } } } } */
-
-/* On targets that define LOGICAL_OP_NON_SHORT_CIRCUIT to 0, we split both
- "a_elt || b_elt" and "b_elt && kill_elt" into two conditions each,
- rather than using "(var1 != 0) op (var2 != 0)". Also, as on other targets,
- we duplicate the header of the inner "while" loop. There are then
- 4 threading opportunities:
-
- 1x "!a_elt && b_elt" in the outer "while" loop
- -> the start of the inner "while" loop,
- skipping the known-true "b_elt" in the first condition.
- 1x "!b_elt" in the first condition
- -> the outer "while" loop's continuation point,
- skipping the known-false "b_elt" in the second condition.
- 2x "kill_elt->indx >= b_elt->indx" in the first "while" loop
- -> "kill_elt->indx == b_elt->indx" in the second condition,
- skipping the known-true "b_elt && kill_elt" in the second
- condition.
-
- All the cases are picked up by VRP1 as jump threads. */
-/* { dg-final { scan-tree-dump-times "Threaded" 4 "vrp1" { target logical_op_short_circuit } } } */
-
+/* { dg-final { scan-tree-dump-times "Threaded" 3 "vrp1" } } */
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-13.c b/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-13.c
index 5f3147a..425eb3d 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-13.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-13.c
@@ -1,6 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O1 -fdump-tree-optimized-details-blocks" } */
-/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
+/* { dg-options "-O1 -fdump-tree-optimized-details-blocks --param logical-op-non-short-circuit=1" } */
_Bool f1(_Bool a, _Bool b)
{
@@ -17,5 +16,5 @@ _Bool f1(_Bool a, _Bool b)
/* For LOGICAL_OP_NON_SHORT_CIRCUIT, this should be optimized
into return a & b;, with no ifs. */
-/* { dg-final { scan-tree-dump-not "if" "optimized" { target { i?86-*-* x86_64-*-* s390*-*-* avr*-*-* } } } } */
+/* { dg-final { scan-tree-dump-not "if" "optimized" } } */
/* { dg-final { scan-tree-dump-not "Invalid sum" "optimized" } } */
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-1.c b/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-1.c
index 1714fcf..a550d00 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-1.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-1.c
@@ -1,7 +1,5 @@
-/* { dg-do compile { target { ! { { logical_op_short_circuit && { ! avr-*-* } } || { m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* arc*-*-* mips*-*-* } } } } } */
-
-/* { dg-options "-O2 -g -fdump-tree-optimized" } */
-/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
+/* { dg-do compile } */
+/* { dg-options "-O2 -g -fdump-tree-optimized --param logical-op-non-short-circuit=1" } */
int t (int a, int b)
{
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-2.c b/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-2.c
index f35ec5e..6d947c1 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-2.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-2.c
@@ -1,7 +1,5 @@
-/* { dg-do compile { target { ! { { logical_op_short_circuit && { ! avr-*-* } } || { m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* arc*-*-* mips*-*-* } } } } } */
-
-/* { dg-options "-O2 -g -fdump-tree-optimized" } */
-/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
+/* { dg-do compile } */
+/* { dg-options "-O2 -g -fdump-tree-optimized --param logical-op-non-short-circuit=1" } */
int t (int a, int b)
{
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-3.c b/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-3.c
index d84bdd51..353e417 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-3.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-3.c
@@ -1,7 +1,5 @@
-/* { dg-do compile { target { ! { { logical_op_short_circuit && { ! avr-*-* } } || { m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* arc*-*-* mips*-*-* } } } } } */
-
-/* { dg-options "-O2 -g -fdump-tree-optimized" } */
-/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
+/* { dg-do compile } */
+/* { dg-options "-O2 -g -fdump-tree-optimized --param logical-op-non-short-circuit=1" } */
int t (int a, int b)
{
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-4.c b/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-4.c
index be0ee26..76f4017 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-4.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-4.c
@@ -1,7 +1,5 @@
-/* { dg-do compile { target { ! { { logical_op_short_circuit && { ! avr-*-* } } || { m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* arc*-*-* mips*-*-* } } } } } */
-
-/* { dg-options "-O2 -g -fdump-tree-optimized" } */
-/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
+/* { dg-do compile } */
+/* { dg-options "-O2 -g -fdump-tree-optimized --param logical-op-non-short-circuit=1" } */
int t (int a, int b)
{
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-5.c b/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-5.c
index 09c22ab..0c04833 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-5.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-5.c
@@ -1,7 +1,5 @@
-/* { dg-do compile { target { ! { { logical_op_short_circuit && { ! avr-*-* } } || { m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* arc*-*-* mips*-*-* } } } } } */
-
-/* { dg-options "-O2 -g -fdump-tree-optimized" } */
-/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
+/* { dg-do compile } */
+/* { dg-options "-O2 -g -fdump-tree-optimized --param logical-op-non-short-circuit=1" } */
int t (int a, int b, int c)
{
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-6.c b/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-6.c
index a0dc82d..02404a66 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-6.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-6.c
@@ -1,7 +1,5 @@
-/* { dg-do compile { target { ! { { logical_op_short_circuit && { ! avr-*-* } } || { m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* arc*-*-* mips*-*-* } } } } } */
-
-/* { dg-options "-O2 -g -fdump-tree-optimized" } */
-/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
+/* { dg-do compile } */
+/* { dg-options "-O2 -g -fdump-tree-optimized --param logical-op-non-short-circuit=1" } */
int t (int a, int b, int c)
{
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/ssa-thread-11.c b/gcc/testsuite/gcc.dg/tree-ssa/ssa-thread-11.c
index 70decd1..67e1e89 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/ssa-thread-11.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/ssa-thread-11.c
@@ -1,5 +1,5 @@
-/* { dg-do compile { target { ! { logical_op_short_circuit || { m68k*-*-* bfin*-*-* v850*-*-* moxie*-*-* m32c*-*-* fr30*-*-* mcore*-*-* frv-*-* h8300-*-* m32r-*-* mn10300-*-* msp430-*-* pdp11-*-* rl78-*-* rx-*-* vax-*-*} } } } } */
-/* { dg-options "-O2 -fdump-tree-vrp2-details" } */
+/* { dg-do compile } */
+/* { dg-options "-O2 -fdump-tree-vrp2-details --param logical-op-non-short-circuit=1" } */
/* { dg-final { scan-tree-dump-not "IRREDUCIBLE_LOOP" "vrp2" } } */
void abort (void);
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/ssa-thread-14.c b/gcc/testsuite/gcc.dg/tree-ssa/ssa-thread-14.c
index f12fb07..38661c8 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/ssa-thread-14.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/ssa-thread-14.c
@@ -1,6 +1,5 @@
-/* { dg-do compile { target { ! { logical_op_short_circuit || { m68k*-*-* mmix*-*-* mep*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* hppa*-*-* nios2*-*-* riscv*-*-* } } } } } */
-/* { dg-additional-options "-O2 -fdump-tree-vrp-details" } */
-/* { dg-additional-options "-mbranch-cost=2" { target i?86-*-* x86_64-*-* } } */
+/* { dg-do compile } */
+/* { dg-additional-options "-O2 -fdump-tree-vrp-details --param logical-op-non-short-circuit=1" } */
/* { dg-final { scan-tree-dump-times "Threaded jump" 8 "vrp1" } } */
void foo (void);
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/vrp47.c b/gcc/testsuite/gcc.dg/tree-ssa/vrp47.c
index 28a8808..eb7546c 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/vrp47.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/vrp47.c
@@ -1,10 +1,7 @@
/* Setting LOGICAL_OP_NON_SHORT_CIRCUIT to 0 inhibits the setcc
optimizations that expose the VRP opportunity. */
-/* Skip on S/390. Lower values in BRANCH_COST lead to two conditional
- jumps when evaluating an && condition. VRP is not able to optimize
- this. */
-/* { dg-do compile { target { ! { logical_op_short_circuit || { s390*-*-* mn10300-*-* hppa*-*-* m68k*-*-* } } } } } */
-/* { dg-options "-O2 -fdump-tree-vrp1 -fdump-tree-dom2 -fdump-tree-vrp2" } */
+/* { dg-do compile } */
+/* { dg-options "-O2 -fdump-tree-vrp1 -fdump-tree-dom2 -fdump-tree-vrp2 --param logical-op-non-short-circuit=1" } */
/* { dg-additional-options "-march=i586" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
int h(int x, int y)
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/vrp87.c b/gcc/testsuite/gcc.dg/tree-ssa/vrp87.c
index 1080ab1..da1d0a2 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/vrp87.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/vrp87.c
@@ -1,8 +1,7 @@
/* Setting LOGICAL_OP_NON_SHORT_CIRCUIT to 0 leads to two conditional jumps
when evaluating an && condition. */
-/* { dg-do compile { target { ! { logical_op_short_circuit || { m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* hppa*-*-* } } } } } */
-
-/* { dg-options "-O2 -fdump-tree-fre1-details" } */
+/* { dg-do compile } */
+/* { dg-options "-O2 -fdump-tree-fre1-details --param logical-op-non-short-circuit=1" } */
struct bitmap_head_def;
typedef struct bitmap_head_def *bitmap;
diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index 3baa2da..faa67e2 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -8487,29 +8487,6 @@ proc check_effective_target_tiny {} {
}]
}
-# Return 1 if LOGICAL_OP_NON_SHORT_CIRCUIT is set to 0 for the current target.
-
-proc check_effective_target_logical_op_short_circuit {} {
- if { [istarget mips*-*-*]
- || [istarget arc*-*-*]
- || [istarget avr*-*-*]
- || [istarget crisv32-*-*] || [istarget cris-*-*]
- || [istarget csky*-*-*]
- || [istarget mmix-*-*]
- || [istarget msp430-*-*]
- || [istarget s390*-*-*]
- || [istarget powerpc*-*-*]
- || [istarget nios2*-*-*]
- || [istarget riscv*-*-*]
- || [istarget v850*-*-*]
- || [istarget visium-*-*]
- || [istarget or1k*-*-*]
- || [check_effective_target_arm_cortex_m] } {
- return 1
- }
- return 0
-}
-
# Return 1 if the target supports -mbranch-cost=N option.
proc check_effective_target_branch_cost {} {
diff --git a/gcc/tree-ssa-ifcombine.c b/gcc/tree-ssa-ifcombine.c
index 2b96937..ddb9564 100644
--- a/gcc/tree-ssa-ifcombine.c
+++ b/gcc/tree-ssa-ifcombine.c
@@ -40,6 +40,7 @@ along with GCC; see the file COPYING3. If not see
#include "gimplify-me.h"
#include "tree-cfg.h"
#include "tree-ssa.h"
+#include "params.h"
#ifndef LOGICAL_OP_NON_SHORT_CIRCUIT
#define LOGICAL_OP_NON_SHORT_CIRCUIT \
@@ -563,7 +564,11 @@ ifcombine_ifandif (basic_block inner_cond_bb, bool inner_inv,
{
tree t1, t2;
gimple_stmt_iterator gsi;
- if (!LOGICAL_OP_NON_SHORT_CIRCUIT || flag_sanitize_coverage)
+ bool logical_op_non_short_circuit = LOGICAL_OP_NON_SHORT_CIRCUIT;
+ if (PARAM_VALUE (PARAM_LOGICAL_OP_NON_SHORT_CIRCUIT) != -1)
+ logical_op_non_short_circuit
+ = PARAM_VALUE (PARAM_LOGICAL_OP_NON_SHORT_CIRCUIT);
+ if (!logical_op_non_short_circuit || flag_sanitize_coverage)
return false;
/* Only do this optimization if the inner bb contains only the conditional. */
if (!gsi_one_before_end_p (gsi_start_nondebug_after_labels_bb (inner_cond_bb)))