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authorJohn Wehle <john@feith.com>1998-05-15 20:41:47 +0000
committerJeff Law <law@gcc.gnu.org>1998-05-15 14:41:47 -0600
commitd2f2cb195c121b8018aafd2285e6ea123a9de1af (patch)
treed6e60de49256939a1a7c50dedcf92c64afd23757
parent51bcf66114982e2322781d49d45494e26074028e (diff)
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* i386.md (movdi-1, movdi): Rewrite based on SI move patterns.
From-SVN: r19786
-rw-r--r--gcc/ChangeLog4
-rw-r--r--gcc/config/i386/i386.md50
2 files changed, 31 insertions, 23 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index f406625..c281bdd 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,7 @@
+Fri May 15 21:40:06 1998 John Wehle (john@feith.com)
+
+ * i386.md (movdi-1, movdi): Rewrite based on SI move patterns.
+
Fri May 15 18:55:22 1998 Jason Merrill <jason@yorick.cygnus.com>
* tree.h (BINFO_SIZE, TYPE_BINFO_SIZE): New macros.
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 8baeddc..7068709 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -1633,36 +1633,40 @@
}")
(define_insn ""
- [(set (match_operand:DI 0 "push_operand" "=<,<,<,<")
- (match_operand:DI 1 "general_operand" "riF,o,o,o"))
- (clobber (match_scratch:SI 2 "=X,&r,&r,X"))
- (clobber (match_scratch:SI 3 "=X,&r,X,X"))]
+ [(set (match_operand:DI 0 "push_operand" "=<")
+ (match_operand:DI 1 "general_operand" "riF"))]
""
- "*
-{
- if (GET_CODE (operands[1]) != MEM)
- return output_move_double (operands);
+ "* return output_move_double (operands);")
- else
- return output_move_pushmem (operands, insn, GET_MODE_SIZE (DImode), 2, 4);
-}")
+(define_insn ""
+ [(set (match_operand:DI 0 "push_operand" "=<")
+ (match_operand:DI 1 "memory_operand" "o"))]
+ "TARGET_PUSH_MEMORY"
+ "* return output_move_pushmem (operands, insn, GET_MODE_SIZE (DImode),0,0);")
-(define_insn "movdi"
- [(set (match_operand:DI 0 "general_operand" "=o,o,r,rm")
- (match_operand:DI 1 "general_operand" "o,o,m,riF"))
- (clobber (match_scratch:SI 2 "=&r,&r,X,X"))
- (clobber (match_scratch:SI 3 "=&r,X,X,X"))]
+(define_expand "movdi"
+ [(set (match_operand:DI 0 "general_operand" "")
+ (match_operand:DI 1 "general_operand" ""))]
""
- "*
+ "
{
- rtx low[2], high[2], xop[6];
-
- if (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)
- return output_move_double (operands);
- else
- return output_move_memory (operands, insn, GET_MODE_SIZE (DImode), 2, 4);
+ /* Don't generate memory->memory moves, go through a register */
+ if (TARGET_MOVE
+ && (reload_in_progress | reload_completed) == 0
+ && GET_CODE (operands[0]) == MEM
+ && GET_CODE (operands[1]) == MEM)
+ {
+ operands[1] = force_reg (DImode, operands[1]);
+ }
}")
+(define_insn ""
+ [(set (match_operand:DI 0 "general_operand" "=g,r")
+ (match_operand:DI 1 "general_operand" "riF,m"))]
+ "(!TARGET_MOVE || GET_CODE (operands[0]) != MEM)
+ || (GET_CODE (operands[1]) != MEM)"
+ "* return output_move_double (operands);")
+
;;- conversion instructions
;;- NONE