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| author | Uros Bizjak <ubizjak@gmail.com> | 2022-06-13 17:08:18 +0200 |
|---|---|---|
| committer | Uros Bizjak <ubizjak@gmail.com> | 2022-06-13 17:10:49 +0200 |
| commit | b3dd7d8b48227d3489039ca66b6c0ea2da743255 (patch) | |
| tree | 8b281209304c75c22f647cb7a0e4c80866c68d51 | |
| parent | 77718f38f896191e39b1e14c66ed990f0fff391b (diff) | |
| download | gcc-b3dd7d8b48227d3489039ca66b6c0ea2da743255.zip gcc-b3dd7d8b48227d3489039ca66b6c0ea2da743255.tar.gz gcc-b3dd7d8b48227d3489039ca66b6c0ea2da743255.tar.bz2 | |
i386: Return true for (SUBREG (MEM....)) in register_no_elim_operand [PR105927]
Under certain conditions register_operand predicate also allows
subregs of memory operands. When RTL checking is enabled, these
will fail with REGNO (op).
Allow subregs of memory operands, these are guaranteed
to be reloaded to a register.
2022-06-13 Uroš Bizjak <ubizjak@gmail.com>
gcc/ChangeLog:
PR target/105927
* config/i386/predicates.md (register_no_elim_operand):
Return true for subreg of a memory operand.
gcc/testsuite/ChangeLog:
PR target/105927
* gcc.target/i386/pr105927.c: New test.
| -rw-r--r-- | gcc/config/i386/predicates.md | 7 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/i386/pr105927.c | 18 |
2 files changed, 25 insertions, 0 deletions
diff --git a/gcc/config/i386/predicates.md b/gcc/config/i386/predicates.md index 848a79a..128144f 100644 --- a/gcc/config/i386/predicates.md +++ b/gcc/config/i386/predicates.md @@ -672,6 +672,12 @@ { if (SUBREG_P (op)) op = SUBREG_REG (op); + + /* Before reload, we can allow (SUBREG (MEM...)) as a register operand + because it is guaranteed to be reloaded into one. */ + if (MEM_P (op)) + return true; + return !(op == arg_pointer_rtx || op == frame_pointer_rtx || IN_RANGE (REGNO (op), @@ -685,6 +691,7 @@ { if (SUBREG_P (op)) op = SUBREG_REG (op); + if (reload_completed) return REG_OK_FOR_INDEX_STRICT_P (op); else diff --git a/gcc/testsuite/gcc.target/i386/pr105927.c b/gcc/testsuite/gcc.target/i386/pr105927.c new file mode 100644 index 0000000..6024618 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr105927.c @@ -0,0 +1,18 @@ +/* PR target/105927 */ +/* { dg-do compile { target ia32 } } */ +/* { dg-options "-O1 -fno-tree-dce -mtune=k6-3 -msse2" } */ + +typedef _Float16 __attribute__((__vector_size__(4))) U; +typedef _Float16 __attribute__((__vector_size__(2))) V; +typedef short __attribute__((__vector_size__(4))) W; +V v; +U u; + +extern void bar(W i); + +void +foo(void) +{ + U x = __builtin_shufflevector(v, u, 2, 0); + bar(x >= 0); +} |