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author | Michael Meissner <meissner@linux.vnet.ibm.com> | 2017-12-01 23:52:20 +0000 |
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committer | Michael Meissner <meissner@gcc.gnu.org> | 2017-12-01 23:52:20 +0000 |
commit | b2db7624af722cf550f1020501294d4206b60e7b (patch) | |
tree | 5ffe06a611ba4660fc6dff8c087a56b615b3a2eb | |
parent | 92f0112cab96a60bb777b81e93a5d10437c5fa60 (diff) | |
download | gcc-b2db7624af722cf550f1020501294d4206b60e7b.zip gcc-b2db7624af722cf550f1020501294d4206b60e7b.tar.gz gcc-b2db7624af722cf550f1020501294d4206b60e7b.tar.bz2 |
re PR target/81959 (PowerPC __float128 optimization fails with integer PRE_INC addresses)
[gcc]
2017-12-01 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/81959
* config/rs6000/rs6000.c (rs6000_address_for_fpconvert): Check for
whether we can allocate pseudos before trying to fix an address.
* config/rs6000/rs6000.md (float_<mode>si2_hw): Make sure the
memory address is indexed or indirect.
(floatuns_<mode>si2_hw2): Likewise.
[gcct/testsuite]
2017-12-01 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/81959
* gcc.target/powerpc/pr81959.c: New test.
From-SVN: r255341
-rw-r--r-- | gcc/ChangeLog | 9 | ||||
-rw-r--r-- | gcc/config/rs6000/rs6000.c | 3 | ||||
-rw-r--r-- | gcc/config/rs6000/rs6000.md | 6 | ||||
-rw-r--r-- | gcc/testsuite/ChangeLog | 5 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/powerpc/pr81959.c | 25 |
5 files changed, 47 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index b4a0986..805782f 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,12 @@ +2017-12-01 Michael Meissner <meissner@linux.vnet.ibm.com> + + PR target/81959 + * config/rs6000/rs6000.c (rs6000_address_for_fpconvert): Check for + whether we can allocate pseudos before trying to fix an address. + * config/rs6000/rs6000.md (float_<mode>si2_hw): Make sure the + memory address is indexed or indirect. + (floatuns_<mode>si2_hw2): Likewise. + 2017-12-01 Jason Merrill <jason@redhat.com> * Makefile.in (TAGS): Add c-family/*.cc. diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 551d9c4..5f5f6d5 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -37886,7 +37886,8 @@ rs6000_address_for_fpconvert (rtx x) gcc_assert (MEM_P (x)); addr = XEXP (x, 0); - if (! legitimate_indirect_address_p (addr, reload_completed) + if (can_create_pseudo_p () + && ! legitimate_indirect_address_p (addr, reload_completed) && ! legitimate_indexed_address_p (addr, reload_completed)) { if (GET_CODE (addr) == PRE_INC || GET_CODE (addr) == PRE_DEC) diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 12d5564..f8c91c7 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -14674,6 +14674,9 @@ { if (GET_CODE (operands[2]) == SCRATCH) operands[2] = gen_reg_rtx (DImode); + + if (MEM_P (operands[1])) + operands[1] = rs6000_address_for_fpconvert (operands[1]); }) (define_insn_and_split "float<QHI:mode><IEEE128:mode>2" @@ -14737,6 +14740,9 @@ { if (GET_CODE (operands[2]) == SCRATCH) operands[2] = gen_reg_rtx (DImode); + + if (MEM_P (operands[1])) + operands[1] = rs6000_address_for_fpconvert (operands[1]); }) (define_insn_and_split "floatuns<QHI:mode><IEEE128:mode>2" diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index c86275d..dadd4c9 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2017-12-01 Michael Meissner <meissner@linux.vnet.ibm.com> + + PR target/81959 + * gcc.target/powerpc/pr81959.c: New test. + 2017-12-01 Wilco Dijkstra <wdijkstr@arm.com> * gcc.dg/asm-4.c: Skip on AArch64 with ILP32 as test is incorrect. diff --git a/gcc/testsuite/gcc.target/powerpc/pr81959.c b/gcc/testsuite/gcc.target/powerpc/pr81959.c new file mode 100644 index 0000000..c4cc373 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr81959.c @@ -0,0 +1,25 @@ +/* { dg-do compile { target { powerpc64*-*-* && lp64 } } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-options "-mpower9-vector -O2 -mfloat128" } */ + +/* PR 81959, the compiler raised on unrecognizable insn message in converting + int to __float128, where the int had a PRE_INC in the address. */ + +#ifndef ARRAY_SIZE +#define ARRAY_SIZE 1024 +#endif + +void +convert_int_to_float128 (__float128 * __restrict__ p, + int * __restrict__ q) +{ + unsigned long i; + + for (i = 0; i < ARRAY_SIZE; i++) + p[i] = (__float128)q[i]; +} + +/* { dg-final { scan-assembler {\mlfiwax\M|\mlxsiwax\M} } } */ +/* { dg-final { scan-assembler {\mxscvsdqp\M} } } */ +/* { dg-final { scan-assembler-not {\mmtvsrd\M} } } */ +/* { dg-final { scan-assembler-not {\mmtvsrw[sz]\M} } } */ |