diff options
author | Kazu Hirata <kazu@cs.umass.edu> | 2004-02-16 03:53:38 +0000 |
---|---|---|
committer | Kazu Hirata <kazu@gcc.gnu.org> | 2004-02-16 03:53:38 +0000 |
commit | 1472042a4a7a89c84f7c93df2bb92556a0014d84 (patch) | |
tree | f8811bdd42d5a3cb146099195db647589a94361a | |
parent | 24f29b066636cfa584d02d9adb9ac39c37655454 (diff) | |
download | gcc-1472042a4a7a89c84f7c93df2bb92556a0014d84.zip gcc-1472042a4a7a89c84f7c93df2bb92556a0014d84.tar.gz gcc-1472042a4a7a89c84f7c93df2bb92556a0014d84.tar.bz2 |
h8300.md: Remove unnecessary parallels from all define_insn and define_split patterns.
* config/h8300/h8300.md: Remove unnecessary parallels from
all define_insn and define_split patterns.
From-SVN: r77873
-rw-r--r-- | gcc/ChangeLog | 5 | ||||
-rw-r--r-- | gcc/config/h8300/h8300.md | 310 |
2 files changed, 151 insertions, 164 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index b485d2e..d0d6d79 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,10 @@ 2004-02-15 Kazu Hirata <kazu@cs.umass.edu> + * config/h8300/h8300.md: Remove unnecessary parallels from + all define_insn and define_split patterns. + +2004-02-15 Kazu Hirata <kazu@cs.umass.edu> + * config/h8300/h8300.md: Remove explicit (set_attr "cc" "clobber"). diff --git a/gcc/config/h8300/h8300.md b/gcc/config/h8300/h8300.md index 1509e47..ce8f669 100644 --- a/gcc/config/h8300/h8300.md +++ b/gcc/config/h8300/h8300.md @@ -121,30 +121,30 @@ ;; movqi (define_insn "pushqi1_h8300" - [(parallel [(set (reg:HI SP_REG) - (plus:HI (reg:HI SP_REG) (const_int -2))) - (set (mem:QI (plus:HI (reg:HI SP_REG) (const_int -1))) - (match_operand:QI 0 "register_operand" "r"))])] + [(set (reg:HI SP_REG) + (plus:HI (reg:HI SP_REG) (const_int -2))) + (set (mem:QI (plus:HI (reg:HI SP_REG) (const_int -1))) + (match_operand:QI 0 "register_operand" "r"))] "TARGET_H8300 && operands[0] != stack_pointer_rtx" "mov.w\\t%T0,@-r7" [(set_attr "length" "2")]) (define_insn "pushqi1_h8300hs" - [(parallel [(set (reg:SI SP_REG) - (plus:SI (reg:SI SP_REG) (const_int -4))) - (set (mem:QI (plus:SI (reg:SI SP_REG) (const_int -3))) - (match_operand:QI 0 "register_operand" "r"))])] + [(set (reg:SI SP_REG) + (plus:SI (reg:SI SP_REG) (const_int -4))) + (set (mem:QI (plus:SI (reg:SI SP_REG) (const_int -3))) + (match_operand:QI 0 "register_operand" "r"))] "(TARGET_H8300H || TARGET_H8300S) && operands[0] != stack_pointer_rtx" "mov.l\\t%S0,@-er7" [(set_attr "length" "4")]) (define_insn "pushqi1_h8300hs_normal" - [(parallel [(set (reg:HI SP_REG) - (plus:HI (reg:HI SP_REG) (const_int -4))) - (set (mem:QI (plus:HI (reg:HI SP_REG) (const_int -3))) - (match_operand:QI 0 "register_operand" "r"))])] + [(set (reg:HI SP_REG) + (plus:HI (reg:HI SP_REG) (const_int -4))) + (set (mem:QI (plus:HI (reg:HI SP_REG) (const_int -3))) + (match_operand:QI 0 "register_operand" "r"))] "(TARGET_H8300H || TARGET_H8300S) && operands[0] != stack_pointer_rtx" "mov.l\\t%S0,@-er7" @@ -236,20 +236,20 @@ "") (define_insn "pushhi1_h8300hs" - [(parallel [(set (reg:SI SP_REG) - (plus:SI (reg:SI SP_REG) (const_int -4))) - (set (mem:HI (plus:SI (reg:SI SP_REG) (const_int -2))) - (match_operand:HI 0 "register_operand" "r"))])] + [(set (reg:SI SP_REG) + (plus:SI (reg:SI SP_REG) (const_int -4))) + (set (mem:HI (plus:SI (reg:SI SP_REG) (const_int -2))) + (match_operand:HI 0 "register_operand" "r"))] "(TARGET_H8300H || TARGET_H8300S) && operands[0] != stack_pointer_rtx" "mov.l\\t%S0,@-er7" [(set_attr "length" "4")]) (define_insn "pushhi1_h8300hs_normal" - [(parallel [(set (reg:HI SP_REG) - (plus:HI (reg:HI SP_REG) (const_int -4))) - (set (mem:HI (plus:HI (reg:HI SP_REG) (const_int -2))) - (match_operand:HI 0 "register_operand" "r"))])] + [(set (reg:HI SP_REG) + (plus:HI (reg:HI SP_REG) (const_int -4))) + (set (mem:HI (plus:HI (reg:HI SP_REG) (const_int -2))) + (match_operand:HI 0 "register_operand" "r"))] "(TARGET_H8300H || TARGET_H8300S) && operands[0] != stack_pointer_rtx" "mov.l\\t%S0,@-er7" @@ -1879,13 +1879,12 @@ "") (define_insn "stm_h8300s_2_advanced" - [(parallel - [(set (reg:SI SP_REG) - (plus:SI (reg:SI SP_REG) (const_int -8))) - (set (mem:SI (plus:SI (reg:SI SP_REG) (const_int -4))) - (match_operand:SI 0 "register_operand" "")) - (set (mem:SI (plus:SI (reg:SI SP_REG) (const_int -8))) - (match_operand:SI 1 "register_operand" ""))])] + [(set (reg:SI SP_REG) + (plus:SI (reg:SI SP_REG) (const_int -8))) + (set (mem:SI (plus:SI (reg:SI SP_REG) (const_int -4))) + (match_operand:SI 0 "register_operand" "")) + (set (mem:SI (plus:SI (reg:SI SP_REG) (const_int -8))) + (match_operand:SI 1 "register_operand" ""))] "TARGET_H8300S && !TARGET_NORMAL_MODE && h8300_regs_ok_for_stm (2, operands)" "stm.l\\t%S0-%S1,@-er7" @@ -1893,13 +1892,12 @@ (set_attr "length" "4")]) (define_insn "stm_h8300s_2_normal" - [(parallel - [(set (reg:HI SP_REG) - (plus:HI (reg:HI SP_REG) (const_int -8))) - (set (mem:SI (plus:HI (reg:HI SP_REG) (const_int -4))) - (match_operand:SI 0 "register_operand" "")) - (set (mem:SI (plus:HI (reg:HI SP_REG) (const_int -8))) - (match_operand:SI 1 "register_operand" ""))])] + [(set (reg:HI SP_REG) + (plus:HI (reg:HI SP_REG) (const_int -8))) + (set (mem:SI (plus:HI (reg:HI SP_REG) (const_int -4))) + (match_operand:SI 0 "register_operand" "")) + (set (mem:SI (plus:HI (reg:HI SP_REG) (const_int -8))) + (match_operand:SI 1 "register_operand" ""))] "TARGET_H8300S && TARGET_NORMAL_MODE && h8300_regs_ok_for_stm (2, operands)" "stm.l\\t%S0-%S1,@-er7" @@ -1921,15 +1919,14 @@ }") (define_insn "stm_h8300s_3_advanced" - [(parallel - [(set (reg:SI SP_REG) - (plus:SI (reg:SI SP_REG) (const_int -12))) - (set (mem:SI (plus:SI (reg:SI SP_REG) (const_int -4))) - (match_operand:SI 0 "register_operand" "")) - (set (mem:SI (plus:SI (reg:SI SP_REG) (const_int -8))) - (match_operand:SI 1 "register_operand" "")) - (set (mem:SI (plus:SI (reg:SI SP_REG) (const_int -12))) - (match_operand:SI 2 "register_operand" ""))])] + [(set (reg:SI SP_REG) + (plus:SI (reg:SI SP_REG) (const_int -12))) + (set (mem:SI (plus:SI (reg:SI SP_REG) (const_int -4))) + (match_operand:SI 0 "register_operand" "")) + (set (mem:SI (plus:SI (reg:SI SP_REG) (const_int -8))) + (match_operand:SI 1 "register_operand" "")) + (set (mem:SI (plus:SI (reg:SI SP_REG) (const_int -12))) + (match_operand:SI 2 "register_operand" ""))] "TARGET_H8300S && !TARGET_NORMAL_MODE && h8300_regs_ok_for_stm (3, operands)" "stm.l\\t%S0-%S2,@-er7" @@ -1937,15 +1934,14 @@ (set_attr "length" "4")]) (define_insn "stm_h8300s_3_normal" - [(parallel - [(set (reg:HI SP_REG) - (plus:HI (reg:HI SP_REG) (const_int -12))) - (set (mem:SI (plus:HI (reg:HI SP_REG) (const_int -4))) - (match_operand:SI 0 "register_operand" "")) - (set (mem:SI (plus:HI (reg:HI SP_REG) (const_int -8))) - (match_operand:SI 1 "register_operand" "")) - (set (mem:SI (plus:HI (reg:HI SP_REG) (const_int -12))) - (match_operand:SI 2 "register_operand" ""))])] + [(set (reg:HI SP_REG) + (plus:HI (reg:HI SP_REG) (const_int -12))) + (set (mem:SI (plus:HI (reg:HI SP_REG) (const_int -4))) + (match_operand:SI 0 "register_operand" "")) + (set (mem:SI (plus:HI (reg:HI SP_REG) (const_int -8))) + (match_operand:SI 1 "register_operand" "")) + (set (mem:SI (plus:HI (reg:HI SP_REG) (const_int -12))) + (match_operand:SI 2 "register_operand" ""))] "TARGET_H8300S && TARGET_NORMAL_MODE && h8300_regs_ok_for_stm (3, operands)" "stm.l\\t%S0-%S2,@-er7" @@ -1970,17 +1966,16 @@ }") (define_insn "stm_h8300s_4_advanced" - [(parallel - [(set (reg:SI SP_REG) - (plus:SI (reg:SI SP_REG) (const_int -16))) - (set (mem:SI (plus:SI (reg:SI SP_REG) (const_int -4))) - (match_operand:SI 0 "register_operand" "")) - (set (mem:SI (plus:SI (reg:SI SP_REG) (const_int -8))) - (match_operand:SI 1 "register_operand" "")) - (set (mem:SI (plus:SI (reg:SI SP_REG) (const_int -12))) - (match_operand:SI 2 "register_operand" "")) - (set (mem:SI (plus:SI (reg:SI SP_REG) (const_int -16))) - (match_operand:SI 3 "register_operand" ""))])] + [(set (reg:SI SP_REG) + (plus:SI (reg:SI SP_REG) (const_int -16))) + (set (mem:SI (plus:SI (reg:SI SP_REG) (const_int -4))) + (match_operand:SI 0 "register_operand" "")) + (set (mem:SI (plus:SI (reg:SI SP_REG) (const_int -8))) + (match_operand:SI 1 "register_operand" "")) + (set (mem:SI (plus:SI (reg:SI SP_REG) (const_int -12))) + (match_operand:SI 2 "register_operand" "")) + (set (mem:SI (plus:SI (reg:SI SP_REG) (const_int -16))) + (match_operand:SI 3 "register_operand" ""))] "TARGET_H8300S && !TARGET_NORMAL_MODE && h8300_regs_ok_for_stm (4, operands)" "stm.l\\t%S0-%S3,@-er7" @@ -1988,17 +1983,16 @@ (set_attr "length" "4")]) (define_insn "stm_h8300s_4_normal" - [(parallel - [(set (reg:HI SP_REG) - (plus:HI (reg:HI SP_REG) (const_int -16))) - (set (mem:SI (plus:HI (reg:HI SP_REG) (const_int -4))) - (match_operand:SI 0 "register_operand" "")) - (set (mem:SI (plus:HI (reg:HI SP_REG) (const_int -8))) - (match_operand:SI 1 "register_operand" "")) - (set (mem:SI (plus:HI (reg:HI SP_REG) (const_int -12))) - (match_operand:SI 2 "register_operand" "")) - (set (mem:SI (plus:HI (reg:HI SP_REG) (const_int -16))) - (match_operand:SI 3 "register_operand" ""))])] + [(set (reg:HI SP_REG) + (plus:HI (reg:HI SP_REG) (const_int -16))) + (set (mem:SI (plus:HI (reg:HI SP_REG) (const_int -4))) + (match_operand:SI 0 "register_operand" "")) + (set (mem:SI (plus:HI (reg:HI SP_REG) (const_int -8))) + (match_operand:SI 1 "register_operand" "")) + (set (mem:SI (plus:HI (reg:HI SP_REG) (const_int -12))) + (match_operand:SI 2 "register_operand" "")) + (set (mem:SI (plus:HI (reg:HI SP_REG) (const_int -16))) + (match_operand:SI 3 "register_operand" ""))] "TARGET_H8300S && TARGET_NORMAL_MODE && h8300_regs_ok_for_stm (4, operands)" "stm.l\\t%S0-%S3,@-er7" @@ -2024,13 +2018,12 @@ }") (define_insn "ldm_h8300s_2_advanced" - [(parallel - [(set (reg:SI SP_REG) - (plus:SI (reg:SI SP_REG) (const_int 8))) - (set (mem:SI (plus:SI (reg:SI SP_REG) (const_int 4))) - (match_operand:SI 0 "register_operand" "")) - (set (mem:SI (reg:SI SP_REG)) - (match_operand:SI 1 "register_operand" ""))])] + [(set (reg:SI SP_REG) + (plus:SI (reg:SI SP_REG) (const_int 8))) + (set (mem:SI (plus:SI (reg:SI SP_REG) (const_int 4))) + (match_operand:SI 0 "register_operand" "")) + (set (mem:SI (reg:SI SP_REG)) + (match_operand:SI 1 "register_operand" ""))] "TARGET_H8300S && !TARGET_NORMAL_MODE && h8300_regs_ok_for_stm (2, operands)" "ldm.l\\t@er7+,%S0-%S1" @@ -2038,13 +2031,12 @@ (set_attr "length" "4")]) (define_insn "ldm_h8300s_2_normal" - [(parallel - [(set (reg:HI SP_REG) - (plus:HI (reg:HI SP_REG) (const_int 8))) - (set (mem:SI (plus:HI (reg:HI SP_REG) (const_int 4))) - (match_operand:SI 0 "register_operand" "")) - (set (mem:SI (reg:HI SP_REG)) - (match_operand:SI 1 "register_operand" ""))])] + [(set (reg:HI SP_REG) + (plus:HI (reg:HI SP_REG) (const_int 8))) + (set (mem:SI (plus:HI (reg:HI SP_REG) (const_int 4))) + (match_operand:SI 0 "register_operand" "")) + (set (mem:SI (reg:HI SP_REG)) + (match_operand:SI 1 "register_operand" ""))] "TARGET_H8300S && TARGET_NORMAL_MODE && h8300_regs_ok_for_stm (2, operands)" "ldm.l\\t@er7+,%S0-%S1" @@ -2066,15 +2058,14 @@ }") (define_insn "ldm_h8300s_3_advanced" - [(parallel - [(set (reg:SI SP_REG) - (plus:SI (reg:SI SP_REG) (const_int 12))) - (set (mem:SI (plus:SI (reg:SI SP_REG) (const_int 8))) - (match_operand:SI 0 "register_operand" "")) - (set (mem:SI (plus:SI (reg:SI SP_REG) (const_int 4))) - (match_operand:SI 1 "register_operand" "")) - (set (mem:SI (reg:SI SP_REG)) - (match_operand:SI 2 "register_operand" ""))])] + [(set (reg:SI SP_REG) + (plus:SI (reg:SI SP_REG) (const_int 12))) + (set (mem:SI (plus:SI (reg:SI SP_REG) (const_int 8))) + (match_operand:SI 0 "register_operand" "")) + (set (mem:SI (plus:SI (reg:SI SP_REG) (const_int 4))) + (match_operand:SI 1 "register_operand" "")) + (set (mem:SI (reg:SI SP_REG)) + (match_operand:SI 2 "register_operand" ""))] "TARGET_H8300S && !TARGET_NORMAL_MODE && h8300_regs_ok_for_stm (3, operands)" "ldm.l\\t@er7+,%S0-%S2" @@ -2082,15 +2073,14 @@ (set_attr "length" "4")]) (define_insn "ldm_h8300s_3_normal" - [(parallel - [(set (reg:HI SP_REG) - (plus:HI (reg:HI SP_REG) (const_int 12))) - (set (mem:SI (plus:HI (reg:HI SP_REG) (const_int 8))) - (match_operand:SI 0 "register_operand" "")) - (set (mem:SI (plus:HI (reg:HI SP_REG) (const_int 4))) - (match_operand:SI 1 "register_operand" "")) - (set (mem:SI (reg:HI SP_REG)) - (match_operand:SI 2 "register_operand" ""))])] + [(set (reg:HI SP_REG) + (plus:HI (reg:HI SP_REG) (const_int 12))) + (set (mem:SI (plus:HI (reg:HI SP_REG) (const_int 8))) + (match_operand:SI 0 "register_operand" "")) + (set (mem:SI (plus:HI (reg:HI SP_REG) (const_int 4))) + (match_operand:SI 1 "register_operand" "")) + (set (mem:SI (reg:HI SP_REG)) + (match_operand:SI 2 "register_operand" ""))] "TARGET_H8300S && TARGET_NORMAL_MODE && h8300_regs_ok_for_stm (3, operands)" "ldm.l\\t@er7+,%S0-%S2" @@ -2115,17 +2105,16 @@ }") (define_insn "ldm_h8300s_4_advanced" - [(parallel - [(set (reg:SI SP_REG) - (plus:SI (reg:SI SP_REG) (const_int 16))) - (set (mem:SI (plus:SI (reg:SI SP_REG) (const_int 12))) - (match_operand:SI 0 "register_operand" "")) - (set (mem:SI (plus:SI (reg:SI SP_REG) (const_int 8))) - (match_operand:SI 1 "register_operand" "")) - (set (mem:SI (plus:SI (reg:SI SP_REG) (const_int 4))) - (match_operand:SI 2 "register_operand" "")) - (set (mem:SI (reg:SI SP_REG)) - (match_operand:SI 3 "register_operand" ""))])] + [(set (reg:SI SP_REG) + (plus:SI (reg:SI SP_REG) (const_int 16))) + (set (mem:SI (plus:SI (reg:SI SP_REG) (const_int 12))) + (match_operand:SI 0 "register_operand" "")) + (set (mem:SI (plus:SI (reg:SI SP_REG) (const_int 8))) + (match_operand:SI 1 "register_operand" "")) + (set (mem:SI (plus:SI (reg:SI SP_REG) (const_int 4))) + (match_operand:SI 2 "register_operand" "")) + (set (mem:SI (reg:SI SP_REG)) + (match_operand:SI 3 "register_operand" ""))] "TARGET_H8300S && !TARGET_NORMAL_MODE && h8300_regs_ok_for_stm (4, operands)" "ldm.l\\t@er7+,%S0-%S3" @@ -2133,17 +2122,16 @@ (set_attr "length" "4")]) (define_insn "ldm_h8300s_4_normal" - [(parallel - [(set (reg:HI SP_REG) - (plus:HI (reg:HI SP_REG) (const_int 16))) - (set (mem:SI (plus:HI (reg:HI SP_REG) (const_int 12))) - (match_operand:SI 0 "register_operand" "")) - (set (mem:SI (plus:HI (reg:HI SP_REG) (const_int 8))) - (match_operand:SI 1 "register_operand" "")) - (set (mem:SI (plus:HI (reg:HI SP_REG) (const_int 4))) - (match_operand:SI 2 "register_operand" "")) - (set (mem:SI (reg:HI SP_REG)) - (match_operand:SI 3 "register_operand" ""))])] + [(set (reg:HI SP_REG) + (plus:HI (reg:HI SP_REG) (const_int 16))) + (set (mem:SI (plus:HI (reg:HI SP_REG) (const_int 12))) + (match_operand:SI 0 "register_operand" "")) + (set (mem:SI (plus:HI (reg:HI SP_REG) (const_int 8))) + (match_operand:SI 1 "register_operand" "")) + (set (mem:SI (plus:HI (reg:HI SP_REG) (const_int 4))) + (match_operand:SI 2 "register_operand" "")) + (set (mem:SI (reg:HI SP_REG)) + (match_operand:SI 3 "register_operand" ""))] "TARGET_H8300S && !TARGET_NORMAL_MODE && h8300_regs_ok_for_stm (4, operands)" "ldm.l\\t@er7+,%S0-%S3" @@ -2536,12 +2524,11 @@ ;; the shift count dies, then we just use that register. (define_split - [(parallel - [(set (match_operand 0 "register_operand" "") - (match_operator 2 "nshift_operator" - [(match_dup 0) - (match_operand:QI 1 "register_operand" "")])) - (clobber (match_operand:QI 3 "register_operand" ""))])] + [(set (match_operand 0 "register_operand" "") + (match_operator 2 "nshift_operator" + [(match_dup 0) + (match_operand:QI 1 "register_operand" "")])) + (clobber (match_operand:QI 3 "register_operand" ""))] "flow2_completed && find_regno_note (insn, REG_DEAD, REGNO (operands[1]))" [(set (cc0) @@ -2568,12 +2555,11 @@ operands[5] = gen_label_rtx ();") (define_split - [(parallel - [(set (match_operand 0 "register_operand" "") - (match_operator 2 "nshift_operator" - [(match_dup 0) - (match_operand:QI 1 "register_operand" "")])) - (clobber (match_operand:QI 3 "register_operand" ""))])] + [(set (match_operand 0 "register_operand" "") + (match_operator 2 "nshift_operator" + [(match_dup 0) + (match_operand:QI 1 "register_operand" "")])) + (clobber (match_operand:QI 3 "register_operand" ""))] "flow2_completed && !find_regno_note (insn, REG_DEAD, REGNO (operands[1]))" [(set (match_dup 3) @@ -3339,12 +3325,11 @@ "#") (define_split - [(parallel - [(set (match_operand:SI 0 "register_operand" "") - (ior:SI (ashift:SI (match_operand:SI 1 "register_operand" "") - (const_int 23)) - (match_dup 0))) - (clobber (match_operand:SI 2 "register_operand" ""))])] + [(set (match_operand:SI 0 "register_operand" "") + (ior:SI (ashift:SI (match_operand:SI 1 "register_operand" "") + (const_int 23)) + (match_dup 0))) + (clobber (match_operand:SI 2 "register_operand" ""))] "(TARGET_H8300H || TARGET_H8300S) && flow2_completed && find_regno_note (insn, REG_DEAD, REGNO (operands[1])) @@ -3360,12 +3345,11 @@ "operands[3] = gen_rtx_REG (HImode, REGNO (operands[1]));") (define_split - [(parallel - [(set (match_operand:SI 0 "register_operand" "") - (ior:SI (ashift:SI (match_operand:SI 1 "register_operand" "") - (const_int 23)) - (match_dup 0))) - (clobber (match_operand:SI 2 "register_operand" ""))])] + [(set (match_operand:SI 0 "register_operand" "") + (ior:SI (ashift:SI (match_operand:SI 1 "register_operand" "") + (const_int 23)) + (match_dup 0))) + (clobber (match_operand:SI 2 "register_operand" ""))] "(TARGET_H8300H || TARGET_H8300S) && flow2_completed && !(find_regno_note (insn, REG_DEAD, REGNO (operands[1])) @@ -3444,12 +3428,11 @@ "#") (define_split - [(parallel - [(set (match_operand:SI 0 "register_operand" "") - (plus:SI (mult:SI (match_operand:SI 1 "register_operand" "") - (const_int 8388608)) - (match_dup 0))) - (clobber (match_operand:SI 2 "register_operand" ""))])] + [(set (match_operand:SI 0 "register_operand" "") + (plus:SI (mult:SI (match_operand:SI 1 "register_operand" "") + (const_int 8388608)) + (match_dup 0))) + (clobber (match_operand:SI 2 "register_operand" ""))] "(TARGET_H8300H || TARGET_H8300S) && flow2_completed && find_regno_note (insn, REG_DEAD, REGNO (operands[1])) @@ -3465,12 +3448,11 @@ "operands[3] = gen_rtx_REG (HImode, REGNO (operands[1]));") (define_split - [(parallel - [(set (match_operand:SI 0 "register_operand" "") - (plus:SI (mult:SI (match_operand:SI 1 "register_operand" "") - (const_int 8388608)) - (match_dup 0))) - (clobber (match_operand:SI 2 "register_operand" ""))])] + [(set (match_operand:SI 0 "register_operand" "") + (plus:SI (mult:SI (match_operand:SI 1 "register_operand" "") + (const_int 8388608)) + (match_dup 0))) + (clobber (match_operand:SI 2 "register_operand" ""))] "(TARGET_H8300H || TARGET_H8300S) && flow2_completed && !(find_regno_note (insn, REG_DEAD, REGNO (operands[1])) |