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| author | Jakub Jelinek <jakub@redhat.com> | 2022-06-13 10:53:33 +0200 |
|---|---|---|
| committer | Jakub Jelinek <jakub@redhat.com> | 2022-06-13 10:54:22 +0200 |
| commit | 13ea4a6e830da1f245136601e636dec62e74d1a7 (patch) | |
| tree | 8dfbe312aedc9df5e5eca2ff5a47c14d091282bd | |
| parent | 033e5ee3c4a2c841ff24e3bf3fc5324ea9cc373c (diff) | |
| download | gcc-13ea4a6e830da1f245136601e636dec62e74d1a7.zip gcc-13ea4a6e830da1f245136601e636dec62e74d1a7.tar.gz gcc-13ea4a6e830da1f245136601e636dec62e74d1a7.tar.bz2 | |
i386: Fix up *<dwi>3_doubleword_mask [PR105911]
Another regression caused by my recent patch.
This time because define_insn_and_split only requires that the
constant mask is const_int_operand. When it was only SImode,
that wasn't a problem, HImode neither, but for DImode if we need
to and the shift count we might run into a problem that it isn't
a representable signed 32-bit immediate.
But, we don't really care about the upper bits of the mask, so
we can just mask the CONST_INT with the mode mask.
2022-06-13 Jakub Jelinek <jakub@redhat.com>
PR target/105911
* config/i386/i386.md (*ashl<dwi>3_doubleword_mask,
*<insn><dwi>3_doubleword_mask): Use operands[3] masked with
(<MODE_SIZE> * BITS_PER_UNIT) - 1 as AND operand instead of
operands[3] unmodified.
* gcc.dg/pr105911.c: New test.
| -rw-r--r-- | gcc/config/i386/i386.md | 6 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.dg/pr105911.c | 16 |
2 files changed, 20 insertions, 2 deletions
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 5b53841..3093cb5 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -11937,7 +11937,8 @@ rtx xops[3]; xops[0] = gen_reg_rtx (GET_MODE (operands[2])); xops[1] = operands[2]; - xops[2] = operands[3]; + xops[2] = GEN_INT (INTVAL (operands[3]) + & ((<MODE_SIZE> * BITS_PER_UNIT) - 1)); ix86_expand_binary_operator (AND, GET_MODE (operands[2]), xops); operands[2] = xops[0]; } @@ -12905,7 +12906,8 @@ rtx xops[3]; xops[0] = gen_reg_rtx (GET_MODE (operands[2])); xops[1] = operands[2]; - xops[2] = operands[3]; + xops[2] = GEN_INT (INTVAL (operands[3]) + & ((<MODE_SIZE> * BITS_PER_UNIT) - 1)); ix86_expand_binary_operator (AND, GET_MODE (operands[2]), xops); operands[2] = xops[0]; } diff --git a/gcc/testsuite/gcc.dg/pr105911.c b/gcc/testsuite/gcc.dg/pr105911.c new file mode 100644 index 0000000..55df3f1 --- /dev/null +++ b/gcc/testsuite/gcc.dg/pr105911.c @@ -0,0 +1,16 @@ +/* PR target/105911 */ +/* { dg-do compile { target int128 } } */ +/* { dg-options "-O2" } */ + +__int128 v, x; +unsigned __int128 w; + +void bar (__int128, __int128); + +void +foo (void) +{ + bar (v /= v, v >> (v &= 0x100000001)); + bar (w /= w, w >> (w &= 0x300000003)); + bar (x /= x, x << (x &= 0x700000007)); +} |