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| author | Lin Zuojian <manjian2006@gmail.com> | 2014-04-22 05:55:40 +0000 |
|---|---|---|
| committer | Jakub Jelinek <jakub@gcc.gnu.org> | 2014-04-22 07:55:40 +0200 |
| commit | e5dcd6954a1b6236e0d37d2a8fb31a13c25150ad (patch) | |
| tree | 36352461df132eef6f972e42a369651f69061d37 | |
| parent | f8c503f0941a59fb27677b017b727a55a247e915 (diff) | |
| download | gcc-e5dcd6954a1b6236e0d37d2a8fb31a13c25150ad.zip gcc-e5dcd6954a1b6236e0d37d2a8fb31a13c25150ad.tar.gz gcc-e5dcd6954a1b6236e0d37d2a8fb31a13c25150ad.tar.bz2 | |
re PR middle-end/60281 (Address Sanitizer triggers alignment fault in ARM machines)
PR middle-end/60281
* asan.c (asan_emit_stack_protection): Force the base to align to
appropriate bits if STRICT_ALIGNMENT. Set shadow_mem align to
appropriate bits if STRICT_ALIGNMENT.
* cfgexpand.c (expand_stack_vars): Set base_align appropriately
when asan is on.
(expand_used_vars): Leave a space in the stack frame for alignment
if STRICT_ALIGNMENT.
From-SVN: r209554
| -rw-r--r-- | gcc/ChangeLog | 11 | ||||
| -rw-r--r-- | gcc/asan.c | 15 | ||||
| -rw-r--r-- | gcc/cfgexpand.c | 18 |
3 files changed, 42 insertions, 2 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index b40f008..577f4bd 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,14 @@ +2014-04-22 Lin Zuojian <manjian2006@gmail.com> + + PR middle-end/60281 + * asan.c (asan_emit_stack_protection): Force the base to align to + appropriate bits if STRICT_ALIGNMENT. Set shadow_mem align to + appropriate bits if STRICT_ALIGNMENT. + * cfgexpand.c (expand_stack_vars): Set base_align appropriately + when asan is on. + (expand_used_vars): Leave a space in the stack frame for alignment + if STRICT_ALIGNMENT. + 2014-04-21 David Malcolm <dmalcolm@redhat.com> * gimple.h (gimple_assign_single_p): Accept a const_gimple rather @@ -1017,8 +1017,17 @@ asan_emit_stack_protection (rtx base, rtx pbase, unsigned int alignb, base_align_bias = ((asan_frame_size + alignb - 1) & ~(alignb - HOST_WIDE_INT_1)) - asan_frame_size; } + /* Align base if target is STRICT_ALIGNMENT. */ + if (STRICT_ALIGNMENT) + base = expand_binop (Pmode, and_optab, base, + gen_int_mode (-((GET_MODE_ALIGNMENT (SImode) + << ASAN_SHADOW_SHIFT) + / BITS_PER_UNIT), Pmode), NULL_RTX, + 1, OPTAB_DIRECT); + if (use_after_return_class == -1 && pbase) emit_move_insn (pbase, base); + base = expand_binop (Pmode, add_optab, base, gen_int_mode (base_offset - base_align_bias, Pmode), NULL_RTX, 1, OPTAB_DIRECT); @@ -1097,6 +1106,8 @@ asan_emit_stack_protection (rtx base, rtx pbase, unsigned int alignb, && (ASAN_RED_ZONE_SIZE >> ASAN_SHADOW_SHIFT) == 4); shadow_mem = gen_rtx_MEM (SImode, shadow_base); set_mem_alias_set (shadow_mem, asan_shadow_set); + if (STRICT_ALIGNMENT) + set_mem_align (shadow_mem, (GET_MODE_ALIGNMENT (SImode))); prev_offset = base_offset; for (l = length; l; l -= 2) { @@ -1186,6 +1197,10 @@ asan_emit_stack_protection (rtx base, rtx pbase, unsigned int alignb, shadow_mem = gen_rtx_MEM (BLKmode, shadow_base); set_mem_alias_set (shadow_mem, asan_shadow_set); + + if (STRICT_ALIGNMENT) + set_mem_align (shadow_mem, (GET_MODE_ALIGNMENT (SImode))); + prev_offset = base_offset; last_offset = base_offset; last_size = 0; diff --git a/gcc/cfgexpand.c b/gcc/cfgexpand.c index f2fd5fc..78eca25 100644 --- a/gcc/cfgexpand.c +++ b/gcc/cfgexpand.c @@ -1013,10 +1013,19 @@ expand_stack_vars (bool (*pred) (size_t), struct stack_vars_data *data) if (data->asan_base == NULL) data->asan_base = gen_reg_rtx (Pmode); base = data->asan_base; + + if (!STRICT_ALIGNMENT) + base_align = crtl->max_used_stack_slot_alignment; + else + base_align = MAX (crtl->max_used_stack_slot_alignment, + GET_MODE_ALIGNMENT (SImode) + << ASAN_SHADOW_SHIFT); } else - offset = alloc_stack_frame_space (stack_vars[i].size, alignb); - base_align = crtl->max_used_stack_slot_alignment; + { + offset = alloc_stack_frame_space (stack_vars[i].size, alignb); + base_align = crtl->max_used_stack_slot_alignment; + } } else { @@ -1845,6 +1854,11 @@ expand_used_vars (void) = alloc_stack_frame_space (redzonesz, ASAN_RED_ZONE_SIZE); data.asan_vec.safe_push (prev_offset); data.asan_vec.safe_push (offset); + /* Leave space for alignment if STRICT_ALIGNMENT. */ + if (STRICT_ALIGNMENT) + alloc_stack_frame_space ((GET_MODE_ALIGNMENT (SImode) + << ASAN_SHADOW_SHIFT) + / BITS_PER_UNIT, 1); var_end_seq = asan_emit_stack_protection (virtual_stack_vars_rtx, |