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| author | Christophe Lyon <christophe.lyon@linaro.org> | 2020-09-07 14:53:38 +0000 |
|---|---|---|
| committer | Christophe Lyon <christophe.lyon@linaro.org> | 2020-09-30 14:55:45 +0000 |
| commit | ef11f5b37b0a62dbad9ed37613a3799dc98f6f8b (patch) | |
| tree | cd6f702d697954354ea3ea10a418f89795b6ebd1 | |
| parent | 9ff2bcd9df8f189dcc94e3bef33f7f282dcaa780 (diff) | |
| download | gcc-ef11f5b37b0a62dbad9ed37613a3799dc98f6f8b.zip gcc-ef11f5b37b0a62dbad9ed37613a3799dc98f6f8b.tar.gz gcc-ef11f5b37b0a62dbad9ed37613a3799dc98f6f8b.tar.bz2 | |
arm: [testsuite] Skip thumb2-cond-cmp tests on Cortex-M [PR94595]
Since r204778 (g571880a0a4c512195aa7d41929ba6795190887b2), we favor
branches over IT blocks on Cortex-M. As a result, instead of
generating two nested IT blocks in thumb2-cond-cmp-[1234].c, we
generate either a single IT block, or use branches depending on
conditions tested by the program.
Since this was a deliberate change and the tests still pass as
expected on Cortex-A, this patch skips them when targetting
Cortex-M. The avoids the failures on Cortex M3, M4, and M33. This
patch makes the testcases unsupported on Cortex-M7 although they pass
in this case because this CPU has different branch costs.
I tried to relax the scan-assembler directives using eg. cmpne|subne
or cmpgt|ble but that seemed fragile.
2020-09-07 Christophe Lyon <christophe.lyon@linaro.org>
gcc/testsuite/
PR target/94595
* gcc.target/arm/thumb2-cond-cmp-1.c: Skip if arm_cortex_m.
* gcc.target/arm/thumb2-cond-cmp-2.c: Skip if arm_cortex_m.
* gcc.target/arm/thumb2-cond-cmp-3.c: Skip if arm_cortex_m.
* gcc.target/arm/thumb2-cond-cmp-4.c: Skip if arm_cortex_m.
4 files changed, 4 insertions, 4 deletions
diff --git a/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-1.c b/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-1.c index 45ab605..36204f4 100644 --- a/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-1.c +++ b/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-1.c @@ -1,6 +1,6 @@ /* Use conditional compare */ /* { dg-options "-O2" } */ -/* { dg-skip-if "" { arm_thumb1_ok } } */ +/* { dg-skip-if "" { arm_thumb1_ok || arm_cortex_m } } */ /* { dg-final { scan-assembler "cmpne" } } */ int f(int i, int j) diff --git a/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-2.c b/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-2.c index 17d9a8f..108d1c3 100644 --- a/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-2.c +++ b/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-2.c @@ -1,6 +1,6 @@ /* Use conditional compare */ /* { dg-options "-O2" } */ -/* { dg-skip-if "" { arm_thumb1_ok } } */ +/* { dg-skip-if "" { arm_thumb1_ok || arm_cortex_m } } */ /* { dg-final { scan-assembler "cmpeq" } } */ int f(int i, int j) diff --git a/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-3.c b/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-3.c index 6b2a79b..ca7fd9f 100644 --- a/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-3.c +++ b/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-3.c @@ -1,6 +1,6 @@ /* Use conditional compare */ /* { dg-options "-O2" } */ -/* { dg-skip-if "" { arm_thumb1_ok } } */ +/* { dg-skip-if "" { arm_thumb1_ok || arm_cortex_m } } */ /* { dg-final { scan-assembler "cmpgt" } } */ int f(int i, int j) diff --git a/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-4.c b/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-4.c index 80e1076..91cc8f4 100644 --- a/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-4.c +++ b/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-4.c @@ -1,6 +1,6 @@ /* Use conditional compare */ /* { dg-options "-O2" } */ -/* { dg-skip-if "" { arm_thumb1_ok } } */ +/* { dg-skip-if "" { arm_thumb1_ok || arm_cortex_m } } */ /* { dg-final { scan-assembler "cmpgt" } } */ int f(int i, int j) |