diff options
| author | Fariborz Jahanian <fjahanian@apple.com> | 2004-02-23 18:40:46 +0000 |
|---|---|---|
| committer | Fariborz Jahanian <fjahanian@gcc.gnu.org> | 2004-02-23 18:40:46 +0000 |
| commit | e91fa876a6225c6fd5670501b8cc57b4fd0219fb (patch) | |
| tree | b291cf81543631bc27f8c32aad507d90946c9a6a | |
| parent | ae6669e727cd319ac2325707afdaa689dee43fcc (diff) | |
| download | gcc-e91fa876a6225c6fd5670501b8cc57b4fd0219fb.zip gcc-e91fa876a6225c6fd5670501b8cc57b4fd0219fb.tar.gz gcc-e91fa876a6225c6fd5670501b8cc57b4fd0219fb.tar.bz2 | |
config/rs6000/rs6000.c (function_arg): call to rs6000_mixed_function_arg for...
config/rs6000/rs6000.c (function_arg): call to
rs6000_mixed_function_arg for DFmode moved to allow
normal DFmode incoming register assignment.
OKed by David Edehlson.
From-SVN: r78323
| -rw-r--r-- | gcc/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/config/rs6000/rs6000.c | 6 |
2 files changed, 10 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index e3f64fc..2a702bf 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2004-02-23 Fariborz Jahanian <fjahanian@apple.com> + * config/rs6000/rs6000.c (function_arg): call to + rs6000_mixed_function_arg for DFmode moved to allow + normal DFmode incoming register assignment. + 2004-02-23 Dale Johannesen <dalej@apple.com> * config/rs6000.md (movsf_hardfloat): Accept CTR-to-CTR copy. diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index df30bcb..172da41 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -4395,7 +4395,7 @@ function_arg (CUMULATIVE_ARGS *cum, enum machine_mode mode, return NULL_RTX; if (TARGET_32BIT && TARGET_POWERPC64 - && (mode == DFmode || mode == DImode || mode == BLKmode)) + && (mode == DImode || mode == BLKmode)) return rs6000_mixed_function_arg (cum, mode, type, align_words); if (USE_FP_FOR_ARG_P (cum, mode, type)) @@ -4410,6 +4410,10 @@ function_arg (CUMULATIVE_ARGS *cum, enum machine_mode mode, || (align_words < GP_ARG_NUM_REG)))) return gen_rtx_REG (mode, cum->fregno); + if (TARGET_32BIT && TARGET_POWERPC64 + && mode == DFmode && cum->stdarg) + return rs6000_mixed_function_arg (cum, mode, type, align_words); + return gen_rtx_PARALLEL (mode, gen_rtvec (2, gen_rtx_EXPR_LIST (VOIDmode, |