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| author | Ruan Beihong <ruanbeihong@gmail.com> | 2009-02-17 20:26:22 +0000 |
|---|---|---|
| committer | Richard Sandiford <rsandifo@gcc.gnu.org> | 2009-02-17 20:26:22 +0000 |
| commit | e69ff91041c78360e9284f39f08a3cde66bd2ab3 (patch) | |
| tree | a0e9ec2d8e1c2aee04a3b70739f73165ea73006f | |
| parent | 883935fd2043f4dfd772e6c1bca3c3d33fd6eb59 (diff) | |
| download | gcc-e69ff91041c78360e9284f39f08a3cde66bd2ab3.zip gcc-e69ff91041c78360e9284f39f08a3cde66bd2ab3.tar.gz gcc-e69ff91041c78360e9284f39f08a3cde66bd2ab3.tar.bz2 | |
2009-02-xx Ruan Beihong <ruanbeihong@gmail.com> Richard Sandiford <rdsandiford@googlemail.com>
gcc/
2009-02-xx Ruan Beihong <ruanbeihong@gmail.com>
Richard Sandiford <rdsandiford@googlemail.com>
* config/mips/mips.c (CODE_FOR_loongson_biadd): Delete.
* config/mips/loongson.md (reduc_uplus_<mode>): Rename to...
(loongson_biadd): ...this.
Co-Authored-By: Richard Sandiford <rdsandiford@googlemail.com>
From-SVN: r144243
| -rw-r--r-- | gcc/ChangeLog | 7 | ||||
| -rw-r--r-- | gcc/config/mips/loongson.md | 2 | ||||
| -rw-r--r-- | gcc/config/mips/mips.c | 1 |
3 files changed, 8 insertions, 2 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 6947e99..de0bfe3 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2009-02-17 Ruan Beihong <ruanbeihong@gmail.com> + Richard Sandiford <rdsandiford@googlemail.com> + + * config/mips/mips.c (CODE_FOR_loongson_biadd): Delete. + * config/mips/loongson.md (reduc_uplus_<mode>): Rename to... + (loongson_biadd): ...this. + 2009-02-17 Richard Guenther <rguenther@suse.de> PR tree-optimization/39202 diff --git a/gcc/config/mips/loongson.md b/gcc/config/mips/loongson.md index 8cdb5f4..8febfd7 100644 --- a/gcc/config/mips/loongson.md +++ b/gcc/config/mips/loongson.md @@ -358,7 +358,7 @@ [(set_attr "type" "fadd")]) ;; Sum of unsigned byte integers. -(define_insn "reduc_uplus_<mode>" +(define_insn "loongson_biadd" [(set (match_operand:<V_stretch_half> 0 "register_operand" "=f") (unspec:<V_stretch_half> [(match_operand:VB 1 "register_operand" "f")] UNSPEC_LOONGSON_BIADD))] diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c index c98528e..c69423f 100644 --- a/gcc/config/mips/mips.c +++ b/gcc/config/mips/mips.c @@ -11253,7 +11253,6 @@ AVAIL_NON_MIPS16 (cache, TARGET_CACHE_BUILTIN) #define CODE_FOR_loongson_pminub CODE_FOR_uminv8qi3 #define CODE_FOR_loongson_pmulhuh CODE_FOR_umulv4hi3_highpart #define CODE_FOR_loongson_pmulhh CODE_FOR_smulv4hi3_highpart -#define CODE_FOR_loongson_biadd CODE_FOR_reduc_uplus_v8qi #define CODE_FOR_loongson_psubw CODE_FOR_subv2si3 #define CODE_FOR_loongson_psubh CODE_FOR_subv4hi3 #define CODE_FOR_loongson_psubb CODE_FOR_subv8qi3 |