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authorRichard Sandiford <richard.sandiford@arm.com>2019-11-21 12:03:54 +0000
committerRichard Sandiford <rsandifo@gcc.gnu.org>2019-11-21 12:03:54 +0000
commite2a05fdfd4798192493c582ec6528c975bfa9b0c (patch)
tree1686cd4262178447008d9bc54e83117e9eee2e8d
parent01a0fba62602d008fe838aafa0ee5b1b35369e06 (diff)
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[AArch64] Add -fno-vect-cost-model to sve2/whilerw_1.c
Bumping the cost of vec_to_scalar made the .s loop in gcc.target/aarch64/sve2/whilerw_1.c use a runtime profitability check, like the .d version already did. Since the cost model isn't really being tested here, the most robust fix seemed to be to disable it, which I should really have done from the outset. 2019-11-21 Richard Sandiford <richard.sandiford@arm.com> gcc/testsuite/ * gcc.target/aarch64/sve2/whilerw_1.c: Add -fno-vect-cost-model. Require x0 in the .d test too. From-SVN: r278549
-rw-r--r--gcc/testsuite/ChangeLog5
-rw-r--r--gcc/testsuite/gcc.target/aarch64/sve2/whilerw_1.c4
2 files changed, 7 insertions, 2 deletions
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 7ff0ce7..0da0995 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2019-11-21 Richard Sandiford <richard.sandiford@arm.com>
+
+ * gcc.target/aarch64/sve2/whilerw_1.c: Add -fno-vect-cost-model.
+ Require x0 in the .d test too.
+
2019-11-21 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/91355
diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/whilerw_1.c b/gcc/testsuite/gcc.target/aarch64/sve2/whilerw_1.c
index 63a6d2f..213ba3e 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve2/whilerw_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve2/whilerw_1.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O2 -ftree-vectorize" } */
+/* { dg-options "-O2 -ftree-vectorize -fno-vect-cost-model" } */
/* { dg-require-effective-target lp64 } */
#include <stdint.h>
@@ -26,5 +26,5 @@ TEST_LOOP (int64_t);
/* { dg-final { scan-assembler-times {\twhilerw\tp[0-9]+\.b, x0, x1\n} 1 } } */
/* { dg-final { scan-assembler-times {\twhilerw\tp[0-9]+\.h, x0, x1\n} 1 } } */
/* { dg-final { scan-assembler-times {\twhilerw\tp[0-9]+\.s, x0, x1\n} 1 } } */
-/* { dg-final { scan-assembler-times {\twhilerw\tp[0-9]+\.d, x[0-9]+, x1\n} 1 } } */
+/* { dg-final { scan-assembler-times {\twhilerw\tp[0-9]+\.d, x0, x1\n} 1 } } */
/* { dg-final { scan-assembler-not {\twhilewr\t} } } */