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authorHongyu Wang <hongyu.wang@intel.com>2022-02-28 15:09:59 +0800
committerHongyu Wang <hongyu.wang@intel.com>2022-03-01 09:33:35 +0800
commite2385690a3ead66744e51115966f25f9c05bb3e2 (patch)
treec1eb25fc064e54de232183a701663ce751810b2c
parenta35f16971b4ba047779ec8a3723dd1bfd9ecdf3d (diff)
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i386: Fix V8HF vector init under -mno-avx [PR 104664]
For V8HFmode vector init with HFmode, do not directly emits V8HF move with subreg, which may cause reload to assign general register to move src. gcc/ChangeLog: PR target/104664 * config/i386/i386-expand.cc (ix86_expand_vector_init_duplicate): Use vec_setv8hf_0 for HF to V8HFmode move instead of subreg. gcc/testsuite/ChangeLog: PR target/104664 * gcc.target/i386/pr104664.c: New test.
-rw-r--r--gcc/config/i386/i386-expand.cc7
-rw-r--r--gcc/testsuite/gcc.target/i386/pr104664.c16
2 files changed, 22 insertions, 1 deletions
diff --git a/gcc/config/i386/i386-expand.cc b/gcc/config/i386/i386-expand.cc
index faa0191..530f83f 100644
--- a/gcc/config/i386/i386-expand.cc
+++ b/gcc/config/i386/i386-expand.cc
@@ -14899,7 +14899,12 @@ ix86_expand_vector_init_duplicate (bool mmx_ok, machine_mode mode,
dperm.one_operand_p = true;
if (mode == V8HFmode)
- tmp1 = lowpart_subreg (V8HFmode, force_reg (HFmode, val), HFmode);
+ {
+ tmp1 = force_reg (HFmode, val);
+ tmp2 = gen_reg_rtx (mode);
+ emit_insn (gen_vec_setv8hf_0 (tmp2, CONST0_RTX (mode), tmp1));
+ tmp1 = gen_lowpart (mode, tmp2);
+ }
else
{
/* Extend to SImode using a paradoxical SUBREG. */
diff --git a/gcc/testsuite/gcc.target/i386/pr104664.c b/gcc/testsuite/gcc.target/i386/pr104664.c
new file mode 100644
index 0000000..8a3d6c7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr104664.c
@@ -0,0 +1,16 @@
+/* { dg-do compile { target { ! ia32 } } } */
+/* { dg-options "-march=x86-64 -mtune=generic -Og -ffinite-math-only" } */
+
+typedef _Float128 __attribute__((__vector_size__ (16))) U;
+typedef _Float128 __attribute__((__vector_size__ (32))) V;
+typedef _Float16 __attribute__((__vector_size__ (16))) W;
+
+U u;
+V v;
+W w;
+
+void
+foo (void)
+{
+ w *= (W)(u == __builtin_shufflevector (v, u, 2));
+}