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| author | Christoph Muellner <cmuellner@gcc.gnu.org> | 2021-05-05 21:23:41 +0200 |
|---|---|---|
| committer | Jim Wilson <jimw@sifive.com> | 2021-05-05 18:15:42 -0700 |
| commit | e1fcf14f33e4f371aae8ae497ca58a760d53ca6d (patch) | |
| tree | 60f7b28fbcbdb2fe4b8582e029db5e2cb4f717cf | |
| parent | 449480114aa5ee7e400b75c654f548e38fd03a64 (diff) | |
| download | gcc-e1fcf14f33e4f371aae8ae497ca58a760d53ca6d.zip gcc-e1fcf14f33e4f371aae8ae497ca58a760d53ca6d.tar.gz gcc-e1fcf14f33e4f371aae8ae497ca58a760d53ca6d.tar.bz2 | |
RISC-V: Generate helpers for cbranch4.
On RISC-V we are facing the fact, that our conditional branches
require Pmode conditions. Currently, we generate them explicitly
with a check for Pmode and then calling the proper generator
(i.e. gen_cbranchdi4 on RV64 and gen_cbranchsi4 on RV32).
Let's simplify this code by generating the INSN helpers
and use gen_cbranch4 (Pmode).
gcc/
PR target/100266
* config/riscv/riscv.c (riscv_block_move_loop): Use cbranch helper.
* config/riscv/riscv.md (cbranch<mode>4): Generate helpers.
(stack_protect_test): Use cbranch helper.
| -rw-r--r-- | gcc/config/riscv/riscv.c | 5 | ||||
| -rw-r--r-- | gcc/config/riscv/riscv.md | 12 |
2 files changed, 5 insertions, 12 deletions
diff --git a/gcc/config/riscv/riscv.c b/gcc/config/riscv/riscv.c index e1064e3..27665e5 100644 --- a/gcc/config/riscv/riscv.c +++ b/gcc/config/riscv/riscv.c @@ -3258,10 +3258,7 @@ riscv_block_move_loop (rtx dest, rtx src, unsigned HOST_WIDE_INT length, /* Emit the loop condition. */ test = gen_rtx_NE (VOIDmode, src_reg, final_src); - if (Pmode == DImode) - emit_jump_insn (gen_cbranchdi4 (test, src_reg, final_src, label)); - else - emit_jump_insn (gen_cbranchsi4 (test, src_reg, final_src, label)); + emit_jump_insn (gen_cbranch4 (Pmode, test, src_reg, final_src, label)); /* Mop up any left-over bytes. */ if (leftover) diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md index 0e35960..f88877f 100644 --- a/gcc/config/riscv/riscv.md +++ b/gcc/config/riscv/riscv.md @@ -2153,7 +2153,7 @@ (label_ref (match_operand 1)) (pc)))]) -(define_expand "cbranch<mode>4" +(define_expand "@cbranch<mode>4" [(set (pc) (if_then_else (match_operator 0 "comparison_operator" [(match_operand:BR 1 "register_operand") @@ -2167,7 +2167,7 @@ DONE; }) -(define_expand "cbranch<mode>4" +(define_expand "@cbranch<mode>4" [(set (pc) (if_then_else (match_operator 0 "fp_branch_comparison" [(match_operand:ANYF 1 "register_operand") @@ -2829,12 +2829,8 @@ operands[0], operands[1])); - if (mode == DImode) - emit_jump_insn (gen_cbranchdi4 (gen_rtx_EQ (VOIDmode, result, const0_rtx), - result, const0_rtx, operands[2])); - else - emit_jump_insn (gen_cbranchsi4 (gen_rtx_EQ (VOIDmode, result, const0_rtx), - result, const0_rtx, operands[2])); + rtx cond = gen_rtx_EQ (VOIDmode, result, const0_rtx); + emit_jump_insn (gen_cbranch4 (mode, cond, result, const0_rtx, operands[2])); DONE; }) |