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author | Richard Sandiford <richard.sandiford@linaro.org> | 2017-11-09 15:15:47 +0000 |
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committer | Richard Sandiford <rsandifo@gcc.gnu.org> | 2017-11-09 15:15:47 +0000 |
commit | d574e624a9d156600731554133db68dc6868e7b5 (patch) | |
tree | adb5c386eba4fd4c0910cb2d7ba061783d9a9267 | |
parent | a826c5019e1439181a822c2b5079fec22654e37b (diff) | |
download | gcc-d574e624a9d156600731554133db68dc6868e7b5.zip gcc-d574e624a9d156600731554133db68dc6868e7b5.tar.gz gcc-d574e624a9d156600731554133db68dc6868e7b5.tar.bz2 |
Add available_vector_sizes to target-supports.exp
This patch adds a routine that lists the available vector sizes
for a target and uses it for some existing target conditions.
Later patches add more uses.
The cases are taken from multiple_sizes.
2017-11-09 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/testsuite/
* lib/target-supports.exp (available_vector_sizes): New proc.
(check_effective_target_vect_multiple_sizes): Use it.
(check_effective_target_vect64): Likewise.
(check_effective_target_vect_sizes_32B_16B): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r254590
-rw-r--r-- | gcc/testsuite/ChangeLog | 9 | ||||
-rw-r--r-- | gcc/testsuite/lib/target-supports.exp | 62 |
2 files changed, 34 insertions, 37 deletions
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index b444978..8881232 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -2,6 +2,15 @@ Alan Hayward <alan.hayward@arm.com> David Sherwood <david.sherwood@arm.com> + * lib/target-supports.exp (available_vector_sizes): New proc. + (check_effective_target_vect_multiple_sizes): Use it. + (check_effective_target_vect64): Likewise. + (check_effective_target_vect_sizes_32B_16B): Likewise. + +2017-11-09 Richard Sandiford <richard.sandiford@linaro.org> + Alan Hayward <alan.hayward@arm.com> + David Sherwood <david.sherwood@arm.com> + * gcc.dg/vect/tree-vect.h (VECTOR_BITS): Define. * gcc.dg/vect/bb-slp-pr69907.c: Include tree-vect.h. (N): New macro. diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index d7ef04f..8e7b641 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -6581,46 +6581,38 @@ foreach N {2 3 4 8} { }] } -# Return 1 if the target supports multiple vector sizes - -proc check_effective_target_vect_multiple_sizes { } { - global et_vect_multiple_sizes_saved - global et_index +# Return the list of vector sizes (in bits) that each target supports. +# A vector length of "0" indicates variable-length vectors. - set et_vect_multiple_sizes_saved($et_index) 0 - if { [istarget aarch64*-*-*] - || [is-effective-target arm_neon] - || (([istarget i?86-*-*] || [istarget x86_64-*-*]) - && ([check_avx_available] && ![check_prefer_avx128])) } { - set et_vect_multiple_sizes_saved($et_index) 1 +proc available_vector_sizes { } { + set result {} + if { [istarget aarch64*-*-*] } { + lappend result 128 64 + } elseif { [istarget arm*-*-*] + && [check_effective_target_arm_neon_ok] } { + lappend result 128 64 + } elseif { (([istarget i?86-*-*] || [istarget x86_64-*-*]) + && ([check_avx_available] && ![check_prefer_avx128])) } { + lappend result 256 128 + } elseif { [istarget sparc*-*-*] } { + lappend result 64 + } else { + # The traditional default asumption. + lappend result 128 } + return $result +} + +# Return 1 if the target supports multiple vector sizes - verbose "check_effective_target_vect_multiple_sizes:\ - returning $et_vect_multiple_sizes_saved($et_index)" 2 - return $et_vect_multiple_sizes_saved($et_index) +proc check_effective_target_vect_multiple_sizes { } { + return [expr { [llength [available_vector_sizes]] > 1 }] } # Return 1 if the target supports vectors of 64 bits. proc check_effective_target_vect64 { } { - global et_vect64_saved - global et_index - - if [info exists et_vect64_saved($et_index)] { - verbose "check_effective_target_vect64: using cached result" 2 - } else { - set et_vect64_saved($et_index) 0 - if { ([is-effective-target arm_neon] - && [check_effective_target_arm_little_endian]) - || [istarget aarch64*-*-*] - || [istarget sparc*-*-*] } { - set et_vect64_saved($et_index) 1 - } - } - - verbose "check_effective_target_vect64:\ - returning $et_vect64_saved($et_index)" 2 - return $et_vect64_saved($et_index) + return [expr { [lsearch -exact [available_vector_sizes] 64] >= 0 }] } # Return 1 if the target supports vector copysignf calls. @@ -7747,11 +7739,7 @@ proc check_avx_available { } { # Return true if 32- and 16-bytes vectors are available. proc check_effective_target_vect_sizes_32B_16B { } { - if { [check_avx_available] && ![check_prefer_avx128] } { - return 1; - } else { - return 0; - } + return [expr { [available_vector_sizes] == [list 256 128] }] } # Return true if 16- and 8-bytes vectors are available. |