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| author | Kyrylo Tkachov <kyrylo.tkachov@arm.com> | 2015-07-31 16:39:35 +0000 |
|---|---|---|
| committer | Kyrylo Tkachov <ktkachov@gcc.gnu.org> | 2015-07-31 16:39:35 +0000 |
| commit | d459fde28f3d37e03d87b221b504a525ddb58665 (patch) | |
| tree | 4134c89067ee6803482cb1ef8e43caa6744997ef | |
| parent | c0a5daa4018308b0a7fa2e96bfc0abf031c506e9 (diff) | |
| download | gcc-d459fde28f3d37e03d87b221b504a525ddb58665.zip gcc-d459fde28f3d37e03d87b221b504a525ddb58665.tar.gz gcc-d459fde28f3d37e03d87b221b504a525ddb58665.tar.bz2 | |
[ARM][2/3] Make if_neg_move and if_move_neg into insn_and_split
* config/arm/arm.md (*if_neg_move): Convert to insn_and_split.
Enable for TARGET_32BIT.
(*if_move_neg): Likewise.
From-SVN: r226447
| -rw-r--r-- | gcc/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/config/arm/arm.md | 60 |
2 files changed, 44 insertions, 22 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 63d18ed..5b9fe09 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2015-07-31 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/arm.md (*if_neg_move): Convert to insn_and_split. + Enable for TARGET_32BIT. + (*if_move_neg): Likewise. + 2015-07-31 Nick Clifton <nickc@redhat.com> * config/m32r/m32r.c (m32r_attribute_identifier): New function. diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index 0be70a8..128f4ac 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -10064,21 +10064,24 @@ (set_attr "type" "multiple")] ) -(define_insn "*if_neg_move" - [(set (match_operand:SI 0 "s_register_operand" "=r,r,r") +(define_insn_and_split "*if_neg_move" + [(set (match_operand:SI 0 "s_register_operand" "=l,r") (if_then_else:SI (match_operator 4 "arm_comparison_operator" [(match_operand 3 "cc_register" "") (const_int 0)]) - (neg:SI (match_operand:SI 2 "s_register_operand" "r,r,r")) - (match_operand:SI 1 "arm_not_operand" "0,?rI,K")))] - "TARGET_ARM" - "@ - rsb%d4\\t%0, %2, #0 - mov%D4\\t%0, %1\;rsb%d4\\t%0, %2, #0 - mvn%D4\\t%0, #%B1\;rsb%d4\\t%0, %2, #0" + (neg:SI (match_operand:SI 2 "s_register_operand" "l,r")) + (match_operand:SI 1 "s_register_operand" "0,0")))] + "TARGET_32BIT" + "#" + "&& reload_completed" + [(cond_exec (match_op_dup 4 [(match_dup 3) (const_int 0)]) + (set (match_dup 0) (neg:SI (match_dup 2))))] + "" [(set_attr "conds" "use") - (set_attr "length" "4,8,8") - (set_attr "type" "logic_shift_imm,multiple,multiple")] + (set_attr "length" "4") + (set_attr "arch" "t2,32") + (set_attr "enabled_for_depr_it" "yes,no") + (set_attr "type" "logic_shift_imm")] ) (define_insn "*ifcompare_move_neg" @@ -10097,21 +10100,34 @@ (set_attr "type" "multiple")] ) -(define_insn "*if_move_neg" - [(set (match_operand:SI 0 "s_register_operand" "=r,r,r") +(define_insn_and_split "*if_move_neg" + [(set (match_operand:SI 0 "s_register_operand" "=l,r") (if_then_else:SI (match_operator 4 "arm_comparison_operator" [(match_operand 3 "cc_register" "") (const_int 0)]) - (match_operand:SI 1 "arm_not_operand" "0,?rI,K") - (neg:SI (match_operand:SI 2 "s_register_operand" "r,r,r"))))] - "TARGET_ARM" - "@ - rsb%D4\\t%0, %2, #0 - mov%d4\\t%0, %1\;rsb%D4\\t%0, %2, #0 - mvn%d4\\t%0, #%B1\;rsb%D4\\t%0, %2, #0" + (match_operand:SI 1 "s_register_operand" "0,0") + (neg:SI (match_operand:SI 2 "s_register_operand" "l,r"))))] + "TARGET_32BIT" + "#" + "&& reload_completed" + [(cond_exec (match_dup 5) + (set (match_dup 0) (neg:SI (match_dup 2))))] + { + machine_mode mode = GET_MODE (operands[3]); + rtx_code rc = GET_CODE (operands[4]); + + if (mode == CCFPmode || mode == CCFPEmode) + rc = reverse_condition_maybe_unordered (rc); + else + rc = reverse_condition (rc); + + operands[5] = gen_rtx_fmt_ee (rc, VOIDmode, operands[3], const0_rtx); + } [(set_attr "conds" "use") - (set_attr "length" "4,8,8") - (set_attr "type" "logic_shift_imm,multiple,multiple")] + (set_attr "length" "4") + (set_attr "arch" "t2,32") + (set_attr "enabled_for_depr_it" "yes,no") + (set_attr "type" "logic_shift_imm")] ) (define_insn "*arith_adjacentmem" |