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| author | Jiong Wang <jiong.wang@arm.com> | 2015-07-24 09:06:53 +0000 |
|---|---|---|
| committer | Jiong Wang <jiwang@gcc.gnu.org> | 2015-07-24 09:06:53 +0000 |
| commit | d076e1b7ba6ae028e372f2f5a3cd3605f5ff5fea (patch) | |
| tree | 096d768e9d13b390ddd65dd61b1afd2c903424ce | |
| parent | 96a111a3dfb5def92156e41ea48f7677f34ce3c2 (diff) | |
| download | gcc-d076e1b7ba6ae028e372f2f5a3cd3605f5ff5fea.zip gcc-d076e1b7ba6ae028e372f2f5a3cd3605f5ff5fea.tar.gz gcc-d076e1b7ba6ae028e372f2f5a3cd3605f5ff5fea.tar.bz2 | |
[AArch64] Revert REG_ALLOC_ORDER/HONOR_REG_ALLOC_ORDER
2015-07-24 Jiong Wang <jiong.wang@arm.com>
Revert:
2015-07-22 Jiong Wang <jiong.wang@arm.com>
PR target/63521
* config/aarch64/aarch64.h (REG_ALLOC_ORDER): Define.
(HONOR_REG_ALLOC_ORDER): Define.
From-SVN: r226141
| -rw-r--r-- | gcc/ChangeLog | 8 | ||||
| -rw-r--r-- | gcc/config/aarch64/aarch64.h | 25 |
2 files changed, 8 insertions, 25 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 515f8ad..75530ae 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2015-07-24 Jiong Wang <jiong.wang@arm.com> + + Revert: + 2015-07-22 Jiong Wang <jiong.wang@arm.com> + PR target/63521 + * config/aarch64/aarch64.h (REG_ALLOC_ORDER): Define. + (HONOR_REG_ALLOC_ORDER): Define. + 2015-07-24 Richard Biener <rguenther@suse.de> * genmatch.c (add_operator): Allow SSA_NAME as predicate. diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h index 4292fd2..3851564 100644 --- a/gcc/config/aarch64/aarch64.h +++ b/gcc/config/aarch64/aarch64.h @@ -344,31 +344,6 @@ extern unsigned long aarch64_isa_flags; V_ALIASES(28), V_ALIASES(29), V_ALIASES(30), V_ALIASES(31) \ } -#define REG_ALLOC_ORDER \ - { \ - /* Reverse order for argument registers. */ \ - 7, 6, 5, 4, 3, 2, 1, 0, \ - /* Other caller-saved registers. */ \ - 8, 9, 10, 11, 12, 13, 14, 15, \ - 16, 17, 18, 30, \ - /* Callee-saved registers. */ \ - 19, 20, 21, 22, 23, 24, 25, 26, \ - 27, 28, \ - /* All other registers. */ \ - 29, 31, \ - /* Reverse order for argument vregisters. */ \ - 39, 38, 37, 36, 35, 34, 33, 32, \ - /* Other caller-saved vregisters. */ \ - 48, 49, 50, 51, 52, 53, 54, 55, \ - 56, 57, 58, 59, 60, 61, 62, 63, \ - /* Callee-saved vregisters. */ \ - 40, 41, 42, 43, 44, 45, 46, 47, \ - /* Other pseudo registers. */ \ - 64, 65, 66 \ -} - -#define HONOR_REG_ALLOC_ORDER 1 - /* Say that the epilogue uses the return address register. Note that in the case of sibcalls, the values "used by the epilogue" are considered live at the start of the called function. */ |