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| author | Pat Haugen <pthaugen@us.ibm.com> | 2019-02-12 22:03:00 +0000 |
|---|---|---|
| committer | Pat Haugen <pthaugen@gcc.gnu.org> | 2019-02-12 22:03:00 +0000 |
| commit | ced20a50bc3c34dc36d602f024123433bf009f5d (patch) | |
| tree | 713b6a868366e008d63991943e9e0630483ae42b | |
| parent | 2faf2a305d7d95a9ca618ef08c774d57a521e9fa (diff) | |
| download | gcc-ced20a50bc3c34dc36d602f024123433bf009f5d.zip gcc-ced20a50bc3c34dc36d602f024123433bf009f5d.tar.gz gcc-ced20a50bc3c34dc36d602f024123433bf009f5d.tar.bz2 | |
invoke.texi (RS/6000 and PowerPC Options): Remove duplicate -maltivec.
* doc/invoke.texi (RS/6000 and PowerPC Options): Remove duplicate
-maltivec. Delete -maltivec=be and -maltivec=le documentation.
From-SVN: r268829
| -rw-r--r-- | gcc/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/doc/invoke.texi | 32 |
2 files changed, 8 insertions, 29 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 27b8b1d..5225f63 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2019-02-12 Pat Haugen <pthaugen@us.ibm.com> + + * doc/invoke.texi (RS/6000 and PowerPC Options): Remove duplicate + -maltivec. Delete -maltivec=be and -maltivec=le documentation. + 2019-02-12 H.J. Lu <hongjiu.lu@intel.com> PR target/89229 diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index f5044a6..ab5cb93 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -1085,7 +1085,7 @@ See RS/6000 and PowerPC Options. -mstrict-align -mno-strict-align -mrelocatable @gol -mno-relocatable -mrelocatable-lib -mno-relocatable-lib @gol -mtoc -mno-toc -mlittle -mlittle-endian -mbig -mbig-endian @gol --mdynamic-no-pic -maltivec -mswdiv -msingle-pic-base @gol +-mdynamic-no-pic -mswdiv -msingle-pic-base @gol -mprioritize-restricted-insns=@var{priority} @gol -msched-costly-dep=@var{dependence_type} @gol -minsert-sched-nops=@var{scheme} @gol @@ -24088,40 +24088,14 @@ the AltiVec instruction set. You may also need to set @option{-mabi=altivec} to adjust the current ABI with AltiVec ABI enhancements. -When @option{-maltivec} is used, rather than @option{-maltivec=le} or -@option{-maltivec=be}, the element order for AltiVec intrinsics such -as @code{vec_splat}, @code{vec_extract}, and @code{vec_insert} +When @option{-maltivec} is used, the element order for AltiVec intrinsics +such as @code{vec_splat}, @code{vec_extract}, and @code{vec_insert} match array element order corresponding to the endianness of the target. That is, element zero identifies the leftmost element in a vector register when targeting a big-endian platform, and identifies the rightmost element in a vector register when targeting a little-endian platform. -@item -maltivec=be -@opindex maltivec=be -Generate AltiVec instructions using big-endian element order, -regardless of whether the target is big- or little-endian. This is -the default when targeting a big-endian platform. Using this option -is currently deprecated. Support for this feature will be removed in -GCC 9. - -The element order is used to interpret element numbers in AltiVec -intrinsics such as @code{vec_splat}, @code{vec_extract}, and -@code{vec_insert}. By default, these match array element order -corresponding to the endianness for the target. - -@item -maltivec=le -@opindex maltivec=le -Generate AltiVec instructions using little-endian element order, -regardless of whether the target is big- or little-endian. This is -the default when targeting a little-endian platform. This option is -currently ignored when targeting a big-endian platform. - -The element order is used to interpret element numbers in AltiVec -intrinsics such as @code{vec_splat}, @code{vec_extract}, and -@code{vec_insert}. By default, these match array element order -corresponding to the endianness for the target. - @item -mvrsave @itemx -mno-vrsave @opindex mvrsave |