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author | J"orn Rennecke <joern.rennecke@st.com> | 2005-09-12 13:24:11 +0000 |
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committer | Joern Rennecke <amylaar@gcc.gnu.org> | 2005-09-12 14:24:11 +0100 |
commit | cd41bae5fde3f26c99c33511c08c523b55e295c8 (patch) | |
tree | 9a25c6cb202cf3e802e5e483b0517d87736d5807 | |
parent | b99791d10e32889c42570fd14f595e0582aa9314 (diff) | |
download | gcc-cd41bae5fde3f26c99c33511c08c523b55e295c8.zip gcc-cd41bae5fde3f26c99c33511c08c523b55e295c8.tar.gz gcc-cd41bae5fde3f26c99c33511c08c523b55e295c8.tar.bz2 |
sh.h (HARD_REGNO_MODE_OK): Allow V4SFmode in general purpose registers for TARGET_SHMEDIA.
* sh.h (HARD_REGNO_MODE_OK): Allow V4SFmode in general purpose
registers for TARGET_SHMEDIA.
(enum reg_class, REG_CLASS_NAMES, REG_CLASS_CONTENTS): Rename
GENERAL_FP_REGS to GENERAL_DF_REGS. Add GENERAL_FP_REGS as union
of GENERAL_REGS and FP_REGS.
From-SVN: r104170
-rw-r--r-- | gcc/ChangeLog | 8 | ||||
-rw-r--r-- | gcc/config/sh/sh.h | 8 |
2 files changed, 14 insertions, 2 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 27593d5..70eb987 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2005-09-12 J"orn Rennecke <joern.rennecke@st.com> + + * sh.h (HARD_REGNO_MODE_OK): Allow V4SFmode in general purpose + registers for TARGET_SHMEDIA. + (enum reg_class, REG_CLASS_NAMES, REG_CLASS_CONTENTS): Rename + GENERAL_FP_REGS to GENERAL_DF_REGS. Add GENERAL_FP_REGS as union + of GENERAL_REGS and FP_REGS. + 2005-09-12 Bernd Schmidt <bernd.schmidt@analog.com> * config/bfin/bfin.c (legimitize_pic_address): Use gen_const_mem. diff --git a/gcc/config/sh/sh.h b/gcc/config/sh/sh.h index 3d16f44..306da7a 100644 --- a/gcc/config/sh/sh.h +++ b/gcc/config/sh/sh.h @@ -1152,7 +1152,7 @@ extern char sh_additional_register_names[ADDREGNAMES_SIZE] \ || GENERAL_REGISTER_P (REGNO)) \ : (MODE) == V4SFmode \ ? ((FP_REGISTER_P (REGNO) && ((REGNO) - FIRST_FP_REG) % 4 == 0) \ - || (! TARGET_SHMEDIA && GENERAL_REGISTER_P (REGNO))) \ + || GENERAL_REGISTER_P (REGNO)) \ : (MODE) == V16SFmode \ ? (TARGET_SHMEDIA \ ? (FP_REGISTER_P (REGNO) && ((REGNO) - FIRST_FP_REG) % 16 == 0) \ @@ -1341,6 +1341,7 @@ enum reg_class DF_REGS, FPSCR_REGS, GENERAL_FP_REGS, + GENERAL_DF_REGS, TARGET_REGS, ALL_REGS, LIM_REG_CLASSES @@ -1365,6 +1366,7 @@ enum reg_class "DF_REGS", \ "FPSCR_REGS", \ "GENERAL_FP_REGS", \ + "GENERAL_DF_REGS", \ "TARGET_REGS", \ "ALL_REGS", \ } @@ -1402,7 +1404,9 @@ enum reg_class /* FPSCR_REGS: */ \ { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00800000 }, \ /* GENERAL_FP_REGS: */ \ - { 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x0102ff00 }, \ + { 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x03020000 }, \ +/* GENERAL_DF_REGS: */ \ + { 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x0302ff00 }, \ /* TARGET_REGS: */ \ { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000ff }, \ /* ALL_REGS: */ \ |