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| author | Richard Earnshaw <erich@gnu.org> | 1994-07-12 13:33:12 +0000 |
|---|---|---|
| committer | Richard Earnshaw <erich@gnu.org> | 1994-07-12 13:33:12 +0000 |
| commit | cce4322b7f852712b971b70322cd5f2357500df4 (patch) | |
| tree | 4b64d6d0359c941efa547acbd9162813a4ff6a40 | |
| parent | 31e6408aeef9635a0975c6fafb0cb94c490076ef (diff) | |
| download | gcc-cce4322b7f852712b971b70322cd5f2357500df4.zip gcc-cce4322b7f852712b971b70322cd5f2357500df4.tar.gz gcc-cce4322b7f852712b971b70322cd5f2357500df4.tar.bz2 | |
(matcher for SFmode inequality comparison): Use cmfe, not cfm.
(matchers for {store-flag, not-store-flag, neg-store-flag}): Output
if-false instruction first before if-true instruction.
(matcher for (AND store-flag x)): Only match if reversible_cc_register.
(matcher for (IF-THEN-ELSE reg (NOT reg))): Likewise.
From-SVN: r7741
| -rw-r--r-- | gcc/config/arm/arm.md | 19 |
1 files changed, 10 insertions, 9 deletions
diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index 7847d34..ea09e13 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -2792,8 +2792,8 @@ (match_operand:SF 1 "fpu_add_operand" "fG,H")))] "" "@ - cmf%?\\t%0, %1 - cnf%?\\t%0, #%N1" + cmf%?e\\t%0, %1 + cnf%?e\\t%0, #%N1" [(set_attr "conds" "set") (set_attr "type" "f_2_r")]) @@ -3146,7 +3146,7 @@ [(set (match_operand:SI 0 "s_register_operand" "=r") (match_operator:SI 1 "comparison_operator" [(reg 24) (const_int 0)]))] "" - "mov%d1\\t%0, #1\;mov%D1\\t%0, #0" + "mov%D1\\t%0, #0\;mov%d1\\t%0, #1" [(set_attr "conds" "use") (set_attr "length" "8")]) @@ -3155,7 +3155,7 @@ (neg:SI (match_operator:SI 1 "comparison_operator" [(reg 24) (const_int 0)])))] "" - "mvn%d1\\t%0, #0\;mov%D1\\t%0, #0" + "mov%D1\\t%0, #0\;mvn%d1\\t%0, #0" [(set_attr "conds" "use") (set_attr "length" "8")]) @@ -3164,7 +3164,7 @@ (not:SI (match_operator:SI 1 "comparison_operator" [(reg 24) (const_int 0)])))] "" - "mvn%d1\\t%0, #1\;mov%D1\\t%0, #0" + "mov%D1\\t%0, #0\;mvn%d1\\t%0, #1" [(set_attr "conds" "use") (set_attr "length" "8")]) @@ -3634,7 +3634,7 @@ (define_insn "" [(set (match_operand:SI 0 "s_register_operand" "=r") (and:SI (match_operator 1 "comparison_operator" - [(reg 24) (const_int 0)]) + [(match_operand 3 "reversible_cc_register" "") (const_int 0)]) (match_operand:SI 2 "s_register_operand" "r")))] "" "mov%D1\\t%0, #0\;and%d1\\t%0, %2, #1" @@ -3851,10 +3851,10 @@ "* if (GET_CODE (operands[3]) == NE) { - if (which_alternative != 0) - output_asm_insn (\"mov%d4\\t%0, %1\", operands); if (which_alternative != 1) output_asm_insn (\"mov%D4\\t%0, %2\", operands); + if (which_alternative != 0) + output_asm_insn (\"mov%d4\\t%0, %1\", operands); return \"\"; } if (which_alternative != 0) @@ -5401,7 +5401,8 @@ (define_insn "" [(set (match_operand:SI 0 "s_register_operand" "=r,r") (if_then_else:SI (match_operator 4 "comparison_operator" - [(match_operand 3 "cc_register" "") (const_int 0)]) + [(match_operand 3 "reversible_cc_register" "") + (const_int 0)]) (match_operand:SI 1 "arm_rhs_operand" "0,?rI") (not:SI (match_operand:SI 2 "s_register_operand" "r,r"))))] |