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| author | Wilco Dijkstra <wdijkstr@arm.com> | 2017-09-04 17:23:01 +0000 |
|---|---|---|
| committer | Wilco Dijkstra <wilco@gcc.gnu.org> | 2017-09-04 17:23:01 +0000 |
| commit | c9244494c07bce8ef0c7830b101eb94e9eff3bc0 (patch) | |
| tree | e67de2bb38efd630c105828175444df243e7ff52 | |
| parent | df66af3b1edaf46420191aec73311fa408cb18c1 (diff) | |
| download | gcc-c9244494c07bce8ef0c7830b101eb94e9eff3bc0.zip gcc-c9244494c07bce8ef0c7830b101eb94e9eff3bc0.tar.gz gcc-c9244494c07bce8ef0c7830b101eb94e9eff3bc0.tar.bz2 | |
Fix ldrd offsets
Fix the ldrd offsets of Thumb-2 - for TARGET_LDRD the range is +-1020,
without -252..4096. This reduces the number of addressing instructions
when using DI mode operations (such as in PR77308).
gcc/
* config/arm/arm.c (arm_legitimate_index_p): Add comment.
(thumb2_legitimate_index_p): Use correct range for DI/DF mode.
From-SVN: r251681
| -rw-r--r-- | gcc/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/config/arm/arm.c | 14 |
2 files changed, 14 insertions, 5 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 6f93a4b..74bf4a0 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2017-09-04 Wilco Dijkstra <wdijkstr@arm.com> + + * config/arm/arm.c (arm_legitimate_index_p): Add comment. + (thumb2_legitimate_index_p): Use correct range for DI/DF mode. + 2017-09-04 Bernd Edlinger <bernd.edlinger@hotmail.de> PR target/77308 diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index e31ab60..4870957 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -7932,6 +7932,8 @@ arm_legitimate_index_p (machine_mode mode, rtx index, RTX_CODE outer, { HOST_WIDE_INT val = INTVAL (index); + /* Assume we emit ldrd or 2x ldr if !TARGET_LDRD. + If vldr is selected it uses arm_coproc_mem_operand. */ if (TARGET_LDRD) return val > -256 && val < 256; else @@ -8059,11 +8061,13 @@ thumb2_legitimate_index_p (machine_mode mode, rtx index, int strict_p) if (code == CONST_INT) { HOST_WIDE_INT val = INTVAL (index); - /* ??? Can we assume ldrd for thumb2? */ - /* Thumb-2 ldrd only has reg+const addressing modes. */ - /* ldrd supports offsets of +-1020. - However the ldr fallback does not. */ - return val > -256 && val < 256 && (val & 3) == 0; + /* Thumb-2 ldrd only has reg+const addressing modes. + Assume we emit ldrd or 2x ldr if !TARGET_LDRD. + If vldr is selected it uses arm_coproc_mem_operand. */ + if (TARGET_LDRD) + return IN_RANGE (val, -1020, 1020) && (val & 3) == 0; + else + return IN_RANGE (val, -255, 4095 - 4); } else return 0; |