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authorRoger Sayle <roger@eyesopen.com>2002-08-31 17:49:00 +0000
committerHans-Peter Nilsson <hp@gcc.gnu.org>2002-08-31 17:49:00 +0000
commitc8ffe46fdaac758fb93f6c9d306b88ade38fc769 (patch)
treebc7a229594d9934daa8b3425ab32be407ae6dc51
parent39abf68d8c37930a4b563f1a48b6b0123d40f472 (diff)
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20020720-1.x: Skip test on mmix-knuth-mmixware.
* gcc.c-torture/execute/20020720-1.x: Skip test on mmix-knuth-mmixware. Correct comment. Co-Authored-By: Hans-Peter Nilsson <hp@bitrange.com> From-SVN: r56708
-rw-r--r--gcc/testsuite/ChangeLog6
-rw-r--r--gcc/testsuite/gcc.c-torture/execute/20020720-1.x18
2 files changed, 16 insertions, 8 deletions
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 3f3a17d..8369762 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,9 @@
+2002-08-31 Roger Sayle <roger@eyesopen.com>
+ Hans-Peter Nilsson <hp@bitrange.com>
+
+ * gcc.c-torture/execute/20020720-1.x: Skip test on
+ mmix-knuth-mmixware. Correct comment.
+
2002-08-27 Mark Mitchell <mark@codesourcery.com>
* testsuite/g++.dg/abi/bitfield5.C: New test.
diff --git a/gcc/testsuite/gcc.c-torture/execute/20020720-1.x b/gcc/testsuite/gcc.c-torture/execute/20020720-1.x
index 6534217..4cf53d0 100644
--- a/gcc/testsuite/gcc.c-torture/execute/20020720-1.x
+++ b/gcc/testsuite/gcc.c-torture/execute/20020720-1.x
@@ -1,15 +1,17 @@
# The following targets fail 20020720-1.c for several reasons:
# (1) They implement floating point instructions via software, or
-# (2) Their machine descriptions obfuscate the "abs(x) < 0.0" comparison.
-# For example, 1 insn performs abs, 1 insn loads 0.0, 1 insn sets
-# CCmode flags based upon the FP comparison, and a 4th insn makes
-# a conditional branch based upon the appropriate bits in the flags.
-# If the intermediate comparison can't be recognized, the combiner
-# is unable to optimize all four RTL instructions simultaneously.
-
+# (2) The "abs(x) < 0.0" comparison is split up in too many intermediate
+# insns for combine to handle -- it can handle max three insns
+# simultaneously. For example, for RISCy machines it is common that 1
+# insn performs abs, 1 insn loads 0.0, 1 insn sets CCmode flags based
+# upon the FP comparison, and a 4th insn makes a conditional branch
+# based upon the appropriate bits in the flags. On the other hand, if
+# for example the comparison insn takes 0.0 as an operand, the
+# combiner is able to see all intermediate instructions simultaneously
+# and can make the optimization.
if { [istarget "powerpc-*-*"] || [istarget "rs6000-*-*"] \
|| [istarget "mips*-*-*"] || [istarget "xtensa-*-*"] \
- || [istarget "sh-*-*"] } {
+ || [istarget "sh-*-*"] || [istarget "mmix-*-*"] } {
return 1
}