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authorRichard Earnshaw <rearnsha@gcc.gnu.org>2005-05-09 22:00:06 +0000
committerRichard Earnshaw <rearnsha@gcc.gnu.org>2005-05-09 22:00:06 +0000
commitc87e6352ed5daad3c13f0ca4056b07de910daf12 (patch)
treebf2d8266f765fdf7ede2269eadf8359befd33cd6
parente3d97bde61135c9962234fdb1eed22a059709ca0 (diff)
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arm.c (arm_gen_constant): Add new heuristic for generating constant integers that can be expressed as the...
* arm.c (arm_gen_constant): Add new heuristic for generating constant integers that can be expressed as the difference of two valid immediates. From-SVN: r99474
-rw-r--r--gcc/config/arm/arm.c35
1 files changed, 35 insertions, 0 deletions
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 1743980..6b84d77 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -1909,6 +1909,41 @@ arm_gen_constant (enum rtx_code code, enum machine_mode mode, rtx cond,
}
}
+ /* See if we can calculate the value as the difference between two
+ valid immediates. */
+ if (clear_sign_bit_copies + clear_zero_bit_copies <= 16)
+ {
+ int topshift = clear_sign_bit_copies & ~1;
+
+ temp1 = ((remainder + (0x00800000 >> topshift))
+ & (0xff000000 >> topshift));
+
+ /* If temp1 is zero, then that means the 9 most significant
+ bits of remainder were 1 and we've caused it to overflow.
+ When topshift is 0 we don't need to do anything since we
+ can borrow from 'bit 32'. */
+ if (temp1 == 0 && topshift != 0)
+ temp1 = 0x80000000 >> (topshift - 1);
+
+ temp2 = temp1 - remainder;
+
+ if (const_ok_for_arm (temp2))
+ {
+ if (generate)
+ {
+ rtx new_src = subtargets ? gen_reg_rtx (mode) : target;
+ emit_constant_insn (cond,
+ gen_rtx_SET (VOIDmode, new_src,
+ GEN_INT (temp1)));
+ emit_constant_insn (cond,
+ gen_addsi3 (target, new_src,
+ GEN_INT (-temp2)));
+ }
+
+ return 2;
+ }
+ }
+
/* See if we can generate this by setting the bottom (or the top)
16 bits, and then shifting these into the other half of the
word. We only look for the simplest cases, to do more would cost