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| author | Segher Boessenkool <segher@kernel.crashing.org> | 2017-02-23 00:50:46 +0100 |
|---|---|---|
| committer | Segher Boessenkool <segher@gcc.gnu.org> | 2017-02-23 00:50:46 +0100 |
| commit | c5f06528e56621ce683517a5d2ca30e6b3c7b71c (patch) | |
| tree | 0d88fc2c67e4724582485e7125a2c65df904e471 | |
| parent | 0a864a97e9ab9b1bb6dbf13d6b471460c451be88 (diff) | |
| download | gcc-c5f06528e56621ce683517a5d2ca30e6b3c7b71c.zip gcc-c5f06528e56621ce683517a5d2ca30e6b3c7b71c.tar.gz gcc-c5f06528e56621ce683517a5d2ca30e6b3c7b71c.tar.bz2 | |
rs6000: Fix fsel pattern (PR79211)
The fsel define_insn uses fpr_reg_operand for its predicates. This
won't work because passes can put a hard register in the operands: in
the testcase, combine likes to forward the parameter registers to what
then is still an smin, and then split1 uses "*s<minmax><mode>3_fpr"
(which has gpc_reg_operand). And then we have a GPR in the operand,
which does not match fpr_reg_operand.
It seems to me the predicates should be gpc_reg_operand here as well.
This patch changes that.
PR target/79211
* config/rs6000/rs6000.md (*fsel<SFDF:mode><SFDF2:mode>4): Use
gpc_reg_operand instead of fpr_reg_operand.
From-SVN: r245667
| -rw-r--r-- | gcc/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/config/rs6000/rs6000.md | 8 |
2 files changed, 10 insertions, 4 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 9654753..7155850 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2017-02-22 Segher Boessenkool <segher@kernel.crashing.org> + + PR target/79211 + * config/rs6000/rs6000.md (*fsel<SFDF:mode><SFDF2:mode>4): Use + gpc_reg_operand instead of fpr_reg_operand. + 2017-02-22 Sameera Deshpande <sameera.deshpande@imgtec.com> * config/mips/mips.c (mips_return_in_memory): Force FP diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 3626e78..06c0a8b 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -4987,12 +4987,12 @@ }") (define_insn "*fsel<SFDF:mode><SFDF2:mode>4" - [(set (match_operand:SFDF 0 "fpr_reg_operand" "=&<SFDF:rreg2>") + [(set (match_operand:SFDF 0 "gpc_reg_operand" "=&<SFDF:rreg2>") (if_then_else:SFDF - (ge (match_operand:SFDF2 1 "fpr_reg_operand" "<SFDF2:rreg2>") + (ge (match_operand:SFDF2 1 "gpc_reg_operand" "<SFDF2:rreg2>") (match_operand:SFDF2 4 "zero_fp_constant" "F")) - (match_operand:SFDF 2 "fpr_reg_operand" "<SFDF:rreg2>") - (match_operand:SFDF 3 "fpr_reg_operand" "<SFDF:rreg2>")))] + (match_operand:SFDF 2 "gpc_reg_operand" "<SFDF:rreg2>") + (match_operand:SFDF 3 "gpc_reg_operand" "<SFDF:rreg2>")))] "TARGET_<MODE>_FPR && TARGET_PPC_GFXOPT" "fsel %0,%1,%2,%3" [(set_attr "type" "fp")]) |